Latex/Masterarbeit
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

4.2

Browse Source
This commit is contained in:
Patrick Hangl
2026-01-15 15:25:41 +01:00
parent 49dd3b0af3
commit ad0e8000af
5 changed files with 284 additions and 33 deletions
Download Patch File Download Diff File Expand all files Collapse all files

33
chapter_04.aux
View File

@@ -3,7 +3,6 @@
\acronymused{ANR}
\acronymused{CI}
\acronymused{ANR}
\acronymused{DSP}
\acronymused{ANR}
\acronymused{ANR}
\@writefile{toc}{\contentsline {subsection}{\numberline {4.1}Description of the low-power DSP and its environment}{40}{}\protected@file@percent }
@@ -45,8 +44,6 @@
\acronymused{PCM}
\acronymused{DSP}
\acronymused{PCM}
\acronymused{ARM}
\acronymused{DSP}
\acronymused{DSP}
\acronymused{DSP}
\acronymused{DSP}
@@ -60,7 +57,7 @@
\acronymused{MAC}
\acronymused{ALU}
\acronymused{MAC}
\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.1.2}Communication between the ARM core and the DSP}{41}{}\protected@file@percent }
\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.1.2}Communication between the ARM core and the DSP core}{41}{}\protected@file@percent }
\acronymused{CI}
\acronymused{ARM}
\acronymused{DSP}
@@ -99,9 +96,9 @@
\acronymused{DMA}
\acronymused{ARM}
\acronymused{DSP}
\acronymused{ARM}
\acronymused{DSP}
\acronymused{ARM}
\acronymused{ARM}
\acronymused{DMA}
\acronymused{PCM}
\acronymused{ARM}
@@ -109,6 +106,7 @@
\acronymused{DSP}
\acronymused{ARM}
\acronymused{DSP}
\acronymused{ARM}
\acronymused{ANR}
\acronymused{DSP}
\acronymused{ARM}
@@ -117,7 +115,6 @@
\acronymused{PCM}
\acronymused{ARM}
\acronymused{DSP}
\acronymused{DMA}
\@writefile{lof}{\contentsline {figure}{\numberline {34}{\ignorespaces Detailed visualization of the \ac {DMA} operations between the PCM interface to the shared memory section. When the memory buffer occupied, an interrupt is triggerd, either to the \ac {DSP} core or to the \ac {ARM} core, depending on the input or output direction.}}{45}{}\protected@file@percent }
\acronymused{DMA}
\acronymused{DSP}
@@ -132,7 +129,6 @@
\acronymused{ARM}
\acronymused{ANR}
\acronymused{DSP}
\acronymused{ARM}
\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.2.2}Code implementation of the ANR algorithm on the DSP}{46}{}\protected@file@percent }
\acronymused{ANR}
\acronymused{DSP}
@@ -142,20 +138,27 @@
\acronymused{DSP}
\newlabel{fig:fig_dps_code_memory}{{4.2.2}{46}{}{}{}}
\@writefile{lof}{\contentsline {figure}{\numberline {35}{\ignorespaces Low-level implementation: Memory initialization and mapping}}{46}{}\protected@file@percent }
\@writefile{toc}{\contentsline {paragraph}{Main loop and interrupt handling}{46}{}\protected@file@percent }
\@writefile{lof}{\contentsline {figure}{\numberline {36}{\ignorespaces Exemplary memory map of the 4-element input buffer array. As it is initialized as a 16 bit integer array, each element occupies 2 bytes of memory, resulting in a total size of 8 bytes for the entire array.}}{47}{}\protected@file@percent }
\newlabel{fig:fig_compiler.jpg}{{36}{47}{}{}{}}
\@writefile{toc}{\contentsline {paragraph}{Main loop and interrupt handling}{47}{}\protected@file@percent }
\acronymused{DSP}
\acronymused{ANR}
\acronymused{ARM}
\acronymused{ARM}
\acronymused{DSP}
\acronymused{ARM}
\acronymused{DSP}
\newlabel{fig:fig_dps_code_mainloop}{{4.2.2}{47}{}{}{}}
\@writefile{lof}{\contentsline {figure}{\numberline {36}{\ignorespaces Low-level implementation: Main loop and interrupt handling}}{47}{}\protected@file@percent }
\@writefile{toc}{\contentsline {paragraph}{ANR function}{47}{}\protected@file@percent }
\@writefile{toc}{\contentsline {subsection}{\numberline {4.3}First optimization approach: algorithm implementation}{47}{}\protected@file@percent }
\@writefile{toc}{\contentsline {subsection}{\numberline {4.4}Second optimization approach: hybrid ANR algorithm}{47}{}\protected@file@percent }
\@writefile{lof}{\contentsline {figure}{\numberline {37}{\ignorespaces Low-level implementation: Main loop and interrupt handling}}{47}{}\protected@file@percent }
\@writefile{lof}{\contentsline {figure}{\numberline {38}{\ignorespaces Flow diagram of the code implementation of the main loop and interrupt handling on the \ac {DSP} core.}}{48}{}\protected@file@percent }
\acronymused{DSP}
\newlabel{fig:fig_dsp_logic.jpg}{{38}{48}{}{}{}}
\@writefile{toc}{\contentsline {paragraph}{ANR function}{48}{}\protected@file@percent }
\acronymused{DSP}
\@writefile{toc}{\contentsline {subsection}{\numberline {4.3}Hardware simulation of previous examples}{49}{}\protected@file@percent }
\@writefile{toc}{\contentsline {subsection}{\numberline {4.4}Optimization approach: hybrid ANR algorithm}{49}{}\protected@file@percent }
\@setckpt{chapter_04}{
\setcounter{page}{48}
\setcounter{page}{50}
\setcounter{equation}{21}
\setcounter{enumi}{0}
\setcounter{enumii}{0}
@@ -169,7 +172,7 @@
\setcounter{subsubsection}{0}
\setcounter{paragraph}{0}
\setcounter{subparagraph}{0}
\setcounter{figure}{36}
\setcounter{figure}{38}
\setcounter{table}{0}
\setcounter{float@type}{16}
\setcounter{tabx@nest}{0}
@@ -290,7 +293,7 @@
\setcounter{lstnumber}{18}
\setcounter{FancyVerbLine}{0}
\setcounter{linenumber}{1}
\setcounter{LN@truepage}{47}
\setcounter{LN@truepage}{49}
\setcounter{FancyVerbWriteLine}{0}
\setcounter{FancyVerbBufferLine}{0}
\setcounter{FV@TrueTabGroupLevel}{0}