4.2
This commit is contained in:
Patrick Hangl
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@@ -133,11 +133,29 @@
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@@ -17,14 +17,14 @@ When the \ac{DSP} is not required to process audio data, it can be paused by pau
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The processing unit of the \ac{DSP} is equipped with load/store architecture, meaning that, initially all operands need to be moved from the memory to the registers, before any operation can be performed. After this task is performed, the execution units (\ac{ALU} and multiplier) can perform their operations on the data and write back the results into the registers. Finally, the results need to be explicitly moved back to the memory.\\ \\
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Processor-wise, the \ac{DSP} includes a three stage pipeline consisting of fetch, decode, and execute stages, allowing for overlapping instruction execution and improved throughput. The architecture is optimized for high cycle efficiency when executing computationally intensive signal-processing workloads. The featured dual Harvard, dual \ac{MAC} architecture (two separate \ac{ALU}s) enables the execution of two \ac{MAC} operations, two memory operations (load/store) and two pointer updates in a single processor cycle.
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\subsubsection{Communication between the ARM core and the DSP}
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In order to ensure a smooth, but power-efficient, operation together with the \ac{CI} system, a interrupt-driven communication between the \ac{ARM} core and the \ac{DSP} core is crucial. Center of communication between the the cores is the already mentioned shared memory region accessible by both processing units. This shared memory enables the exchange of data without the need for separate communication protocols or input/output interfaces (refer to Figure \ref{fig:fig_dsp_setup.jpg}). Synchronization between the cores is achieved using interrupt-based signaling: the \ac{ARM} core initiates processing requests by triggering an interrupt on the \ac{DSP}, while the \ac{DSP} notifies the \ac{ARM} core upon completion of a task also by rasing an inerrupt. This approach ensures efficient coordination while minimizing active waiting (polling) and therefore unnecessary power consumption.
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In order to ensure a smooth, but power-efficient, operation together with the \ac{CI} system, a interrupt-driven communication between the \ac{ARM} core and the \ac{DSP} core is crucial. Center of communication between the the cores is the already mentioned shared memory region accessible by both processing units. This shared memory enables the exchange of data without the need for separate communication protocols or input/output interfaces (refer to Figure \ref{fig:fig_dsp_setup.jpg}). Synchronization between the cores is achieved using interrupt-based signaling: the \ac{ARM} core initiates processing requests by triggering waking up the \ac{DSP} and triggering an interrupt which sets an action flag, while the \ac{DSP} notifies the \ac{ARM} core upon completion of a task also by changing an interrupt register. This approach ensures efficient coordination while minimizing active waiting (polling) and therefore unnecessary power consumption.
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\begin{figure}[H]
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\centering
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\includegraphics[width=1.0\linewidth]{Bilder/fig_dsp_setup.jpg}
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\caption{Simplified visualization of the interaction between the \ac{ARM} core and the \ac{DSP} core}
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\label{fig:fig_dsp_setup.jpg}
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\end{figure}
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\noindent The \ac{ARM} Core receives the audio data from the CI system via a \ac{PCM} interface, which offers one input and one output register. An interrupt trigger the integrated \ac{DMA} controller, which transfers the audio data from the \ac{PCM} interface to buffer in a predefined memory location. Once the buffer is filled with enough samples (), another interrupt is triggered by the DMA controller itself, notifying the \ac{DSP} core to start processing the audio data. The \ac{DSP} core then reads the audio samples from the shared memory, processes them using the implemented \ac{ANR} algorithm, and writes the processed samples back to an output buffer, also located in the shared memory. Finally, the \ac{ARM} core is notified via an interrupt from the \ac{DSP} core, that the processing is complete - the \ac{DMA} controller then transfers the processed audio samples from the output buffer back to the \ac{PCM} interface for playback (refer to Figure \ref{fig:fig_dsp_comm.jpg}).\\ \\
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\noindent The \ac{ARM} Core receives the 16-bit audio data (the corrupted signal and the reference noise signal via two channels) from the CI system via a \ac{PCM} interface, which offers one 32-bit input and one 32-bit output register. An interrupt triggers the integrated \ac{DMA} controller when the input register is occupied, which transfers the audio data from the \ac{PCM} interface to buffer in a predefined memory location. Once completed, the \ac{DSP} core is requested to start processing the audio data. The \ac{DSP} core then reads the audio samples from the shared memory, processes them using the implemented \ac{ANR} algorithm, and writes the a 32-bit processed sample (shifted from 16 bit) back to an output buffer, also located in the shared memory. Finally, the \ac{ARM} core is notified via an interrupt from the \ac{DSP} core, that the processing is complete - the \ac{DMA} controller then transfers the processed audio samples from the output buffer back to the \ac{PCM} interface for playback (refer to Figure \ref{fig:fig_dsp_comm.jpg}).\\ \\
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\begin{figure}[H]
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\centering
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\includegraphics[width=0.9\linewidth]{Bilder/fig_dsp_comm.jpg}
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@@ -33,7 +33,7 @@ In order to ensure a smooth, but power-efficient, operation together with the \a
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\end{figure}
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\subsection{Implementation of the ANR algorithm on the DSP}
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\subsubsection{High-level description of the ANR algorithm implementation}
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\subsubsection{Description of the ANR algorithm implementation}
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In contrary, to the high-level simulation environment written in Python from the previous chapter, the implementation of the \ac{ANR} algorithm on the \ac{DSP} requires a low-level programming approach, as which takes into account the specific architecture and capabilities of the processor and its environment. This includes considerations such as memory management, data types, and optimization techniques specific to the \ac{DSP} architecture. The implementation is required to be done in the C programming language, which is a standard for embedded systems, as it allows low-level hardware implementation.\\ \\
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The implementation of the \ac{ANR} algorithm on the \ac{DSP} follows the same overall structure as the high-level variant, but now the focus lies on memory management, interrupt-handling and communication between the two cores. The \ac{ARM} operates in a continious loop, structured into several states:
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\begin{itemize}
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@@ -44,24 +44,71 @@ The implementation of the \ac{ANR} algorithm on the \ac{DSP} follows the same ov
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\end{itemize}
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On the contrary, the \ac{DSP} core operates in an interrupt-driven manner:
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\begin{itemize}
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\item \textbf{Idle:} The \ac{DSP} core remains in a halted state, waiting for an interrupt from the \ac{ARM} core to start processing.
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\item \textbf{Work:} Upon receiving the interrupt, the \ac{DSP} core reads the audio samples from the input buffer located in the shared memory, processes them using the implemented \ac{ANR} algorithm, and writes the processed samples back to the output buffer in the shared memory.
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\item \textbf{Done/Idle:} After completing the processing, the \ac{DSP} core triggers an interrupt on the \ac{ARM} core to notify that the processing is complete. The \ac{DSP} core then returns to the idle state, waiting for the next processing request.
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\item \textbf{Idle:} The \ac{DSP} core remains in a halted state, waiting to be activated by the \ac{ARM} core to start processing.
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\item \textbf{Work:} Once activated, the \ac{DSP} core reads the audio samples from the input buffer located in the shared memory, processes them using the implemented \ac{ANR} algorithm, and writes the processed samples back to the output buffer in the shared memory.
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\item \textbf{Done/Idle:} After completing the processing, the \ac{DSP} core triggers an interrupt on the \ac{ARM} core to notify that the processing is complete. The \ac{DSP} core then returns to its sleeping state, waiting for the next processing request.
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\end{itemize}
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\noindent The \ac{DMA} controller plays a crucial role in this architecture by handling the data transfers between the \ac{PCM} interface and the shared memory buffers. It operates independently of both the \ac{ARM} core and the \ac{DSP} core, allowing for efficient data movement without burdening the processing units. The \ac{DMA} controller is configured to transfer audio samples in blocks, triggering interrupts to notify the respective cores when new data is available or when processing is complete.
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\begin{figure}[H]
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\centering
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\includegraphics[width=1.0\linewidth]{Bilder/fig_dsp_dma.jpg}
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\caption{Visualization of the \ac{DMA} operations between the PCM interface to the shared memory section. When the memory buffer is filled by 50\%, an interrupt is triggerd, either to the \ac{DSP} core or to the \ac{ARM} core, depending on the input or output direction.}
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\caption{Detailed visualization of the \ac{DMA} operations between the PCM interface to the shared memory section. When the memory buffer occupied, an interrupt is triggerd, either to the \ac{DSP} core or to the \ac{ARM} core, depending on the input or output direction.}
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\label{fig:fig_dsp_dma.jpg}
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\end{figure}
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\noindent Figure \ref{fig:fig_dsp_dma.jpg} visualizes the concrete operation of the \ac{DMA} controller during the audio sample processing. The \ac{DMA} controller is configured to samplewise transfer the audio samples from the \ac{PCM} interface into a defined memory location of the shared memory (input buffer). When the input buffer is half full, an interrupt is triggered to the \ac{DSP} core, notifying it to start processing the available samples. After processing, the results are written to another designated section of the memory (output buffer). When the output buffer is filled is half full, another interrupt is triggered to the \ac{DMA} controller, indicating that the processed samples are ready to be transferred back to the \ac{PCM} interface for playback. \\ \\
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\noindent Figure \ref{fig:fig_dsp_dma.jpg} visualizes the concrete operation of the \ac{DMA} controller during the audio sample processing. The \ac{DMA} controller is configured to samplewise transfer the audio samples from the \ac{PCM} interface into a defined memory location of the shared memory (input buffer). When the input buffer is filled with one sample of both channels, an interrupt is triggered to the \ac{DSP} core, notifying it to start processing the available samples. After processing, the results are written to another designated section of the memory (output buffer). When the output buffer recieves the result, another interrupt is triggered to the \ac{DMA} controller, indicating that the processed samples are ready to be transferred back to the \ac{PCM} interface for playback. \\ \\
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As the \ac{ARM} operation is not the main focus of this thesis, the following section will focus on implementation of the \ac{ANR} algorithm on the \ac{DSP} core itself. As the behavior of the \ac{ARM} core is already sufficiently described, furhter implementaion details will be omitted in the following.
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\subsubsection{Code implementation of the ANR algorithm implementation}
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- Definition Speicherbereiche und Konstanten
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- Main loop
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- Initialisierung der Signale
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- Calc Funktion
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\subsubsection{Code implementation of the ANR algorithm on the DSP}
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The implementation of the \ac{ANR} algorithm on the \ac{DSP} core is structured into several key sections, each responsible for specific aspects of the algorithm's functionality. The following paragraphs outline the main components of the code implementation:
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\paragraph{Memory initialization and mapping}
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The memory initialization section starts with the definition of the interrupt register (0xC00004) and the corresponding bit masks used to control the interrupt behavior of the \ac{DSP} core. Afterwards, a section in the shared memory is defined for the storage of input and output audio samples after/before the transport to/from the \ac{PCM} interface. The output section is initialized with an offset of 16 bytes from the input section (0x800000), resulting in a storage capability of 4 32-bit double-words for each of the two memory sections - this is more than needed, but prevents future memory relocation, if the necessety for more space would arise. After this initialization, the interrupt register and the memory sections are declared as volatile variables, telling the compiler, that these variables can be changed outside the normal program flow (e.g., by hardware interrupts), preventing certain optimizations. The storage capability of 4 16-bit words shows itself in the declaration of the input and output arrays, consisting of 4 elements each. Finally, a variable is declared to signal the \ac{DSP} core, an interrupt has occured, which changes the state of the interrupt register and signals a processing request.
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\begin{figure}[H]
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\centering
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\begin{lstlisting}[language=C]
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#define CSS_CMD 0xC00004
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#define CSS_CMD_0 (1<<0)
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#define CSS_CMD_1 (1<<1)
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#define INPUT_PORT0_ADD 0x800000
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#define OUTPUT_PORT_ADD (INPUT_PORT0_ADD + 16)
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volatile static unsigned char set_storage(DMIO:CSS_CMD) css_cmd_flag;
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static volatile int16_t set_storage(DMB:INPUT_PORT0_ADD) input_port[4];
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static volatile int16_t set_storage(DMB:OUTPUT_PORT_ADD) output_port[4];
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static volatile int action_required;
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\end{lstlisting}
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\label{fig:fig_dps_code_memory}
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\caption{Low-level implementation: Memory initialization and mapping}
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\end{figure}
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\paragraph{Main loop and interrupt handling}
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The main loop of the \ac{DSP} core is quite compact, as it mainly focuses on handling interrupts and delegating the sample processing to the \ac{ANR} function. The loop starts by enabling interrupts with a compiler-specific function and setting up pointers for the output buffer and the sample variable. After setting the action flag to zero, the main function enters an infinite loop, signaling the \ac{ARM} core it´s halted state by setting the interrupt register to 1 and halting the core.\\ \\
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If the \ac{ARM} core requests a sample to be processed, a interrupt is triggered, which activates the \ac{DSP} core and sets the action flag to 1. The main loop then checks the action flag, and sets the interrupt register back to 0, indicating the \ac{ARM} core it is now processing the sample. After resetting the action flag, the output pointer is updated to point to the next position in the output buffer using a cyclic addition function. Before triggering the calc()-function the calculated sample from the previous cycle is moved from its temporary memory location to the current position in the output buffer. Afterwards, the calc()-function is triggered for the current cycle, and the loop ends.
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\begin{figure}[H]
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\centering
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\begin{lstlisting}[language=C]
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int main(void) {
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enable_interrupts();
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output_pointer = &output_port[1];
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sample_pointer = &sample;
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action_required = 0;
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while (1){
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css_cmd_flag = CSS_CMD_1;
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core_halt();
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if (action_required == 1) {
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css_cmd_flag = CSS_CMD_0;
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action_required = 0;
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out_pointer = cyclic_add(output_pointer, 2, output_port, 4);
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*output_pointer = *sample_pointer;
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calc(&corrupted_signal, &reference_noise_signal, mode, &input_port[1], &input_port[0], sample_pointer);
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}
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}
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}
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\end{lstlisting}
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\label{fig:fig_dps_code_mainloop}
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\caption{Low-level implementation: Main loop and interrupt handling}
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\end{figure}
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\paragraph{ANR function}
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\subsection{First optimization approach: algorithm implementation}
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\subsection{Second optimization approach: hybrid ANR algorithm}
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@@ -80,19 +68,19 @@
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-9" parent="1" style="text;whiteSpace=wrap;html=1;align=center;fontSize=10;" value="<div><span><b><font style="font-size: 12px;">20 kHz<br>DMA Operation</font></b></span></div>" vertex="1">
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-29" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">16 Bit</span>" vertex="1">
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-35" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">16 Bit</span>" vertex="1">
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-36" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">32 Bit</span>" vertex="1">
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-36" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">16 Bit</span>" vertex="1">
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-37" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">32 Bit</span>" vertex="1">
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-37" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">16 Bit</span>" vertex="1">
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-47" parent="1" style="text;whiteSpace=wrap;html=1;fontSize=12;" value="<span style="color: rgb(0, 0, 0); font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; font-weight: 400; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial; float: none; display: inline !important;"><font style="font-size: 14px;">Output Data</font></span>" vertex="1">
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-51" parent="1" style="text;whiteSpace=wrap;html=1;align=center;fontSize=12;" value="<font style="font-size: 14px;">Raise Interrupt<br>on ARM Core</font>" vertex="1">
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@@ -151,38 +139,14 @@
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-58" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">32 Bit</span>" vertex="1">
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-59" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">32 Bit</span>" vertex="1">
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-60" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">32 Bit</span>" vertex="1">
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-64" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">32 Bit</span>" vertex="1">
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<mxCell id="Uk31TYlx7ywhMvou_2Fj-65" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">32 Bit</span>" vertex="1">
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@@ -190,6 +154,60 @@
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<mxCell id="9jqM_zlcDrX7iHHAm0HB-1" parent="1" style="text;whiteSpace=wrap;html=1;" value="<b style="forced-color-adjust: none; color: rgb(0, 0, 0); font-family: Helvetica; font-size: 14px; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">DMA Output Operation</b>" vertex="1">
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<mxCell id="tJJhXIVE2DswCfvtTWS9-1" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;align=left;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">First 16 Bit:Corrupted Signal</span><div><span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;"><div style=""><span style="background-color: transparent; color: light-dark(rgb(0, 0, 0), rgb(255, 255, 255));">Second 16 Bit: Reference Noise Signal</span></div></span></div>" vertex="1">
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<mxCell id="tJJhXIVE2DswCfvtTWS9-2" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">Corrupted Signal</span>" vertex="1">
|
||||
<mxGeometry height="20" width="80" x="1261" y="347" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-3" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">Reference Noise Signal</span>" vertex="1">
|
||||
<mxGeometry height="20" width="120" x="1245" y="296" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-4" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">Not used</span>" vertex="1">
|
||||
<mxGeometry height="20" width="80" x="1272.5" y="245" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-5" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">Not used</span>" vertex="1">
|
||||
<mxGeometry height="20" width="80" x="1275" y="200" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-6" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">16 Bit</span>" vertex="1">
|
||||
<mxGeometry height="20" width="30" x="1230" y="645" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-7" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">16 Bit</span>" vertex="1">
|
||||
<mxGeometry height="20" width="30" x="1230" y="595" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-8" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">16 Bit</span>" vertex="1">
|
||||
<mxGeometry height="20" width="30" x="1230" y="545" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-9" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">16 Bit</span>" vertex="1">
|
||||
<mxGeometry height="20" width="30" x="1230" y="495" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-10" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">32 Bit</span>" vertex="1">
|
||||
<mxGeometry height="20" width="30" x="990" y="495" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-11" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">Not used</span>" vertex="1">
|
||||
<mxGeometry height="20" width="80" x="1272.5" y="565" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-12" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">Not used</span>" vertex="1">
|
||||
<mxGeometry height="20" width="80" x="1272.5" y="515" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-14" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">Filter Output</span>" vertex="1">
|
||||
<mxGeometry height="20" width="65" x="1268.5" y="620" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-15" edge="1" parent="1" style="endArrow=classic;html=1;rounded=0;entryX=1;entryY=0.5;entryDx=0;entryDy=0;" value="">
|
||||
<mxGeometry height="50" relative="1" width="50" as="geometry">
|
||||
<mxPoint x="1560" y="604" as="sourcePoint" />
|
||||
<mxPoint x="1380" y="603.75" as="targetPoint" />
|
||||
</mxGeometry>
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-16" parent="1" style="text;whiteSpace=wrap;html=1;align=center;fontSize=12;" value="<font style="font-size: 14px;">Raise Interrupt<br>on ARM Core</font>" vertex="1">
|
||||
<mxGeometry height="40" width="110" x="1450" y="600" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-17" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;" value="<span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: center; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;">Filter Output</span>" vertex="1">
|
||||
<mxGeometry height="20" width="65" x="1268.5" y="670" as="geometry" />
|
||||
</mxCell>
|
||||
<mxCell id="tJJhXIVE2DswCfvtTWS9-18" parent="1" style="text;whiteSpace=wrap;html=1;labelBackgroundColor=none;fontColor=default;fontStyle=0;fontSize=10;align=left;" value="<div style=""><span style="background-color: transparent; color: light-dark(rgb(0, 0, 0), rgb(255, 255, 255));">Filter Output</span></div><span style="forced-color-adjust: none; font-family: Helvetica; font-style: normal; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-indent: 0px; text-transform: none; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; white-space: normal; text-decoration-thickness: initial; text-decoration-style: initial; text-decoration-color: initial;"><div style=""><span style="background-color: transparent; color: light-dark(rgb(0, 0, 0), rgb(255, 255, 255));">shifted to 32 Bit</span></div></span>" vertex="1">
|
||||
<mxGeometry height="35" width="90" x="980" y="520" as="geometry" />
|
||||
</mxCell>
|
||||
</root>
|
||||
</mxGraphModel>
|
||||
</diagram>
|
||||
|
||||
Reference in New Issue
Block a user