Calc Funktion weitergecoded - kompiliert

2026-01-27 16:38:58 +01:00
parent 9b09cb21fa
commit 6f52b7ace4
93 changed files with 15970 additions and 14407 deletions
--- a/simulation/Release/.cache/clangd/index/signal_path.c.EFF85444D3BB52AD.idx
+++ b/simulation/Release/.cache/clangd/index/signal_path.c.EFF85444D3BB52AD.idx
--- a/simulation/Release/chesswork/main-9f2435.#
+++ b/simulation/Release/chesswork/main-9f2435.#
@@ -1,8 +1,8 @@
 466ba9a29dd6732e5048de41303e492793f3e524
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
-4dd04b51a581d801613ae5e6844f96871fc4cacf
+1eaa66e3661b4c51e70bd7db803caef395e44f4d
 da39a3ee5e6b4b0d3255bfef95601890afd80709
-9b3b7a9b88adaef22d9629763d6e1ac1ffb8a6db
+251b13cf6ca1c3f069f9d86a0d8130792b734e76
 28
 0
--- a/simulation/Release/chesswork/main-9f2435.o
+++ b/simulation/Release/chesswork/main-9f2435.o
--- a/simulation/Release/chesswork/main-9f2435.sfg
+++ b/simulation/Release/chesswork/main-9f2435.sfg
--- a/simulation/Release/chesswork/main.ctt
+++ b/simulation/Release/chesswork/main.ctt
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32
--- a/simulation/Release/chesswork/main.dti
+++ b/simulation/Release/chesswork/main.dti
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32
@@ -215,15 +215,8 @@
                    __PDMAvoid__ : _basic() __PDMAvoid;
                   __PDMIOvoid__ : _basic() __PDMIOvoid;
                     __PPMvoid__ : _basic() __PPMvoid;
                  OutputMode_DMA : _enum(DMA,4,4) OutputMode $__sint_DMA {
                                       OUTPUT_MODE_C_SENSOR = 0;
                                       OUTPUT_MODE_ACC_SENSOR = 1;
                                       OUTPUT_MODE_FIR_LMS = 2;
                                       OUTPUT_MODE_FIR = 3;
                                       OUTPUT_MODE_FIR_LMS_LEAKY = 4;
                                   }
                     __cchar_DMA : _basic(DMA,1,1) __cchar;
-                __A47__cchar_DMA : _array(DMA,47,1) [47] $__cchar_DMA;
+                __A48__cchar_DMA : _array(DMA,48,1) [48] $__cchar_DMA;
                 __A2__cchar_DMA : _array(DMA,2,1) [2] $__cchar_DMA;
                __A43__cchar_DMA : _array(DMA,43,1) [43] $__cchar_DMA;
                __A54__cchar_DMA : _array(DMA,54,1) [54] $__cchar_DMA;
--- a/simulation/Release/chesswork/main.fnm
+++ b/simulation/Release/chesswork/main.fnm
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32
@@ -16,7 +16,7 @@
    fopen
    feof
    fscanf
-    _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
+    _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_
    fprintf
    fclose
  )
@@ -46,8 +46,8 @@
  )
 ""
-  : _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
+  : _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_
-  : "calc" global "signal_processing\\include\\signal_path.h" 125 Ofile
+  : "calc" global "signal_processing\\include\\signal_path.h" 124 Ofile
  (
  )
--- a/simulation/Release/chesswork/main.gvt
+++ b/simulation/Release/chesswork/main.gvt
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32
@@ -8,8 +8,8 @@
    2 : _irq_stat_var_ typ=uint15_ bnd=e sz=1 algn=1 stl=irq_stat tref=uint15__irq_stat
    4 : stdin typ=int8_ bnd=e sz=4 algn=4 stl=DMA tref=__PFILE_DMA
    5 : stdout typ=int8_ bnd=e sz=4 algn=4 stl=DMA tref=__PFILE_DMA
-   10 : _ZL16corrupted_signal typ=int8_ bnd=f sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA
+   10 : _ZL17c_sensor_signal_t typ=int8_ bnd=f sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA
-   11 : _ZL22reference_noise_signal typ=int8_ bnd=f sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA
+   11 : _ZL19acc_sensor_signal_t typ=int8_ bnd=f sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA
   12 : _ZL10input_port typ=int8_ val=8388608f bnd=f sz=8 algn=2 stl=DMB tref=__A4DMB__sshort_DMB
   13 : _ZL11output_port typ=int8_ val=8388624f bnd=f sz=8 algn=2 stl=DMB tref=__A4DMB__sshort_DMB
   14 : _ZL15input_pointer_0 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__PDMB__sshort_DMA
@@ -17,14 +17,13 @@
   16 : _ZL14output_pointer typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__PDMB__sshort_DMA
   17 : _ZL14sample_pointer typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__PDMB__sshort_DMA
   18 : _ZL6sample typ=int8_ bnd=f sz=2 algn=2 stl=DMB tref=int16_t_DMB
-   19 : _ZZ4mainvE4mode typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=OutputMode_DMA
+   19 : _ZL13__strdb58f936 typ=int8_ bnd=F sz=48 algn=1 stl=DMA tref=__A48__cchar_DMA
-   20 : _ZL13__str8a4fef85 typ=int8_ bnd=F sz=47 algn=1 stl=DMA tref=__A47__cchar_DMA
+   20 : _ZL13__str00f02b8f typ=int8_ bnd=F sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA
-   21 : _ZL13__str00f02b8f typ=int8_ bnd=F sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA
+   21 : _ZL13__strff0646f3 typ=int8_ bnd=F sz=43 algn=1 stl=DMA tref=__A43__cchar_DMA
-   22 : _ZL13__strff0646f3 typ=int8_ bnd=F sz=43 algn=1 stl=DMA tref=__A43__cchar_DMA
+   22 : _ZL13__str8a32ec0e typ=int8_ bnd=F sz=54 algn=1 stl=DMA tref=__A54__cchar_DMA
-   23 : _ZL13__str8a32ec0e typ=int8_ bnd=F sz=54 algn=1 stl=DMA tref=__A54__cchar_DMA
+   23 : _ZL13__str00f52cca typ=int8_ bnd=F sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA
-   24 : _ZL13__str00f52cca typ=int8_ bnd=F sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA
+   24 : _ZL13__str41232700 typ=int8_ bnd=F sz=3 algn=1 stl=DMA tref=__A3__cchar_DMA
-   25 : _ZL13__str41232700 typ=int8_ bnd=F sz=3 algn=1 stl=DMA tref=__A3__cchar_DMA
+   25 : _ZL13__str2eb09b76 typ=int8_ bnd=F sz=4 algn=1 stl=DMA tref=__A4__cchar_DMA
   26 : _ZL13__str2eb09b76 typ=int8_ bnd=F sz=4 algn=1 stl=DMA tref=__A4__cchar_DMA
 ]
 __main_sttc {
 } #0
--- a/simulation/Release/chesswork/main.gvt.#
+++ b/simulation/Release/chesswork/main.gvt.#
@@ -1,7 +1,7 @@
 b94f5e81f66808a8f4f9315bd020e05811fb8d4a
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
-71526df70ad714866e87fde227f899b3f5e3c622
+93d7916815179fe21c6cc81c73f7c33d50df4bf6
 da39a3ee5e6b4b0d3255bfef95601890afd80709
 da39a3ee5e6b4b0d3255bfef95601890afd80709
 0
--- a/simulation/Release/chesswork/main.gvt.o
+++ b/simulation/Release/chesswork/main.gvt.o
--- a/simulation/Release/chesswork/main.ini
+++ b/simulation/Release/chesswork/main.ini
@@ -1,10 +1,10 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32
-_ZL16corrupted_signal/10 $ corrupted_signal
+_ZL17c_sensor_signal_t/10 $ c_sensor_signal_t
-_ZL22reference_noise_signal/11 $ reference_noise_signal
+_ZL19acc_sensor_signal_t/11 $ acc_sensor_signal_t
 _ZL10input_port/12 $ input_port
 _ZL11output_port/13 $ output_port
 _ZL15input_pointer_0/14 $ input_pointer_0
@@ -12,19 +12,17 @@ _ZL15input_pointer_1/15 $ input_pointer_1
 _ZL14output_pointer/16 $ output_pointer
 _ZL14sample_pointer/17 $ sample_pointer
 _ZL6sample/18 $ sample
-_ZZ4mainvE4mode/19 $ mode _main
+_ZL13__strdb58f936/19 $ __strdb58f936
-_ZZ4mainvE4mode/19 : #02 #00 #00 #00 
+_ZL13__strdb58f936/19 : #2e #2f #73 #69 #6d #75 #6c #61 #74 #69 #6f #6e #5f #64 #61 #74 #61 #2f #63 #6f #6d #70 #6c #65 #78 #5f #63 #5f #73 #65 #6e #73 #6f #72 #5f #73 #69 #67 #6e #61 #6c #5f #74 #2e #74 #78 #74 #00 
-_ZL13__str8a4fef85/20 $ __str8a4fef85
+_ZL13__str00f02b8f/20 $ __str00f02b8f
-_ZL13__str8a4fef85/20 : #2e #2f #73 #69 #6d #75 #6c #61 #74 #69 #6f #6e #5f #64 #61 #74 #61 #2f #63 #6f #6d #70 #6c #65 #78 #5f #63 #6f #72 #72 #75 #70 #74 #65 #64 #5f #73 #69 #67 #6e #61 #6c #2e #74 #78 #74 #00 
+_ZL13__str00f02b8f/20 : #72 #00 
-_ZL13__str00f02b8f/21 $ __str00f02b8f
+_ZL13__strff0646f3/21 $ __strff0646f3
-_ZL13__str00f02b8f/21 : #72 #00 
+_ZL13__strff0646f3/21 : #2e #2f #73 #69 #6d #75 #6c #61 #74 #69 #6f #6e #5f #64 #61 #74 #61 #2f #63 #6f #6d #70 #6c #65 #78 #5f #6e #6f #69 #73 #65 #5f #73 #69 #67 #6e #61 #6c #2e #74 #78 #74 #00 
-_ZL13__strff0646f3/22 $ __strff0646f3
+_ZL13__str8a32ec0e/22 $ __str8a32ec0e
-_ZL13__strff0646f3/22 : #2e #2f #73 #69 #6d #75 #6c #61 #74 #69 #6f #6e #5f #64 #61 #74 #61 #2f #63 #6f #6d #70 #6c #65 #78 #5f #6e #6f #69 #73 #65 #5f #73 #69 #67 #6e #61 #6c #2e #74 #78 #74 #00 
+_ZL13__str8a32ec0e/22 : #2e #2f #73 #69 #6d #75 #6c #61 #74 #69 #6f #6e #5f #64 #61 #74 #61 #2f #6f #75 #74 #70 #75 #74 #2f #63 #6f #6d #70 #6c #65 #78 #5f #6f #75 #74 #70 #75 #74 #5f #73 #69 #6d #75 #6c #61 #74 #65 #64 #2e #74 #78 #74 #00 
-_ZL13__str8a32ec0e/23 $ __str8a32ec0e
+_ZL13__str00f52cca/23 $ __str00f52cca
-_ZL13__str8a32ec0e/23 : #2e #2f #73 #69 #6d #75 #6c #61 #74 #69 #6f #6e #5f #64 #61 #74 #61 #2f #6f #75 #74 #70 #75 #74 #2f #63 #6f #6d #70 #6c #65 #78 #5f #6f #75 #74 #70 #75 #74 #5f #73 #69 #6d #75 #6c #61 #74 #65 #64 #2e #74 #78 #74 #00 
+_ZL13__str00f52cca/23 : #77 #00 
-_ZL13__str00f52cca/24 $ __str00f52cca
+_ZL13__str41232700/24 $ __str41232700
-_ZL13__str00f52cca/24 : #77 #00 
+_ZL13__str41232700/24 : #25 #64 #00 
-_ZL13__str41232700/25 $ __str41232700
+_ZL13__str2eb09b76/25 $ __str2eb09b76
-_ZL13__str41232700/25 : #25 #64 #00 
+_ZL13__str2eb09b76/25 : #25 #64 #0a #00 
 _ZL13__str2eb09b76/26 $ __str2eb09b76
 _ZL13__str2eb09b76/26 : #25 #64 #0a #00 
--- a/simulation/Release/chesswork/main.lib
+++ b/simulation/Release/chesswork/main.lib
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32
@@ -64,11 +64,11 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi : user_defined, called {
    vac : ( srIM[0] );
 }
-// void calc(SingleSignalPath *, SingleSignalPath *, OutputMode, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)
+// void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)
-F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ : user_defined, called {
+F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ : user_defined, called {
-    fnm : "calc" 'void calc(SingleSignalPath *, SingleSignalPath *, OutputMode, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)';
+    fnm : "calc" 'void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)';
-    arg : ( dmaddr_:i dmaddr_:i dmaddr_:i int32_:i dmaddr_:i dmaddr_:i dmaddr_:i );
+    arg : ( dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i );
-    loc : ( LR[0] A[0] A[1] RA[0] A[4] A[5] __spill_WDMA[0] );
+    loc : ( LR[0] A[0] A[1] A[4] A[5] __spill_WDMA[0] );
    vac : ( srIM[0] );
 }
--- a/simulation/Release/chesswork/main.tof
+++ b/simulation/Release/chesswork/main.tof
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32
--- a/simulation/Release/chesswork/signal_path-101f20.#
+++ b/simulation/Release/chesswork/signal_path-101f20.#
@@ -1,8 +1,10 @@
 6bd14b3bc305504dd7bb9269fe30bf59aca75a76
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
-4d136b3bc1359e2f4d279472cff46f21cdcb5b6c
+a40858c0f076a4ec624a8b1d7201496a733ce879
 da39a3ee5e6b4b0d3255bfef95601890afd80709
-7735b3b2a4dcf96232e36dd19984284915d22b06
+b5c9fb263d6b7e717ed7db0752d7b88c6c485ee9
 343
 0
 0
 0
--- a/simulation/Release/chesswork/signal_path-101f20.o
+++ b/simulation/Release/chesswork/signal_path-101f20.o
--- a/simulation/Release/chesswork/signal_path-101f20.sfg
+++ b/simulation/Release/chesswork/signal_path-101f20.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 13:04:23 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -35,16 +35,16 @@ F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi :
   32 : __extDM typ=int8_ bnd=b stl=DM
   33 : __extPM typ=uint20_ bnd=b stl=PM
   34 : __sp typ=dmaddr_ bnd=b stl=SP
-   35 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
+   35 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
-   36 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
+   36 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
-   37 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
+   37 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
-   38 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
+   38 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
   39 : ptr_fir_lms_delay_line typ=int8_ bnd=e sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB
   40 : __extDM_BufferPtrDMB typ=int8_ bnd=b stl=DM
   41 : ptr_fir_lms_coeffs typ=int8_ bnd=e sz=12 algn=4 stl=DMA tref=BufferPtr_DMA
   42 : __extDM_BufferPtr typ=int8_ bnd=b stl=DM
-   43 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
+   43 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
-   44 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
+   44 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
   45 : _ZL2mu typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__sint_DMA
   46 : __extDM_int32_ typ=int8_ bnd=b stl=DM
   47 : __extDM_int16_ typ=int8_ bnd=b stl=DM
@@ -59,24 +59,24 @@ F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi :
   56 : ptr_fir_lms_coeffs_ptr_start typ=int8_ bnd=b stl=DM
   57 : __extDM_int64_ typ=int8_ bnd=b stl=DM
   58 : __rd___sp typ=dmaddr_ bnd=m
-   60 : __ptr_cSensor_32 typ=dmaddr_ val=0a bnd=m adro=35
+   60 : __ptr_c_sensor_32 typ=dmaddr_ val=0a bnd=m adro=35
-   62 : __ptr_accSensor_32 typ=dmaddr_ val=0a bnd=m adro=36
+   62 : __ptr_acc_sensor_32 typ=dmaddr_ val=0a bnd=m adro=36
-   64 : __ptr_c_block_pre typ=dmaddr_ val=0a bnd=m adro=37
+   64 : __ptr_c_sensor_pre typ=dmaddr_ val=0a bnd=m adro=37
-   66 : __ptr_acc_block_pre typ=dmaddr_ val=0a bnd=m adro=38
+   66 : __ptr_acc_sensor_pre typ=dmaddr_ val=0a bnd=m adro=38
   67 : __ptr_ptr_fir_lms_delay_line typ=dmaddr_ bnd=m
   68 : __ptr_ptr_fir_lms_delay_line typ=dmaddr_ val=0a bnd=m adro=39
   70 : __ptr_ptr_fir_lms_coeffs typ=dmaddr_ val=0a bnd=m adro=41
-   72 : __ptr_acc_block_filt typ=dmaddr_ val=0a bnd=m adro=43
+   72 : __ptr_filter_accumulator typ=dmaddr_ val=0a bnd=m adro=43
-   74 : __ptr_out_32 typ=dmaddr_ val=0a bnd=m adro=44
+   74 : __ptr_output_32 typ=dmaddr_ val=0a bnd=m adro=44
   76 : __ptr_mu typ=dmaddr_ val=0a bnd=m adro=45
   77 : __ct_0 typ=uint1_ val=0f bnd=m
   78 : __la typ=dmaddr_ bnd=p tref=dmaddr___
   79 : cSensorSignal typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
   80 : accSensorSignal typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
   81 : output_mode typ=int32_ bnd=p tref=OutputMode__
-   82 : cSensor typ=dmaddr_ bnd=p tref=__PDMB__sshort__
+   82 : c_sensor_input typ=dmaddr_ bnd=p tref=__PDMB__sshort__
-   83 : accSensor typ=dmaddr_ bnd=p tref=__PDMB__sshort__
+   83 : acc_sensor_input typ=dmaddr_ bnd=p tref=__PDMB__sshort__
-   84 : out_16 typ=dmaddr_ bnd=p tref=__PDMB__sshort__
+   84 : output typ=dmaddr_ bnd=p tref=__PDMB__sshort__
   92 : __tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ typ=int32_ bnd=m tref=__sint__
   97 : __inl_p_x0 typ=dmaddr_ bnd=m tref=__PDMB__sint__
   99 : __inl_p_h typ=dmaddr_ bnd=m tref=__P__sint__
@@ -99,7 +99,7 @@ F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi :
  156 : __fch___extDM_int16_ typ=int16_ bnd=m
  160 : __tmp typ=int32_ bnd=m
  202 : __ct_0 typ=int32_ val=0f bnd=m
-  205 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre typ=int32_ bnd=m
+  205 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre typ=int32_ bnd=m
  206 : _Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi typ=dmaddr_ val=0r bnd=m
  208 : __link typ=dmaddr_ bnd=m
  212 : __fch_ptr_fir_lms_delay_line_ptr_current typ=dmaddr_ bnd=m
@@ -113,7 +113,7 @@ F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi :
  249 : __fchtmp typ=int32_ bnd=m
  259 : __tmp typ=int72_ bnd=m
  261 : __tmp typ=int72_ bnd=m
-  275 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre typ=int32_ bnd=m
+  275 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre typ=int32_ bnd=m
  280 : __tmp typ=int32_ bnd=m
  291 : __fch_ptr_fir_lms_coeffs_ptr_start typ=dmaddr_ bnd=m
  328 : __fch__ZL2mu typ=int32_ bnd=m
@@ -125,7 +125,7 @@ F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi :
  357 : __tmp typ=int32_ bnd=m
  358 : __tmp typ=int32_ bnd=m
  359 : __tmp typ=int64_ bnd=m
-  378 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 typ=int32_ bnd=m
+  378 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32 typ=int32_ bnd=m
  382 : __tmp typ=int72_ bnd=m
  383 : __tmp typ=int32_ bnd=m
  384 : __tmp typ=int16_ bnd=m
@@ -161,16 +161,16 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
    (__extDM.30 var=32) source ()  <54>;
    (__extPM.31 var=33) source ()  <55>;
    (__sp.32 var=34) source ()  <56>;
-    (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.33 var=35) source ()  <57>;
+    (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32.33 var=35) source ()  <57>;
-    (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.34 var=36) source ()  <58>;
+    (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32.34 var=36) source ()  <58>;
-    (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.35 var=37) source ()  <59>;
+    (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.35 var=37) source ()  <59>;
-    (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.36 var=38) source ()  <60>;
+    (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.36 var=38) source ()  <60>;
    (ptr_fir_lms_delay_line.37 var=39) source ()  <61>;
    (__extDM_BufferPtrDMB.38 var=40) source ()  <62>;
    (ptr_fir_lms_coeffs.39 var=41) source ()  <63>;
    (__extDM_BufferPtr.40 var=42) source ()  <64>;
-    (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.41 var=43) source ()  <65>;
+    (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator.41 var=43) source ()  <65>;
-    (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.42 var=44) source ()  <66>;
+    (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.42 var=44) source ()  <66>;
    (_ZL2mu.43 var=45) source ()  <67>;
    (__extDM_int32_.44 var=46) source ()  <68>;
    (__extDM_int16_.45 var=47) source ()  <69>;
@@ -184,10 +184,10 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
    (ptr_fir_lms_coeffs_buffer_len.53 var=55) source ()  <77>;
    (ptr_fir_lms_coeffs_ptr_start.54 var=56) source ()  <78>;
    (__extDM_int64_.55 var=57) source ()  <79>;
-    (__ptr_cSensor_32.57 var=60) const ()  <81>;
+    (__ptr_c_sensor_32.57 var=60) const ()  <81>;
-    (__ptr_accSensor_32.59 var=62) const ()  <83>;
+    (__ptr_acc_sensor_32.59 var=62) const ()  <83>;
-    (__ptr_c_block_pre.61 var=64) const ()  <85>;
+    (__ptr_c_sensor_pre.61 var=64) const ()  <85>;
-    (__ptr_acc_block_pre.63 var=66) const ()  <87>;
+    (__ptr_acc_sensor_pre.63 var=66) const ()  <87>;
    (__ptr_ptr_fir_lms_delay_line.65 var=68) const ()  <89>;
    (__ct_0.75 var=77) const ()  <99>;
    (__la.77 var=78 stl=LR off=0) inp ()  <101>;
@@ -195,21 +195,21 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
    (cSensorSignal.80 var=79 stl=A off=0) inp ()  <104>;
    (accSensorSignal.83 var=80 stl=A off=1) inp ()  <107>;
    (output_mode.86 var=81 stl=RA off=0) inp ()  <110>;
-    (cSensor.89 var=82 stl=A off=4) inp ()  <113>;
+    (c_sensor_input.89 var=82 stl=A off=4) inp ()  <113>;
-    (cSensor.90 var=82) deassign (cSensor.89)  <114>;
+    (c_sensor_input.90 var=82) deassign (c_sensor_input.89)  <114>;
-    (accSensor.92 var=83 stl=A off=5) inp ()  <116>;
+    (acc_sensor_input.92 var=83 stl=A off=5) inp ()  <116>;
-    (accSensor.93 var=83) deassign (accSensor.92)  <117>;
+    (acc_sensor_input.93 var=83) deassign (acc_sensor_input.92)  <117>;
-    (out_16.95 var=84 stl=__spill_WDMA off=0) inp ()  <119>;
+    (output.95 var=84 stl=__spill_WDMA off=0) inp ()  <119>;
-    (out_16.96 var=84) deassign (out_16.95)  <120>;
+    (output.96 var=84) deassign (output.95)  <120>;
    (__rd___sp.98 var=58) rd_res_reg (__R_SP.24 __sp.32)  <122>;
    (__R_SP.102 var=26 __sp.103 var=34) wr_res_reg (__rt.2219 __sp.32)  <126>;
-    (__fch___extDM_int16_.246 var=141 __extDM_int16_.247 var=47 __vola.248 var=29) load (__M_SDMB.6 cSensor.90 __extDM_int16_.45 __vola.27)  <270>;
+    (__fch___extDM_int16_.246 var=141 __extDM_int16_.247 var=47 __vola.248 var=29) load (__M_SDMB.6 c_sensor_input.90 __extDM_int16_.45 __vola.27)  <270>;
    (__ct_16.250 var=143) const ()  <272>;
-    (__M_WDMA.258 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.259 var=35) store (__tmp.2415 __ptr_cSensor_32.57 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.33)  <280>;
+    (__M_WDMA.258 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32.259 var=35) store (__tmp.2415 __ptr_c_sensor_32.57 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32.33)  <280>;
-    (__fch___extDM_int16_.265 var=156 __extDM_int16_.266 var=47 __vola.267 var=29) load (__M_SDMB.6 accSensor.93 __extDM_int16_.247 __vola.248)  <286>;
+    (__fch___extDM_int16_.265 var=156 __extDM_int16_.266 var=47 __vola.267 var=29) load (__M_SDMB.6 acc_sensor_input.93 __extDM_int16_.247 __vola.248)  <286>;
-    (__M_WDMA.277 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.278 var=36) store (__tmp.2420 __ptr_accSensor_32.59 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.34)  <296>;
+    (__M_WDMA.277 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32.278 var=36) store (__tmp.2420 __ptr_acc_sensor_32.59 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32.34)  <296>;
-    (__M_WDMA.563 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.564 var=37) store (__tmp.2415 __ptr_c_block_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.35)  <494>;
+    (__M_WDMA.563 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.564 var=37) store (__tmp.2415 __ptr_c_sensor_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.35)  <494>;
-    (__M_WDMA.576 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.577 var=38) store (__tmp.2420 __ptr_acc_block_pre.63 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.36)  <506>;
+    (__M_WDMA.576 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.577 var=38) store (__tmp.2420 __ptr_acc_sensor_pre.63 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.36)  <506>;
    (_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi.766 var=206) const ()  <608>;
    (__link.768 var=208) dmaddr__call_dmaddr_ (_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi.766)  <610>;
    (__rt.2219 var=481) __Pvoid__pl___Pvoid_int18_ (__rd___sp.98 __ct_0S0.2408)  <1905>;
@@ -219,9 +219,9 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
    (__tmp.2420 var=160) int72__shift_int72__int72__uint2_ (__fch___extDM_int16_.265 __ct_16.250 __ct_2.2414)  <2192>;
    call {
        (__ptr_ptr_fir_lms_delay_line.760 var=67 stl=A off=4) assign (__ptr_ptr_fir_lms_delay_line.65)  <602>;
-        (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.765 var=205 stl=RA off=0) assign (__tmp.2420)  <607>;
+        (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.765 var=205 stl=RA off=0) assign (__tmp.2420)  <607>;
        (__link.769 var=208 stl=LR off=0) assign (__link.768)  <611>;
-        (_ZL2mu.770 var=45 __extDM.771 var=32 __extDM_BufferPtr.772 var=42 __extDM_BufferPtrDMB.773 var=40 __extDM___PDMint32_.774 var=51 __extDM_int16_.775 var=47 __extDM_int32_.776 var=46 __extDM_int64_.777 var=57 __extDM_void.778 var=48 __extPM.779 var=33 __extPM_void.780 var=49 ptr_fir_lms_coeffs.781 var=41 ptr_fir_lms_coeffs_buffer_len.782 var=55 ptr_fir_lms_coeffs_ptr_current.783 var=53 ptr_fir_lms_coeffs_ptr_start.784 var=56 ptr_fir_lms_delay_line.785 var=39 ptr_fir_lms_delay_line_buffer_len.786 var=54 ptr_fir_lms_delay_line_ptr_current.787 var=50 ptr_fir_lms_delay_line_ptr_start.788 var=52 __vola.789 var=29) F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi (__link.769 __ptr_ptr_fir_lms_delay_line.760 __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.765 _ZL2mu.43 __extDM.30 __extDM_BufferPtr.40 __extDM_BufferPtrDMB.38 __extDM___PDMint32_.49 __extDM_int16_.266 __extDM_int32_.44 __extDM_int64_.55 __extDM_void.46 __extPM.31 __extPM_void.47 ptr_fir_lms_coeffs.39 ptr_fir_lms_coeffs_buffer_len.53 ptr_fir_lms_coeffs_ptr_current.51 ptr_fir_lms_coeffs_ptr_start.54 ptr_fir_lms_delay_line.37 ptr_fir_lms_delay_line_buffer_len.52 ptr_fir_lms_delay_line_ptr_current.48 ptr_fir_lms_delay_line_ptr_start.50 __vola.267)  <612>;
+        (_ZL2mu.770 var=45 __extDM.771 var=32 __extDM_BufferPtr.772 var=42 __extDM_BufferPtrDMB.773 var=40 __extDM___PDMint32_.774 var=51 __extDM_int16_.775 var=47 __extDM_int32_.776 var=46 __extDM_int64_.777 var=57 __extDM_void.778 var=48 __extPM.779 var=33 __extPM_void.780 var=49 ptr_fir_lms_coeffs.781 var=41 ptr_fir_lms_coeffs_buffer_len.782 var=55 ptr_fir_lms_coeffs_ptr_current.783 var=53 ptr_fir_lms_coeffs_ptr_start.784 var=56 ptr_fir_lms_delay_line.785 var=39 ptr_fir_lms_delay_line_buffer_len.786 var=54 ptr_fir_lms_delay_line_ptr_current.787 var=50 ptr_fir_lms_delay_line_ptr_start.788 var=52 __vola.789 var=29) F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi (__link.769 __ptr_ptr_fir_lms_delay_line.760 __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.765 _ZL2mu.43 __extDM.30 __extDM_BufferPtr.40 __extDM_BufferPtrDMB.38 __extDM___PDMint32_.49 __extDM_int16_.266 __extDM_int32_.44 __extDM_int64_.55 __extDM_void.46 __extPM.31 __extPM_void.47 ptr_fir_lms_coeffs.39 ptr_fir_lms_coeffs_buffer_len.53 ptr_fir_lms_coeffs_ptr_current.51 ptr_fir_lms_coeffs_ptr_start.54 ptr_fir_lms_delay_line.37 ptr_fir_lms_delay_line_buffer_len.52 ptr_fir_lms_delay_line_ptr_current.48 ptr_fir_lms_delay_line_ptr_start.50 __vola.267)  <612>;
    } #14 off=1
    #616 off=2
    (__ptr_ptr_fir_lms_coeffs.67 var=70) const ()  <91>;
@@ -282,15 +282,15 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
        } #19
    } #16 rng=[1,65535]
    #99 off=4
-    (__ptr_acc_block_filt.69 var=72) const ()  <93>;
+    (__ptr_filter_accumulator.69 var=72) const ()  <93>;
-    (__ptr_out_32.71 var=74) const ()  <95>;
+    (__ptr_output_32.71 var=74) const ()  <95>;
    (__ptr_mu.73 var=76) const ()  <97>;
    (__inl_acc1_C.1130 var=111) accum_t__pl_accum_t_accum_t (__inl_acc1_A.1059 __inl_acc1_B.1061)  <866>;
    (__tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131 var=92) __sint_rnd_saturate_accum_t (__inl_acc1_C.1130)  <867>;
-    (__M_WDMB.1135 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.1136 var=43) store (__tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131 __ptr_acc_block_filt.69 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.41)  <871>;
+    (__M_WDMB.1135 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator.1136 var=43) store (__tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131 __ptr_filter_accumulator.69 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator.41)  <871>;
-    (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.1140 var=275) load (__M_WDMA.9 __ptr_c_block_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.564)  <875>;
+    (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.1140 var=275) load (__M_WDMA.9 __ptr_c_sensor_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.564)  <875>;
-    (__tmp.1145 var=280) __sint__mi___sint___sint (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.1140 __tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131)  <880>;
+    (__tmp.1145 var=280) __sint__mi___sint___sint (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.1140 __tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131)  <880>;
-    (__M_WDMB.1149 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1150 var=44) store (__tmp.1145 __ptr_out_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.42)  <884>;
+    (__M_WDMB.1149 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1150 var=44) store (__tmp.1145 __ptr_output_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.42)  <884>;
    (__fch_ptr_fir_lms_coeffs_ptr_start.1166 var=291) load (__M_WDMA.9 __rt.2395 ptr_fir_lms_coeffs_ptr_start.784)  <900>;
    (__fch__ZL2mu.1214 var=328) load (__M_WDMA.9 __ptr_mu.73 _ZL2mu.770)  <948>;
    (__inl_prod.1216 var=125) __sint_rnd_saturate_accum_t (__inl_acc_C.2046)  <950>;
@@ -341,10 +341,10 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
        } #24
    } #21 rng=[1,65535]
    #36 off=6 nxt=-2
-    (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1712 var=378) load (__M_WDMB.10 __ptr_out_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1150)  <1355>;
+    (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1712 var=378) load (__M_WDMB.10 __ptr_output_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1150)  <1355>;
    (__tmp.1717 var=383) __sint_rnd_saturate_accum_t (__tmp.2430)  <1360>;
    (__tmp.1718 var=384) __sshort___sshort___sint (__tmp.1717)  <1361>;
-    (__M_SDMB.1724 var=8 __extDM_int16_.1725 var=47 __vola.1726 var=29) store (__tmp.1718 out_16.96 __extDM_int16_.775 __vola.789)  <1367>;
+    (__M_SDMB.1724 var=8 __extDM_int16_.1725 var=47 __vola.1726 var=29) store (__tmp.1718 output.96 __extDM_int16_.775 __vola.789)  <1367>;
    (__rd___sp.1913 var=58) rd_res_reg (__R_SP.24 __sp.103)  <1467>;
    (__R_SP.1917 var=26 __sp.1918 var=34) wr_res_reg (__rt.2241 __sp.103)  <1471>;
    () void_ret_dmaddr_ (__la.78)  <1472>;
@@ -352,16 +352,16 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
    () sink (__extDM.771)  <1476>;
    () sink (__extPM.779)  <1477>;
    () sink (__sp.1918)  <1478>;
-    () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.259)  <1479>;
+    () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32.259)  <1479>;
-    () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.278)  <1480>;
+    () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32.278)  <1480>;
-    () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.564)  <1481>;
+    () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.564)  <1481>;
-    () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.577)  <1482>;
+    () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.577)  <1482>;
    () sink (ptr_fir_lms_delay_line.785)  <1483>;
    () sink (__extDM_BufferPtrDMB.773)  <1484>;
    () sink (ptr_fir_lms_coeffs.781)  <1485>;
    () sink (__extDM_BufferPtr.772)  <1486>;
-    () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.1136)  <1487>;
+    () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator.1136)  <1487>;
-    () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1150)  <1488>;
+    () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1150)  <1488>;
    () sink (_ZL2mu.1382)  <1489>;
    () sink (__extDM_int32_.1384)  <1490>;
    () sink (__extDM_int16_.1725)  <1491>;
@@ -378,69 +378,69 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
    () sink (__ct_0.75)  <1502>;
    (__rt.2241 var=481) __Pvoid__pl___Pvoid_int18_ (__rd___sp.1913 __ct_0s0.2409)  <1933>;
    (__ct_0s0.2409 var=510) const ()  <2174>;
-    (__tmp.2430 var=382) int72__shift_int72__int72__uint2_ (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1712 __ct_16.250 __ct_1.2429)  <2208>;
+    (__tmp.2430 var=382) int72__shift_int72__int72__uint2_ (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1712 __ct_16.250 __ct_1.2429)  <2208>;
 } #0
 0 : 'signal_processing\\signal_path.c';
 ----------
 0 : (0,343:0,0);
 14 : (0,381:4,26);
-16 : (0,384:23,43);
+16 : (0,384:27,43);
 21 : (0,388:4,85);
 36 : (0,396:0,113);
 99 : (0,388:4,83);
-404 : (0,384:23,56);
+404 : (0,384:27,56);
 474 : (0,388:4,0);
 594 : (0,381:4,26);
-616 : (0,384:23,43);
+616 : (0,384:27,43);
 ----------
-85 : (0,386:16,0);
+85 : (0,386:19,0);
 87 : (0,381:67,0);
-89 : (0,384:23,0);
+89 : (0,384:27,0);
-91 : (0,384:23,0);
+91 : (0,384:27,0);
 93 : (0,384:4,0);
 95 : (0,386:4,0);
 122 : (0,343:5,0);
 126 : (0,343:5,0);
-266 : (0,368:39,0);
+266 : (0,368:47,0);
-270 : (0,368:39,11);
+270 : (0,368:47,11);
-272 : (0,368:47,0);
+272 : (0,368:55,0);
-280 : (0,368:18,11);
+280 : (0,368:19,11);
-286 : (0,369:42,12);
+286 : (0,369:50,12);
-296 : (0,369:20,12);
+296 : (0,369:21,12);
-494 : (0,374:20,19);
+494 : (0,374:21,19);
-506 : (0,375:22,20);
+506 : (0,375:23,20);
 602 : (0,381:42,0);
-603 : (0,381:81,0);
+603 : (0,381:82,0);
-607 : (0,381:80,0);
+607 : (0,381:81,0);
 610 : (0,381:4,26);
 611 : (0,381:4,0);
 612 : (0,381:4,26);
-622 : (0,384:23,33);
+622 : (0,384:27,33);
-627 : (0,384:23,34);
+627 : (0,384:27,34);
-632 : (0,384:23,35);
+632 : (0,384:27,35);
-637 : (0,384:23,36);
+637 : (0,384:27,36);
-642 : (0,384:23,37);
+642 : (0,384:27,37);
-706 : (0,384:23,43);
+706 : (0,384:27,43);
-708 : (0,384:23,43);
+708 : (0,384:27,43);
-711 : (0,384:23,43);
+711 : (0,384:27,43);
-712 : (0,384:23,43);
+712 : (0,384:27,43);
-747 : (0,384:23,43);
+747 : (0,384:27,43);
-748 : (0,384:23,44);
+748 : (0,384:27,44);
-758 : (0,384:23,49);
+758 : (0,384:27,49);
-759 : (0,384:23,50);
+759 : (0,384:27,50);
-770 : (0,384:23,55);
+770 : (0,384:27,55);
-772 : (0,384:23,56);
+772 : (0,384:27,56);
-777 : (0,384:23,59);
+777 : (0,384:27,59);
-825 : (0,384:23,59);
+825 : (0,384:27,59);
-827 : (0,384:23,59);
+827 : (0,384:27,59);
-830 : (0,384:23,59);
+830 : (0,384:27,59);
-831 : (0,384:23,59);
+831 : (0,384:27,59);
-866 : (0,384:23,60);
+866 : (0,384:27,60);
-867 : (0,384:23,61);
+867 : (0,384:27,61);
-871 : (0,384:18,64);
+871 : (0,384:22,64);
-875 : (0,386:27,65);
+875 : (0,386:31,65);
-880 : (0,386:31,65);
+880 : (0,386:35,65);
-884 : (0,386:10,65);
+884 : (0,386:13,65);
 900 : (0,388:4,73);
 948 : (0,388:4,82);
 950 : (0,388:4,83);
@@ -471,45 +471,45 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
 1148 : (0,388:4,96);
 1149 : (0,388:4,96);
 1150 : (0,388:4,96);
-1355 : (0,393:48,103);
+1355 : (0,393:51,103);
 1360 : (0,393:20,103);
 1361 : (0,393:18,103);
 1367 : (0,393:14,103);
 1467 : (0,396:0,0);
 1471 : (0,396:0,113);
 1472 : (0,396:0,113);
-1624 : (0,384:23,48);
+1624 : (0,384:27,48);
-1635 : (0,384:23,54);
+1635 : (0,384:27,54);
-1643 : (0,384:23,55);
+1643 : (0,384:27,55);
-1651 : (0,384:23,56);
+1651 : (0,384:27,56);
 1662 : (0,388:4,80);
 1670 : (0,388:4,82);
 1678 : (0,388:4,88);
 1686 : (0,388:4,89);
 1697 : (0,388:4,90);
 1708 : (0,388:4,91);
-1738 : (0,384:23,0);
+1738 : (0,384:27,0);
 1740 : (0,388:4,0);
-1861 : (0,384:23,0);
+1861 : (0,384:27,0);
 1905 : (0,343:5,0);
 1933 : (0,396:0,0);
-1961 : (0,384:23,0);
+1961 : (0,384:27,0);
-1989 : (0,384:23,0);
+1989 : (0,384:27,0);
 2017 : (0,388:4,0);
-2045 : (0,384:23,0);
+2045 : (0,384:27,0);
-2073 : (0,384:23,0);
+2073 : (0,384:27,0);
-2101 : (0,384:23,0);
+2101 : (0,384:27,0);
 2129 : (0,388:4,0);
 2172 : (0,343:5,0);
 2174 : (0,396:0,0);
-2176 : (0,384:23,0);
+2176 : (0,384:27,0);
 2178 : (0,388:4,0);
-2183 : (0,368:44,0);
+2183 : (0,368:52,0);
-2184 : (0,368:44,11);
+2184 : (0,368:52,11);
-2192 : (0,369:47,12);
+2192 : (0,369:55,12);
-2200 : (0,384:23,48);
+2200 : (0,384:27,48);
-2207 : (0,393:53,0);
+2207 : (0,393:56,0);
-2208 : (0,393:53,103);
+2208 : (0,393:56,103);
-2309 : (0,384:23,59);
+2309 : (0,384:27,59);
 2312 : (0,388:4,96);
--- a/simulation/Release/chesswork/signal_path-154f66.#
+++ b/simulation/Release/chesswork/signal_path-154f66.#
@@ -8,3 +8,8 @@ cef764f6402a6eeb549cc520677fd8828baab91e
 0
 0
 0
 0
 0
 0
 0
 0
--- a/simulation/Release/chesswork/signal_path-154f66.sfg
+++ b/simulation/Release/chesswork/signal_path-154f66.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 14:00:48 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
--- a/simulation/Release/chesswork/signal_path-352f49.#
+++ b/simulation/Release/chesswork/signal_path-352f49.#
@@ -8,3 +8,9 @@ b6139837f6ca35c36b0c65fc4fb39c9f43e36de9
 0
 0
 0
 0
 0
 0
 0
 0
 2
--- a/simulation/Release/chesswork/signal_path-352f49.sfg
+++ b/simulation/Release/chesswork/signal_path-352f49.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 15:57:59 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -87,29 +87,29 @@ F_Z36sig_cirular_buffer_ptr_increment_DMBP12BufferPtrDMBi {
 } #5 off=0 nxt=-2
 0 : 'signal_processing\\signal_path.c';
 ----------
-5 : (0,109:0,2);
+5 : (0,111:0,2);
 ----------
-75 : (0,107:5,0);
+75 : (0,109:5,0);
-79 : (0,107:5,0);
+79 : (0,109:5,0);
-84 : (0,108:43,1);
+84 : (0,110:43,1);
-91 : (0,108:72,1);
+91 : (0,110:72,1);
-95 : (0,108:91,1);
+95 : (0,110:91,1);
-103 : (0,108:10,1);
+103 : (0,110:10,1);
-104 : (0,109:0,0);
+104 : (0,111:0,0);
-108 : (0,109:0,2);
+108 : (0,111:0,2);
-109 : (0,109:0,2);
+109 : (0,111:0,2);
-155 : (0,108:26,1);
+155 : (0,110:26,1);
-175 : (0,108:58,0);
+175 : (0,110:58,0);
-201 : (0,107:5,0);
+201 : (0,109:5,0);
-229 : (0,108:43,1);
+229 : (0,110:43,1);
-257 : (0,109:0,0);
+257 : (0,111:0,0);
-285 : (0,108:72,0);
+285 : (0,110:72,0);
-341 : (0,108:43,0);
+341 : (0,110:43,0);
-367 : (0,107:5,0);
+367 : (0,109:5,0);
-369 : (0,108:43,0);
+369 : (0,110:43,0);
-375 : (0,109:0,0);
+375 : (0,111:0,0);
-379 : (0,108:72,0);
+379 : (0,110:72,0);
-384 : (0,108:58,0);
+384 : (0,110:58,0);
-385 : (0,108:58,1);
+385 : (0,110:58,1);
-393 : (0,108:91,1);
+393 : (0,110:91,1);
--- a/simulation/Release/chesswork/signal_path-4df6b6.#
+++ b/simulation/Release/chesswork/signal_path-4df6b6.#
@@ -0,0 +1,9 @@
 6bd14b3bc305504dd7bb9269fe30bf59aca75a76
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
 f120f5de328ad64582ff8b5317653c8c0e1bc5a4
 da39a3ee5e6b4b0d3255bfef95601890afd80709
 d14eceba62157a1c418a76571f06326e1f2b1b57
 120
 0
 0
--- a/simulation/Release/chesswork/signal_path-4df6b6.o
+++ b/simulation/Release/chesswork/signal_path-4df6b6.o
--- a/simulation/Release/chesswork/signal_path-4df6b6.sfg
+++ b/simulation/Release/chesswork/signal_path-4df6b6.sfg
@@ -0,0 +1,118 @@
 // File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
 /***
 !!  void write_buffer(BufferPtr *, int)
 F_Z12write_bufferP9BufferPtri : user_defined, called {
    fnm : "write_buffer" 'void write_buffer(BufferPtr *, int)';
    arg : ( dmaddr_:i dmaddr_:i int32_:i );
    loc : ( LR[0] A[0] RA[0] );
    vac : ( srIM[0] );
    frm : ( );
 }
 ****
 ***/
 [
    0 : _Z12write_bufferP9BufferPtri typ=uint20_ bnd=e stl=PM tref=void_____PBufferPtr___sint___1
   11 : __M_WDMA typ=int32_ bnd=d stl=WDMA
   26 : __R_SP typ=dmaddr_ bnd=d stl=SP
   34 : __sp typ=dmaddr_ bnd=b stl=SP
   36 : __extDM_BufferPtr_ptr_current typ=int8_ bnd=b stl=DM
   38 : __extDM_BufferPtr_ptr_start typ=int8_ bnd=b stl=DM
   39 : __extDM_BufferPtr_buffer_len typ=int8_ bnd=b stl=DM
   40 : __extDM_int32_ typ=int8_ bnd=b stl=DM
   41 : __rd___sp typ=dmaddr_ bnd=m
   42 : __ct_0 typ=uint1_ val=0f bnd=m
   43 : __la typ=dmaddr_ bnd=p tref=dmaddr___
   44 : buffer typ=dmaddr_ bnd=p tref=__PBufferPtr__
   45 : sample typ=int32_ bnd=p tref=__sint__
   52 : __fch___extDM_BufferPtr_ptr_current typ=dmaddr_ bnd=m
   62 : __fch___extDM_BufferPtr_ptr_start typ=dmaddr_ bnd=m
   66 : __fch___extDM_BufferPtr_buffer_len typ=int32_ bnd=m
   70 : __tmp typ=dmaddr_ bnd=m
   89 : __ct_4 typ=int18_ val=4f bnd=m
   94 : __ct_2 typ=int32_ val=2f bnd=m
   97 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
  122 : __ct_0S0 typ=int18_ val=0S0 bnd=m
  123 : __ct_8 typ=int18_ val=8f bnd=m
  126 : __ct_0s0 typ=int18_ val=0s0 bnd=m
  131 : __ct_2 typ=uint2_ val=2f bnd=m
  135 : __tmp typ=int18_ bnd=m
 ]
 F_Z12write_bufferP9BufferPtri {
    (__M_WDMA.9 var=11) st_def ()  <18>;
    (__R_SP.24 var=26) st_def ()  <48>;
    (__sp.32 var=34) source ()  <56>;
    (__extDM_BufferPtr_ptr_current.34 var=36) source ()  <58>;
    (__extDM_BufferPtr_ptr_start.36 var=38) source ()  <60>;
    (__extDM_BufferPtr_buffer_len.37 var=39) source ()  <61>;
    (__extDM_int32_.38 var=40) source ()  <62>;
    (__ct_0.40 var=42) const ()  <64>;
    (__la.42 var=43 stl=LR off=0) inp ()  <66>;
    (__la.43 var=43) deassign (__la.42)  <67>;
    (buffer.45 var=44 stl=A off=0) inp ()  <69>;
    (buffer.46 var=44) deassign (buffer.45)  <70>;
    (sample.48 var=45 stl=RA off=0) inp ()  <72>;
    (sample.49 var=45) deassign (sample.48)  <73>;
    (__rd___sp.51 var=41) rd_res_reg (__R_SP.24 __sp.32)  <75>;
    (__R_SP.55 var=26 __sp.56 var=34) wr_res_reg (__rt.140 __sp.32)  <79>;
    (__fch___extDM_BufferPtr_ptr_current.60 var=52) load (__M_WDMA.9 __rt.162 __extDM_BufferPtr_ptr_current.34)  <84>;
    (__M_WDMA.61 var=11 __extDM_BufferPtr_buffer_len.62 var=39 __extDM_int32_.63 var=40) store (sample.49 __fch___extDM_BufferPtr_ptr_current.60 __extDM_BufferPtr_buffer_len.37 __extDM_int32_.38)  <85>;
    (__fch___extDM_BufferPtr_ptr_start.73 var=62) load (__M_WDMA.9 __rt.206 __extDM_BufferPtr_ptr_start.36)  <95>;
    (__fch___extDM_BufferPtr_buffer_len.77 var=66) load (__M_WDMA.9 __rt.228 __extDM_BufferPtr_buffer_len.62)  <99>;
    (__M_WDMA.85 var=11 __extDM_BufferPtr_ptr_current.86 var=36) store (__tmp.116 __rt.250 __extDM_BufferPtr_ptr_current.34)  <107>;
    (__rd___sp.87 var=41) rd_res_reg (__R_SP.24 __sp.56)  <108>;
    (__R_SP.91 var=26 __sp.92 var=34) wr_res_reg (__rt.184 __sp.56)  <112>;
    () void_ret_dmaddr_ (__la.43)  <113>;
    () sink (__sp.92)  <119>;
    () sink (__extDM_BufferPtr_ptr_current.86)  <121>;
    () sink (__extDM_BufferPtr_buffer_len.62)  <124>;
    () sink (__extDM_int32_.63)  <125>;
    () sink (__ct_0.40)  <126>;
    (__tmp.116 var=70) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch___extDM_BufferPtr_ptr_current.60 __ct_4.120 __fch___extDM_BufferPtr_ptr_start.73 __tmp.272)  <159>;
    (__ct_4.120 var=89) const ()  <173>;
    (__ct_2.126 var=94) const ()  <181>;
    (__rt.140 var=97) __Pvoid__pl___Pvoid_int18_ (__rd___sp.51 __ct_0S0.263)  <208>;
    (__rt.162 var=97) __Pvoid__pl___Pvoid_int18_ (buffer.46 __ct_8.264)  <236>;
    (__rt.184 var=97) __Pvoid__pl___Pvoid_int18_ (__rd___sp.87 __ct_0s0.267)  <264>;
    (__rt.206 var=97) __Pvoid__mi___Pvoid_int18_ (__rt.162 __ct_4.120)  <292>;
    (__rt.228 var=97) __Pvoid__mi___Pvoid_int18_ (__rt.206 __ct_4.120)  <320>;
    (__rt.250 var=97) __Pvoid__pl___Pvoid_int18_ (__rt.228 __ct_8.264)  <348>;
    (__ct_0S0.263 var=122) const ()  <375>;
    (__ct_8.264 var=123) const ()  <377>;
    (__ct_0s0.267 var=126) const ()  <383>;
    (__ct_2.271 var=131) const ()  <390>;
    (__tmp.272 var=135) int72__shift_int72__int72__uint2_ (__fch___extDM_BufferPtr_buffer_len.77 __ct_2.126 __ct_2.271)  <391>;
 } #5 off=0 nxt=-2
 0 : 'signal_processing\\signal_path.c';
 ----------
 5 : (0,120:0,3);
 ----------
 75 : (0,117:5,0);
 79 : (0,117:5,0);
 84 : (0,118:11,1);
 85 : (0,118:4,1);
 95 : (0,119:67,2);
 99 : (0,119:86,2);
 107 : (0,119:10,2);
 108 : (0,120:0,0);
 112 : (0,120:0,3);
 113 : (0,120:0,3);
 159 : (0,119:26,2);
 173 : (0,119:26,0);
 181 : (0,119:86,0);
 208 : (0,117:5,0);
 236 : (0,118:11,1);
 264 : (0,120:0,0);
 292 : (0,119:67,0);
 348 : (0,118:11,0);
 375 : (0,117:5,0);
 377 : (0,118:11,0);
 383 : (0,120:0,0);
 390 : (0,119:86,0);
 391 : (0,119:86,2);
--- a/simulation/Release/chesswork/signal_path-530a42.#
+++ b/simulation/Release/chesswork/signal_path-530a42.#
@@ -8,3 +8,11 @@ da39a3ee5e6b4b0d3255bfef95601890afd80709
 0
 0
 0
 0
 0
 0
 0
 0
 2
 7
 7
--- a/simulation/Release/chesswork/signal_path-530a42.sfg
+++ b/simulation/Release/chesswork/signal_path-530a42.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -103,35 +103,35 @@ F_Z15sig_calc_weightP16SingleSignalPathi {
 } #0
 0 : 'signal_processing\\signal_path.c';
 ----------
-0 : (0,204:0,0);
+0 : (0,211:0,0);
-4 : (0,205:4,1);
+4 : (0,212:4,1);
-6 : (0,205:37,2);
+6 : (0,212:37,2);
-10 : (0,210:4,11);
+10 : (0,217:4,11);
-144 : (0,210:11,7);
+144 : (0,217:11,7);
-194 : (0,205:31,1);
+194 : (0,212:31,1);
 ----------
-74 : (0,204:4,0);
+74 : (0,211:4,0);
-78 : (0,204:4,0);
+78 : (0,211:4,0);
-84 : (0,205:14,1);
+84 : (0,212:14,1);
-85 : (0,205:34,0);
+85 : (0,212:34,0);
-103 : (0,205:4,1);
+103 : (0,212:4,1);
-108 : (0,208:38,6);
+108 : (0,215:38,6);
-110 : (0,210:11,7);
+110 : (0,217:11,7);
-111 : (0,205:4,10);
+111 : (0,212:4,10);
-113 : (0,210:4,0);
+113 : (0,217:4,0);
-117 : (0,210:4,11);
+117 : (0,217:4,11);
-118 : (0,210:4,11);
+118 : (0,217:4,11);
-119 : (0,210:4,0);
+119 : (0,217:4,0);
-161 : (0,208:18,6);
+161 : (0,215:18,6);
-200 : (0,204:4,0);
+200 : (0,211:4,0);
-228 : (0,205:14,1);
+228 : (0,212:14,1);
-256 : (0,208:38,6);
+256 : (0,215:38,6);
-284 : (0,210:4,0);
+284 : (0,217:4,0);
-309 : (0,204:4,0);
+309 : (0,211:4,0);
-311 : (0,205:14,0);
+311 : (0,212:14,0);
-317 : (0,208:38,0);
+317 : (0,215:38,0);
-323 : (0,210:4,0);
+323 : (0,217:4,0);
-328 : (0,205:31,1);
+328 : (0,212:31,1);
-329 : (0,205:31,1);
+329 : (0,212:31,1);
-364 : (0,205:4,1);
+364 : (0,212:4,1);
--- a/simulation/Release/chesswork/signal_path-59265a.#
+++ b/simulation/Release/chesswork/signal_path-59265a.#
@@ -0,0 +1,10 @@
 6bd14b3bc305504dd7bb9269fe30bf59aca75a76
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
 7b022b02776bb92fed762bace59f48566912702b
 da39a3ee5e6b4b0d3255bfef95601890afd80709
 b9e9afcc2aae2fa7eb9404b36c097ce78ba46a5d
 73
 0
 1
 1
--- a/simulation/Release/chesswork/signal_path-59265a.o
+++ b/simulation/Release/chesswork/signal_path-59265a.o
--- a/simulation/Release/chesswork/signal_path-59265a.sfg
+++ b/simulation/Release/chesswork/signal_path-59265a.sfg
@@ -0,0 +1,216 @@
 // File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
 /***
 !!  int initialize_buffer(BufferPtr *, int *, int, int)
 F_Z17initialize_bufferP9BufferPtrPiii : user_defined, called {
    fnm : "initialize_buffer" 'int initialize_buffer(BufferPtr *, int *, int, int)';
    arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i );
    loc : ( LR[0] RA[0] A[0] A[1] RA[1] RB[0] );
    vac : ( srIM[0] );
    frm : ( );
 }
 ****
 ***/
 [
    0 : _Z17initialize_bufferP9BufferPtrPiii typ=uint20_ bnd=e stl=PM tref=__sint_____PBufferPtr___P__sint___sint___sint__
   11 : __M_WDMA typ=int32_ bnd=d stl=WDMA
   26 : __R_SP typ=dmaddr_ bnd=d stl=SP
   34 : __sp typ=dmaddr_ bnd=b stl=SP
   36 : __extDM_int32_ typ=int8_ bnd=b stl=DM
   37 : __extDM_BufferPtr_buffer_len typ=int8_ bnd=b stl=DM
   38 : __extDM_BufferPtr_ptr_start typ=int8_ bnd=b stl=DM
   40 : __extDM_BufferPtr_ptr_current typ=int8_ bnd=b stl=DM
   41 : __rd___sp typ=dmaddr_ bnd=m
   42 : __ct_0 typ=uint1_ val=0f bnd=m
   43 : __la typ=dmaddr_ bnd=p tref=dmaddr___
   44 : __rt typ=int32_ bnd=p tref=__sint__
   45 : buffer typ=dmaddr_ bnd=p tref=__PBufferPtr__
   46 : buffer_start_add typ=dmaddr_ bnd=p tref=__P__sint__
   47 : length typ=int32_ bnd=p tref=__sint__
   48 : max_buffer_len typ=int32_ bnd=p tref=__sint__
   54 : __ct_0 typ=int32_ val=0f bnd=m
   65 : __tmp typ=bool bnd=m
   72 : __ct_1 typ=int32_ val=1f bnd=m
   76 : __tmp typ=bool bnd=m
   92 : __iv1_i typ=dmaddr_ bnd=m
   95 : __cv typ=uint16_ bnd=m
  103 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
  127 : __ct_0S0 typ=int18_ val=0S0 bnd=m
  128 : __ct_0s0 typ=int18_ val=0s0 bnd=m
  129 : __ct_4 typ=int18_ val=4f bnd=m
  133 : __tmp typ=uint3_ bnd=m
  138 : __tmp typ=uint3_ bnd=m
  148 : __either typ=bool bnd=m
  149 : __trgt typ=int10_ val=0j bnd=m
  150 : __trgt typ=int10_ val=0j bnd=m
  151 : __trgt typ=int10_ val=0j bnd=m
  152 : __trgt typ=int10_ val=0j bnd=m
  153 : __trgt typ=uint16_ val=0j bnd=m
  154 : __vcnt typ=uint16_ bnd=m
 ]
 F_Z17initialize_bufferP9BufferPtrPiii {
    #239 off=0
    (__R_SP.24 var=26) st_def ()  <48>;
    (__sp.32 var=34) source ()  <56>;
    (__extDM_int32_.34 var=36) source ()  <58>;
    (__extDM_BufferPtr_buffer_len.35 var=37) source ()  <59>;
    (__extDM_BufferPtr_ptr_start.36 var=38) source ()  <60>;
    (__extDM_BufferPtr_ptr_current.38 var=40) source ()  <62>;
    (__ct_0.40 var=42) const ()  <64>;
    (__la.42 var=43 stl=LR off=0) inp ()  <66>;
    (__la.43 var=43) deassign (__la.42)  <67>;
    (buffer.46 var=45 stl=A off=0) inp ()  <70>;
    (buffer.47 var=45) deassign (buffer.46)  <71>;
    (buffer_start_add.49 var=46 stl=A off=1) inp ()  <73>;
    (buffer_start_add.50 var=46) deassign (buffer_start_add.49)  <74>;
    (length.52 var=47 stl=RA off=1) inp ()  <76>;
    (length.53 var=47) deassign (length.52)  <77>;
    (max_buffer_len.55 var=48 stl=RB off=0) inp ()  <79>;
    (max_buffer_len.56 var=48) deassign (max_buffer_len.55)  <80>;
    (__rd___sp.58 var=41) rd_res_reg (__R_SP.24 __sp.32)  <82>;
    (__R_SP.62 var=26 __sp.63 var=34) wr_res_reg (__rt.274 __sp.32)  <86>;
    (__ct_0.66 var=54) const ()  <90>;
    (__M_WDMA.69 var=11 __extDM_BufferPtr_buffer_len.70 var=37) store (length.53 buffer.47 __extDM_BufferPtr_buffer_len.35)  <93>;
    (__M_WDMA.74 var=11 __extDM_BufferPtr_ptr_start.75 var=38) store (buffer_start_add.50 __rt.340 __extDM_BufferPtr_ptr_start.36)  <97>;
    (__M_WDMA.79 var=11 __extDM_BufferPtr_ptr_current.80 var=40) store (buffer_start_add.50 __rt.362 __extDM_BufferPtr_ptr_current.38)  <101>;
    (__rt.274 var=103) __Pvoid__pl___Pvoid_int18_ (__rd___sp.58 __ct_0S0.375)  <320>;
    (__rt.340 var=103) __Pvoid__pl___Pvoid_int18_ (buffer.47 __ct_4.377)  <404>;
    (__rt.362 var=103) __Pvoid__pl___Pvoid_int18_ (__rt.340 __ct_4.377)  <432>;
    (__ct_0S0.375 var=127) const ()  <457>;
    (__ct_4.377 var=129) const ()  <461>;
    (__tmp.380 var=133) uint3__cmp_int72__int72_ (length.53 __ct_0.66)  <466>;
    (__tmp.393 var=65) bool_nplus_uint3_ (__tmp.380)  <500>;
    (__trgt.396 var=149) const ()  <511>;
    () void_jump_bool_int10_ (__tmp.393 __trgt.396)  <512>;
    (__either.397 var=148) undefined ()  <513>;
    if {
        {
            () if_expr (__either.397)  <126>;
            () chess_frequent_else ()  <127>;
            () chess_rear_then ()  <514>;
        } #5
        {
            (__trgt.398 var=150) const ()  <515>;
            () void_jump_int10_ (__trgt.398)  <516>;
        } #11 off=4
        {
            #30 off=1
            (__cv.254 var=95) uint16__uint16____sint (length.53)  <288>;
            (__trgt.402 var=153) const ()  <522>;
            () void_doloop_uint16__uint16_ (__cv.254 __trgt.402)  <523>;
            (__vcnt.403 var=154) undefined ()  <524>;
            for {
                {
                    (__extDM_int32_.112 var=36) entry (__extDM_int32_.152 __extDM_int32_.34)  <135>;
                    (__extDM_BufferPtr_buffer_len.113 var=37) entry (__extDM_BufferPtr_buffer_len.154 __extDM_BufferPtr_buffer_len.70)  <136>;
                    (__iv1_i.245 var=92) entry (__iv1_i.246 buffer_start_add.50)  <279>;
                } #8
                {
                    (__M_WDMA.131 var=11 __extDM_BufferPtr_buffer_len.132 var=37 __extDM_int32_.133 var=36) store (__ct_0.66 __iv1_i.245 __extDM_BufferPtr_buffer_len.113 __extDM_int32_.112)  <154>;
                    (__rt.318 var=103) __Pvoid__pl___Pvoid_int18_ (__iv1_i.245 __ct_4.377)  <376>;
                } #173 off=2
                {
                    () for_count (__vcnt.403)  <159>;
                    (__extDM_int32_.152 var=36 __extDM_int32_.153 var=36) exit (__extDM_int32_.133)  <167>;
                    (__extDM_BufferPtr_buffer_len.154 var=37 __extDM_BufferPtr_buffer_len.155 var=37) exit (__extDM_BufferPtr_buffer_len.132)  <168>;
                    (__iv1_i.246 var=92 __iv1_i.247 var=92) exit (__rt.318)  <280>;
                } #10
            } #7 rng=[1,65535]
        } #6
        {
            (__extDM_int32_.178 var=36) merge (__extDM_int32_.34 __extDM_int32_.153)  <180>;
            (__extDM_BufferPtr_buffer_len.179 var=37) merge (__extDM_BufferPtr_buffer_len.70 __extDM_BufferPtr_buffer_len.155)  <181>;
        } #12
    } #4
    #242 off=5
    (__tmp.385 var=138) uint3__cmp_int72__int72_ (length.53 max_buffer_len.56)  <474>;
    (__tmp.386 var=76) bool_neg_uint3_ (__tmp.385)  <475>;
    (__trgt.399 var=151) const ()  <517>;
    () void_jump_bool_int10_ (__tmp.386 __trgt.399)  <518>;
    (__either.400 var=148) undefined ()  <519>;
    if {
        {
            () if_expr (__either.400)  <205>;
        } #15
        {
        } #16 off=7
        {
            (__ct_1.134 var=72) const ()  <155>;
            (__trgt.401 var=152) const ()  <520>;
            () void_jump_int10_ (__trgt.401)  <521>;
        } #17 off=6
        {
            (__rt.207 var=44) merge (__ct_0.66 __ct_1.134)  <210>;
        } #18
    } #14
    #20 off=8 nxt=-2
    (__rd___sp.208 var=41) rd_res_reg (__R_SP.24 __sp.63)  <211>;
    (__R_SP.212 var=26 __sp.213 var=34) wr_res_reg (__rt.296 __sp.63)  <215>;
    () void_ret_dmaddr_ (__la.43)  <216>;
    (__rt.214 var=44 stl=RA off=0) assign (__rt.207)  <217>;
    () out (__rt.214)  <218>;
    () sink (__sp.213)  <224>;
    () sink (__extDM_int32_.178)  <226>;
    () sink (__extDM_BufferPtr_buffer_len.179)  <227>;
    () sink (__extDM_BufferPtr_ptr_start.75)  <228>;
    () sink (__extDM_BufferPtr_ptr_current.80)  <230>;
    () sink (__ct_0.40)  <231>;
    (__rt.296 var=103) __Pvoid__pl___Pvoid_int18_ (__rd___sp.208 __ct_0s0.376)  <348>;
    (__ct_0s0.376 var=128) const ()  <459>;
 } #0
 0 : 'signal_processing\\signal_path.c';
 ----------
 0 : (0,74:0,0);
 4 : (0,79:4,5);
 6 : (0,79:4,6);
 7 : (0,79:4,6);
 11 : (0,79:4,13);
 14 : (0,82:4,16);
 16 : (0,86:8,17);
 17 : (0,83:8,21);
 20 : (0,82:4,26);
 173 : (0,79:37,6);
 239 : (0,79:4,5);
 242 : (0,82:14,16);
 ----------
 82 : (0,74:4,0);
 86 : (0,74:4,0);
 90 : (0,75:10,0);
 93 : (0,75:10,1);
 97 : (0,76:10,2);
 101 : (0,77:10,3);
 126 : (0,79:4,5);
 135 : (0,79:4,6);
 136 : (0,79:4,6);
 154 : (0,80:24,6);
 155 : (0,79:33,0);
 159 : (0,79:4,11);
 167 : (0,79:4,11);
 168 : (0,79:4,11);
 180 : (0,79:4,15);
 181 : (0,79:4,15);
 205 : (0,82:4,16);
 210 : (0,82:4,25);
 211 : (0,82:4,0);
 215 : (0,82:4,26);
 216 : (0,82:4,26);
 217 : (0,82:4,0);
 320 : (0,74:4,0);
 348 : (0,82:4,0);
 404 : (0,76:10,0);
 432 : (0,77:10,0);
 457 : (0,74:4,0);
 459 : (0,82:4,0);
 466 : (0,79:4,5);
 474 : (0,82:14,16);
 475 : (0,82:14,16);
 500 : (0,79:4,5);
 512 : (0,79:4,5);
 518 : (0,82:4,16);
 523 : (0,79:4,11);
--- a/simulation/Release/chesswork/signal_path-6fcf7f.#
+++ b/simulation/Release/chesswork/signal_path-6fcf7f.#
@@ -1,10 +1,10 @@
 6bd14b3bc305504dd7bb9269fe30bf59aca75a76
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
-57cf3fdd8d7def6492095f180e9539315d131531
+cea6e007e8dbd729468865732ec224bd2aae703b
 da39a3ee5e6b4b0d3255bfef95601890afd80709
-da7a8c19e98dc87d8274bee4a21dcd27ad1cbf24
+7ae292d5e0a5177af75ba2447688ad365bb9ca60
-152
+154
 0
 0
 0
 5
 5
--- a/simulation/Release/chesswork/signal_path-6fcf7f.o
+++ b/simulation/Release/chesswork/signal_path-6fcf7f.o
--- a/simulation/Release/chesswork/signal_path-6fcf7f.sfg
+++ b/simulation/Release/chesswork/signal_path-6fcf7f.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -14,9 +14,9 @@ F_Z14sig_init_delayP16SingleSignalPathi : user_defined, called {
    frm : ( );
 }
 ****
-!!  int sig_init_buffer(BufferPtr *, int *, int, int)
+!!  int initialize_buffer(BufferPtr *, int *, int, int)
-F_Z15sig_init_bufferP9BufferPtrPiii : user_defined, called {
+F_Z17initialize_bufferP9BufferPtrPiii : user_defined, called {
-    fnm : "sig_init_buffer" 'int sig_init_buffer(BufferPtr *, int *, int, int)';
+    fnm : "initialize_buffer" 'int initialize_buffer(BufferPtr *, int *, int, int)';
    arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i );
    loc : ( LR[0] RA[0] A[0] A[1] RA[1] RB[0] );
    vac : ( srIM[0] );
@@ -48,7 +48,7 @@ F_Z15sig_init_bufferP9BufferPtrPiii : user_defined, called {
   56 : __tmp typ=dmaddr_ bnd=m
   57 : __ct_16 typ=int32_ val=16f bnd=m
   58 : __ct typ=int32_ bnd=m
-   59 : _Z15sig_init_bufferP9BufferPtrPiii typ=dmaddr_ val=0r bnd=m
+   59 : _Z17initialize_bufferP9BufferPtrPiii typ=dmaddr_ val=0r bnd=m
   62 : __tmp typ=int32_ bnd=m
   76 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
   99 : __ct_0S0 typ=int18_ val=0S0 bnd=m
@@ -80,7 +80,7 @@ F_Z14sig_init_delayP16SingleSignalPathi {
    (__rd___sp.53 var=42) rd_res_reg (__R_SP.24 __sp.32)  <77>;
    (__R_SP.57 var=26 __sp.58 var=34) wr_res_reg (__rt.132 __sp.32)  <81>;
    (__ct_16.68 var=57) const ()  <92>;
-    (_Z15sig_init_bufferP9BufferPtrPiii.71 var=59) const ()  <95>;
+    (_Z17initialize_bufferP9BufferPtrPiii.71 var=59) const ()  <95>;
    (__rd___sp.88 var=42) rd_res_reg (__R_SP.24 __sp.58)  <102>;
    (__R_SP.92 var=26 __sp.93 var=34) wr_res_reg (__rt.176 __sp.58)  <106>;
    (__rt.132 var=76) __Pvoid__pl___Pvoid_int18_ (__rd___sp.53 __ct_0S0.211)  <192>;
@@ -91,14 +91,14 @@ F_Z14sig_init_delayP16SingleSignalPathi {
    (__ct_116.212 var=100) const ()  <305>;
    (__ct_0s0.215 var=103) const ()  <311>;
    (__ct_64.217 var=105) const ()  <315>;
-    () void_jump_dmaddr_ (_Z15sig_init_bufferP9BufferPtrPiii.71)  <339>;
+    () void_jump_dmaddr_ (_Z17initialize_bufferP9BufferPtrPiii.71)  <339>;
    call {
        (__tmp.62 var=53 stl=A off=0) assign (__rt.154)  <86>;
        (__tmp.66 var=56 stl=A off=1) assign (__rt.198)  <90>;
        (n_delay.67 var=47 stl=RA off=1) assign (n_delay.51)  <91>;
        (__ct.70 var=58 stl=RB off=0) assign (__ct_16.68)  <94>;
        (__la.74 var=44 stl=LR off=0) assign (__la.44)  <98>;
-        (__tmp.75 var=62 stl=RA off=0 __extDM.78 var=32 __extDM_BufferPtr.79 var=37 __extDM_SingleSignalPath.80 var=35 __extDM_SingleSignalPath__delay_buffer.81 var=38 __extDM_SingleSignalPath_delay_buffer.82 var=36 __extDM_int32_.83 var=39 __extDM_void.84 var=40 __extPM.85 var=33 __extPM_void.86 var=41 __vola.87 var=29) F_Z15sig_init_bufferP9BufferPtrPiii (__la.74 __tmp.62 __tmp.66 n_delay.67 __ct.70 __extDM.30 __extDM_BufferPtr.35 __extDM_SingleSignalPath.33 __extDM_SingleSignalPath__delay_buffer.36 __extDM_SingleSignalPath_delay_buffer.34 __extDM_int32_.37 __extDM_void.38 __extPM.31 __extPM_void.39 __vola.27)  <99>;
+        (__tmp.75 var=62 stl=RA off=0 __extDM.78 var=32 __extDM_BufferPtr.79 var=37 __extDM_SingleSignalPath.80 var=35 __extDM_SingleSignalPath__delay_buffer.81 var=38 __extDM_SingleSignalPath_delay_buffer.82 var=36 __extDM_int32_.83 var=39 __extDM_void.84 var=40 __extPM.85 var=33 __extPM_void.86 var=41 __vola.87 var=29) F_Z17initialize_bufferP9BufferPtrPiii (__la.74 __tmp.62 __tmp.66 n_delay.67 __ct.70 __extDM.30 __extDM_BufferPtr.35 __extDM_SingleSignalPath.33 __extDM_SingleSignalPath__delay_buffer.36 __extDM_SingleSignalPath_delay_buffer.34 __extDM_int32_.37 __extDM_void.38 __extPM.31 __extPM_void.39 __vola.27)  <99>;
        (__tmp.76 var=62) deassign (__tmp.75)  <100>;
    } #4 off=1
    #6 off=2 nxt=-2
@@ -119,30 +119,30 @@ F_Z14sig_init_delayP16SingleSignalPathi {
 } #0
 0 : 'signal_processing\\signal_path.c';
 ----------
-0 : (0,152:0,0);
+0 : (0,159:0,0);
-4 : (0,153:11,1);
+4 : (0,160:11,1);
-6 : (0,153:4,1);
+6 : (0,160:4,1);
-142 : (0,153:4,1);
+142 : (0,160:4,1);
 ----------
-77 : (0,152:4,0);
+77 : (0,159:4,0);
-81 : (0,152:4,0);
+81 : (0,159:4,0);
-86 : (0,153:34,0);
+86 : (0,160:36,0);
-90 : (0,153:56,0);
+90 : (0,160:58,0);
-91 : (0,153:73,0);
+91 : (0,160:75,0);
-92 : (0,153:82,0);
+92 : (0,160:84,0);
-94 : (0,153:82,0);
+94 : (0,160:84,0);
-98 : (0,153:11,0);
+98 : (0,160:11,0);
-99 : (0,153:11,1);
+99 : (0,160:11,1);
-102 : (0,153:4,0);
+102 : (0,160:4,0);
-106 : (0,153:4,1);
+106 : (0,160:4,1);
-108 : (0,153:26,0);
+108 : (0,160:28,0);
-192 : (0,152:4,0);
+192 : (0,159:4,0);
-220 : (0,153:34,1);
+220 : (0,160:36,1);
-248 : (0,153:4,0);
+248 : (0,160:4,0);
-276 : (0,153:56,0);
+276 : (0,160:58,0);
-303 : (0,152:4,0);
+303 : (0,159:4,0);
-305 : (0,153:34,0);
+305 : (0,160:36,0);
-311 : (0,153:4,0);
+311 : (0,160:4,0);
-315 : (0,153:56,0);
+315 : (0,160:58,0);
-339 : (0,153:11,1);
+339 : (0,160:11,1);
--- a/simulation/Release/chesswork/signal_path-750458.#
+++ b/simulation/Release/chesswork/signal_path-750458.#
@@ -0,0 +1,9 @@
 6bd14b3bc305504dd7bb9269fe30bf59aca75a76
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
 6d3a3001c15687e535493bad0a74e05b41f1e09b
 da39a3ee5e6b4b0d3255bfef95601890afd80709
 c32d64301301b61633bc0c543dea27e53e53033a
 110
 0
 0
--- a/simulation/Release/chesswork/signal_path-750458.o
+++ b/simulation/Release/chesswork/signal_path-750458.o
--- a/simulation/Release/chesswork/signal_path-750458.sfg
+++ b/simulation/Release/chesswork/signal_path-750458.sfg
@@ -0,0 +1,115 @@
 // File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
 /***
 !!  void increment_buffer(BufferPtr *, int)
 F_Z16increment_bufferP9BufferPtri : user_defined, called {
    fnm : "increment_buffer" 'void increment_buffer(BufferPtr *, int)';
    arg : ( dmaddr_:i dmaddr_:i int32_:i );
    loc : ( LR[0] A[0] RA[0] );
    vac : ( srIM[0] );
    frm : ( );
 }
 ****
 ***/
 [
    0 : _Z16increment_bufferP9BufferPtri typ=uint20_ bnd=e stl=PM tref=void_____PBufferPtr___sint__
   11 : __M_WDMA typ=int32_ bnd=d stl=WDMA
   26 : __R_SP typ=dmaddr_ bnd=d stl=SP
   34 : __sp typ=dmaddr_ bnd=b stl=SP
   36 : __extDM_BufferPtr_ptr_current typ=int8_ bnd=b stl=DM
   38 : __extDM_BufferPtr_ptr_start typ=int8_ bnd=b stl=DM
   39 : __extDM_BufferPtr_buffer_len typ=int8_ bnd=b stl=DM
   41 : __rd___sp typ=dmaddr_ bnd=m
   42 : __ct_0 typ=uint1_ val=0f bnd=m
   43 : __la typ=dmaddr_ bnd=p tref=dmaddr___
   44 : buffer typ=dmaddr_ bnd=p tref=__PBufferPtr__
   45 : i_incr typ=int32_ bnd=p tref=__sint__
   52 : __fch___extDM_BufferPtr_ptr_current typ=dmaddr_ bnd=m
   59 : __fch___extDM_BufferPtr_ptr_start typ=dmaddr_ bnd=m
   63 : __fch___extDM_BufferPtr_buffer_len typ=int32_ bnd=m
   67 : __tmp typ=dmaddr_ bnd=m
   90 : __ct_2 typ=int32_ val=2f bnd=m
   93 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
  118 : __ct_0S0 typ=int18_ val=0S0 bnd=m
  119 : __ct_8 typ=int18_ val=8f bnd=m
  122 : __ct_0s0 typ=int18_ val=0s0 bnd=m
  124 : __ct_4 typ=int18_ val=4f bnd=m
  128 : __ct_2 typ=uint2_ val=2f bnd=m
  133 : __tmp typ=int18_ bnd=m
  134 : __tmp typ=int18_ bnd=m
 ]
 F_Z16increment_bufferP9BufferPtri {
    (__M_WDMA.9 var=11) st_def ()  <18>;
    (__R_SP.24 var=26) st_def ()  <48>;
    (__sp.32 var=34) source ()  <56>;
    (__extDM_BufferPtr_ptr_current.34 var=36) source ()  <58>;
    (__extDM_BufferPtr_ptr_start.36 var=38) source ()  <60>;
    (__extDM_BufferPtr_buffer_len.37 var=39) source ()  <61>;
    (__ct_0.40 var=42) const ()  <64>;
    (__la.42 var=43 stl=LR off=0) inp ()  <66>;
    (__la.43 var=43) deassign (__la.42)  <67>;
    (buffer.45 var=44 stl=A off=0) inp ()  <69>;
    (buffer.46 var=44) deassign (buffer.45)  <70>;
    (i_incr.48 var=45 stl=RA off=0) inp ()  <72>;
    (i_incr.49 var=45) deassign (i_incr.48)  <73>;
    (__rd___sp.51 var=41) rd_res_reg (__R_SP.24 __sp.32)  <75>;
    (__R_SP.55 var=26 __sp.56 var=34) wr_res_reg (__rt.133 __sp.32)  <79>;
    (__fch___extDM_BufferPtr_ptr_current.60 var=52) load (__M_WDMA.9 __rt.155 __extDM_BufferPtr_ptr_current.34)  <84>;
    (__fch___extDM_BufferPtr_ptr_start.67 var=59) load (__M_WDMA.9 __rt.199 __extDM_BufferPtr_ptr_start.36)  <91>;
    (__fch___extDM_BufferPtr_buffer_len.71 var=63) load (__M_WDMA.9 __rt.221 __extDM_BufferPtr_buffer_len.37)  <95>;
    (__M_WDMA.79 var=11 __extDM_BufferPtr_ptr_current.80 var=36) store (__tmp.110 __rt.243 __extDM_BufferPtr_ptr_current.34)  <103>;
    (__rd___sp.81 var=41) rd_res_reg (__R_SP.24 __sp.56)  <104>;
    (__R_SP.85 var=26 __sp.86 var=34) wr_res_reg (__rt.177 __sp.56)  <108>;
    () void_ret_dmaddr_ (__la.43)  <109>;
    () sink (__sp.86)  <115>;
    () sink (__extDM_BufferPtr_ptr_current.80)  <117>;
    () sink (__ct_0.40)  <122>;
    (__tmp.110 var=67) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch___extDM_BufferPtr_ptr_current.60 __tmp.266 __fch___extDM_BufferPtr_ptr_start.67 __tmp.271)  <155>;
    (__ct_2.119 var=90) const ()  <175>;
    (__rt.133 var=93) __Pvoid__pl___Pvoid_int18_ (__rd___sp.51 __ct_0S0.256)  <201>;
    (__rt.155 var=93) __Pvoid__pl___Pvoid_int18_ (buffer.46 __ct_8.257)  <229>;
    (__rt.177 var=93) __Pvoid__pl___Pvoid_int18_ (__rd___sp.81 __ct_0s0.260)  <257>;
    (__rt.199 var=93) __Pvoid__mi___Pvoid_int18_ (__rt.155 __ct_4.262)  <285>;
    (__rt.221 var=93) __Pvoid__mi___Pvoid_int18_ (__rt.199 __ct_4.262)  <313>;
    (__rt.243 var=93) __Pvoid__pl___Pvoid_int18_ (__rt.221 __ct_8.257)  <341>;
    (__ct_0S0.256 var=118) const ()  <367>;
    (__ct_8.257 var=119) const ()  <369>;
    (__ct_0s0.260 var=122) const ()  <375>;
    (__ct_4.262 var=124) const ()  <379>;
    (__ct_2.265 var=128) const ()  <384>;
    (__tmp.266 var=133) int72__shift_int72__int72__uint2_ (i_incr.49 __ct_2.119 __ct_2.265)  <385>;
    (__tmp.271 var=134) int72__shift_int72__int72__uint2_ (__fch___extDM_BufferPtr_buffer_len.71 __ct_2.119 __ct_2.265)  <393>;
 } #5 off=0 nxt=-2
 0 : 'signal_processing\\signal_path.c';
 ----------
 5 : (0,110:0,2);
 ----------
 75 : (0,108:5,0);
 79 : (0,108:5,0);
 84 : (0,109:43,1);
 91 : (0,109:72,1);
 95 : (0,109:91,1);
 103 : (0,109:10,1);
 104 : (0,110:0,0);
 108 : (0,110:0,2);
 109 : (0,110:0,2);
 155 : (0,109:26,1);
 175 : (0,109:58,0);
 201 : (0,108:5,0);
 229 : (0,109:43,1);
 257 : (0,110:0,0);
 285 : (0,109:72,0);
 341 : (0,109:43,0);
 367 : (0,108:5,0);
 369 : (0,109:43,0);
 375 : (0,110:0,0);
 379 : (0,109:72,0);
 384 : (0,109:58,0);
 385 : (0,109:58,1);
 393 : (0,109:91,1);
--- a/simulation/Release/chesswork/signal_path-9c02ae.#
+++ b/simulation/Release/chesswork/signal_path-9c02ae.#
@@ -1,9 +1,10 @@
 6bd14b3bc305504dd7bb9269fe30bf59aca75a76
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
-48e27357cf6b74d9a9ddfe61cbe4d757b31f02a7
+ac11bb208ce215cfbff1d17e7da4a6e4beeb0a71
 da39a3ee5e6b4b0d3255bfef95601890afd80709
-069b2d9d62c8563308a7ea5192abeefe363b7d77
+ba86b497a3de6671eb03ed7e1bc1c184ce6ac84a
-305
+301
 0
-2
+5
 5
--- a/simulation/Release/chesswork/signal_path-9c02ae.o
+++ b/simulation/Release/chesswork/signal_path-9c02ae.o
--- a/simulation/Release/chesswork/signal_path-9c02ae.sfg
+++ b/simulation/Release/chesswork/signal_path-9c02ae.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -38,17 +38,17 @@ F_Z15sig_init_weightP16SingleSignalPathdi : user_defined, called {
    vac : ( srIM[0] );
    llv : 0 1 0 0 0 ;
 }
-!!  int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)
+!!  int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)
-F_Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii : user_defined, called {
+F_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii : user_defined, called {
-    fnm : "sig_init_buffer_DMB" 'int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)';
+    fnm : "initialize_buffer_dmb" 'int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)';
    arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i );
    loc : ( LR[0] RA[0] A[4] A[5] RA[1] RB[0] );
    vac : ( srIM[0] );
    llv : 0 1 0 0 0 ;
 }
-!!  int sig_init_buffer(BufferPtr *, int *, int, int)
+!!  int initialize_buffer(BufferPtr *, int *, int, int)
-F_Z15sig_init_bufferP9BufferPtrPiii : user_defined, called {
+F_Z17initialize_bufferP9BufferPtrPiii : user_defined, called {
-    fnm : "sig_init_buffer" 'int sig_init_buffer(BufferPtr *, int *, int, int)';
+    fnm : "initialize_buffer" 'int initialize_buffer(BufferPtr *, int *, int, int)';
    arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i );
    loc : ( LR[0] RA[0] A[0] A[1] RA[1] RB[0] );
    vac : ( srIM[0] );
@@ -84,33 +84,33 @@ F_Z30float64_to_int32_round_to_zeroy : user_defined, called {
   34 : __sp typ=dmaddr_ bnd=b stl=SP
   35 : _ZL2mu typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__sint_DMA
   36 : __extDM_int32_ typ=int8_ bnd=b stl=DM
-   37 : ptr_fir_lms_delay_line typ=int8_ bnd=e sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB
+   37 : pointer_delay_line typ=int8_ bnd=e sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB
   38 : __extDM_BufferPtrDMB typ=int8_ bnd=b stl=DM
-   39 : fir_lms_delay_line typ=int8_ bnd=e sz=256 algn=4 stl=DMB tref=__A64DMB__sint_DMB
+   39 : delay_line typ=int8_ bnd=e sz=256 algn=4 stl=DMB tref=__A64DMB__sint_DMB
-   40 : ptr_fir_lms_coeffs typ=int8_ bnd=e sz=12 algn=4 stl=DMA tref=BufferPtr_DMA
+   40 : pointer_filter_coefficients typ=int8_ bnd=e sz=12 algn=4 stl=DMA tref=BufferPtr_DMA
   41 : __extDM_BufferPtr typ=int8_ bnd=b stl=DM
-   42 : fir_lms_coeffs typ=int8_ bnd=e sz=256 algn=8 stl=DMA tref=__A64__sint_DMA
+   42 : filter_coefficients typ=int8_ bnd=e sz=256 algn=8 stl=DMA tref=__A64__sint_DMA
   43 : __extDM_SingleSignalPath typ=int8_ bnd=b stl=DM
   44 : __extDM_int64_ typ=int8_ bnd=b stl=DM
   45 : __extDM_void typ=int8_ bnd=b stl=DM
   46 : __extPM_void typ=uint20_ bnd=b stl=PM
-   47 : ptr_fir_lms_delay_line_ptr_start typ=int8_ bnd=b stl=DM
+   47 : pointer_delay_line_ptr_start typ=int8_ bnd=b stl=DM
   48 : __extDM___PDMint32_ typ=int8_ bnd=b stl=DM
-   49 : ptr_fir_lms_coeffs_ptr_start typ=int8_ bnd=b stl=DM
+   49 : pointer_filter_coefficients_ptr_start typ=int8_ bnd=b stl=DM
   50 : __rd___sp typ=dmaddr_ bnd=m
   52 : __ptr_mu typ=dmaddr_ val=0a bnd=m adro=35
-   53 : __ptr_ptr_fir_lms_delay_line typ=dmaddr_ bnd=m
+   53 : __ptr_pointer_delay_line typ=dmaddr_ bnd=m
-   54 : __ptr_ptr_fir_lms_delay_line typ=dmaddr_ val=0a bnd=m adro=37
+   54 : __ptr_pointer_delay_line typ=dmaddr_ val=0a bnd=m adro=37
-   55 : __ptr_fir_lms_delay_line typ=dmaddr_ bnd=m
+   55 : __ptr_delay_line typ=dmaddr_ bnd=m
-   56 : __ptr_fir_lms_delay_line typ=dmaddr_ val=0a bnd=m adro=39
+   56 : __ptr_delay_line typ=dmaddr_ val=0a bnd=m adro=39
-   57 : __ptr_ptr_fir_lms_coeffs typ=dmaddr_ bnd=m
+   57 : __ptr_pointer_filter_coefficients typ=dmaddr_ bnd=m
-   58 : __ptr_ptr_fir_lms_coeffs typ=dmaddr_ val=0a bnd=m adro=40
+   58 : __ptr_pointer_filter_coefficients typ=dmaddr_ val=0a bnd=m adro=40
-   59 : __ptr_fir_lms_coeffs typ=dmaddr_ bnd=m
+   59 : __ptr_filter_coefficients typ=dmaddr_ bnd=m
-   60 : __ptr_fir_lms_coeffs typ=dmaddr_ val=0a bnd=m adro=42
+   60 : __ptr_filter_coefficients typ=dmaddr_ val=0a bnd=m adro=42
   61 : __ct_0 typ=uint1_ val=0f bnd=m
   62 : __la typ=dmaddr_ bnd=p tref=dmaddr___
-   63 : cSensorSignal typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
+   63 : c_sensor_signal_t typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
-   64 : accSensorSignal typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
+   64 : acc_sensor_signal_t typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
   65 : b_c typ=dmaddr_ bnd=p tref=__P__fdouble__
   66 : b_acc typ=dmaddr_ bnd=p tref=__P__fdouble__
   67 : delay_c typ=int32_ bnd=p tref=__sint__
@@ -118,7 +118,7 @@ F_Z30float64_to_int32_round_to_zeroy : user_defined, called {
   69 : weight_c typ=int64_ bnd=p tref=__fdouble__
   70 : weight_acc typ=int64_ bnd=p tref=__fdouble__
   71 : lms_mu typ=int64_ bnd=p tref=__fdouble__
-   72 : lms_fir_num_coeffs typ=int32_ bnd=p tref=__sint__
+   72 : number_coefficients typ=int32_ bnd=p tref=__sint__
   78 : __ct_0 typ=int32_ val=0f bnd=m
   81 : __fch___extDM_int64_ typ=int64_ bnd=m
   85 : __fch___extDM_int64_ typ=int64_ bnd=m
@@ -151,21 +151,21 @@ F_Z30float64_to_int32_round_to_zeroy : user_defined, called {
  149 : __tmp typ=int32_ bnd=m
  150 : __ct_64 typ=int32_ val=64f bnd=m
  151 : __ct typ=int32_ bnd=m
-  152 : _Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii typ=dmaddr_ val=0r bnd=m
+  152 : _Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii typ=dmaddr_ val=0r bnd=m
  154 : __link typ=dmaddr_ bnd=m
  155 : __tmp typ=int32_ bnd=m
  157 : __ct typ=int32_ bnd=m
-  158 : _Z15sig_init_bufferP9BufferPtrPiii typ=dmaddr_ val=0r bnd=m
+  158 : _Z17initialize_bufferP9BufferPtrPiii typ=dmaddr_ val=0r bnd=m
  160 : __link typ=dmaddr_ bnd=m
  161 : __tmp typ=int32_ bnd=m
  164 : __tmp typ=bool bnd=m
-  170 : __fch_ptr_fir_lms_delay_line_ptr_start typ=dmaddr_ bnd=m
+  170 : __fch_pointer_delay_line_ptr_start typ=dmaddr_ bnd=m
-  180 : __fch_ptr_fir_lms_coeffs_ptr_start typ=dmaddr_ bnd=m
+  180 : __fch_pointer_filter_coefficients_ptr_start typ=dmaddr_ bnd=m
  201 : __iv1_i typ=dmaddr_ bnd=m
  202 : __iv2_i typ=dmaddr_ bnd=m
  205 : __cv typ=uint16_ bnd=m
-  213 : __ptr_ptr_fir_lms_delay_line__a4 typ=dmaddr_ val=4a bnd=m adro=37
+  213 : __ptr_pointer_delay_line__a4 typ=dmaddr_ val=4a bnd=m adro=37
-  214 : __ptr_ptr_fir_lms_coeffs__a4 typ=dmaddr_ val=4a bnd=m adro=40
+  214 : __ptr_pointer_filter_coefficients__a4 typ=dmaddr_ val=4a bnd=m adro=40
  217 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
  248 : __ct_0S0 typ=int18_ val=-8S0 bnd=m
  249 : __ct_0s0 typ=int18_ val=8s0 bnd=m
@@ -196,26 +196,26 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi {
    (__sp.32 var=34) source ()  <56>;
    (_ZL2mu.33 var=35) source ()  <57>;
    (__extDM_int32_.34 var=36) source ()  <58>;
-    (ptr_fir_lms_delay_line.35 var=37) source ()  <59>;
+    (pointer_delay_line.35 var=37) source ()  <59>;
    (__extDM_BufferPtrDMB.36 var=38) source ()  <60>;
-    (fir_lms_delay_line.37 var=39) source ()  <61>;
+    (delay_line.37 var=39) source ()  <61>;
-    (ptr_fir_lms_coeffs.38 var=40) source ()  <62>;
+    (pointer_filter_coefficients.38 var=40) source ()  <62>;
    (__extDM_BufferPtr.39 var=41) source ()  <63>;
-    (fir_lms_coeffs.40 var=42) source ()  <64>;
+    (filter_coefficients.40 var=42) source ()  <64>;
    (__extDM_SingleSignalPath.41 var=43) source ()  <65>;
    (__extDM_int64_.42 var=44) source ()  <66>;
    (__extDM_void.43 var=45) source ()  <67>;
    (__extPM_void.44 var=46) source ()  <68>;
-    (ptr_fir_lms_delay_line_ptr_start.45 var=47) source ()  <69>;
+    (pointer_delay_line_ptr_start.45 var=47) source ()  <69>;
    (__extDM___PDMint32_.46 var=48) source ()  <70>;
-    (ptr_fir_lms_coeffs_ptr_start.47 var=49) source ()  <71>;
+    (pointer_filter_coefficients_ptr_start.47 var=49) source ()  <71>;
    (__ct_0.59 var=61) const ()  <83>;
    (__la.61 var=62 stl=LR off=0) inp ()  <85>;
    (__la.62 var=62) deassign (__la.61)  <86>;
-    (cSensorSignal.64 var=63 stl=A off=0) inp ()  <88>;
+    (c_sensor_signal_t.64 var=63 stl=A off=0) inp ()  <88>;
-    (cSensorSignal.65 var=63) deassign (cSensorSignal.64)  <89>;
+    (c_sensor_signal_t.65 var=63) deassign (c_sensor_signal_t.64)  <89>;
-    (accSensorSignal.67 var=64 stl=A off=1) inp ()  <91>;
+    (acc_sensor_signal_t.67 var=64 stl=A off=1) inp ()  <91>;
-    (accSensorSignal.68 var=64) deassign (accSensorSignal.67)  <92>;
+    (acc_sensor_signal_t.68 var=64) deassign (acc_sensor_signal_t.67)  <92>;
    (b_c.70 var=65 stl=A off=2) inp ()  <94>;
    (b_c.71 var=65) deassign (b_c.70)  <95>;
    (b_acc.73 var=66 stl=A off=3) inp ()  <97>;
@@ -230,8 +230,8 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi {
    (weight_acc.86 var=70) deassign (weight_acc.85)  <110>;
    (lms_mu.88 var=71 stl=BX off=0) inp ()  <112>;
    (lms_mu.89 var=71) deassign (lms_mu.88)  <113>;
-    (lms_fir_num_coeffs.91 var=72 stl=RB off=0) inp ()  <115>;
+    (number_coefficients.91 var=72 stl=RB off=0) inp ()  <115>;
-    (lms_fir_num_coeffs.92 var=72) deassign (lms_fir_num_coeffs.91)  <116>;
+    (number_coefficients.92 var=72) deassign (number_coefficients.91)  <116>;
    (__rd___sp.94 var=50) rd_res_reg (__R_SP.24 __sp.32)  <118>;
    (__R_SP.98 var=26 __sp.99 var=34) wr_res_reg (__rt.679 __sp.32)  <122>;
    (__fch___extDM_int64_.106 var=81) load (__M_LDMA.12 b_c.71 __extDM_int64_.42)  <130>;
@@ -250,7 +250,7 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi {
    (__ct_0S0.934 var=248) const ()  <965>;
    (__ct_8.937 var=251) const ()  <971>;
    call {
-        (cSensorSignal.102 var=63 stl=A off=0) assign (cSensorSignal.65)  <126>;
+        (c_sensor_signal_t.102 var=63 stl=A off=0) assign (c_sensor_signal_t.65)  <126>;
        (__fch___extDM_int64_.107 var=81 stl=AX off=0) assign (__fch___extDM_int64_.106)  <131>;
        (__fch___extDM_int64_.112 var=85 stl=AX off=1) assign (__fch___extDM_int64_.111)  <136>;
        (__fch___extDM_int64_.117 var=89 stl=BX off=0) assign (__fch___extDM_int64_.116)  <141>;
@@ -258,26 +258,26 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi {
        (__fch___extDM_int64_.127 var=97 stl=__spill_LDMA off=0) assign (__fch___extDM_int64_.126)  <151>;
        (__ct.130 var=99 stl=RA off=0) assign (__ct_31.128)  <154>;
        (__link.134 var=102 stl=LR off=0) assign (__link.133)  <158>;
-        (_ZL2mu.135 var=35 __extDM.136 var=32 __extDM_BufferPtr.137 var=41 __extDM_BufferPtrDMB.138 var=38 __extDM_SingleSignalPath.139 var=43 __extDM___PDMint32_.140 var=48 __extDM_int32_.141 var=36 __extDM_int64_.142 var=44 __extDM_void.143 var=45 __extPM.144 var=33 __extPM_void.145 var=46 fir_lms_coeffs.146 var=42 fir_lms_delay_line.147 var=39 ptr_fir_lms_coeffs.148 var=40 ptr_fir_lms_coeffs_ptr_start.149 var=49 ptr_fir_lms_delay_line.150 var=37 ptr_fir_lms_delay_line_ptr_start.151 var=47 __vola.152 var=29) F_Z21sig_init_preemph_coefP16SingleSignalPathdddddi (__link.134 cSensorSignal.102 __fch___extDM_int64_.107 __fch___extDM_int64_.112 __fch___extDM_int64_.117 __fch___extDM_int64_.122 __fch___extDM_int64_.127 __ct.130 _ZL2mu.33 __extDM.30 __extDM_BufferPtr.39 __extDM_BufferPtrDMB.36 __extDM_SingleSignalPath.41 __extDM___PDMint32_.46 __extDM_int32_.34 __extDM_int64_.42 __extDM_void.43 __extPM.31 __extPM_void.44 fir_lms_coeffs.40 fir_lms_delay_line.37 ptr_fir_lms_coeffs.38 ptr_fir_lms_coeffs_ptr_start.47 ptr_fir_lms_delay_line.35 ptr_fir_lms_delay_line_ptr_start.45 __vola.27)  <159>;
+        (_ZL2mu.135 var=35 __extDM.136 var=32 __extDM_BufferPtr.137 var=41 __extDM_BufferPtrDMB.138 var=38 __extDM_SingleSignalPath.139 var=43 __extDM___PDMint32_.140 var=48 __extDM_int32_.141 var=36 __extDM_int64_.142 var=44 __extDM_void.143 var=45 __extPM.144 var=33 __extPM_void.145 var=46 delay_line.146 var=39 filter_coefficients.147 var=42 pointer_delay_line.148 var=37 pointer_delay_line_ptr_start.149 var=47 pointer_filter_coefficients.150 var=40 pointer_filter_coefficients_ptr_start.151 var=49 __vola.152 var=29) F_Z21sig_init_preemph_coefP16SingleSignalPathdddddi (__link.134 c_sensor_signal_t.102 __fch___extDM_int64_.107 __fch___extDM_int64_.112 __fch___extDM_int64_.117 __fch___extDM_int64_.122 __fch___extDM_int64_.127 __ct.130 _ZL2mu.33 __extDM.30 __extDM_BufferPtr.39 __extDM_BufferPtrDMB.36 __extDM_SingleSignalPath.41 __extDM___PDMint32_.46 __extDM_int32_.34 __extDM_int64_.42 __extDM_void.43 __extPM.31 __extPM_void.44 delay_line.37 filter_coefficients.40 pointer_delay_line.35 pointer_delay_line_ptr_start.45 pointer_filter_coefficients.38 pointer_filter_coefficients_ptr_start.47 __vola.27)  <159>;
    } #4 off=1
    #5 off=2
    (_Z14sig_init_delayP16SingleSignalPathi.155 var=103) const ()  <162>;
    (__link.157 var=105) dmaddr__call_dmaddr_ (_Z14sig_init_delayP16SingleSignalPathi.155)  <164>;
    call {
-        (cSensorSignal.153 var=63 stl=A off=0) assign (cSensorSignal.65)  <160>;
+        (c_sensor_signal_t.153 var=63 stl=A off=0) assign (c_sensor_signal_t.65)  <160>;
        (delay_c.154 var=67 stl=RA off=1) assign (delay_c.77)  <161>;
        (__link.158 var=105 stl=LR off=0) assign (__link.157)  <165>;
-        (__tmp.159 var=106 stl=RA off=0 _ZL2mu.162 var=35 __extDM.163 var=32 __extDM_BufferPtr.164 var=41 __extDM_BufferPtrDMB.165 var=38 __extDM_SingleSignalPath.166 var=43 __extDM___PDMint32_.167 var=48 __extDM_int32_.168 var=36 __extDM_int64_.169 var=44 __extDM_void.170 var=45 __extPM.171 var=33 __extPM_void.172 var=46 fir_lms_coeffs.173 var=42 fir_lms_delay_line.174 var=39 ptr_fir_lms_coeffs.175 var=40 ptr_fir_lms_coeffs_ptr_start.176 var=49 ptr_fir_lms_delay_line.177 var=37 ptr_fir_lms_delay_line_ptr_start.178 var=47 __vola.179 var=29) F_Z14sig_init_delayP16SingleSignalPathi (__link.158 cSensorSignal.153 delay_c.154 _ZL2mu.135 __extDM.136 __extDM_BufferPtr.137 __extDM_BufferPtrDMB.138 __extDM_SingleSignalPath.139 __extDM___PDMint32_.140 __extDM_int32_.141 __extDM_int64_.142 __extDM_void.143 __extPM.144 __extPM_void.145 fir_lms_coeffs.146 fir_lms_delay_line.147 ptr_fir_lms_coeffs.148 ptr_fir_lms_coeffs_ptr_start.149 ptr_fir_lms_delay_line.150 ptr_fir_lms_delay_line_ptr_start.151 __vola.152)  <166>;
+        (__tmp.159 var=106 stl=RA off=0 _ZL2mu.162 var=35 __extDM.163 var=32 __extDM_BufferPtr.164 var=41 __extDM_BufferPtrDMB.165 var=38 __extDM_SingleSignalPath.166 var=43 __extDM___PDMint32_.167 var=48 __extDM_int32_.168 var=36 __extDM_int64_.169 var=44 __extDM_void.170 var=45 __extPM.171 var=33 __extPM_void.172 var=46 delay_line.173 var=39 filter_coefficients.174 var=42 pointer_delay_line.175 var=37 pointer_delay_line_ptr_start.176 var=47 pointer_filter_coefficients.177 var=40 pointer_filter_coefficients_ptr_start.178 var=49 __vola.179 var=29) F_Z14sig_init_delayP16SingleSignalPathi (__link.158 c_sensor_signal_t.153 delay_c.154 _ZL2mu.135 __extDM.136 __extDM_BufferPtr.137 __extDM_BufferPtrDMB.138 __extDM_SingleSignalPath.139 __extDM___PDMint32_.140 __extDM_int32_.141 __extDM_int64_.142 __extDM_void.143 __extPM.144 __extPM_void.145 delay_line.146 filter_coefficients.147 pointer_delay_line.148 pointer_delay_line_ptr_start.149 pointer_filter_coefficients.150 pointer_filter_coefficients_ptr_start.151 __vola.152)  <166>;
    } #6 off=3
    #7 off=4
    (_Z15sig_init_weightP16SingleSignalPathdi.185 var=109) const ()  <174>;
    (__link.187 var=111) dmaddr__call_dmaddr_ (_Z15sig_init_weightP16SingleSignalPathdi.185)  <176>;
    call {
-        (cSensorSignal.180 var=63 stl=A off=0) assign (cSensorSignal.65)  <169>;
+        (c_sensor_signal_t.180 var=63 stl=A off=0) assign (c_sensor_signal_t.65)  <169>;
        (weight_c.181 var=69 stl=AX off=0) assign (weight_c.83)  <170>;
        (__ct.184 var=108 stl=RA off=0) assign (__ct_31.128)  <173>;
        (__link.188 var=111 stl=LR off=0) assign (__link.187)  <177>;
-        (_ZL2mu.189 var=35 __extDM.190 var=32 __extDM_BufferPtr.191 var=41 __extDM_BufferPtrDMB.192 var=38 __extDM_SingleSignalPath.193 var=43 __extDM___PDMint32_.194 var=48 __extDM_int32_.195 var=36 __extDM_int64_.196 var=44 __extDM_void.197 var=45 __extPM.198 var=33 __extPM_void.199 var=46 fir_lms_coeffs.200 var=42 fir_lms_delay_line.201 var=39 ptr_fir_lms_coeffs.202 var=40 ptr_fir_lms_coeffs_ptr_start.203 var=49 ptr_fir_lms_delay_line.204 var=37 ptr_fir_lms_delay_line_ptr_start.205 var=47 __vola.206 var=29) F_Z15sig_init_weightP16SingleSignalPathdi (__link.188 cSensorSignal.180 weight_c.181 __ct.184 _ZL2mu.162 __extDM.163 __extDM_BufferPtr.164 __extDM_BufferPtrDMB.165 __extDM_SingleSignalPath.166 __extDM___PDMint32_.167 __extDM_int32_.168 __extDM_int64_.169 __extDM_void.170 __extPM.171 __extPM_void.172 fir_lms_coeffs.173 fir_lms_delay_line.174 ptr_fir_lms_coeffs.175 ptr_fir_lms_coeffs_ptr_start.176 ptr_fir_lms_delay_line.177 ptr_fir_lms_delay_line_ptr_start.178 __vola.179)  <178>;
+        (_ZL2mu.189 var=35 __extDM.190 var=32 __extDM_BufferPtr.191 var=41 __extDM_BufferPtrDMB.192 var=38 __extDM_SingleSignalPath.193 var=43 __extDM___PDMint32_.194 var=48 __extDM_int32_.195 var=36 __extDM_int64_.196 var=44 __extDM_void.197 var=45 __extPM.198 var=33 __extPM_void.199 var=46 delay_line.200 var=39 filter_coefficients.201 var=42 pointer_delay_line.202 var=37 pointer_delay_line_ptr_start.203 var=47 pointer_filter_coefficients.204 var=40 pointer_filter_coefficients_ptr_start.205 var=49 __vola.206 var=29) F_Z15sig_init_weightP16SingleSignalPathdi (__link.188 c_sensor_signal_t.180 weight_c.181 __ct.184 _ZL2mu.162 __extDM.163 __extDM_BufferPtr.164 __extDM_BufferPtrDMB.165 __extDM_SingleSignalPath.166 __extDM___PDMint32_.167 __extDM_int32_.168 __extDM_int64_.169 __extDM_void.170 __extPM.171 __extPM_void.172 delay_line.173 filter_coefficients.174 pointer_delay_line.175 pointer_delay_line_ptr_start.176 pointer_filter_coefficients.177 pointer_filter_coefficients_ptr_start.178 __vola.179)  <178>;
    } #8 off=5
    #370 off=6
    (__fch___extDM_int64_.211 var=115) load (__M_LDMA.12 b_acc.74 __extDM_int64_.196)  <183>;
@@ -291,7 +291,7 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi {
    (__rt.899 var=217) __Pvoid__pl___Pvoid_int18_ (__rt.877 __ct_8.937)  <897>;
    (__rt.921 var=217) __Pvoid__pl___Pvoid_int18_ (__rt.899 __ct_8.937)  <925>;
    call {
-        (accSensorSignal.207 var=64 stl=A off=0) assign (accSensorSignal.68)  <179>;
+        (acc_sensor_signal_t.207 var=64 stl=A off=0) assign (acc_sensor_signal_t.68)  <179>;
        (__fch___extDM_int64_.212 var=115 stl=AX off=0) assign (__fch___extDM_int64_.211)  <184>;
        (__fch___extDM_int64_.217 var=119 stl=AX off=1) assign (__fch___extDM_int64_.216)  <189>;
        (__fch___extDM_int64_.222 var=123 stl=BX off=0) assign (__fch___extDM_int64_.221)  <194>;
@@ -299,24 +299,24 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi {
        (__fch___extDM_int64_.232 var=131 stl=__spill_LDMA off=0) assign (__fch___extDM_int64_.231)  <204>;
        (__ct.235 var=133 stl=RA off=0) assign (__ct_31.128)  <207>;
        (__link.239 var=136 stl=LR off=0) assign (__link.238)  <211>;
-        (_ZL2mu.240 var=35 __extDM.241 var=32 __extDM_BufferPtr.242 var=41 __extDM_BufferPtrDMB.243 var=38 __extDM_SingleSignalPath.244 var=43 __extDM___PDMint32_.245 var=48 __extDM_int32_.246 var=36 __extDM_int64_.247 var=44 __extDM_void.248 var=45 __extPM.249 var=33 __extPM_void.250 var=46 fir_lms_coeffs.251 var=42 fir_lms_delay_line.252 var=39 ptr_fir_lms_coeffs.253 var=40 ptr_fir_lms_coeffs_ptr_start.254 var=49 ptr_fir_lms_delay_line.255 var=37 ptr_fir_lms_delay_line_ptr_start.256 var=47 __vola.257 var=29) F_Z21sig_init_preemph_coefP16SingleSignalPathdddddi (__link.239 accSensorSignal.207 __fch___extDM_int64_.212 __fch___extDM_int64_.217 __fch___extDM_int64_.222 __fch___extDM_int64_.227 __fch___extDM_int64_.232 __ct.235 _ZL2mu.189 __extDM.190 __extDM_BufferPtr.191 __extDM_BufferPtrDMB.192 __extDM_SingleSignalPath.193 __extDM___PDMint32_.194 __extDM_int32_.195 __extDM_int64_.196 __extDM_void.197 __extPM.198 __extPM_void.199 fir_lms_coeffs.200 fir_lms_delay_line.201 ptr_fir_lms_coeffs.202 ptr_fir_lms_coeffs_ptr_start.203 ptr_fir_lms_delay_line.204 ptr_fir_lms_delay_line_ptr_start.205 __vola.206)  <212>;
+        (_ZL2mu.240 var=35 __extDM.241 var=32 __extDM_BufferPtr.242 var=41 __extDM_BufferPtrDMB.243 var=38 __extDM_SingleSignalPath.244 var=43 __extDM___PDMint32_.245 var=48 __extDM_int32_.246 var=36 __extDM_int64_.247 var=44 __extDM_void.248 var=45 __extPM.249 var=33 __extPM_void.250 var=46 delay_line.251 var=39 filter_coefficients.252 var=42 pointer_delay_line.253 var=37 pointer_delay_line_ptr_start.254 var=47 pointer_filter_coefficients.255 var=40 pointer_filter_coefficients_ptr_start.256 var=49 __vola.257 var=29) F_Z21sig_init_preemph_coefP16SingleSignalPathdddddi (__link.239 acc_sensor_signal_t.207 __fch___extDM_int64_.212 __fch___extDM_int64_.217 __fch___extDM_int64_.222 __fch___extDM_int64_.227 __fch___extDM_int64_.232 __ct.235 _ZL2mu.189 __extDM.190 __extDM_BufferPtr.191 __extDM_BufferPtrDMB.192 __extDM_SingleSignalPath.193 __extDM___PDMint32_.194 __extDM_int32_.195 __extDM_int64_.196 __extDM_void.197 __extPM.198 __extPM_void.199 delay_line.200 filter_coefficients.201 pointer_delay_line.202 pointer_delay_line_ptr_start.203 pointer_filter_coefficients.204 pointer_filter_coefficients_ptr_start.205 __vola.206)  <212>;
    } #10 off=7
    #11 off=8
    (__link.262 var=139) dmaddr__call_dmaddr_ (_Z14sig_init_delayP16SingleSignalPathi.155)  <217>;
    call {
-        (accSensorSignal.258 var=64 stl=A off=0) assign (accSensorSignal.68)  <213>;
+        (acc_sensor_signal_t.258 var=64 stl=A off=0) assign (acc_sensor_signal_t.68)  <213>;
        (delay_acc.259 var=68 stl=RA off=1) assign (delay_acc.80)  <214>;
        (__link.263 var=139 stl=LR off=0) assign (__link.262)  <218>;
-        (__tmp.264 var=140 stl=RA off=0 _ZL2mu.267 var=35 __extDM.268 var=32 __extDM_BufferPtr.269 var=41 __extDM_BufferPtrDMB.270 var=38 __extDM_SingleSignalPath.271 var=43 __extDM___PDMint32_.272 var=48 __extDM_int32_.273 var=36 __extDM_int64_.274 var=44 __extDM_void.275 var=45 __extPM.276 var=33 __extPM_void.277 var=46 fir_lms_coeffs.278 var=42 fir_lms_delay_line.279 var=39 ptr_fir_lms_coeffs.280 var=40 ptr_fir_lms_coeffs_ptr_start.281 var=49 ptr_fir_lms_delay_line.282 var=37 ptr_fir_lms_delay_line_ptr_start.283 var=47 __vola.284 var=29) F_Z14sig_init_delayP16SingleSignalPathi (__link.263 accSensorSignal.258 delay_acc.259 _ZL2mu.240 __extDM.241 __extDM_BufferPtr.242 __extDM_BufferPtrDMB.243 __extDM_SingleSignalPath.244 __extDM___PDMint32_.245 __extDM_int32_.246 __extDM_int64_.247 __extDM_void.248 __extPM.249 __extPM_void.250 fir_lms_coeffs.251 fir_lms_delay_line.252 ptr_fir_lms_coeffs.253 ptr_fir_lms_coeffs_ptr_start.254 ptr_fir_lms_delay_line.255 ptr_fir_lms_delay_line_ptr_start.256 __vola.257)  <219>;
+        (__tmp.264 var=140 stl=RA off=0 _ZL2mu.267 var=35 __extDM.268 var=32 __extDM_BufferPtr.269 var=41 __extDM_BufferPtrDMB.270 var=38 __extDM_SingleSignalPath.271 var=43 __extDM___PDMint32_.272 var=48 __extDM_int32_.273 var=36 __extDM_int64_.274 var=44 __extDM_void.275 var=45 __extPM.276 var=33 __extPM_void.277 var=46 delay_line.278 var=39 filter_coefficients.279 var=42 pointer_delay_line.280 var=37 pointer_delay_line_ptr_start.281 var=47 pointer_filter_coefficients.282 var=40 pointer_filter_coefficients_ptr_start.283 var=49 __vola.284 var=29) F_Z14sig_init_delayP16SingleSignalPathi (__link.263 acc_sensor_signal_t.258 delay_acc.259 _ZL2mu.240 __extDM.241 __extDM_BufferPtr.242 __extDM_BufferPtrDMB.243 __extDM_SingleSignalPath.244 __extDM___PDMint32_.245 __extDM_int32_.246 __extDM_int64_.247 __extDM_void.248 __extPM.249 __extPM_void.250 delay_line.251 filter_coefficients.252 pointer_delay_line.253 pointer_delay_line_ptr_start.254 pointer_filter_coefficients.255 pointer_filter_coefficients_ptr_start.256 __vola.257)  <219>;
    } #12 off=9
    #13 off=10
    (__link.292 var=145) dmaddr__call_dmaddr_ (_Z15sig_init_weightP16SingleSignalPathdi.185)  <229>;
    call {
-        (accSensorSignal.285 var=64 stl=A off=0) assign (accSensorSignal.68)  <222>;
+        (acc_sensor_signal_t.285 var=64 stl=A off=0) assign (acc_sensor_signal_t.68)  <222>;
        (weight_acc.286 var=70 stl=AX off=0) assign (weight_acc.86)  <223>;
        (__ct.289 var=142 stl=RA off=0) assign (__ct_31.128)  <226>;
        (__link.293 var=145 stl=LR off=0) assign (__link.292)  <230>;
-        (_ZL2mu.294 var=35 __extDM.295 var=32 __extDM_BufferPtr.296 var=41 __extDM_BufferPtrDMB.297 var=38 __extDM_SingleSignalPath.298 var=43 __extDM___PDMint32_.299 var=48 __extDM_int32_.300 var=36 __extDM_int64_.301 var=44 __extDM_void.302 var=45 __extPM.303 var=33 __extPM_void.304 var=46 fir_lms_coeffs.305 var=42 fir_lms_delay_line.306 var=39 ptr_fir_lms_coeffs.307 var=40 ptr_fir_lms_coeffs_ptr_start.308 var=49 ptr_fir_lms_delay_line.309 var=37 ptr_fir_lms_delay_line_ptr_start.310 var=47 __vola.311 var=29) F_Z15sig_init_weightP16SingleSignalPathdi (__link.293 accSensorSignal.285 weight_acc.286 __ct.289 _ZL2mu.267 __extDM.268 __extDM_BufferPtr.269 __extDM_BufferPtrDMB.270 __extDM_SingleSignalPath.271 __extDM___PDMint32_.272 __extDM_int32_.273 __extDM_int64_.274 __extDM_void.275 __extPM.276 __extPM_void.277 fir_lms_coeffs.278 fir_lms_delay_line.279 ptr_fir_lms_coeffs.280 ptr_fir_lms_coeffs_ptr_start.281 ptr_fir_lms_delay_line.282 ptr_fir_lms_delay_line_ptr_start.283 __vola.284)  <231>;
+        (_ZL2mu.294 var=35 __extDM.295 var=32 __extDM_BufferPtr.296 var=41 __extDM_BufferPtrDMB.297 var=38 __extDM_SingleSignalPath.298 var=43 __extDM___PDMint32_.299 var=48 __extDM_int32_.300 var=36 __extDM_int64_.301 var=44 __extDM_void.302 var=45 __extPM.303 var=33 __extPM_void.304 var=46 delay_line.305 var=39 filter_coefficients.306 var=42 pointer_delay_line.307 var=37 pointer_delay_line_ptr_start.308 var=47 pointer_filter_coefficients.309 var=40 pointer_filter_coefficients_ptr_start.310 var=49 __vola.311 var=29) F_Z15sig_init_weightP16SingleSignalPathdi (__link.293 acc_sensor_signal_t.285 weight_acc.286 __ct.289 _ZL2mu.267 __extDM.268 __extDM_BufferPtr.269 __extDM_BufferPtrDMB.270 __extDM_SingleSignalPath.271 __extDM___PDMint32_.272 __extDM_int32_.273 __extDM_int64_.274 __extDM_void.275 __extPM.276 __extPM_void.277 delay_line.278 filter_coefficients.279 pointer_delay_line.280 pointer_delay_line_ptr_start.281 pointer_filter_coefficients.282 pointer_filter_coefficients_ptr_start.283 __vola.284)  <231>;
    } #14 off=11
    #474 off=12
    (__ct_4746794007244308480.312 var=146) const ()  <232>;
@@ -340,36 +340,36 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi {
    } #481 off=15
    #471 off=16
    (__ptr_mu.49 var=52) const ()  <73>;
-    (__ptr_ptr_fir_lms_delay_line.51 var=54) const ()  <75>;
+    (__ptr_pointer_delay_line.51 var=54) const ()  <75>;
-    (__ptr_fir_lms_delay_line.53 var=56) const ()  <77>;
+    (__ptr_delay_line.53 var=56) const ()  <77>;
    (__M_WDMA.316 var=11 _ZL2mu.317 var=35) store (__tmp.968 __ptr_mu.49 _ZL2mu.294)  <236>;
    (__ct_64.321 var=150) const ()  <240>;
-    (_Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii.324 var=152) const ()  <243>;
+    (_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii.324 var=152) const ()  <243>;
-    (__link.326 var=154) dmaddr__call_dmaddr_ (_Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii.324)  <245>;
+    (__link.326 var=154) dmaddr__call_dmaddr_ (_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii.324)  <245>;
    call {
-        (__ptr_ptr_fir_lms_delay_line.318 var=53 stl=A off=4) assign (__ptr_ptr_fir_lms_delay_line.51)  <237>;
+        (__ptr_pointer_delay_line.318 var=53 stl=A off=4) assign (__ptr_pointer_delay_line.51)  <237>;
-        (__ptr_fir_lms_delay_line.319 var=55 stl=A off=5) assign (__ptr_fir_lms_delay_line.53)  <238>;
+        (__ptr_delay_line.319 var=55 stl=A off=5) assign (__ptr_delay_line.53)  <238>;
-        (lms_fir_num_coeffs.320 var=72 stl=RA off=1) assign (lms_fir_num_coeffs.92)  <239>;
+        (number_coefficients.320 var=72 stl=RA off=1) assign (number_coefficients.92)  <239>;
        (__ct.323 var=151 stl=RB off=0) assign (__ct_64.321)  <242>;
        (__link.327 var=154 stl=LR off=0) assign (__link.326)  <246>;
-        (__tmp.328 var=155 stl=RA off=0 _ZL2mu.331 var=35 __extDM.332 var=32 __extDM_BufferPtr.333 var=41 __extDM_BufferPtrDMB.334 var=38 __extDM_SingleSignalPath.335 var=43 __extDM___PDMint32_.336 var=48 __extDM_int32_.337 var=36 __extDM_int64_.338 var=44 __extDM_void.339 var=45 __extPM.340 var=33 __extPM_void.341 var=46 fir_lms_coeffs.342 var=42 fir_lms_delay_line.343 var=39 ptr_fir_lms_coeffs.344 var=40 ptr_fir_lms_coeffs_ptr_start.345 var=49 ptr_fir_lms_delay_line.346 var=37 ptr_fir_lms_delay_line_ptr_start.347 var=47 __vola.348 var=29) F_Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii (__link.327 __ptr_ptr_fir_lms_delay_line.318 __ptr_fir_lms_delay_line.319 lms_fir_num_coeffs.320 __ct.323 _ZL2mu.317 __extDM.295 __extDM_BufferPtr.296 __extDM_BufferPtrDMB.297 __extDM_SingleSignalPath.298 __extDM___PDMint32_.299 __extDM_int32_.300 __extDM_int64_.301 __extDM_void.302 __extPM.303 __extPM_void.304 fir_lms_coeffs.305 fir_lms_delay_line.306 ptr_fir_lms_coeffs.307 ptr_fir_lms_coeffs_ptr_start.308 ptr_fir_lms_delay_line.309 ptr_fir_lms_delay_line_ptr_start.310 __vola.311)  <247>;
+        (__tmp.328 var=155 stl=RA off=0 _ZL2mu.331 var=35 __extDM.332 var=32 __extDM_BufferPtr.333 var=41 __extDM_BufferPtrDMB.334 var=38 __extDM_SingleSignalPath.335 var=43 __extDM___PDMint32_.336 var=48 __extDM_int32_.337 var=36 __extDM_int64_.338 var=44 __extDM_void.339 var=45 __extPM.340 var=33 __extPM_void.341 var=46 delay_line.342 var=39 filter_coefficients.343 var=42 pointer_delay_line.344 var=37 pointer_delay_line_ptr_start.345 var=47 pointer_filter_coefficients.346 var=40 pointer_filter_coefficients_ptr_start.347 var=49 __vola.348 var=29) F_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii (__link.327 __ptr_pointer_delay_line.318 __ptr_delay_line.319 number_coefficients.320 __ct.323 _ZL2mu.317 __extDM.295 __extDM_BufferPtr.296 __extDM_BufferPtrDMB.297 __extDM_SingleSignalPath.298 __extDM___PDMint32_.299 __extDM_int32_.300 __extDM_int64_.301 __extDM_void.302 __extPM.303 __extPM_void.304 delay_line.305 filter_coefficients.306 pointer_delay_line.307 pointer_delay_line_ptr_start.308 pointer_filter_coefficients.309 pointer_filter_coefficients_ptr_start.310 __vola.311)  <247>;
    } #16 off=17
    #17 off=18
-    (__ptr_ptr_fir_lms_coeffs.55 var=58) const ()  <79>;
+    (__ptr_pointer_filter_coefficients.55 var=58) const ()  <79>;
-    (__ptr_fir_lms_coeffs.57 var=60) const ()  <81>;
+    (__ptr_filter_coefficients.57 var=60) const ()  <81>;
-    (_Z15sig_init_bufferP9BufferPtrPiii.355 var=158) const ()  <256>;
+    (_Z17initialize_bufferP9BufferPtrPiii.355 var=158) const ()  <256>;
-    (__link.357 var=160) dmaddr__call_dmaddr_ (_Z15sig_init_bufferP9BufferPtrPiii.355)  <258>;
+    (__link.357 var=160) dmaddr__call_dmaddr_ (_Z17initialize_bufferP9BufferPtrPiii.355)  <258>;
    call {
-        (__ptr_ptr_fir_lms_coeffs.349 var=57 stl=A off=0) assign (__ptr_ptr_fir_lms_coeffs.55)  <250>;
+        (__ptr_pointer_filter_coefficients.349 var=57 stl=A off=0) assign (__ptr_pointer_filter_coefficients.55)  <250>;
-        (__ptr_fir_lms_coeffs.350 var=59 stl=A off=1) assign (__ptr_fir_lms_coeffs.57)  <251>;
+        (__ptr_filter_coefficients.350 var=59 stl=A off=1) assign (__ptr_filter_coefficients.57)  <251>;
-        (lms_fir_num_coeffs.351 var=72 stl=RA off=1) assign (lms_fir_num_coeffs.92)  <252>;
+        (number_coefficients.351 var=72 stl=RA off=1) assign (number_coefficients.92)  <252>;
        (__ct.354 var=157 stl=RB off=0) assign (__ct_64.321)  <255>;
        (__link.358 var=160 stl=LR off=0) assign (__link.357)  <259>;
-        (__tmp.359 var=161 stl=RA off=0 _ZL2mu.362 var=35 __extDM.363 var=32 __extDM_BufferPtr.364 var=41 __extDM_BufferPtrDMB.365 var=38 __extDM_SingleSignalPath.366 var=43 __extDM___PDMint32_.367 var=48 __extDM_int32_.368 var=36 __extDM_int64_.369 var=44 __extDM_void.370 var=45 __extPM.371 var=33 __extPM_void.372 var=46 fir_lms_coeffs.373 var=42 fir_lms_delay_line.374 var=39 ptr_fir_lms_coeffs.375 var=40 ptr_fir_lms_coeffs_ptr_start.376 var=49 ptr_fir_lms_delay_line.377 var=37 ptr_fir_lms_delay_line_ptr_start.378 var=47 __vola.379 var=29) F_Z15sig_init_bufferP9BufferPtrPiii (__link.358 __ptr_ptr_fir_lms_coeffs.349 __ptr_fir_lms_coeffs.350 lms_fir_num_coeffs.351 __ct.354 _ZL2mu.331 __extDM.332 __extDM_BufferPtr.333 __extDM_BufferPtrDMB.334 __extDM_SingleSignalPath.335 __extDM___PDMint32_.336 __extDM_int32_.337 __extDM_int64_.338 __extDM_void.339 __extPM.340 __extPM_void.341 fir_lms_coeffs.342 fir_lms_delay_line.343 ptr_fir_lms_coeffs.344 ptr_fir_lms_coeffs_ptr_start.345 ptr_fir_lms_delay_line.346 ptr_fir_lms_delay_line_ptr_start.347 __vola.348)  <260>;
+        (__tmp.359 var=161 stl=RA off=0 _ZL2mu.362 var=35 __extDM.363 var=32 __extDM_BufferPtr.364 var=41 __extDM_BufferPtrDMB.365 var=38 __extDM_SingleSignalPath.366 var=43 __extDM___PDMint32_.367 var=48 __extDM_int32_.368 var=36 __extDM_int64_.369 var=44 __extDM_void.370 var=45 __extPM.371 var=33 __extPM_void.372 var=46 delay_line.373 var=39 filter_coefficients.374 var=42 pointer_delay_line.375 var=37 pointer_delay_line_ptr_start.376 var=47 pointer_filter_coefficients.377 var=40 pointer_filter_coefficients_ptr_start.378 var=49 __vola.379 var=29) F_Z17initialize_bufferP9BufferPtrPiii (__link.358 __ptr_pointer_filter_coefficients.349 __ptr_filter_coefficients.350 number_coefficients.351 __ct.354 _ZL2mu.331 __extDM.332 __extDM_BufferPtr.333 __extDM_BufferPtrDMB.334 __extDM_SingleSignalPath.335 __extDM___PDMint32_.336 __extDM_int32_.337 __extDM_int64_.338 __extDM_void.339 __extPM.340 __extPM_void.341 delay_line.342 filter_coefficients.343 pointer_delay_line.344 pointer_delay_line_ptr_start.345 pointer_filter_coefficients.346 pointer_filter_coefficients_ptr_start.347 __vola.348)  <260>;
    } #18 off=19
    #466 off=20
    (__ct_0.103 var=78) const ()  <127>;
-    (__tmp.947 var=262) uint3__cmp_int72__int72_ (lms_fir_num_coeffs.92 __ct_0.103)  <989>;
+    (__tmp.947 var=262) uint3__cmp_int72__int72_ (number_coefficients.92 __ct_0.103)  <989>;
    (__tmp.975 var=164) bool_nplus_uint3_ (__tmp.947)  <1098>;
    (__trgt.978 var=286) const ()  <1126>;
    () void_jump_bool_int10_ (__tmp.975 __trgt.978)  <1127>;
@@ -386,11 +386,11 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi {
        } #27 off=24
        {
            #34 off=21
-            (__fch_ptr_fir_lms_delay_line_ptr_start.467 var=170) load (__M_WDMB.10 __ptr_ptr_fir_lms_delay_line__a4.664 ptr_fir_lms_delay_line_ptr_start.378)  <352>;
+            (__fch_pointer_delay_line_ptr_start.467 var=170) load (__M_WDMB.10 __ptr_pointer_delay_line__a4.664 pointer_delay_line_ptr_start.376)  <352>;
-            (__fch_ptr_fir_lms_coeffs_ptr_start.482 var=180) load (__M_WDMA.9 __ptr_ptr_fir_lms_coeffs__a4.665 ptr_fir_lms_coeffs_ptr_start.376)  <363>;
+            (__fch_pointer_filter_coefficients_ptr_start.482 var=180) load (__M_WDMA.9 __ptr_pointer_filter_coefficients__a4.665 pointer_filter_coefficients_ptr_start.378)  <363>;
-            (__cv.649 var=205) uint16__uint16____sint (lms_fir_num_coeffs.92)  <558>;
+            (__cv.649 var=205) uint16__uint16____sint (number_coefficients.92)  <558>;
-            (__ptr_ptr_fir_lms_delay_line__a4.664 var=213) const ()  <574>;
+            (__ptr_pointer_delay_line__a4.664 var=213) const ()  <574>;
-            (__ptr_ptr_fir_lms_coeffs__a4.665 var=214) const ()  <576>;
+            (__ptr_pointer_filter_coefficients__a4.665 var=214) const ()  <576>;
            (__ct_4.936 var=250) const ()  <969>;
            (__trgt.981 var=288) const ()  <1132>;
            () void_doloop_uint16__uint16_ (__cv.649 __trgt.981)  <1133>;
@@ -399,14 +399,14 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi {
                {
                    (_ZL2mu.429 var=35) entry (_ZL2mu.508 _ZL2mu.362)  <314>;
                    (__extDM_int32_.430 var=36) entry (__extDM_int32_.510 __extDM_int32_.368)  <315>;
-                    (fir_lms_delay_line.433 var=39) entry (fir_lms_delay_line.516 fir_lms_delay_line.374)  <318>;
+                    (delay_line.433 var=39) entry (delay_line.516 delay_line.373)  <318>;
-                    (fir_lms_coeffs.436 var=42) entry (fir_lms_coeffs.522 fir_lms_coeffs.373)  <321>;
+                    (filter_coefficients.436 var=42) entry (filter_coefficients.522 filter_coefficients.374)  <321>;
-                    (__iv1_i.635 var=201) entry (__iv1_i.636 __fch_ptr_fir_lms_delay_line_ptr_start.467)  <545>;
+                    (__iv1_i.635 var=201) entry (__iv1_i.636 __fch_pointer_delay_line_ptr_start.467)  <545>;
-                    (__iv2_i.640 var=202) entry (__iv2_i.641 __fch_ptr_fir_lms_coeffs_ptr_start.482)  <549>;
+                    (__iv2_i.640 var=202) entry (__iv2_i.641 __fch_pointer_filter_coefficients_ptr_start.482)  <549>;
                } #24
                {
-                    (__M_WDMB.472 var=12 _ZL2mu.473 var=35 __extDM_int32_.474 var=36 fir_lms_coeffs.475 var=42 fir_lms_delay_line.476 var=39) store (__ct_0.103 __iv1_i.635 _ZL2mu.429 __extDM_int32_.430 fir_lms_coeffs.436 fir_lms_delay_line.433)  <357>;
+                    (__M_WDMB.472 var=12 _ZL2mu.473 var=35 __extDM_int32_.474 var=36 delay_line.475 var=39 filter_coefficients.476 var=42) store (__ct_0.103 __iv1_i.635 _ZL2mu.429 __extDM_int32_.430 delay_line.433 filter_coefficients.436)  <357>;
-                    (__M_WDMA.487 var=11 _ZL2mu.488 var=35 __extDM_int32_.489 var=36 fir_lms_coeffs.490 var=42 fir_lms_delay_line.491 var=39) store (__ct_0.103 __iv2_i.640 _ZL2mu.473 __extDM_int32_.474 fir_lms_coeffs.475 fir_lms_delay_line.476)  <368>;
+                    (__M_WDMA.487 var=11 _ZL2mu.488 var=35 __extDM_int32_.489 var=36 delay_line.490 var=39 filter_coefficients.491 var=42) store (__ct_0.103 __iv2_i.640 _ZL2mu.473 __extDM_int32_.474 delay_line.475 filter_coefficients.476)  <368>;
                    (__rt.723 var=217) __Pvoid__pl___Pvoid_int18_ (__iv1_i.635 __ct_4.936)  <673>;
                    (__rt.745 var=217) __Pvoid__pl___Pvoid_int18_ (__iv2_i.640 __ct_4.936)  <701>;
                } #256 off=22
@@ -414,8 +414,8 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi {
                    () for_count (__vcnt.982)  <373>;
                    (_ZL2mu.508 var=35 _ZL2mu.509 var=35) exit (_ZL2mu.488)  <380>;
                    (__extDM_int32_.510 var=36 __extDM_int32_.511 var=36) exit (__extDM_int32_.489)  <381>;
-                    (fir_lms_delay_line.516 var=39 fir_lms_delay_line.517 var=39) exit (fir_lms_delay_line.491)  <384>;
+                    (delay_line.516 var=39 delay_line.517 var=39) exit (delay_line.490)  <384>;
-                    (fir_lms_coeffs.522 var=42 fir_lms_coeffs.523 var=42) exit (fir_lms_coeffs.490)  <387>;
+                    (filter_coefficients.522 var=42 filter_coefficients.523 var=42) exit (filter_coefficients.491)  <387>;
                    (__iv1_i.636 var=201 __iv1_i.637 var=201) exit (__rt.723)  <546>;
                    (__iv2_i.641 var=202 __iv2_i.642 var=202) exit (__rt.745)  <550>;
                } #26
@@ -424,8 +424,8 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi {
        {
            (_ZL2mu.574 var=35) merge (_ZL2mu.362 _ZL2mu.509)  <413>;
            (__extDM_int32_.575 var=36) merge (__extDM_int32_.368 __extDM_int32_.511)  <414>;
-            (fir_lms_delay_line.576 var=39) merge (fir_lms_delay_line.374 fir_lms_delay_line.517)  <415>;
+            (delay_line.576 var=39) merge (delay_line.373 delay_line.517)  <415>;
-            (fir_lms_coeffs.577 var=42) merge (fir_lms_coeffs.373 fir_lms_coeffs.523)  <416>;
+            (filter_coefficients.577 var=42) merge (filter_coefficients.374 filter_coefficients.523)  <416>;
        } #28
    } #20
    #30 off=25 nxt=-2
@@ -438,180 +438,180 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi {
    () sink (__sp.585)  <430>;
    () sink (_ZL2mu.574)  <431>;
    () sink (__extDM_int32_.575)  <432>;
-    () sink (ptr_fir_lms_delay_line.377)  <433>;
+    () sink (pointer_delay_line.375)  <433>;
    () sink (__extDM_BufferPtrDMB.365)  <434>;
-    () sink (fir_lms_delay_line.576)  <435>;
+    () sink (delay_line.576)  <435>;
-    () sink (ptr_fir_lms_coeffs.375)  <436>;
+    () sink (pointer_filter_coefficients.377)  <436>;
    () sink (__extDM_BufferPtr.364)  <437>;
-    () sink (fir_lms_coeffs.577)  <438>;
+    () sink (filter_coefficients.577)  <438>;
    () sink (__extDM_SingleSignalPath.366)  <439>;
    () sink (__extDM_int64_.369)  <440>;
    () sink (__extDM_void.370)  <441>;
    () sink (__extPM_void.372)  <442>;
-    () sink (ptr_fir_lms_delay_line_ptr_start.378)  <443>;
+    () sink (pointer_delay_line_ptr_start.376)  <443>;
    () sink (__extDM___PDMint32_.367)  <444>;
-    () sink (ptr_fir_lms_coeffs_ptr_start.376)  <445>;
+    () sink (pointer_filter_coefficients_ptr_start.378)  <445>;
    () sink (__ct_0.59)  <446>;
    (__rt.701 var=217) __Pvoid__pl___Pvoid_int18_ (__rd___sp.580 __ct_0s0.935)  <645>;
    (__ct_0s0.935 var=249) const ()  <967>;
 } #0
 0 : 'signal_processing\\signal_path.c';
 ----------
-0 : (0,303:0,0);
+0 : (0,306:0,0);
-4 : (0,318:4,2);
+4 : (0,321:4,2);
-5 : (0,319:34,3);
+5 : (0,322:38,3);
-6 : (0,319:4,3);
+6 : (0,322:4,3);
-7 : (0,320:45,4);
+7 : (0,323:49,4);
-8 : (0,320:4,4);
+8 : (0,323:4,4);
-10 : (0,323:4,5);
+10 : (0,326:4,5);
-11 : (0,324:36,6);
+11 : (0,327:40,6);
-12 : (0,324:4,6);
+12 : (0,327:4,6);
-13 : (0,325:49,7);
+13 : (0,328:53,7);
-14 : (0,325:4,7);
+14 : (0,328:4,7);
-16 : (0,331:4,10);
+16 : (0,334:4,10);
-17 : (0,332:77,11);
+17 : (0,335:94,11);
-18 : (0,332:4,11);
+18 : (0,335:4,11);
-20 : (0,335:4,13);
+20 : (0,338:4,13);
-22 : (0,335:4,14);
+22 : (0,338:4,14);
-23 : (0,335:4,14);
+23 : (0,338:4,14);
-27 : (0,335:4,22);
+27 : (0,338:4,22);
-30 : (0,339:0,25);
+30 : (0,342:0,25);
-256 : (0,335:49,14);
+256 : (0,338:50,14);
-276 : (0,318:4,2);
+276 : (0,321:4,2);
-370 : (0,323:4,5);
+370 : (0,326:4,5);
-466 : (0,335:4,13);
+466 : (0,338:4,13);
-471 : (0,331:4,10);
+471 : (0,334:4,10);
-474 : (0,329:16,9);
+474 : (0,332:16,9);
-475 : (0,329:16,9);
+475 : (0,332:16,9);
-480 : (0,329:7,9);
+480 : (0,332:7,9);
-481 : (0,329:7,9);
+481 : (0,332:7,9);
 ----------
-77 : (0,331:49,0);
+77 : (0,334:47,0);
-81 : (0,332:41,0);
+81 : (0,335:52,0);
-118 : (0,303:5,0);
+118 : (0,306:5,0);
-122 : (0,303:5,0);
+122 : (0,306:5,0);
-126 : (0,318:26,0);
+126 : (0,321:26,0);
-127 : (0,318:45,0);
+127 : (0,321:49,0);
-130 : (0,318:44,2);
+130 : (0,321:48,2);
-131 : (0,318:44,0);
+131 : (0,321:48,0);
-135 : (0,318:52,2);
+135 : (0,321:56,2);
-136 : (0,318:52,0);
+136 : (0,321:56,0);
-140 : (0,318:60,2);
+140 : (0,321:64,2);
-141 : (0,318:60,0);
+141 : (0,321:64,0);
-145 : (0,318:68,2);
+145 : (0,321:72,2);
-146 : (0,318:68,0);
+146 : (0,321:72,0);
-150 : (0,318:76,2);
+150 : (0,321:80,2);
-151 : (0,318:76,0);
+151 : (0,321:80,0);
-152 : (0,318:81,0);
+152 : (0,321:85,0);
-154 : (0,318:81,0);
+154 : (0,321:85,0);
-157 : (0,318:4,2);
+157 : (0,321:4,2);
-158 : (0,318:4,0);
+158 : (0,321:4,0);
-159 : (0,318:4,2);
+159 : (0,321:4,2);
-160 : (0,319:19,0);
+160 : (0,322:19,0);
-161 : (0,319:34,0);
+161 : (0,322:38,0);
-164 : (0,319:4,3);
+164 : (0,322:4,3);
-165 : (0,319:4,0);
+165 : (0,322:4,0);
-166 : (0,319:4,3);
+166 : (0,322:4,3);
-169 : (0,320:20,0);
+169 : (0,323:20,0);
-170 : (0,320:35,0);
+170 : (0,323:39,0);
-173 : (0,320:45,0);
+173 : (0,323:49,0);
-176 : (0,320:4,4);
+176 : (0,323:4,4);
-177 : (0,320:4,0);
+177 : (0,323:4,0);
-178 : (0,320:4,4);
+178 : (0,323:4,4);
-179 : (0,323:26,0);
+179 : (0,326:26,0);
-183 : (0,323:48,5);
+183 : (0,326:52,5);
-184 : (0,323:48,0);
+184 : (0,326:52,0);
-188 : (0,323:58,5);
+188 : (0,326:62,5);
-189 : (0,323:58,0);
+189 : (0,326:62,0);
-193 : (0,323:68,5);
+193 : (0,326:72,5);
-194 : (0,323:68,0);
+194 : (0,326:72,0);
-198 : (0,323:78,5);
+198 : (0,326:82,5);
-199 : (0,323:78,0);
+199 : (0,326:82,0);
-203 : (0,323:88,5);
+203 : (0,326:92,5);
-204 : (0,323:88,0);
+204 : (0,326:92,0);
-207 : (0,323:93,0);
+207 : (0,326:97,0);
-210 : (0,323:4,5);
+210 : (0,326:4,5);
-211 : (0,323:4,0);
+211 : (0,326:4,0);
-212 : (0,323:4,5);
+212 : (0,326:4,5);
-213 : (0,324:19,0);
+213 : (0,327:19,0);
-214 : (0,324:36,0);
+214 : (0,327:40,0);
-217 : (0,324:4,6);
+217 : (0,327:4,6);
-218 : (0,324:4,0);
+218 : (0,327:4,0);
-219 : (0,324:4,6);
+219 : (0,327:4,6);
-222 : (0,325:20,0);
+222 : (0,328:20,0);
-223 : (0,325:37,0);
+223 : (0,328:41,0);
-226 : (0,325:49,0);
+226 : (0,328:53,0);
-229 : (0,325:4,7);
+229 : (0,328:4,7);
-230 : (0,325:4,0);
+230 : (0,328:4,0);
-231 : (0,325:4,7);
+231 : (0,328:4,7);
-232 : (0,329:16,0);
+232 : (0,332:16,0);
-236 : (0,329:4,9);
+236 : (0,332:4,9);
-237 : (0,331:24,0);
+237 : (0,334:26,0);
-238 : (0,331:49,0);
+238 : (0,334:47,0);
-239 : (0,331:69,0);
+239 : (0,334:59,0);
-240 : (0,331:89,0);
+240 : (0,334:80,0);
-242 : (0,331:89,0);
+242 : (0,334:80,0);
-245 : (0,331:4,10);
+245 : (0,334:4,10);
-246 : (0,331:4,0);
+246 : (0,334:4,0);
-247 : (0,331:4,10);
+247 : (0,334:4,10);
-250 : (0,332:20,0);
+250 : (0,335:22,0);
-251 : (0,332:41,0);
+251 : (0,335:52,0);
-252 : (0,332:57,0);
+252 : (0,335:73,0);
-255 : (0,332:77,0);
+255 : (0,335:94,0);
-258 : (0,332:4,11);
+258 : (0,335:4,11);
-259 : (0,332:4,0);
+259 : (0,335:4,0);
-260 : (0,332:4,11);
+260 : (0,335:4,11);
-306 : (0,335:4,13);
+306 : (0,338:4,13);
-314 : (0,335:4,14);
+314 : (0,338:4,14);
-315 : (0,335:4,14);
+315 : (0,338:4,14);
-318 : (0,335:4,14);
+318 : (0,338:4,14);
-321 : (0,335:4,14);
+321 : (0,338:4,14);
-352 : (0,336:30,14);
+352 : (0,339:26,14);
-357 : (0,336:40,14);
+357 : (0,339:36,14);
-363 : (0,337:26,15);
+363 : (0,340:35,15);
-368 : (0,337:36,15);
+368 : (0,340:45,15);
-373 : (0,335:4,20);
+373 : (0,338:4,20);
-380 : (0,335:4,20);
+380 : (0,338:4,20);
-381 : (0,335:4,20);
+381 : (0,338:4,20);
-384 : (0,335:4,20);
+384 : (0,338:4,20);
-387 : (0,335:4,20);
+387 : (0,338:4,20);
-413 : (0,335:4,24);
+413 : (0,338:4,24);
-414 : (0,335:4,24);
+414 : (0,338:4,24);
-415 : (0,335:4,24);
+415 : (0,338:4,24);
-416 : (0,335:4,24);
+416 : (0,338:4,24);
-419 : (0,339:0,0);
+419 : (0,342:0,0);
-423 : (0,339:0,25);
+423 : (0,342:0,25);
-424 : (0,339:0,25);
+424 : (0,342:0,25);
-574 : (0,336:30,0);
+574 : (0,339:26,0);
-576 : (0,337:26,0);
+576 : (0,340:35,0);
-617 : (0,303:5,0);
+617 : (0,306:5,0);
-645 : (0,339:0,0);
+645 : (0,342:0,0);
-729 : (0,318:52,0);
+729 : (0,321:56,0);
-757 : (0,318:60,0);
+757 : (0,321:64,0);
-785 : (0,318:68,0);
+785 : (0,321:72,0);
-813 : (0,318:76,0);
+813 : (0,321:80,0);
-841 : (0,323:58,0);
+841 : (0,326:62,0);
-869 : (0,323:68,0);
+869 : (0,326:72,0);
-897 : (0,323:78,0);
+897 : (0,326:82,0);
-925 : (0,323:88,0);
+925 : (0,326:92,0);
-965 : (0,303:5,0);
+965 : (0,306:5,0);
-967 : (0,339:0,0);
+967 : (0,342:0,0);
-971 : (0,318:52,0);
+971 : (0,321:56,0);
-989 : (0,335:4,13);
+989 : (0,338:4,13);
-1022 : (0,329:16,0);
+1022 : (0,332:16,0);
-1023 : (0,329:16,9);
+1023 : (0,332:16,9);
-1024 : (0,329:16,9);
+1024 : (0,332:16,9);
-1025 : (0,329:16,9);
+1025 : (0,332:16,9);
-1026 : (0,329:16,9);
+1026 : (0,332:16,9);
-1027 : (0,329:16,9);
+1027 : (0,332:16,9);
-1028 : (0,329:16,9);
+1028 : (0,332:16,9);
-1034 : (0,329:7,0);
+1034 : (0,332:7,0);
-1035 : (0,329:7,9);
+1035 : (0,332:7,9);
-1036 : (0,329:7,9);
+1036 : (0,332:7,9);
-1037 : (0,329:7,9);
+1037 : (0,332:7,9);
-1038 : (0,329:7,9);
+1038 : (0,332:7,9);
-1039 : (0,329:7,9);
+1039 : (0,332:7,9);
-1098 : (0,335:4,13);
+1098 : (0,338:4,13);
-1127 : (0,335:4,13);
+1127 : (0,338:4,13);
-1133 : (0,335:4,20);
+1133 : (0,338:4,20);
--- a/simulation/Release/chesswork/signal_path-a30375.#
+++ b/simulation/Release/chesswork/signal_path-a30375.#
@@ -1,10 +1,9 @@
 6bd14b3bc305504dd7bb9269fe30bf59aca75a76
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
-cd3d7a324e5803ca379119c6ac3a521de85c2d58
+7978c4fde2e165ab8cea94bf2437aaae6d84077c
 da39a3ee5e6b4b0d3255bfef95601890afd80709
-02bb82ee2ad0a49c939022d10fb51d620f2409d2
+24bfe3d58bd85ead61551a3ec54bade6a984b1b6
-194
+201
 0
 0
 0
--- a/simulation/Release/chesswork/signal_path-a30375.o
+++ b/simulation/Release/chesswork/signal_path-a30375.o
--- a/simulation/Release/chesswork/signal_path-a30375.sfg
+++ b/simulation/Release/chesswork/signal_path-a30375.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -14,9 +14,9 @@ F_Z29sig_delay_buffer_load_and_getP16SingleSignalPathi : user_defined, called {
    frm : ( );
 }
 ****
-!!  void sig_cirular_buffer_ptr_increment(BufferPtr *, int)
+!!  void increment_buffer(BufferPtr *, int)
-F_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri : user_defined, called {
+F_Z16increment_bufferP9BufferPtri : user_defined, called {
-    fnm : "sig_cirular_buffer_ptr_increment" 'void sig_cirular_buffer_ptr_increment(BufferPtr *, int)';
+    fnm : "increment_buffer" 'void increment_buffer(BufferPtr *, int)';
    arg : ( dmaddr_:i dmaddr_:i int32_:i );
    loc : ( LR[0] A[0] RA[0] );
    vac : ( srIM[0] );
@@ -54,7 +54,7 @@ F_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri : user_defined, called {
   81 : __tmp typ=dmaddr_ bnd=m
   82 : __ct_1 typ=int32_ val=1f bnd=m
   83 : __ct typ=int32_ bnd=m
-   84 : _Z32sig_cirular_buffer_ptr_incrementP9BufferPtri typ=dmaddr_ val=0r bnd=m
+   84 : _Z16increment_bufferP9BufferPtri typ=dmaddr_ val=0r bnd=m
   86 : __link typ=dmaddr_ bnd=m
  100 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
  124 : __ct_0S0 typ=int18_ val=0S0 bnd=m
@@ -115,8 +115,8 @@ F_Z29sig_delay_buffer_load_and_getP16SingleSignalPathi {
            (__rt.100 var=47) load (__M_WDMA.9 __fch___extDM_SingleSignalPath_delay_buffer_ptr_current.99 __extDM_SingleSignalPath_delay_buffer_buffer_len.36 __extDM_int32_.37)  <125>;
            (__M_WDMA.108 var=11 __extDM_SingleSignalPath_delay_buffer_buffer_len.109 var=38 __extDM_int32_.110 var=39) store (x.53 __fch___extDM_SingleSignalPath_delay_buffer_ptr_current.99 __extDM_SingleSignalPath_delay_buffer_buffer_len.36 __extDM_int32_.37)  <133>;
            (__ct_1.115 var=82) const ()  <138>;
-            (_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri.118 var=84) const ()  <141>;
+            (_Z16increment_bufferP9BufferPtri.118 var=84) const ()  <141>;
-            (__link.120 var=86) dmaddr__call_dmaddr_ (_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri.118)  <143>;
+            (__link.120 var=86) dmaddr__call_dmaddr_ (_Z16increment_bufferP9BufferPtri.118)  <143>;
            (__rt.239 var=100) __Pvoid__pl___Pvoid_int18_ (__rt.217 __ct_8.300)  <315>;
            (__rt.283 var=100) __Pvoid__mi___Pvoid_int18_ (__rt.239 __ct_8.300)  <371>;
            (__ct_8.300 var=128) const ()  <407>;
@@ -124,7 +124,7 @@ F_Z29sig_delay_buffer_load_and_getP16SingleSignalPathi {
                (__tmp.114 var=81 stl=A off=0) assign (__rt.283)  <137>;
                (__ct.117 var=83 stl=RA off=0) assign (__ct_1.115)  <140>;
                (__link.121 var=86 stl=LR off=0) assign (__link.120)  <144>;
-                (__extDM.122 var=32 __extDM_BufferPtr.123 var=37 __extDM_SingleSignalPath.124 var=35 __extDM_SingleSignalPath_delay_buffer.125 var=36 __extDM_SingleSignalPath_delay_buffer_buffer_len.126 var=38 __extDM_SingleSignalPath_delay_buffer_ptr_current.127 var=40 __extDM___PDMint32_.128 var=41 __extDM_int32_.129 var=39 __extDM_void.130 var=42 __extPM.131 var=33 __extPM_void.132 var=43 __vola.133 var=29) F_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri (__link.121 __tmp.114 __ct.117 __extDM.30 __extDM_BufferPtr.35 __extDM_SingleSignalPath.33 __extDM_SingleSignalPath_delay_buffer.34 __extDM_SingleSignalPath_delay_buffer_buffer_len.109 __extDM_SingleSignalPath_delay_buffer_ptr_current.38 __extDM___PDMint32_.39 __extDM_int32_.110 __extDM_void.40 __extPM.31 __extPM_void.41 __vola.27)  <145>;
+                (__extDM.122 var=32 __extDM_BufferPtr.123 var=37 __extDM_SingleSignalPath.124 var=35 __extDM_SingleSignalPath_delay_buffer.125 var=36 __extDM_SingleSignalPath_delay_buffer_buffer_len.126 var=38 __extDM_SingleSignalPath_delay_buffer_ptr_current.127 var=40 __extDM___PDMint32_.128 var=41 __extDM_int32_.129 var=39 __extDM_void.130 var=42 __extPM.131 var=33 __extPM_void.132 var=43 __vola.133 var=29) F_Z16increment_bufferP9BufferPtri (__link.121 __tmp.114 __ct.117 __extDM.30 __extDM_BufferPtr.35 __extDM_SingleSignalPath.33 __extDM_SingleSignalPath_delay_buffer.34 __extDM_SingleSignalPath_delay_buffer_buffer_len.109 __extDM_SingleSignalPath_delay_buffer_ptr_current.38 __extDM___PDMint32_.39 __extDM_int32_.110 __extDM_void.40 __extPM.31 __extPM_void.41 __vola.27)  <145>;
            } #9 off=2
            #231 off=3
            (__trgt.316 var=146) const ()  <460>;
@@ -171,56 +171,56 @@ F_Z29sig_delay_buffer_load_and_getP16SingleSignalPathi {
 } #0
 0 : 'signal_processing\\signal_path.c';
 ----------
-0 : (0,194:0,0);
+0 : (0,201:0,0);
-4 : (0,195:4,1);
+4 : (0,202:4,1);
-6 : (0,195:46,2);
+6 : (0,202:46,2);
-7 : (0,196:8,5);
+7 : (0,203:8,5);
-9 : (0,200:4,8);
+9 : (0,207:4,8);
-12 : (0,201:4,13);
+12 : (0,208:4,13);
-157 : (0,200:4,8);
+157 : (0,207:4,8);
-228 : (0,195:40,1);
+228 : (0,202:40,1);
 ----------
-79 : (0,194:4,0);
+79 : (0,201:4,0);
-83 : (0,194:4,0);
+83 : (0,201:4,0);
-89 : (0,195:28,0);
+89 : (0,202:28,0);
-92 : (0,195:28,1);
+92 : (0,202:28,1);
-116 : (0,195:4,1);
+116 : (0,202:4,1);
-124 : (0,198:35,6);
+124 : (0,205:35,6);
-125 : (0,198:14,6);
+125 : (0,205:14,6);
-133 : (0,199:4,7);
+133 : (0,206:4,7);
-137 : (0,200:44,0);
+137 : (0,207:28,0);
-138 : (0,200:60,0);
+138 : (0,207:44,0);
-140 : (0,200:60,0);
+140 : (0,207:44,0);
-143 : (0,200:4,8);
+143 : (0,207:4,8);
-144 : (0,200:4,0);
+144 : (0,207:4,0);
-145 : (0,200:4,8);
+145 : (0,207:4,8);
-146 : (0,195:4,12);
+146 : (0,202:4,12);
-147 : (0,195:4,12);
+147 : (0,202:4,12);
-148 : (0,195:4,12);
+148 : (0,202:4,12);
-149 : (0,195:4,12);
+149 : (0,202:4,12);
-150 : (0,195:4,12);
+150 : (0,202:4,12);
-151 : (0,195:4,12);
+151 : (0,202:4,12);
-152 : (0,195:4,12);
+152 : (0,202:4,12);
-153 : (0,195:4,12);
+153 : (0,202:4,12);
-154 : (0,195:4,12);
+154 : (0,202:4,12);
-155 : (0,195:4,12);
+155 : (0,202:4,12);
-156 : (0,195:4,12);
+156 : (0,202:4,12);
-157 : (0,195:4,12);
+157 : (0,202:4,12);
-158 : (0,195:4,12);
+158 : (0,202:4,12);
-160 : (0,201:4,0);
+160 : (0,208:4,0);
-164 : (0,201:4,13);
+164 : (0,208:4,13);
-165 : (0,201:4,13);
+165 : (0,208:4,13);
-166 : (0,201:4,0);
+166 : (0,208:4,0);
-259 : (0,194:4,0);
+259 : (0,201:4,0);
-287 : (0,195:14,1);
+287 : (0,202:14,1);
-315 : (0,198:35,6);
+315 : (0,205:35,6);
-343 : (0,201:4,0);
+343 : (0,208:4,0);
-371 : (0,195:14,0);
+371 : (0,202:14,0);
-399 : (0,194:4,0);
+399 : (0,201:4,0);
-401 : (0,195:14,0);
+401 : (0,202:14,0);
-407 : (0,198:35,0);
+407 : (0,205:35,0);
-411 : (0,201:4,0);
+411 : (0,208:4,0);
-416 : (0,195:40,1);
+416 : (0,202:40,1);
-417 : (0,195:40,1);
+417 : (0,202:40,1);
-458 : (0,195:4,1);
+458 : (0,202:4,1);
--- a/simulation/Release/chesswork/signal_path-a3616e.#
+++ b/simulation/Release/chesswork/signal_path-a3616e.#
@@ -0,0 +1,9 @@
 6bd14b3bc305504dd7bb9269fe30bf59aca75a76
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
 9ad889ee1ba444664feee64735d6aa7318237ea3
 da39a3ee5e6b4b0d3255bfef95601890afd80709
 9c90b929ae300e2da5551831867a2244339af76d
 126
 0
 0
--- a/simulation/Release/chesswork/signal_path-a3616e.o
+++ b/simulation/Release/chesswork/signal_path-a3616e.o
--- a/simulation/Release/chesswork/signal_path-a3616e.sfg
+++ b/simulation/Release/chesswork/signal_path-a3616e.sfg
@@ -0,0 +1,118 @@
 // File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
 /***
 !!  void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int)
 F_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi : user_defined, called {
    fnm : "write_buffer_dmb" 'void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int)';
    arg : ( dmaddr_:i dmaddr_:i int32_:i );
    loc : ( LR[0] A[4] RA[0] );
    vac : ( srIM[0] );
    frm : ( );
 }
 ****
 ***/
 [
    0 : _Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi typ=uint20_ bnd=e stl=PM tref=void_____PDMBBufferPtrDMB___sint__
   12 : __M_WDMB typ=int32_ bnd=d stl=WDMB
   26 : __R_SP typ=dmaddr_ bnd=d stl=SP
   34 : __sp typ=dmaddr_ bnd=b stl=SP
   36 : __extDM_BufferPtrDMB_ptr_current typ=int8_ bnd=b stl=DM
   38 : __extDM_BufferPtrDMB_ptr_start typ=int8_ bnd=b stl=DM
   39 : __extDM_BufferPtrDMB_buffer_len typ=int8_ bnd=b stl=DM
   40 : __extDM_int32_ typ=int8_ bnd=b stl=DM
   41 : __rd___sp typ=dmaddr_ bnd=m
   42 : __ct_0 typ=uint1_ val=0f bnd=m
   43 : __la typ=dmaddr_ bnd=p tref=dmaddr___
   44 : buffer typ=dmaddr_ bnd=p tref=__PDMBBufferPtrDMB__
   45 : sample typ=int32_ bnd=p tref=__sint__
   52 : __fch___extDM_BufferPtrDMB_ptr_current typ=dmaddr_ bnd=m
   62 : __fch___extDM_BufferPtrDMB_ptr_start typ=dmaddr_ bnd=m
   66 : __fch___extDM_BufferPtrDMB_buffer_len typ=int32_ bnd=m
   70 : __tmp typ=dmaddr_ bnd=m
   89 : __ct_4 typ=int18_ val=4f bnd=m
   94 : __ct_2 typ=int32_ val=2f bnd=m
   97 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
  122 : __ct_0S0 typ=int18_ val=0S0 bnd=m
  123 : __ct_8 typ=int18_ val=8f bnd=m
  126 : __ct_0s0 typ=int18_ val=0s0 bnd=m
  131 : __ct_2 typ=uint2_ val=2f bnd=m
  135 : __tmp typ=int18_ bnd=m
 ]
 F_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi {
    (__M_WDMB.10 var=12) st_def ()  <20>;
    (__R_SP.24 var=26) st_def ()  <48>;
    (__sp.32 var=34) source ()  <56>;
    (__extDM_BufferPtrDMB_ptr_current.34 var=36) source ()  <58>;
    (__extDM_BufferPtrDMB_ptr_start.36 var=38) source ()  <60>;
    (__extDM_BufferPtrDMB_buffer_len.37 var=39) source ()  <61>;
    (__extDM_int32_.38 var=40) source ()  <62>;
    (__ct_0.40 var=42) const ()  <64>;
    (__la.42 var=43 stl=LR off=0) inp ()  <66>;
    (__la.43 var=43) deassign (__la.42)  <67>;
    (buffer.45 var=44 stl=A off=4) inp ()  <69>;
    (buffer.46 var=44) deassign (buffer.45)  <70>;
    (sample.48 var=45 stl=RA off=0) inp ()  <72>;
    (sample.49 var=45) deassign (sample.48)  <73>;
    (__rd___sp.51 var=41) rd_res_reg (__R_SP.24 __sp.32)  <75>;
    (__R_SP.55 var=26 __sp.56 var=34) wr_res_reg (__rt.140 __sp.32)  <79>;
    (__fch___extDM_BufferPtrDMB_ptr_current.60 var=52) load (__M_WDMB.10 __rt.162 __extDM_BufferPtrDMB_ptr_current.34)  <84>;
    (__M_WDMB.61 var=12 __extDM_BufferPtrDMB_buffer_len.62 var=39 __extDM_int32_.63 var=40) store (sample.49 __fch___extDM_BufferPtrDMB_ptr_current.60 __extDM_BufferPtrDMB_buffer_len.37 __extDM_int32_.38)  <85>;
    (__fch___extDM_BufferPtrDMB_ptr_start.73 var=62) load (__M_WDMB.10 __rt.206 __extDM_BufferPtrDMB_ptr_start.36)  <95>;
    (__fch___extDM_BufferPtrDMB_buffer_len.77 var=66) load (__M_WDMB.10 __rt.228 __extDM_BufferPtrDMB_buffer_len.62)  <99>;
    (__M_WDMB.85 var=12 __extDM_BufferPtrDMB_ptr_current.86 var=36) store (__tmp.116 __rt.250 __extDM_BufferPtrDMB_ptr_current.34)  <107>;
    (__rd___sp.87 var=41) rd_res_reg (__R_SP.24 __sp.56)  <108>;
    (__R_SP.91 var=26 __sp.92 var=34) wr_res_reg (__rt.184 __sp.56)  <112>;
    () void_ret_dmaddr_ (__la.43)  <113>;
    () sink (__sp.92)  <119>;
    () sink (__extDM_BufferPtrDMB_ptr_current.86)  <121>;
    () sink (__extDM_BufferPtrDMB_buffer_len.62)  <124>;
    () sink (__extDM_int32_.63)  <125>;
    () sink (__ct_0.40)  <126>;
    (__tmp.116 var=70) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch___extDM_BufferPtrDMB_ptr_current.60 __ct_4.120 __fch___extDM_BufferPtrDMB_ptr_start.73 __tmp.272)  <159>;
    (__ct_4.120 var=89) const ()  <173>;
    (__ct_2.126 var=94) const ()  <181>;
    (__rt.140 var=97) __Pvoid__pl___Pvoid_int18_ (__rd___sp.51 __ct_0S0.263)  <208>;
    (__rt.162 var=97) __Pvoid__pl___Pvoid_int18_ (buffer.46 __ct_8.264)  <236>;
    (__rt.184 var=97) __Pvoid__pl___Pvoid_int18_ (__rd___sp.87 __ct_0s0.267)  <264>;
    (__rt.206 var=97) __Pvoid__mi___Pvoid_int18_ (__rt.162 __ct_4.120)  <292>;
    (__rt.228 var=97) __Pvoid__mi___Pvoid_int18_ (__rt.206 __ct_4.120)  <320>;
    (__rt.250 var=97) __Pvoid__pl___Pvoid_int18_ (__rt.228 __ct_8.264)  <348>;
    (__ct_0S0.263 var=122) const ()  <375>;
    (__ct_8.264 var=123) const ()  <377>;
    (__ct_0s0.267 var=126) const ()  <383>;
    (__ct_2.271 var=131) const ()  <390>;
    (__tmp.272 var=135) int72__shift_int72__int72__uint2_ (__fch___extDM_BufferPtrDMB_buffer_len.77 __ct_2.126 __ct_2.271)  <391>;
 } #5 off=0 nxt=-2
 0 : 'signal_processing\\signal_path.c';
 ----------
 5 : (0,126:0,3);
 ----------
 75 : (0,123:5,0);
 79 : (0,123:5,0);
 84 : (0,124:11,1);
 85 : (0,124:4,1);
 95 : (0,125:67,2);
 99 : (0,125:86,2);
 107 : (0,125:10,2);
 108 : (0,126:0,0);
 112 : (0,126:0,3);
 113 : (0,126:0,3);
 159 : (0,125:26,2);
 173 : (0,125:26,0);
 181 : (0,125:86,0);
 208 : (0,123:5,0);
 236 : (0,124:11,1);
 264 : (0,126:0,0);
 292 : (0,125:67,0);
 348 : (0,124:11,0);
 375 : (0,123:5,0);
 377 : (0,124:11,0);
 383 : (0,126:0,0);
 390 : (0,125:86,0);
 391 : (0,125:86,2);
--- a/simulation/Release/chesswork/signal_path-a56564.#
+++ b/simulation/Release/chesswork/signal_path-a56564.#
@@ -0,0 +1,10 @@
 6bd14b3bc305504dd7bb9269fe30bf59aca75a76
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
 db34611342e1538c3b1bd0fe59ff9cc094c92226
 da39a3ee5e6b4b0d3255bfef95601890afd80709
 a925e1abfca6baaae77c5b7c516b24566d18dad0
 89
 0
 2
 2
--- a/simulation/Release/chesswork/signal_path-a56564.o
+++ b/simulation/Release/chesswork/signal_path-a56564.o
--- a/simulation/Release/chesswork/signal_path-a56564.sfg
+++ b/simulation/Release/chesswork/signal_path-a56564.sfg
@@ -0,0 +1,216 @@
 // File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
 /***
 !!  int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)
 F_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii : user_defined, called {
    fnm : "initialize_buffer_dmb" 'int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)';
    arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i );
    loc : ( LR[0] RA[0] A[4] A[5] RA[1] RB[0] );
    vac : ( srIM[0] );
    frm : ( );
 }
 ****
 ***/
 [
    0 : _Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii typ=uint20_ bnd=e stl=PM tref=__sint_____PDMBBufferPtrDMB___PDMB__sint___sint___sint__
   12 : __M_WDMB typ=int32_ bnd=d stl=WDMB
   26 : __R_SP typ=dmaddr_ bnd=d stl=SP
   34 : __sp typ=dmaddr_ bnd=b stl=SP
   36 : __extDM_int32_ typ=int8_ bnd=b stl=DM
   37 : __extDM_BufferPtrDMB_buffer_len typ=int8_ bnd=b stl=DM
   38 : __extDM_BufferPtrDMB_ptr_start typ=int8_ bnd=b stl=DM
   40 : __extDM_BufferPtrDMB_ptr_current typ=int8_ bnd=b stl=DM
   41 : __rd___sp typ=dmaddr_ bnd=m
   42 : __ct_0 typ=uint1_ val=0f bnd=m
   43 : __la typ=dmaddr_ bnd=p tref=dmaddr___
   44 : __rt typ=int32_ bnd=p tref=__sint__
   45 : buffer typ=dmaddr_ bnd=p tref=__PDMBBufferPtrDMB__
   46 : buffer_start_add typ=dmaddr_ bnd=p tref=__PDMB__sint__
   47 : length typ=int32_ bnd=p tref=__sint__
   48 : max_buffer_len typ=int32_ bnd=p tref=__sint__
   54 : __ct_0 typ=int32_ val=0f bnd=m
   65 : __tmp typ=bool bnd=m
   72 : __ct_1 typ=int32_ val=1f bnd=m
   76 : __tmp typ=bool bnd=m
   92 : __iv1_i typ=dmaddr_ bnd=m
   95 : __cv typ=uint16_ bnd=m
  103 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
  127 : __ct_0S0 typ=int18_ val=0S0 bnd=m
  128 : __ct_0s0 typ=int18_ val=0s0 bnd=m
  129 : __ct_4 typ=int18_ val=4f bnd=m
  133 : __tmp typ=uint3_ bnd=m
  138 : __tmp typ=uint3_ bnd=m
  148 : __either typ=bool bnd=m
  149 : __trgt typ=int10_ val=0j bnd=m
  150 : __trgt typ=int10_ val=0j bnd=m
  151 : __trgt typ=int10_ val=0j bnd=m
  152 : __trgt typ=int10_ val=0j bnd=m
  153 : __trgt typ=uint16_ val=0j bnd=m
  154 : __vcnt typ=uint16_ bnd=m
 ]
 F_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii {
    #239 off=0
    (__R_SP.24 var=26) st_def ()  <48>;
    (__sp.32 var=34) source ()  <56>;
    (__extDM_int32_.34 var=36) source ()  <58>;
    (__extDM_BufferPtrDMB_buffer_len.35 var=37) source ()  <59>;
    (__extDM_BufferPtrDMB_ptr_start.36 var=38) source ()  <60>;
    (__extDM_BufferPtrDMB_ptr_current.38 var=40) source ()  <62>;
    (__ct_0.40 var=42) const ()  <64>;
    (__la.42 var=43 stl=LR off=0) inp ()  <66>;
    (__la.43 var=43) deassign (__la.42)  <67>;
    (buffer.46 var=45 stl=A off=4) inp ()  <70>;
    (buffer.47 var=45) deassign (buffer.46)  <71>;
    (buffer_start_add.49 var=46 stl=A off=5) inp ()  <73>;
    (buffer_start_add.50 var=46) deassign (buffer_start_add.49)  <74>;
    (length.52 var=47 stl=RA off=1) inp ()  <76>;
    (length.53 var=47) deassign (length.52)  <77>;
    (max_buffer_len.55 var=48 stl=RB off=0) inp ()  <79>;
    (max_buffer_len.56 var=48) deassign (max_buffer_len.55)  <80>;
    (__rd___sp.58 var=41) rd_res_reg (__R_SP.24 __sp.32)  <82>;
    (__R_SP.62 var=26 __sp.63 var=34) wr_res_reg (__rt.274 __sp.32)  <86>;
    (__ct_0.66 var=54) const ()  <90>;
    (__M_WDMB.69 var=12 __extDM_BufferPtrDMB_buffer_len.70 var=37) store (length.53 buffer.47 __extDM_BufferPtrDMB_buffer_len.35)  <93>;
    (__M_WDMB.74 var=12 __extDM_BufferPtrDMB_ptr_start.75 var=38) store (buffer_start_add.50 __rt.340 __extDM_BufferPtrDMB_ptr_start.36)  <97>;
    (__M_WDMB.79 var=12 __extDM_BufferPtrDMB_ptr_current.80 var=40) store (buffer_start_add.50 __rt.362 __extDM_BufferPtrDMB_ptr_current.38)  <101>;
    (__rt.274 var=103) __Pvoid__pl___Pvoid_int18_ (__rd___sp.58 __ct_0S0.375)  <320>;
    (__rt.340 var=103) __Pvoid__pl___Pvoid_int18_ (buffer.47 __ct_4.377)  <404>;
    (__rt.362 var=103) __Pvoid__pl___Pvoid_int18_ (__rt.340 __ct_4.377)  <432>;
    (__ct_0S0.375 var=127) const ()  <457>;
    (__ct_4.377 var=129) const ()  <461>;
    (__tmp.380 var=133) uint3__cmp_int72__int72_ (length.53 __ct_0.66)  <466>;
    (__tmp.393 var=65) bool_nplus_uint3_ (__tmp.380)  <500>;
    (__trgt.396 var=149) const ()  <511>;
    () void_jump_bool_int10_ (__tmp.393 __trgt.396)  <512>;
    (__either.397 var=148) undefined ()  <513>;
    if {
        {
            () if_expr (__either.397)  <126>;
            () chess_frequent_else ()  <127>;
            () chess_rear_then ()  <514>;
        } #5
        {
            (__trgt.398 var=150) const ()  <515>;
            () void_jump_int10_ (__trgt.398)  <516>;
        } #11 off=4
        {
            #30 off=1
            (__cv.254 var=95) uint16__uint16____sint (length.53)  <288>;
            (__trgt.402 var=153) const ()  <522>;
            () void_doloop_uint16__uint16_ (__cv.254 __trgt.402)  <523>;
            (__vcnt.403 var=154) undefined ()  <524>;
            for {
                {
                    (__extDM_int32_.112 var=36) entry (__extDM_int32_.152 __extDM_int32_.34)  <135>;
                    (__extDM_BufferPtrDMB_buffer_len.113 var=37) entry (__extDM_BufferPtrDMB_buffer_len.154 __extDM_BufferPtrDMB_buffer_len.70)  <136>;
                    (__iv1_i.245 var=92) entry (__iv1_i.246 buffer_start_add.50)  <279>;
                } #8
                {
                    (__M_WDMB.131 var=12 __extDM_BufferPtrDMB_buffer_len.132 var=37 __extDM_int32_.133 var=36) store (__ct_0.66 __iv1_i.245 __extDM_BufferPtrDMB_buffer_len.113 __extDM_int32_.112)  <154>;
                    (__rt.318 var=103) __Pvoid__pl___Pvoid_int18_ (__iv1_i.245 __ct_4.377)  <376>;
                } #173 off=2
                {
                    () for_count (__vcnt.403)  <159>;
                    (__extDM_int32_.152 var=36 __extDM_int32_.153 var=36) exit (__extDM_int32_.133)  <167>;
                    (__extDM_BufferPtrDMB_buffer_len.154 var=37 __extDM_BufferPtrDMB_buffer_len.155 var=37) exit (__extDM_BufferPtrDMB_buffer_len.132)  <168>;
                    (__iv1_i.246 var=92 __iv1_i.247 var=92) exit (__rt.318)  <280>;
                } #10
            } #7 rng=[1,65535]
        } #6
        {
            (__extDM_int32_.178 var=36) merge (__extDM_int32_.34 __extDM_int32_.153)  <180>;
            (__extDM_BufferPtrDMB_buffer_len.179 var=37) merge (__extDM_BufferPtrDMB_buffer_len.70 __extDM_BufferPtrDMB_buffer_len.155)  <181>;
        } #12
    } #4
    #242 off=5
    (__tmp.385 var=138) uint3__cmp_int72__int72_ (length.53 max_buffer_len.56)  <474>;
    (__tmp.386 var=76) bool_neg_uint3_ (__tmp.385)  <475>;
    (__trgt.399 var=151) const ()  <517>;
    () void_jump_bool_int10_ (__tmp.386 __trgt.399)  <518>;
    (__either.400 var=148) undefined ()  <519>;
    if {
        {
            () if_expr (__either.400)  <205>;
        } #15
        {
        } #16 off=7
        {
            (__ct_1.134 var=72) const ()  <155>;
            (__trgt.401 var=152) const ()  <520>;
            () void_jump_int10_ (__trgt.401)  <521>;
        } #17 off=6
        {
            (__rt.207 var=44) merge (__ct_0.66 __ct_1.134)  <210>;
        } #18
    } #14
    #20 off=8 nxt=-2
    (__rd___sp.208 var=41) rd_res_reg (__R_SP.24 __sp.63)  <211>;
    (__R_SP.212 var=26 __sp.213 var=34) wr_res_reg (__rt.296 __sp.63)  <215>;
    () void_ret_dmaddr_ (__la.43)  <216>;
    (__rt.214 var=44 stl=RA off=0) assign (__rt.207)  <217>;
    () out (__rt.214)  <218>;
    () sink (__sp.213)  <224>;
    () sink (__extDM_int32_.178)  <226>;
    () sink (__extDM_BufferPtrDMB_buffer_len.179)  <227>;
    () sink (__extDM_BufferPtrDMB_ptr_start.75)  <228>;
    () sink (__extDM_BufferPtrDMB_ptr_current.80)  <230>;
    () sink (__ct_0.40)  <231>;
    (__rt.296 var=103) __Pvoid__pl___Pvoid_int18_ (__rd___sp.208 __ct_0s0.376)  <348>;
    (__ct_0s0.376 var=128) const ()  <459>;
 } #0
 0 : 'signal_processing\\signal_path.c';
 ----------
 0 : (0,91:0,0);
 4 : (0,96:4,5);
 6 : (0,96:4,6);
 7 : (0,96:4,6);
 11 : (0,96:4,13);
 14 : (0,99:4,16);
 16 : (0,103:8,17);
 17 : (0,100:8,21);
 20 : (0,99:4,26);
 173 : (0,96:37,6);
 239 : (0,96:4,5);
 242 : (0,99:14,16);
 ----------
 82 : (0,91:4,0);
 86 : (0,91:4,0);
 90 : (0,92:10,0);
 93 : (0,92:10,1);
 97 : (0,93:10,2);
 101 : (0,94:10,3);
 126 : (0,96:4,5);
 135 : (0,96:4,6);
 136 : (0,96:4,6);
 154 : (0,97:24,6);
 155 : (0,96:33,0);
 159 : (0,96:4,11);
 167 : (0,96:4,11);
 168 : (0,96:4,11);
 180 : (0,96:4,15);
 181 : (0,96:4,15);
 205 : (0,99:4,16);
 210 : (0,99:4,25);
 211 : (0,99:4,0);
 215 : (0,99:4,26);
 216 : (0,99:4,26);
 217 : (0,99:4,0);
 320 : (0,91:4,0);
 348 : (0,99:4,0);
 404 : (0,93:10,0);
 432 : (0,94:10,0);
 457 : (0,91:4,0);
 459 : (0,99:4,0);
 466 : (0,96:4,5);
 474 : (0,99:14,16);
 475 : (0,99:14,16);
 500 : (0,96:4,5);
 512 : (0,96:4,5);
 518 : (0,99:4,16);
 523 : (0,96:4,11);
--- a/simulation/Release/chesswork/signal_path-a72ab8.#
+++ b/simulation/Release/chesswork/signal_path-a72ab8.#
@@ -0,0 +1,9 @@
 6bd14b3bc305504dd7bb9269fe30bf59aca75a76
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
 4ae39dce1da2ebfb1f2b8ba55158d5ffbb9d548f
 da39a3ee5e6b4b0d3255bfef95601890afd80709
 23cbc7be8e1dc06aa405bc4ab73f8bfda05b525e
 346
 0
 0
--- a/simulation/Release/chesswork/signal_path-a72ab8.o
+++ b/simulation/Release/chesswork/signal_path-a72ab8.o
--- a/simulation/Release/chesswork/signal_path-a72ab8.sfg
+++ b/simulation/Release/chesswork/signal_path-a72ab8.sfg
@@ -0,0 +1,513 @@
 // File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
 /***
 !!  void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)
 F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ : user_defined, called {
    fnm : "calc" 'void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)';
    arg : ( dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i );
    loc : ( LR[0] A[0] A[1] A[4] A[5] __spill_WDMA[0] );
    vac : ( srIM[0] );
    frm : ( );
 }
 ****
 !!  void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int)
 F_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi : user_defined, called {
    fnm : "write_buffer_dmb" 'void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int)';
    arg : ( dmaddr_:i dmaddr_:i int32_:i );
    loc : ( LR[0] A[4] RA[0] );
    vac : ( srIM[0] );
    llv : 0 0 0 0 0 ;
 }
 ***/
 [
    0 : _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ typ=uint20_ bnd=e stl=PM tref=void_____PSingleSignalPath___PSingleSignalPath___PDMB__sshort___PDMB__sshort___PDMB__sshort__
    8 : __M_SDMB typ=int16_ bnd=d stl=SDMB
   11 : __M_WDMA typ=int32_ bnd=d stl=WDMA
   12 : __M_WDMB typ=int32_ bnd=d stl=WDMB
   14 : __M_LDMA typ=int64_ bnd=d stl=LDMA
   26 : __R_SP typ=dmaddr_ bnd=d stl=SP
   29 : __vola typ=uint20_ bnd=b stl=PM
   32 : __extDM typ=int8_ bnd=b stl=DM
   33 : __extPM typ=uint20_ bnd=b stl=PM
   34 : __sp typ=dmaddr_ bnd=b stl=SP
   35 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
   36 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
   37 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
   38 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
   39 : pointer_delay_line typ=int8_ bnd=e sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB
   40 : __extDM_BufferPtrDMB typ=int8_ bnd=b stl=DM
   41 : pointer_filter_coefficients typ=int8_ bnd=e sz=12 algn=4 stl=DMA tref=BufferPtr_DMA
   42 : __extDM_BufferPtr typ=int8_ bnd=b stl=DM
   43 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
   44 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
   45 : _ZL2mu typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__sint_DMA
   46 : __extDM_int32_ typ=int8_ bnd=b stl=DM
   47 : __extDM_int16_ typ=int8_ bnd=b stl=DM
   48 : __extDM_void typ=int8_ bnd=b stl=DM
   49 : __extPM_void typ=uint20_ bnd=b stl=PM
   50 : pointer_delay_line_ptr_current typ=int8_ bnd=b stl=DM
   51 : __extDM___PDMint32_ typ=int8_ bnd=b stl=DM
   52 : pointer_delay_line_ptr_start typ=int8_ bnd=b stl=DM
   53 : pointer_filter_coefficients_ptr_current typ=int8_ bnd=b stl=DM
   54 : pointer_delay_line_buffer_len typ=int8_ bnd=b stl=DM
   55 : pointer_filter_coefficients_buffer_len typ=int8_ bnd=b stl=DM
   56 : pointer_filter_coefficients_ptr_start typ=int8_ bnd=b stl=DM
   57 : __extDM_int64_ typ=int8_ bnd=b stl=DM
   58 : __rd___sp typ=dmaddr_ bnd=m
   60 : __ptr_c_sensor_32 typ=dmaddr_ val=0a bnd=m adro=35
   62 : __ptr_acc_sensor_32 typ=dmaddr_ val=0a bnd=m adro=36
   64 : __ptr_c_sensor_pre typ=dmaddr_ val=0a bnd=m adro=37
   66 : __ptr_acc_sensor_pre typ=dmaddr_ val=0a bnd=m adro=38
   67 : __ptr_pointer_delay_line typ=dmaddr_ bnd=m
   68 : __ptr_pointer_delay_line typ=dmaddr_ val=0a bnd=m adro=39
   70 : __ptr_pointer_filter_coefficients typ=dmaddr_ val=0a bnd=m adro=41
   72 : __ptr_filter_accumulator typ=dmaddr_ val=0a bnd=m adro=43
   74 : __ptr_output_32 typ=dmaddr_ val=0a bnd=m adro=44
   76 : __ptr_mu typ=dmaddr_ val=0a bnd=m adro=45
   77 : __ct_0 typ=uint1_ val=0f bnd=m
   78 : __la typ=dmaddr_ bnd=p tref=dmaddr___
   79 : c_sensor_signal_t typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
   80 : acc_sensor_signal_t typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
   81 : c_sensor_input typ=dmaddr_ bnd=p tref=__PDMB__sshort__
   82 : acc_sensor_input typ=dmaddr_ bnd=p tref=__PDMB__sshort__
   83 : output_port typ=dmaddr_ bnd=p tref=__PDMB__sshort__
   91 : __tmpb0_F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ typ=int32_ bnd=m tref=__sint__
   96 : __inl_p_x0 typ=dmaddr_ bnd=m tref=__PDMB__sint__
   98 : __inl_p_h typ=dmaddr_ bnd=m tref=__P__sint__
  101 : __inl_acc1_A typ=int72_ bnd=m tref=accum_t__
  102 : __inl_acc1_B typ=int72_ bnd=m tref=accum_t__
  110 : __inl_acc1_C typ=int72_ bnd=m tref=accum_t__
  117 : __inl_p_h0 typ=dmaddr_ bnd=m tref=__P__sint__
  118 : __inl_p_x0 typ=dmaddr_ bnd=m tref=__PDMB__sint__
  119 : __inl_p_x1 typ=dmaddr_ bnd=m tref=__PDMB__sint__
  123 : __inl_acc_C typ=int72_ bnd=m tref=accum_t__
  124 : __inl_prod typ=int32_ bnd=m tref=__sint__
  126 : __inl_h0 typ=int32_ bnd=m tref=__sint__
  127 : __inl_h1 typ=int32_ bnd=m tref=__sint__
  128 : __inl_acc_A typ=int72_ bnd=m tref=accum_t__
  129 : __inl_acc_B typ=int72_ bnd=m tref=accum_t__
  136 : __ct_2 typ=int32_ val=2f bnd=m
  140 : __fch___extDM_int16_ typ=int16_ bnd=m
  142 : __ct_16 typ=int32_ val=16f bnd=m
  144 : __tmp typ=int32_ bnd=m
  155 : __fch___extDM_int16_ typ=int16_ bnd=m
  159 : __tmp typ=int32_ bnd=m
  201 : __ct_0 typ=int32_ val=0f bnd=m
  204 : __fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre typ=int32_ bnd=m
  205 : _Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi typ=dmaddr_ val=0r bnd=m
  207 : __link typ=dmaddr_ bnd=m
  211 : __fch_pointer_delay_line_ptr_current typ=dmaddr_ bnd=m
  215 : __fch_pointer_delay_line_ptr_start typ=dmaddr_ bnd=m
  219 : __fch_pointer_filter_coefficients_ptr_current typ=dmaddr_ bnd=m
  223 : __fch_pointer_delay_line_buffer_len typ=int32_ bnd=m
  227 : __fch_pointer_filter_coefficients_buffer_len typ=int32_ bnd=m
  236 : __fchtmp typ=int32_ bnd=m
  237 : __fchtmp typ=int32_ bnd=m
  247 : __fchtmp typ=int32_ bnd=m
  248 : __fchtmp typ=int32_ bnd=m
  258 : __tmp typ=int72_ bnd=m
  260 : __tmp typ=int72_ bnd=m
  274 : __fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre typ=int32_ bnd=m
  279 : __tmp typ=int32_ bnd=m
  290 : __fch_pointer_filter_coefficients_ptr_start typ=dmaddr_ bnd=m
  327 : __fch__ZL2mu typ=int32_ bnd=m
  332 : __fchtmp typ=int64_ bnd=m
  338 : __fchtmp typ=int32_ bnd=m
  339 : __tmp typ=int72_ bnd=m
  341 : __fchtmp typ=int32_ bnd=m
  342 : __tmp typ=int72_ bnd=m
  356 : __tmp typ=int32_ bnd=m
  357 : __tmp typ=int32_ bnd=m
  358 : __tmp typ=int64_ bnd=m
  377 : __fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32 typ=int32_ bnd=m
  381 : __tmp typ=int72_ bnd=m
  382 : __tmp typ=int32_ bnd=m
  383 : __tmp typ=int16_ bnd=m
  423 : __ct_m4 typ=int18_ val=-4f bnd=m
  424 : __ct_m8 typ=int18_ val=-8f bnd=m
  448 : __vcnt typ=int32_ bnd=m
  449 : __ct_m1 typ=int32_ val=-1f bnd=m
  450 : __ct_1 typ=int32_ val=1f bnd=m
  451 : __cv typ=uint16_ bnd=m
  477 : __ptr_pointer_filter_coefficients__a8 typ=dmaddr_ val=8a bnd=m adro=41
  480 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
  508 : __ct_0S0 typ=int18_ val=0S0 bnd=m
  509 : __ct_0s0 typ=int18_ val=0s0 bnd=m
  510 : __ct_4 typ=int18_ val=4f bnd=m
  511 : __ct_8 typ=int18_ val=8f bnd=m
  515 : __ct_2 typ=uint2_ val=2f bnd=m
  522 : __ct_1 typ=uint2_ val=1f bnd=m
  527 : __tmp typ=int72_ bnd=m
  532 : __tmp typ=int18_ bnd=m
  540 : __trgt typ=uint16_ val=0j bnd=m
  541 : __vcnt typ=uint16_ bnd=m
  542 : __trgt typ=uint16_ val=0j bnd=m
  543 : __vcnt typ=uint16_ bnd=m
 ]
 F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ {
    #593 off=0
    (__M_SDMB.6 var=8) st_def ()  <12>;
    (__M_WDMA.9 var=11) st_def ()  <18>;
    (__M_WDMB.10 var=12) st_def ()  <20>;
    (__M_LDMA.12 var=14) st_def ()  <24>;
    (__R_SP.24 var=26) st_def ()  <48>;
    (__vola.27 var=29) source ()  <51>;
    (__extDM.30 var=32) source ()  <54>;
    (__extPM.31 var=33) source ()  <55>;
    (__sp.32 var=34) source ()  <56>;
    (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32.33 var=35) source ()  <57>;
    (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32.34 var=36) source ()  <58>;
    (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.35 var=37) source ()  <59>;
    (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.36 var=38) source ()  <60>;
    (pointer_delay_line.37 var=39) source ()  <61>;
    (__extDM_BufferPtrDMB.38 var=40) source ()  <62>;
    (pointer_filter_coefficients.39 var=41) source ()  <63>;
    (__extDM_BufferPtr.40 var=42) source ()  <64>;
    (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator.41 var=43) source ()  <65>;
    (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.42 var=44) source ()  <66>;
    (_ZL2mu.43 var=45) source ()  <67>;
    (__extDM_int32_.44 var=46) source ()  <68>;
    (__extDM_int16_.45 var=47) source ()  <69>;
    (__extDM_void.46 var=48) source ()  <70>;
    (__extPM_void.47 var=49) source ()  <71>;
    (pointer_delay_line_ptr_current.48 var=50) source ()  <72>;
    (__extDM___PDMint32_.49 var=51) source ()  <73>;
    (pointer_delay_line_ptr_start.50 var=52) source ()  <74>;
    (pointer_filter_coefficients_ptr_current.51 var=53) source ()  <75>;
    (pointer_delay_line_buffer_len.52 var=54) source ()  <76>;
    (pointer_filter_coefficients_buffer_len.53 var=55) source ()  <77>;
    (pointer_filter_coefficients_ptr_start.54 var=56) source ()  <78>;
    (__extDM_int64_.55 var=57) source ()  <79>;
    (__ptr_c_sensor_32.57 var=60) const ()  <81>;
    (__ptr_acc_sensor_32.59 var=62) const ()  <83>;
    (__ptr_c_sensor_pre.61 var=64) const ()  <85>;
    (__ptr_acc_sensor_pre.63 var=66) const ()  <87>;
    (__ptr_pointer_delay_line.65 var=68) const ()  <89>;
    (__ct_0.75 var=77) const ()  <99>;
    (__la.77 var=78 stl=LR off=0) inp ()  <101>;
    (__la.78 var=78) deassign (__la.77)  <102>;
    (c_sensor_signal_t.80 var=79 stl=A off=0) inp ()  <104>;
    (acc_sensor_signal_t.83 var=80 stl=A off=1) inp ()  <107>;
    (c_sensor_input.86 var=81 stl=A off=4) inp ()  <110>;
    (c_sensor_input.87 var=81) deassign (c_sensor_input.86)  <111>;
    (acc_sensor_input.89 var=82 stl=A off=5) inp ()  <113>;
    (acc_sensor_input.90 var=82) deassign (acc_sensor_input.89)  <114>;
    (output_port.92 var=83 stl=__spill_WDMA off=0) inp ()  <116>;
    (output_port.93 var=83) deassign (output_port.92)  <117>;
    (__rd___sp.95 var=58) rd_res_reg (__R_SP.24 __sp.32)  <119>;
    (__R_SP.99 var=26 __sp.100 var=34) wr_res_reg (__rt.2216 __sp.32)  <123>;
    (__fch___extDM_int16_.243 var=140 __extDM_int16_.244 var=47 __vola.245 var=29) load (__M_SDMB.6 c_sensor_input.87 __extDM_int16_.45 __vola.27)  <267>;
    (__ct_16.247 var=142) const ()  <269>;
    (__M_WDMA.255 var=11 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32.256 var=35) store (__tmp.2412 __ptr_c_sensor_32.57 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32.33)  <277>;
    (__fch___extDM_int16_.262 var=155 __extDM_int16_.263 var=47 __vola.264 var=29) load (__M_SDMB.6 acc_sensor_input.90 __extDM_int16_.244 __vola.245)  <283>;
    (__M_WDMA.274 var=11 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32.275 var=36) store (__tmp.2417 __ptr_acc_sensor_32.59 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32.34)  <293>;
    (__M_WDMA.560 var=11 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.561 var=37) store (__tmp.2412 __ptr_c_sensor_pre.61 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.35)  <491>;
    (__M_WDMA.573 var=11 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.574 var=38) store (__tmp.2417 __ptr_acc_sensor_pre.63 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.36)  <503>;
    (_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi.763 var=205) const ()  <605>;
    (__link.765 var=207) dmaddr__call_dmaddr_ (_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi.763)  <607>;
    (__rt.2216 var=480) __Pvoid__pl___Pvoid_int18_ (__rd___sp.95 __ct_0S0.2405)  <1902>;
    (__ct_0S0.2405 var=508) const ()  <2169>;
    (__ct_2.2411 var=515) const ()  <2180>;
    (__tmp.2412 var=144) int72__shift_int72__int72__uint2_ (__fch___extDM_int16_.243 __ct_16.247 __ct_2.2411)  <2181>;
    (__tmp.2417 var=159) int72__shift_int72__int72__uint2_ (__fch___extDM_int16_.262 __ct_16.247 __ct_2.2411)  <2189>;
    call {
        (__ptr_pointer_delay_line.757 var=67 stl=A off=4) assign (__ptr_pointer_delay_line.65)  <599>;
        (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.762 var=204 stl=RA off=0) assign (__tmp.2417)  <604>;
        (__link.766 var=207 stl=LR off=0) assign (__link.765)  <608>;
        (_ZL2mu.767 var=45 __extDM.768 var=32 __extDM_BufferPtr.769 var=42 __extDM_BufferPtrDMB.770 var=40 __extDM___PDMint32_.771 var=51 __extDM_int16_.772 var=47 __extDM_int32_.773 var=46 __extDM_int64_.774 var=57 __extDM_void.775 var=48 __extPM.776 var=33 __extPM_void.777 var=49 pointer_delay_line.778 var=39 pointer_delay_line_buffer_len.779 var=54 pointer_delay_line_ptr_current.780 var=50 pointer_delay_line_ptr_start.781 var=52 pointer_filter_coefficients.782 var=41 pointer_filter_coefficients_buffer_len.783 var=55 pointer_filter_coefficients_ptr_current.784 var=53 pointer_filter_coefficients_ptr_start.785 var=56 __vola.786 var=29) F_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi (__link.766 __ptr_pointer_delay_line.757 __fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.762 _ZL2mu.43 __extDM.30 __extDM_BufferPtr.40 __extDM_BufferPtrDMB.38 __extDM___PDMint32_.49 __extDM_int16_.263 __extDM_int32_.44 __extDM_int64_.55 __extDM_void.46 __extPM.31 __extPM_void.47 pointer_delay_line.37 pointer_delay_line_buffer_len.52 pointer_delay_line_ptr_current.48 pointer_delay_line_ptr_start.50 pointer_filter_coefficients.39 pointer_filter_coefficients_buffer_len.53 pointer_filter_coefficients_ptr_current.51 pointer_filter_coefficients_ptr_start.54 __vola.264)  <609>;
    } #14 off=1
    #615 off=2
    (__ptr_pointer_filter_coefficients.67 var=70) const ()  <91>;
    (__ct_2.239 var=136) const ()  <263>;
    (__ct_0.758 var=201) const ()  <600>;
    (__fch_pointer_delay_line_ptr_current.796 var=211) load (__M_WDMB.10 __rt.2326 pointer_delay_line_ptr_current.780)  <619>;
    (__fch_pointer_delay_line_ptr_start.801 var=215) load (__M_WDMB.10 __rt.2348 pointer_delay_line_ptr_start.781)  <624>;
    (__fch_pointer_filter_coefficients_ptr_current.806 var=219) load (__M_WDMA.9 __ptr_pointer_filter_coefficients__a8.2202 pointer_filter_coefficients_ptr_current.784)  <629>;
    (__fch_pointer_delay_line_buffer_len.811 var=223) load (__M_WDMB.10 __rt.2370 pointer_delay_line_buffer_len.779)  <634>;
    (__fch_pointer_filter_coefficients_buffer_len.816 var=227) load (__M_WDMA.9 __ptr_pointer_filter_coefficients.67 pointer_filter_coefficients_buffer_len.783)  <639>;
    (__ct_m4.2073 var=423) const ()  <1735>;
    (__ct_m1.2134 var=449) const ()  <1787>;
    (__vcnt.2135 var=448) __sint__pl___sint___sint (__fch_pointer_filter_coefficients_buffer_len.816 __ct_m1.2134)  <1789>;
    (__ct_1.2137 var=450) const ()  <1791>;
    (__vcnt.2138 var=448) __sint__pl___sint___sint (__vcnt.2433 __ct_1.2137)  <1793>;
    (__cv.2139 var=451) uint16__uint16____sint (__vcnt.2138)  <1794>;
    (__ptr_pointer_filter_coefficients__a8.2202 var=477) const ()  <1858>;
    (__rt.2326 var=480) __Pvoid__pl___Pvoid_int18_ (__ptr_pointer_delay_line.65 __ct_8.2408)  <2042>;
    (__rt.2348 var=480) __Pvoid__mi___Pvoid_int18_ (__rt.2326 __ct_4.2407)  <2070>;
    (__rt.2370 var=480) __Pvoid__mi___Pvoid_int18_ (__rt.2348 __ct_4.2407)  <2098>;
    (__rt.2392 var=480) __Pvoid__pl___Pvoid_int18_ (__ptr_pointer_filter_coefficients.67 __ct_4.2407)  <2126>;
    (__ct_4.2407 var=510) const ()  <2173>;
    (__ct_8.2408 var=511) const ()  <2175>;
    (__tmp.2422 var=532) int72__shift_int72__int72__uint2_ (__fch_pointer_delay_line_buffer_len.811 __ct_2.239 __ct_2.2411)  <2197>;
    (__ct_1.2426 var=522) const ()  <2204>;
    (__tmp.2432 var=527) int72__shift_int72__int72__uint2_ (__vcnt.2135 __ct_1.2137 __ct_1.2426)  <2213>;
    (__vcnt.2433 var=448) int32__extract_high_int72_ (__tmp.2432)  <2214>;
    (__trgt.2441 var=540) const ()  <2305>;
    () void_doloop_uint16__uint16_ (__cv.2139 __trgt.2441)  <2306>;
    (__vcnt.2442 var=541) undefined ()  <2307>;
    for {
        {
            (__inl_p_x0.880 var=96) entry (__inl_p_x0.1045 __fch_pointer_delay_line_ptr_current.796)  <703>;
            (__inl_p_h.882 var=98) entry (__inl_p_h.1049 __fch_pointer_filter_coefficients_ptr_current.806)  <705>;
            (__inl_acc1_A.885 var=101) entry (__inl_acc1_A.1055 __ct_0.758)  <708>;
            (__inl_acc1_B.886 var=102) entry (__inl_acc1_B.1057 __ct_0.758)  <709>;
        } #17
        {
            (__fchtmp.921 var=236) load (__M_WDMB.10 __inl_p_x0.880 _ZL2mu.767 __extDM_int32_.773 pointer_delay_line_buffer_len.779 pointer_filter_coefficients_buffer_len.783)  <744>;
            (__fchtmp.922 var=237) load (__M_WDMA.9 __inl_p_h.882 _ZL2mu.767 __extDM_int32_.773 pointer_delay_line_buffer_len.779 pointer_filter_coefficients_buffer_len.783)  <745>;
            (__fchtmp.932 var=247) load (__M_WDMB.10 __inl_p_x0.2012 _ZL2mu.767 __extDM_int32_.773 pointer_delay_line_buffer_len.779 pointer_filter_coefficients_buffer_len.783)  <755>;
            (__fchtmp.933 var=248) load (__M_WDMA.9 __rt.2260 _ZL2mu.767 __extDM_int32_.773 pointer_delay_line_buffer_len.779 pointer_filter_coefficients_buffer_len.783)  <756>;
            (__inl_acc1_A.944 var=101) accum_t__pl_accum_t_accum_t (__inl_acc1_A.885 __tmp.2025)  <767>;
            (__inl_acc1_B.946 var=102) accum_t__pl_accum_t_accum_t (__inl_acc1_B.886 __tmp.2030)  <769>;
            (__inl_p_x0.2012 var=96) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x0.880 __ct_m4.2073 __fch_pointer_delay_line_ptr_start.801 __tmp.2422)  <1621>;
            (__inl_p_x0.2020 var=96) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x0.2012 __ct_m4.2073 __fch_pointer_delay_line_ptr_start.801 __tmp.2422)  <1632>;
            (__tmp.2025 var=258) int72__multss_int32__int32__uint1_ (__fchtmp.921 __fchtmp.922 __ct_0.75)  <1640>;
            (__tmp.2030 var=260) int72__multss_int32__int32__uint1_ (__fchtmp.932 __fchtmp.933 __ct_0.75)  <1648>;
            (__rt.2260 var=480) __Pvoid__pl___Pvoid_int18_ (__inl_p_h.882 __ct_4.2407)  <1958>;
            (__rt.2282 var=480) __Pvoid__pl___Pvoid_int18_ (__rt.2260 __ct_4.2407)  <1986>;
        } #403 off=3
        {
            () for_count (__vcnt.2442)  <774>;
            (__inl_p_x0.1045 var=96 __inl_p_x0.1046 var=96) exit (__inl_p_x0.2020)  <822>;
            (__inl_p_h.1049 var=98 __inl_p_h.1050 var=98) exit (__rt.2282)  <824>;
            (__inl_acc1_A.1055 var=101 __inl_acc1_A.1056 var=101) exit (__inl_acc1_A.944)  <827>;
            (__inl_acc1_B.1057 var=102 __inl_acc1_B.1058 var=102) exit (__inl_acc1_B.946)  <828>;
        } #19
    } #16 rng=[1,65535]
    #99 off=4
    (__ptr_filter_accumulator.69 var=72) const ()  <93>;
    (__ptr_output_32.71 var=74) const ()  <95>;
    (__ptr_mu.73 var=76) const ()  <97>;
    (__inl_acc1_C.1127 var=110) accum_t__pl_accum_t_accum_t (__inl_acc1_A.1056 __inl_acc1_B.1058)  <863>;
    (__tmpb0_F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_.1128 var=91) __sint_rnd_saturate_accum_t (__inl_acc1_C.1127)  <864>;
    (__M_WDMB.1132 var=12 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator.1133 var=43) store (__tmpb0_F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_.1128 __ptr_filter_accumulator.69 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator.41)  <868>;
    (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.1137 var=274) load (__M_WDMA.9 __ptr_c_sensor_pre.61 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.561)  <872>;
    (__tmp.1142 var=279) __sint__mi___sint___sint (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.1137 __tmpb0_F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_.1128)  <877>;
    (__M_WDMB.1146 var=12 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1147 var=44) store (__tmp.1142 __ptr_output_32.71 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.42)  <881>;
    (__fch_pointer_filter_coefficients_ptr_start.1163 var=290) load (__M_WDMA.9 __rt.2392 pointer_filter_coefficients_ptr_start.785)  <897>;
    (__fch__ZL2mu.1211 var=327) load (__M_WDMA.9 __ptr_mu.73 _ZL2mu.767)  <945>;
    (__inl_prod.1213 var=124) __sint_rnd_saturate_accum_t (__inl_acc_C.2043)  <947>;
    (__inl_p_x1.2038 var=119) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch_pointer_delay_line_ptr_current.796 __ct_m4.2073 __fch_pointer_delay_line_ptr_start.801 __tmp.2422)  <1659>;
    (__inl_acc_C.2043 var=123) int72__multss_int32__int32__uint1_ (__fch__ZL2mu.1211 __tmp.1142 __ct_0.75)  <1667>;
    (__ct_m8.2074 var=424) const ()  <1737>;
    (__trgt.2443 var=542) const ()  <2308>;
    () void_doloop_uint16__uint16_ (__cv.2139 __trgt.2443)  <2309>;
    (__vcnt.2444 var=543) undefined ()  <2310>;
    for {
        {
            (_ZL2mu.1233 var=45) entry (_ZL2mu.1378 _ZL2mu.767)  <967>;
            (__extDM_int32_.1234 var=46) entry (__extDM_int32_.1380 __extDM_int32_.773)  <968>;
            (pointer_delay_line_buffer_len.1242 var=54) entry (pointer_delay_line_buffer_len.1396 pointer_delay_line_buffer_len.779)  <976>;
            (pointer_filter_coefficients_buffer_len.1243 var=55) entry (pointer_filter_coefficients_buffer_len.1398 pointer_filter_coefficients_buffer_len.783)  <977>;
            (__extDM_int64_.1245 var=57) entry (__extDM_int64_.1402 __extDM_int64_.774)  <979>;
            (__inl_p_h0.1287 var=117) entry (__inl_p_h0.1486 __fch_pointer_filter_coefficients_ptr_start.1163)  <1021>;
            (__inl_p_x0.1288 var=118) entry (__inl_p_x0.1488 __fch_pointer_delay_line_ptr_current.796)  <1022>;
            (__inl_p_x1.1289 var=119) entry (__inl_p_x1.1490 __inl_p_x1.2038)  <1023>;
        } #22
        {
            (__fchtmp.1305 var=332) load (__M_LDMA.12 __inl_p_h0.1287 _ZL2mu.1233 __extDM_int32_.1234 __extDM_int64_.1245 pointer_delay_line_buffer_len.1242 pointer_filter_coefficients_buffer_len.1243)  <1039>;
            (__inl_h0.1307 var=126 __inl_h1.1308 var=127) void_lldecompose___ulonglong___sint___sint (__fchtmp.1305)  <1041>;
            (__fchtmp.1311 var=338) load (__M_WDMB.10 __inl_p_x0.1288 _ZL2mu.1233 __extDM_int32_.1234 pointer_delay_line_buffer_len.1242 pointer_filter_coefficients_buffer_len.1243)  <1044>;
            (__inl_acc_A.1313 var=128) accum_t__pl_accum_t_accum_t (__inl_h0.1307 __tmp.2048)  <1046>;
            (__fchtmp.1314 var=341) load (__M_WDMB.10 __inl_p_x1.1289 _ZL2mu.1233 __extDM_int32_.1234 pointer_delay_line_buffer_len.1242 pointer_filter_coefficients_buffer_len.1243)  <1047>;
            (__inl_acc_B.1316 var=129) accum_t__pl_accum_t_accum_t (__inl_h1.1308 __tmp.2053)  <1049>;
            (__tmp.1329 var=356) __sint_rnd_saturate_accum_t (__inl_acc_A.1313)  <1062>;
            (__tmp.1330 var=357) __sint_rnd_saturate_accum_t (__inl_acc_B.1316)  <1063>;
            (__tmp.1331 var=358) __ulonglong_llcompose___sint___sint (__tmp.1329 __tmp.1330)  <1064>;
            (__M_LDMA.1333 var=14 _ZL2mu.1334 var=45 __extDM_int32_.1335 var=46 __extDM_int64_.1336 var=57 pointer_delay_line_buffer_len.1337 var=54 pointer_filter_coefficients_buffer_len.1338 var=55) store (__tmp.1331 __inl_p_h0.1287 _ZL2mu.1233 __extDM_int32_.1234 __extDM_int64_.1245 pointer_delay_line_buffer_len.1242 pointer_filter_coefficients_buffer_len.1243)  <1066>;
            (__tmp.2048 var=339) int72__multss_int32__int32__uint1_ (__inl_prod.1213 __fchtmp.1311 __ct_0.75)  <1675>;
            (__tmp.2053 var=342) int72__multss_int32__int32__uint1_ (__inl_prod.1213 __fchtmp.1314 __ct_0.75)  <1683>;
            (__inl_p_x0.2061 var=118) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x0.1288 __ct_m8.2074 __fch_pointer_delay_line_ptr_start.801 __tmp.2422)  <1694>;
            (__inl_p_x1.2069 var=119) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x1.1289 __ct_m8.2074 __fch_pointer_delay_line_ptr_start.801 __tmp.2422)  <1705>;
            (__rt.2304 var=480) __Pvoid__pl___Pvoid_int18_ (__inl_p_h0.1287 __ct_8.2408)  <2014>;
        } #473 off=5
        {
            () for_count (__vcnt.2444)  <1074>;
            (_ZL2mu.1378 var=45 _ZL2mu.1379 var=45) exit (_ZL2mu.1334)  <1091>;
            (__extDM_int32_.1380 var=46 __extDM_int32_.1381 var=46) exit (__extDM_int32_.1335)  <1092>;
            (pointer_delay_line_buffer_len.1396 var=54 pointer_delay_line_buffer_len.1397 var=54) exit (pointer_delay_line_buffer_len.1337)  <1100>;
            (pointer_filter_coefficients_buffer_len.1398 var=55 pointer_filter_coefficients_buffer_len.1399 var=55) exit (pointer_filter_coefficients_buffer_len.1338)  <1101>;
            (__extDM_int64_.1402 var=57 __extDM_int64_.1403 var=57) exit (__extDM_int64_.1336)  <1103>;
            (__inl_p_h0.1486 var=117 __inl_p_h0.1487 var=117) exit (__rt.2304)  <1145>;
            (__inl_p_x0.1488 var=118 __inl_p_x0.1489 var=118) exit (__inl_p_x0.2061)  <1146>;
            (__inl_p_x1.1490 var=119 __inl_p_x1.1491 var=119) exit (__inl_p_x1.2069)  <1147>;
        } #24
    } #21 rng=[1,65535]
    #36 off=6 nxt=-2
    (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1709 var=377) load (__M_WDMB.10 __ptr_output_32.71 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1147)  <1352>;
    (__tmp.1714 var=382) __sint_rnd_saturate_accum_t (__tmp.2427)  <1357>;
    (__tmp.1715 var=383) __sshort___sshort___sint (__tmp.1714)  <1358>;
    (__M_SDMB.1721 var=8 __extDM_int16_.1722 var=47 __vola.1723 var=29) store (__tmp.1715 output_port.93 __extDM_int16_.772 __vola.786)  <1364>;
    (__rd___sp.1910 var=58) rd_res_reg (__R_SP.24 __sp.100)  <1464>;
    (__R_SP.1914 var=26 __sp.1915 var=34) wr_res_reg (__rt.2238 __sp.100)  <1468>;
    () void_ret_dmaddr_ (__la.78)  <1469>;
    () sink (__vola.1723)  <1470>;
    () sink (__extDM.768)  <1473>;
    () sink (__extPM.776)  <1474>;
    () sink (__sp.1915)  <1475>;
    () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32.256)  <1476>;
    () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32.275)  <1477>;
    () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.561)  <1478>;
    () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.574)  <1479>;
    () sink (pointer_delay_line.778)  <1480>;
    () sink (__extDM_BufferPtrDMB.770)  <1481>;
    () sink (pointer_filter_coefficients.782)  <1482>;
    () sink (__extDM_BufferPtr.769)  <1483>;
    () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator.1133)  <1484>;
    () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1147)  <1485>;
    () sink (_ZL2mu.1379)  <1486>;
    () sink (__extDM_int32_.1381)  <1487>;
    () sink (__extDM_int16_.1722)  <1488>;
    () sink (__extDM_void.775)  <1489>;
    () sink (__extPM_void.777)  <1490>;
    () sink (pointer_delay_line_ptr_current.780)  <1491>;
    () sink (__extDM___PDMint32_.771)  <1492>;
    () sink (pointer_delay_line_ptr_start.781)  <1493>;
    () sink (pointer_filter_coefficients_ptr_current.784)  <1494>;
    () sink (pointer_delay_line_buffer_len.1397)  <1495>;
    () sink (pointer_filter_coefficients_buffer_len.1399)  <1496>;
    () sink (pointer_filter_coefficients_ptr_start.785)  <1497>;
    () sink (__extDM_int64_.1403)  <1498>;
    () sink (__ct_0.75)  <1499>;
    (__rt.2238 var=480) __Pvoid__pl___Pvoid_int18_ (__rd___sp.1910 __ct_0s0.2406)  <1930>;
    (__ct_0s0.2406 var=509) const ()  <2171>;
    (__tmp.2427 var=381) int72__shift_int72__int72__uint2_ (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1709 __ct_16.247 __ct_1.2426)  <2205>;
 } #0
 0 : 'signal_processing\\signal_path.c';
 ----------
 0 : (0,346:0,0);
 14 : (0,383:4,23);
 16 : (0,386:28,40);
 21 : (0,390:4,82);
 36 : (0,398:0,110);
 99 : (0,390:4,80);
 403 : (0,386:28,53);
 473 : (0,390:4,0);
 593 : (0,383:4,23);
 615 : (0,386:28,40);
 ----------
 85 : (0,388:19,0);
 87 : (0,383:42,0);
 89 : (0,386:28,0);
 91 : (0,386:28,0);
 93 : (0,386:4,0);
 95 : (0,388:4,0);
 119 : (0,346:5,0);
 123 : (0,346:5,0);
 263 : (0,370:47,0);
 267 : (0,370:47,8);
 269 : (0,370:55,0);
 277 : (0,370:19,8);
 283 : (0,371:50,9);
 293 : (0,371:21,9);
 491 : (0,376:21,16);
 503 : (0,377:23,17);
 599 : (0,383:21,0);
 600 : (0,383:57,0);
 604 : (0,383:56,0);
 607 : (0,383:4,23);
 608 : (0,383:4,0);
 609 : (0,383:4,23);
 619 : (0,386:28,30);
 624 : (0,386:28,31);
 629 : (0,386:28,32);
 634 : (0,386:28,33);
 639 : (0,386:28,34);
 703 : (0,386:28,40);
 705 : (0,386:28,40);
 708 : (0,386:28,40);
 709 : (0,386:28,40);
 744 : (0,386:28,40);
 745 : (0,386:28,41);
 755 : (0,386:28,46);
 756 : (0,386:28,47);
 767 : (0,386:28,52);
 769 : (0,386:28,53);
 774 : (0,386:28,56);
 822 : (0,386:28,56);
 824 : (0,386:28,56);
 827 : (0,386:28,56);
 828 : (0,386:28,56);
 863 : (0,386:28,57);
 864 : (0,386:28,58);
 868 : (0,386:22,61);
 872 : (0,388:31,62);
 877 : (0,388:35,62);
 881 : (0,388:13,62);
 897 : (0,390:4,70);
 945 : (0,390:4,79);
 947 : (0,390:4,80);
 967 : (0,390:4,82);
 968 : (0,390:4,82);
 976 : (0,390:4,82);
 977 : (0,390:4,82);
 979 : (0,390:4,82);
 1021 : (0,390:4,82);
 1022 : (0,390:4,82);
 1023 : (0,390:4,82);
 1039 : (0,390:4,82);
 1041 : (0,390:4,82);
 1044 : (0,390:4,85);
 1046 : (0,390:4,85);
 1047 : (0,390:4,86);
 1049 : (0,390:4,86);
 1062 : (0,390:4,89);
 1063 : (0,390:4,89);
 1064 : (0,390:4,89);
 1066 : (0,390:4,89);
 1074 : (0,390:4,93);
 1091 : (0,390:4,93);
 1092 : (0,390:4,93);
 1100 : (0,390:4,93);
 1101 : (0,390:4,93);
 1103 : (0,390:4,93);
 1145 : (0,390:4,93);
 1146 : (0,390:4,93);
 1147 : (0,390:4,93);
 1352 : (0,395:56,100);
 1357 : (0,395:25,100);
 1358 : (0,395:23,100);
 1364 : (0,395:19,100);
 1464 : (0,398:0,0);
 1468 : (0,398:0,110);
 1469 : (0,398:0,110);
 1621 : (0,386:28,45);
 1632 : (0,386:28,51);
 1640 : (0,386:28,52);
 1648 : (0,386:28,53);
 1659 : (0,390:4,77);
 1667 : (0,390:4,79);
 1675 : (0,390:4,85);
 1683 : (0,390:4,86);
 1694 : (0,390:4,87);
 1705 : (0,390:4,88);
 1735 : (0,386:28,0);
 1737 : (0,390:4,0);
 1858 : (0,386:28,0);
 1902 : (0,346:5,0);
 1930 : (0,398:0,0);
 1958 : (0,386:28,0);
 1986 : (0,386:28,0);
 2014 : (0,390:4,0);
 2042 : (0,386:28,0);
 2070 : (0,386:28,0);
 2098 : (0,386:28,0);
 2126 : (0,390:4,0);
 2169 : (0,346:5,0);
 2171 : (0,398:0,0);
 2173 : (0,386:28,0);
 2175 : (0,390:4,0);
 2180 : (0,370:52,0);
 2181 : (0,370:52,8);
 2189 : (0,371:55,9);
 2197 : (0,386:28,45);
 2204 : (0,395:61,0);
 2205 : (0,395:61,100);
 2306 : (0,386:28,56);
 2309 : (0,390:4,93);
--- a/simulation/Release/chesswork/signal_path-d6dbe4.#
+++ b/simulation/Release/chesswork/signal_path-d6dbe4.#
@@ -8,3 +8,11 @@ da39a3ee5e6b4b0d3255bfef95601890afd80709
 0
 0
 0
 0
 0
 0
 0
 0
 2
 7
 7
--- a/simulation/Release/chesswork/signal_path-d6dbe4.sfg
+++ b/simulation/Release/chesswork/signal_path-d6dbe4.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -171,75 +171,75 @@ F_Z15sig_calc_biquadP16SingleSignalPathi {
 } #0
 0 : 'signal_processing\\signal_path.c';
 ----------
-0 : (0,173:0,0);
+0 : (0,180:0,0);
-4 : (0,174:4,1);
+4 : (0,181:4,1);
-6 : (0,174:40,2);
+6 : (0,181:40,2);
-10 : (0,188:4,16);
+10 : (0,195:4,16);
-553 : (0,174:34,1);
+553 : (0,181:34,1);
-591 : (0,187:15,11);
+591 : (0,194:15,11);
 ----------
-76 : (0,173:4,0);
+76 : (0,180:4,0);
-80 : (0,173:4,0);
+80 : (0,180:4,0);
-87 : (0,174:14,1);
+87 : (0,181:14,1);
-88 : (0,174:37,0);
+88 : (0,181:37,0);
-109 : (0,174:4,1);
+109 : (0,181:4,1);
-117 : (0,178:39,6);
+117 : (0,185:39,6);
-125 : (0,178:68,6);
+125 : (0,185:68,6);
-132 : (0,178:90,6);
+132 : (0,185:90,6);
-134 : (0,178:44,6);
+134 : (0,185:44,6);
-141 : (0,179:30,6);
+141 : (0,186:30,6);
-148 : (0,179:52,6);
+148 : (0,186:52,6);
-150 : (0,178:95,6);
+150 : (0,185:95,6);
-157 : (0,179:81,6);
+157 : (0,186:81,6);
-164 : (0,179:103,6);
+164 : (0,186:103,6);
-166 : (0,179:57,6);
+166 : (0,186:57,6);
-173 : (0,180:30,6);
+173 : (0,187:30,6);
-180 : (0,180:51,6);
+180 : (0,187:51,6);
-182 : (0,179:108,6);
+182 : (0,186:108,6);
-184 : (0,181:32,0);
+184 : (0,188:32,0);
-187 : (0,181:12,7);
+187 : (0,188:12,7);
-201 : (0,184:15,8);
+201 : (0,191:15,8);
-208 : (0,185:15,9);
+208 : (0,192:15,9);
-222 : (0,186:15,10);
+222 : (0,193:15,10);
-229 : (0,187:15,11);
+229 : (0,194:15,11);
-230 : (0,174:4,15);
+230 : (0,181:4,15);
-231 : (0,174:4,15);
+231 : (0,181:4,15);
-232 : (0,174:4,15);
+232 : (0,181:4,15);
-235 : (0,188:4,0);
+235 : (0,195:4,0);
-239 : (0,188:4,16);
+239 : (0,195:4,16);
-240 : (0,188:4,16);
+240 : (0,195:4,16);
-241 : (0,188:4,0);
+241 : (0,195:4,0);
-293 : (0,178:8,6);
+293 : (0,185:8,6);
-301 : (0,178:46,6);
+301 : (0,185:46,6);
-309 : (0,179:8,6);
+309 : (0,186:8,6);
-317 : (0,179:59,6);
+317 : (0,186:59,6);
-325 : (0,180:8,6);
+325 : (0,187:8,6);
-391 : (0,173:4,0);
+391 : (0,180:4,0);
-419 : (0,174:14,1);
+419 : (0,181:14,1);
-447 : (0,178:28,6);
+447 : (0,185:28,6);
-475 : (0,188:4,0);
+475 : (0,195:4,0);
-503 : (0,178:63,0);
+503 : (0,185:63,0);
-531 : (0,178:90,0);
+531 : (0,185:90,0);
-559 : (0,179:30,0);
+559 : (0,186:30,0);
-587 : (0,179:52,0);
+587 : (0,186:52,0);
-615 : (0,179:76,0);
+615 : (0,186:76,0);
-643 : (0,179:103,0);
+643 : (0,186:103,0);
-671 : (0,180:30,0);
+671 : (0,187:30,0);
-699 : (0,180:51,0);
+699 : (0,187:51,0);
-727 : (0,179:30,0);
+727 : (0,186:30,0);
-755 : (0,178:63,0);
+755 : (0,185:63,0);
-783 : (0,180:30,0);
+783 : (0,187:30,0);
-811 : (0,179:76,0);
+811 : (0,186:76,0);
-840 : (0,173:4,0);
+840 : (0,180:4,0);
-842 : (0,174:14,0);
+842 : (0,181:14,0);
-848 : (0,178:28,0);
+848 : (0,185:28,0);
-854 : (0,188:4,0);
+854 : (0,195:4,0);
-856 : (0,178:63,0);
+856 : (0,185:63,0);
-860 : (0,178:90,0);
+860 : (0,185:90,0);
-864 : (0,178:63,0);
+864 : (0,185:63,0);
-869 : (0,174:34,1);
+869 : (0,181:34,1);
-870 : (0,174:34,1);
+870 : (0,181:34,1);
-877 : (0,181:29,0);
+877 : (0,188:29,0);
-878 : (0,181:29,7);
+878 : (0,188:29,7);
-928 : (0,174:4,1);
+928 : (0,181:4,1);
--- a/simulation/Release/chesswork/signal_path-d74ce2.#
+++ b/simulation/Release/chesswork/signal_path-d74ce2.#
@@ -8,3 +8,11 @@ da39a3ee5e6b4b0d3255bfef95601890afd80709
 0
 0
 0
 0
 0
 0
 0
 0
 2
 7
 7
--- a/simulation/Release/chesswork/signal_path-d74ce2.sfg
+++ b/simulation/Release/chesswork/signal_path-d74ce2.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -263,107 +263,107 @@ F_Z15sig_init_weightP16SingleSignalPathdi {
 } #0
 0 : 'signal_processing\\signal_path.c';
 ----------
-0 : (0,157:0,0);
+0 : (0,164:0,0);
-4 : (0,159:4,1);
+4 : (0,166:4,1);
-6 : (0,159:22,2);
+6 : (0,166:22,2);
-10 : (0,169:0,22);
+10 : (0,176:0,22);
-181 : (0,167:14,18);
+181 : (0,174:14,18);
-248 : (0,165:20,13);
+248 : (0,172:20,13);
-269 : (0,159:15,1);
+269 : (0,166:15,1);
-272 : (0,159:15,1);
+272 : (0,166:15,1);
-273 : (0,159:15,1);
+273 : (0,166:15,1);
-282 : (0,165:20,13);
+282 : (0,172:20,13);
-285 : (0,165:25,10);
+285 : (0,172:25,10);
-286 : (0,165:25,10);
+286 : (0,172:25,10);
-296 : (0,167:14,18);
+296 : (0,174:14,18);
-299 : (0,165:40,16);
+299 : (0,172:40,16);
-300 : (0,165:40,16);
+300 : (0,172:40,16);
-305 : (0,165:40,16);
+305 : (0,172:40,16);
-306 : (0,165:40,16);
+306 : (0,172:40,16);
-311 : (0,166:32,17);
+311 : (0,173:32,17);
-312 : (0,166:32,17);
+312 : (0,173:32,17);
-317 : (0,166:32,17);
+317 : (0,173:32,17);
-318 : (0,166:32,17);
+318 : (0,173:32,17);
-323 : (0,166:23,17);
+323 : (0,173:23,17);
-324 : (0,166:23,17);
+324 : (0,173:23,17);
 ----------
-77 : (0,157:5,0);
+77 : (0,164:5,0);
-81 : (0,157:5,0);
+81 : (0,164:5,0);
-87 : (0,159:18,0);
+87 : (0,166:18,0);
-109 : (0,159:4,1);
+109 : (0,166:4,1);
-110 : (0,160:33,0);
+110 : (0,167:33,0);
-115 : (0,160:14,2);
+115 : (0,167:14,2);
-116 : (0,164:33,0);
+116 : (0,171:33,0);
-121 : (0,164:14,5);
+121 : (0,171:14,5);
-127 : (0,165:20,0);
+127 : (0,172:20,0);
-140 : (0,166:14,17);
+140 : (0,173:14,17);
-144 : (0,167:14,18);
+144 : (0,174:14,18);
-145 : (0,159:4,21);
+145 : (0,166:4,21);
-146 : (0,159:4,21);
+146 : (0,166:4,21);
-147 : (0,159:4,21);
+147 : (0,166:4,21);
-152 : (0,169:0,0);
+152 : (0,176:0,0);
-156 : (0,169:0,22);
+156 : (0,176:0,22);
-157 : (0,169:0,22);
+157 : (0,176:0,22);
-249 : (0,157:5,0);
+249 : (0,164:5,0);
-286 : (0,160:14,2);
+286 : (0,167:14,2);
-314 : (0,169:0,0);
+314 : (0,176:0,0);
-342 : (0,166:14,0);
+342 : (0,173:14,0);
-370 : (0,167:14,0);
+370 : (0,174:14,0);
-398 : (0,157:5,0);
+398 : (0,164:5,0);
-400 : (0,160:14,0);
+400 : (0,167:14,0);
-406 : (0,169:0,0);
+406 : (0,176:0,0);
-408 : (0,166:14,0);
+408 : (0,173:14,0);
-440 : (0,165:20,0);
+440 : (0,172:20,0);
-441 : (0,165:20,13);
+441 : (0,172:20,13);
-442 : (0,165:20,13);
+442 : (0,172:20,13);
-443 : (0,165:20,13);
+443 : (0,172:20,13);
-444 : (0,165:20,13);
+444 : (0,172:20,13);
-445 : (0,165:20,13);
+445 : (0,172:20,13);
-446 : (0,165:20,13);
+446 : (0,172:20,13);
-485 : (0,159:15,0);
+485 : (0,166:15,0);
-486 : (0,159:15,1);
+486 : (0,166:15,1);
-487 : (0,159:15,1);
+487 : (0,166:15,1);
-488 : (0,159:15,1);
+488 : (0,166:15,1);
-489 : (0,159:15,1);
+489 : (0,166:15,1);
-490 : (0,159:15,1);
+490 : (0,166:15,1);
-491 : (0,159:15,1);
+491 : (0,166:15,1);
-498 : (0,159:15,1);
+498 : (0,166:15,1);
-518 : (0,159:15,1);
+518 : (0,166:15,1);
-521 : (0,165:25,0);
+521 : (0,172:25,0);
-522 : (0,165:25,10);
+522 : (0,172:25,10);
-523 : (0,165:25,10);
+523 : (0,172:25,10);
-524 : (0,165:25,10);
+524 : (0,172:25,10);
-525 : (0,165:25,10);
+525 : (0,172:25,10);
-526 : (0,165:25,10);
+526 : (0,172:25,10);
-533 : (0,165:40,0);
+533 : (0,172:40,0);
-534 : (0,165:40,16);
+534 : (0,172:40,16);
-535 : (0,165:40,16);
+535 : (0,172:40,16);
-536 : (0,165:40,16);
+536 : (0,172:40,16);
-537 : (0,165:40,16);
+537 : (0,172:40,16);
-538 : (0,165:40,16);
+538 : (0,172:40,16);
-539 : (0,165:40,16);
+539 : (0,172:40,16);
-545 : (0,165:40,0);
+545 : (0,172:40,0);
-546 : (0,165:40,16);
+546 : (0,172:40,16);
-547 : (0,165:40,16);
+547 : (0,172:40,16);
-548 : (0,165:40,16);
+548 : (0,172:40,16);
-549 : (0,165:40,16);
+549 : (0,172:40,16);
-550 : (0,165:40,16);
+550 : (0,172:40,16);
-557 : (0,166:32,17);
+557 : (0,173:32,17);
-558 : (0,166:32,17);
+558 : (0,173:32,17);
-559 : (0,166:32,17);
+559 : (0,173:32,17);
-560 : (0,166:32,17);
+560 : (0,173:32,17);
-561 : (0,166:32,17);
+561 : (0,173:32,17);
-568 : (0,166:32,0);
+568 : (0,173:32,0);
-569 : (0,166:32,17);
+569 : (0,173:32,17);
-570 : (0,166:32,17);
+570 : (0,173:32,17);
-571 : (0,166:32,17);
+571 : (0,173:32,17);
-572 : (0,166:32,17);
+572 : (0,173:32,17);
-573 : (0,166:32,17);
+573 : (0,173:32,17);
-574 : (0,166:32,17);
+574 : (0,173:32,17);
-581 : (0,166:23,17);
+581 : (0,173:23,17);
-582 : (0,166:23,17);
+582 : (0,173:23,17);
-583 : (0,166:23,17);
+583 : (0,173:23,17);
-584 : (0,166:23,17);
+584 : (0,173:23,17);
-585 : (0,166:23,17);
+585 : (0,173:23,17);
-647 : (0,159:4,1);
+647 : (0,166:4,1);
--- a/simulation/Release/chesswork/signal_path-e110bc.#
+++ b/simulation/Release/chesswork/signal_path-e110bc.#
@@ -8,3 +8,9 @@ db8ac96f746c20d8257c01deb0158ddbdd492022
 0
 0
 0
 0
 0
 0
 0
 0
 2
--- a/simulation/Release/chesswork/signal_path-e110bc.sfg
+++ b/simulation/Release/chesswork/signal_path-e110bc.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 15:57:59 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -90,29 +90,29 @@ F_Z33sig_cirular_buffer_ptr_put_sampleP9BufferPtri {
 } #5 off=0 nxt=-2
 0 : 'signal_processing\\signal_path.c';
 ----------
-5 : (0,114:0,3);
+5 : (0,116:0,3);
 ----------
-75 : (0,111:5,0);
+75 : (0,113:5,0);
-79 : (0,111:5,0);
+79 : (0,113:5,0);
-84 : (0,112:11,1);
+84 : (0,114:11,1);
-85 : (0,112:4,1);
+85 : (0,114:4,1);
-95 : (0,113:67,2);
+95 : (0,115:67,2);
-99 : (0,113:86,2);
+99 : (0,115:86,2);
-107 : (0,113:10,2);
+107 : (0,115:10,2);
-108 : (0,114:0,0);
+108 : (0,116:0,0);
-112 : (0,114:0,3);
+112 : (0,116:0,3);
-113 : (0,114:0,3);
+113 : (0,116:0,3);
-159 : (0,113:26,2);
+159 : (0,115:26,2);
-173 : (0,113:26,0);
+173 : (0,115:26,0);
-181 : (0,113:86,0);
+181 : (0,115:86,0);
-208 : (0,111:5,0);
+208 : (0,113:5,0);
-236 : (0,112:11,1);
+236 : (0,114:11,1);
-264 : (0,114:0,0);
+264 : (0,116:0,0);
-292 : (0,113:67,0);
+292 : (0,115:67,0);
-348 : (0,112:11,0);
+348 : (0,114:11,0);
-375 : (0,111:5,0);
+375 : (0,113:5,0);
-377 : (0,112:11,0);
+377 : (0,114:11,0);
-383 : (0,114:0,0);
+383 : (0,116:0,0);
-390 : (0,113:86,0);
+390 : (0,115:86,0);
-391 : (0,113:86,2);
+391 : (0,115:86,2);
--- a/simulation/Release/chesswork/signal_path-e7968f.#
+++ b/simulation/Release/chesswork/signal_path-e7968f.#
@@ -8,3 +8,6 @@ a930397de8fa3f7e26f75e262973f1cd15f811d0
 0
 0
 0
 0
 0
 0
--- a/simulation/Release/chesswork/signal_path-e7968f.sfg
+++ b/simulation/Release/chesswork/signal_path-e7968f.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 13:04:23 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
--- a/simulation/Release/chesswork/signal_path-f431c2.#
+++ b/simulation/Release/chesswork/signal_path-f431c2.#
@@ -0,0 +1,9 @@
 6bd14b3bc305504dd7bb9269fe30bf59aca75a76
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
 74aa2476c54d9347f6ea99207e69dca964d6754c
 da39a3ee5e6b4b0d3255bfef95601890afd80709
 90f6ccde6c4767f2999dfe5439f8fe1395fc6f5e
 115
 0
 0
--- a/simulation/Release/chesswork/signal_path-f431c2.o
+++ b/simulation/Release/chesswork/signal_path-f431c2.o
--- a/simulation/Release/chesswork/signal_path-f431c2.sfg
+++ b/simulation/Release/chesswork/signal_path-f431c2.sfg
@@ -0,0 +1,115 @@
 // File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
 /***
 !!  void increment_buffert_DMB(BufferPtrDMB *, int)
 F_Z21increment_buffert_DMBP12BufferPtrDMBi : user_defined, called {
    fnm : "increment_buffert_DMB" 'void increment_buffert_DMB(BufferPtrDMB *, int)';
    arg : ( dmaddr_:i dmaddr_:i int32_:i );
    loc : ( LR[0] A[0] RA[0] );
    vac : ( srIM[0] );
    frm : ( );
 }
 ****
 ***/
 [
    0 : _Z21increment_buffert_DMBP12BufferPtrDMBi typ=uint20_ bnd=e stl=PM tref=void_____PBufferPtrDMB___sint__
   11 : __M_WDMA typ=int32_ bnd=d stl=WDMA
   26 : __R_SP typ=dmaddr_ bnd=d stl=SP
   34 : __sp typ=dmaddr_ bnd=b stl=SP
   36 : __extDM_BufferPtrDMB_ptr_current typ=int8_ bnd=b stl=DM
   38 : __extDM_BufferPtrDMB_ptr_start typ=int8_ bnd=b stl=DM
   39 : __extDM_BufferPtrDMB_buffer_len typ=int8_ bnd=b stl=DM
   41 : __rd___sp typ=dmaddr_ bnd=m
   42 : __ct_0 typ=uint1_ val=0f bnd=m
   43 : __la typ=dmaddr_ bnd=p tref=dmaddr___
   44 : buffer typ=dmaddr_ bnd=p tref=__PBufferPtrDMB__
   45 : i_incr typ=int32_ bnd=p tref=__sint__
   52 : __fch___extDM_BufferPtrDMB_ptr_current typ=dmaddr_ bnd=m
   59 : __fch___extDM_BufferPtrDMB_ptr_start typ=dmaddr_ bnd=m
   63 : __fch___extDM_BufferPtrDMB_buffer_len typ=int32_ bnd=m
   67 : __tmp typ=dmaddr_ bnd=m
   90 : __ct_2 typ=int32_ val=2f bnd=m
   93 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
  118 : __ct_0S0 typ=int18_ val=0S0 bnd=m
  119 : __ct_8 typ=int18_ val=8f bnd=m
  122 : __ct_0s0 typ=int18_ val=0s0 bnd=m
  124 : __ct_4 typ=int18_ val=4f bnd=m
  128 : __ct_2 typ=uint2_ val=2f bnd=m
  133 : __tmp typ=int18_ bnd=m
  134 : __tmp typ=int18_ bnd=m
 ]
 F_Z21increment_buffert_DMBP12BufferPtrDMBi {
    (__M_WDMA.9 var=11) st_def ()  <18>;
    (__R_SP.24 var=26) st_def ()  <48>;
    (__sp.32 var=34) source ()  <56>;
    (__extDM_BufferPtrDMB_ptr_current.34 var=36) source ()  <58>;
    (__extDM_BufferPtrDMB_ptr_start.36 var=38) source ()  <60>;
    (__extDM_BufferPtrDMB_buffer_len.37 var=39) source ()  <61>;
    (__ct_0.40 var=42) const ()  <64>;
    (__la.42 var=43 stl=LR off=0) inp ()  <66>;
    (__la.43 var=43) deassign (__la.42)  <67>;
    (buffer.45 var=44 stl=A off=0) inp ()  <69>;
    (buffer.46 var=44) deassign (buffer.45)  <70>;
    (i_incr.48 var=45 stl=RA off=0) inp ()  <72>;
    (i_incr.49 var=45) deassign (i_incr.48)  <73>;
    (__rd___sp.51 var=41) rd_res_reg (__R_SP.24 __sp.32)  <75>;
    (__R_SP.55 var=26 __sp.56 var=34) wr_res_reg (__rt.133 __sp.32)  <79>;
    (__fch___extDM_BufferPtrDMB_ptr_current.60 var=52) load (__M_WDMA.9 __rt.155 __extDM_BufferPtrDMB_ptr_current.34)  <84>;
    (__fch___extDM_BufferPtrDMB_ptr_start.67 var=59) load (__M_WDMA.9 __rt.199 __extDM_BufferPtrDMB_ptr_start.36)  <91>;
    (__fch___extDM_BufferPtrDMB_buffer_len.71 var=63) load (__M_WDMA.9 __rt.221 __extDM_BufferPtrDMB_buffer_len.37)  <95>;
    (__M_WDMA.79 var=11 __extDM_BufferPtrDMB_ptr_current.80 var=36) store (__tmp.110 __rt.243 __extDM_BufferPtrDMB_ptr_current.34)  <103>;
    (__rd___sp.81 var=41) rd_res_reg (__R_SP.24 __sp.56)  <104>;
    (__R_SP.85 var=26 __sp.86 var=34) wr_res_reg (__rt.177 __sp.56)  <108>;
    () void_ret_dmaddr_ (__la.43)  <109>;
    () sink (__sp.86)  <115>;
    () sink (__extDM_BufferPtrDMB_ptr_current.80)  <117>;
    () sink (__ct_0.40)  <122>;
    (__tmp.110 var=67) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch___extDM_BufferPtrDMB_ptr_current.60 __tmp.266 __fch___extDM_BufferPtrDMB_ptr_start.67 __tmp.271)  <155>;
    (__ct_2.119 var=90) const ()  <175>;
    (__rt.133 var=93) __Pvoid__pl___Pvoid_int18_ (__rd___sp.51 __ct_0S0.256)  <201>;
    (__rt.155 var=93) __Pvoid__pl___Pvoid_int18_ (buffer.46 __ct_8.257)  <229>;
    (__rt.177 var=93) __Pvoid__pl___Pvoid_int18_ (__rd___sp.81 __ct_0s0.260)  <257>;
    (__rt.199 var=93) __Pvoid__mi___Pvoid_int18_ (__rt.155 __ct_4.262)  <285>;
    (__rt.221 var=93) __Pvoid__mi___Pvoid_int18_ (__rt.199 __ct_4.262)  <313>;
    (__rt.243 var=93) __Pvoid__pl___Pvoid_int18_ (__rt.221 __ct_8.257)  <341>;
    (__ct_0S0.256 var=118) const ()  <367>;
    (__ct_8.257 var=119) const ()  <369>;
    (__ct_0s0.260 var=122) const ()  <375>;
    (__ct_4.262 var=124) const ()  <379>;
    (__ct_2.265 var=128) const ()  <384>;
    (__tmp.266 var=133) int72__shift_int72__int72__uint2_ (i_incr.49 __ct_2.119 __ct_2.265)  <385>;
    (__tmp.271 var=134) int72__shift_int72__int72__uint2_ (__fch___extDM_BufferPtrDMB_buffer_len.71 __ct_2.119 __ct_2.265)  <393>;
 } #5 off=0 nxt=-2
 0 : 'signal_processing\\signal_path.c';
 ----------
 5 : (0,115:0,2);
 ----------
 75 : (0,113:5,0);
 79 : (0,113:5,0);
 84 : (0,114:43,1);
 91 : (0,114:72,1);
 95 : (0,114:91,1);
 103 : (0,114:10,1);
 104 : (0,115:0,0);
 108 : (0,115:0,2);
 109 : (0,115:0,2);
 155 : (0,114:26,1);
 175 : (0,114:58,0);
 201 : (0,113:5,0);
 229 : (0,114:43,1);
 257 : (0,115:0,0);
 285 : (0,114:72,0);
 341 : (0,114:43,0);
 367 : (0,113:5,0);
 369 : (0,114:43,0);
 375 : (0,115:0,0);
 379 : (0,114:72,0);
 384 : (0,114:58,0);
 385 : (0,114:58,1);
 393 : (0,114:91,1);
--- a/simulation/Release/chesswork/signal_path-f55921.#
+++ b/simulation/Release/chesswork/signal_path-f55921.#
@@ -8,3 +8,8 @@ ed333c6a3e8d1aafe83fb852bbcd140ff4272cff
 0
 0
 0
 0
 0
 0
 0
 0
--- a/simulation/Release/chesswork/signal_path-f55921.sfg
+++ b/simulation/Release/chesswork/signal_path-f55921.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 14:00:48 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
--- a/simulation/Release/chesswork/signal_path-f66b97.#
+++ b/simulation/Release/chesswork/signal_path-f66b97.#
@@ -0,0 +1,10 @@
 6bd14b3bc305504dd7bb9269fe30bf59aca75a76
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
 54cd4f4a31c0481faad4e87ee8bfbce6c4418650
 da39a3ee5e6b4b0d3255bfef95601890afd80709
 a930397de8fa3f7e26f75e262973f1cd15f811d0
 119
 0
 0
 2
--- a/simulation/Release/chesswork/signal_path-f66b97.o
+++ b/simulation/Release/chesswork/signal_path-f66b97.o
--- a/simulation/Release/chesswork/signal_path-f66b97.sfg
+++ b/simulation/Release/chesswork/signal_path-f66b97.sfg
@@ -0,0 +1,118 @@
 // File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 15:57:59 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
 /***
 !!  void write_delay_line(BufferPtrDMB chess_storage(DMB) *, int)
 F_Z16write_delay_linePU17chess_storage_DMB12BufferPtrDMBi : user_defined, called {
    fnm : "write_delay_line" 'void write_delay_line(BufferPtrDMB chess_storage(DMB) *, int)';
    arg : ( dmaddr_:i dmaddr_:i int32_:i );
    loc : ( LR[0] A[4] RA[0] );
    vac : ( srIM[0] );
    frm : ( );
 }
 ****
 ***/
 [
    0 : _Z16write_delay_linePU17chess_storage_DMB12BufferPtrDMBi typ=uint20_ bnd=e stl=PM tref=void_____PDMBBufferPtrDMB___sint__
   12 : __M_WDMB typ=int32_ bnd=d stl=WDMB
   26 : __R_SP typ=dmaddr_ bnd=d stl=SP
   34 : __sp typ=dmaddr_ bnd=b stl=SP
   36 : __extDM_BufferPtrDMB_ptr_current typ=int8_ bnd=b stl=DM
   38 : __extDM_BufferPtrDMB_ptr_start typ=int8_ bnd=b stl=DM
   39 : __extDM_BufferPtrDMB_buffer_len typ=int8_ bnd=b stl=DM
   40 : __extDM_int32_ typ=int8_ bnd=b stl=DM
   41 : __rd___sp typ=dmaddr_ bnd=m
   42 : __ct_0 typ=uint1_ val=0f bnd=m
   43 : __la typ=dmaddr_ bnd=p tref=dmaddr___
   44 : buffer typ=dmaddr_ bnd=p tref=__PDMBBufferPtrDMB__
   45 : sample typ=int32_ bnd=p tref=__sint__
   52 : __fch___extDM_BufferPtrDMB_ptr_current typ=dmaddr_ bnd=m
   62 : __fch___extDM_BufferPtrDMB_ptr_start typ=dmaddr_ bnd=m
   66 : __fch___extDM_BufferPtrDMB_buffer_len typ=int32_ bnd=m
   70 : __tmp typ=dmaddr_ bnd=m
   89 : __ct_4 typ=int18_ val=4f bnd=m
   94 : __ct_2 typ=int32_ val=2f bnd=m
   97 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
  122 : __ct_0S0 typ=int18_ val=0S0 bnd=m
  123 : __ct_8 typ=int18_ val=8f bnd=m
  126 : __ct_0s0 typ=int18_ val=0s0 bnd=m
  131 : __ct_2 typ=uint2_ val=2f bnd=m
  135 : __tmp typ=int18_ bnd=m
 ]
 F_Z16write_delay_linePU17chess_storage_DMB12BufferPtrDMBi {
    (__M_WDMB.10 var=12) st_def ()  <20>;
    (__R_SP.24 var=26) st_def ()  <48>;
    (__sp.32 var=34) source ()  <56>;
    (__extDM_BufferPtrDMB_ptr_current.34 var=36) source ()  <58>;
    (__extDM_BufferPtrDMB_ptr_start.36 var=38) source ()  <60>;
    (__extDM_BufferPtrDMB_buffer_len.37 var=39) source ()  <61>;
    (__extDM_int32_.38 var=40) source ()  <62>;
    (__ct_0.40 var=42) const ()  <64>;
    (__la.42 var=43 stl=LR off=0) inp ()  <66>;
    (__la.43 var=43) deassign (__la.42)  <67>;
    (buffer.45 var=44 stl=A off=4) inp ()  <69>;
    (buffer.46 var=44) deassign (buffer.45)  <70>;
    (sample.48 var=45 stl=RA off=0) inp ()  <72>;
    (sample.49 var=45) deassign (sample.48)  <73>;
    (__rd___sp.51 var=41) rd_res_reg (__R_SP.24 __sp.32)  <75>;
    (__R_SP.55 var=26 __sp.56 var=34) wr_res_reg (__rt.140 __sp.32)  <79>;
    (__fch___extDM_BufferPtrDMB_ptr_current.60 var=52) load (__M_WDMB.10 __rt.162 __extDM_BufferPtrDMB_ptr_current.34)  <84>;
    (__M_WDMB.61 var=12 __extDM_BufferPtrDMB_buffer_len.62 var=39 __extDM_int32_.63 var=40) store (sample.49 __fch___extDM_BufferPtrDMB_ptr_current.60 __extDM_BufferPtrDMB_buffer_len.37 __extDM_int32_.38)  <85>;
    (__fch___extDM_BufferPtrDMB_ptr_start.73 var=62) load (__M_WDMB.10 __rt.206 __extDM_BufferPtrDMB_ptr_start.36)  <95>;
    (__fch___extDM_BufferPtrDMB_buffer_len.77 var=66) load (__M_WDMB.10 __rt.228 __extDM_BufferPtrDMB_buffer_len.62)  <99>;
    (__M_WDMB.85 var=12 __extDM_BufferPtrDMB_ptr_current.86 var=36) store (__tmp.116 __rt.250 __extDM_BufferPtrDMB_ptr_current.34)  <107>;
    (__rd___sp.87 var=41) rd_res_reg (__R_SP.24 __sp.56)  <108>;
    (__R_SP.91 var=26 __sp.92 var=34) wr_res_reg (__rt.184 __sp.56)  <112>;
    () void_ret_dmaddr_ (__la.43)  <113>;
    () sink (__sp.92)  <119>;
    () sink (__extDM_BufferPtrDMB_ptr_current.86)  <121>;
    () sink (__extDM_BufferPtrDMB_buffer_len.62)  <124>;
    () sink (__extDM_int32_.63)  <125>;
    () sink (__ct_0.40)  <126>;
    (__tmp.116 var=70) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch___extDM_BufferPtrDMB_ptr_current.60 __ct_4.120 __fch___extDM_BufferPtrDMB_ptr_start.73 __tmp.272)  <159>;
    (__ct_4.120 var=89) const ()  <173>;
    (__ct_2.126 var=94) const ()  <181>;
    (__rt.140 var=97) __Pvoid__pl___Pvoid_int18_ (__rd___sp.51 __ct_0S0.263)  <208>;
    (__rt.162 var=97) __Pvoid__pl___Pvoid_int18_ (buffer.46 __ct_8.264)  <236>;
    (__rt.184 var=97) __Pvoid__pl___Pvoid_int18_ (__rd___sp.87 __ct_0s0.267)  <264>;
    (__rt.206 var=97) __Pvoid__mi___Pvoid_int18_ (__rt.162 __ct_4.120)  <292>;
    (__rt.228 var=97) __Pvoid__mi___Pvoid_int18_ (__rt.206 __ct_4.120)  <320>;
    (__rt.250 var=97) __Pvoid__pl___Pvoid_int18_ (__rt.228 __ct_8.264)  <348>;
    (__ct_0S0.263 var=122) const ()  <375>;
    (__ct_8.264 var=123) const ()  <377>;
    (__ct_0s0.267 var=126) const ()  <383>;
    (__ct_2.271 var=131) const ()  <390>;
    (__tmp.272 var=135) int72__shift_int72__int72__uint2_ (__fch___extDM_BufferPtrDMB_buffer_len.77 __ct_2.126 __ct_2.271)  <391>;
 } #5 off=0 nxt=-2
 0 : 'signal_processing\\signal_path.c';
 ----------
 5 : (0,121:0,3);
 ----------
 75 : (0,118:5,0);
 79 : (0,118:5,0);
 84 : (0,119:11,1);
 85 : (0,119:4,1);
 95 : (0,120:67,2);
 99 : (0,120:86,2);
 107 : (0,120:10,2);
 108 : (0,121:0,0);
 112 : (0,121:0,3);
 113 : (0,121:0,3);
 159 : (0,120:26,2);
 173 : (0,120:26,0);
 181 : (0,120:86,0);
 208 : (0,118:5,0);
 236 : (0,119:11,1);
 264 : (0,121:0,0);
 292 : (0,120:67,0);
 348 : (0,119:11,0);
 375 : (0,118:5,0);
 377 : (0,119:11,0);
 383 : (0,121:0,0);
 390 : (0,120:86,0);
 391 : (0,120:86,2);
--- a/simulation/Release/chesswork/signal_path-f8ba01.#
+++ b/simulation/Release/chesswork/signal_path-f8ba01.#
@@ -8,3 +8,11 @@ da39a3ee5e6b4b0d3255bfef95601890afd80709
 0
 0
 0
 0
 0
 0
 0
 0
 2
 7
 7
--- a/simulation/Release/chesswork/signal_path-f8ba01.sfg
+++ b/simulation/Release/chesswork/signal_path-f8ba01.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -491,246 +491,246 @@ F_Z21sig_init_preemph_coefP16SingleSignalPathdddddi {
 } #0
 0 : 'signal_processing\\signal_path.c';
 ----------
-0 : (0,133:0,0);
+0 : (0,140:0,0);
-4 : (0,135:17,1);
+4 : (0,142:17,1);
-7 : (0,135:17,3);
+7 : (0,142:17,3);
-10 : (0,135:29,5);
+10 : (0,142:29,5);
-13 : (0,135:29,7);
+13 : (0,142:29,7);
-16 : (0,135:41,9);
+16 : (0,142:41,9);
-19 : (0,135:41,11);
+19 : (0,142:41,11);
-22 : (0,135:53,13);
+22 : (0,142:53,13);
-25 : (0,135:53,15);
+25 : (0,142:53,15);
-28 : (0,135:4,17);
+28 : (0,142:4,17);
-30 : (0,135:66,18);
+30 : (0,142:66,18);
-34 : (0,149:0,42);
+34 : (0,156:0,42);
-247 : (0,147:25,38);
+247 : (0,154:25,38);
-383 : (0,135:23,2);
+383 : (0,142:23,2);
-388 : (0,135:35,6);
+388 : (0,142:35,6);
-393 : (0,135:47,10);
+393 : (0,142:47,10);
-398 : (0,135:59,14);
+398 : (0,142:59,14);
-434 : (0,141:20,30);
+434 : (0,148:20,30);
-479 : (0,135:11,1);
+479 : (0,142:11,1);
-482 : (0,135:11,1);
+482 : (0,142:11,1);
-483 : (0,135:11,1);
+483 : (0,142:11,1);
-488 : (0,135:23,2);
+488 : (0,142:23,2);
-491 : (0,135:23,2);
+491 : (0,142:23,2);
-492 : (0,135:23,2);
+492 : (0,142:23,2);
-497 : (0,135:35,6);
+497 : (0,142:35,6);
-500 : (0,135:35,6);
+500 : (0,142:35,6);
-501 : (0,135:35,6);
+501 : (0,142:35,6);
-506 : (0,135:47,10);
+506 : (0,142:47,10);
-509 : (0,135:47,10);
+509 : (0,142:47,10);
-510 : (0,135:47,10);
+510 : (0,142:47,10);
-515 : (0,135:59,14);
+515 : (0,142:59,14);
-518 : (0,135:59,14);
+518 : (0,142:59,14);
-519 : (0,135:59,14);
+519 : (0,142:59,14);
-542 : (0,141:20,30);
+542 : (0,148:20,30);
-545 : (0,141:25,27);
+545 : (0,148:25,27);
-546 : (0,141:25,27);
+546 : (0,148:25,27);
-570 : (0,147:25,38);
+570 : (0,154:25,38);
-573 : (0,141:39,33);
+573 : (0,148:39,33);
-574 : (0,141:39,33);
+574 : (0,148:39,33);
-579 : (0,141:39,33);
+579 : (0,148:39,33);
-580 : (0,141:39,33);
+580 : (0,148:39,33);
-585 : (0,143:34,34);
+585 : (0,150:34,34);
-586 : (0,143:34,34);
+586 : (0,150:34,34);
-591 : (0,143:34,34);
+591 : (0,150:34,34);
-592 : (0,143:34,34);
+592 : (0,150:34,34);
-597 : (0,143:29,34);
+597 : (0,150:29,34);
-598 : (0,143:29,34);
+598 : (0,150:29,34);
-603 : (0,144:34,35);
+603 : (0,151:34,35);
-604 : (0,144:34,35);
+604 : (0,151:34,35);
-609 : (0,144:29,35);
+609 : (0,151:29,35);
-610 : (0,144:29,35);
+610 : (0,151:29,35);
-615 : (0,145:34,36);
+615 : (0,152:34,36);
-616 : (0,145:34,36);
+616 : (0,152:34,36);
-621 : (0,145:29,36);
+621 : (0,152:29,36);
-622 : (0,145:29,36);
+622 : (0,152:29,36);
-627 : (0,146:34,37);
+627 : (0,153:34,37);
-628 : (0,146:34,37);
+628 : (0,153:34,37);
-633 : (0,146:29,37);
+633 : (0,153:29,37);
-634 : (0,146:29,37);
+634 : (0,153:29,37);
-639 : (0,147:34,38);
+639 : (0,154:34,38);
-640 : (0,147:34,38);
+640 : (0,154:34,38);
-645 : (0,147:29,38);
+645 : (0,154:29,38);
-646 : (0,147:29,38);
+646 : (0,154:29,38);
 ----------
-89 : (0,133:5,0);
+89 : (0,140:5,0);
-93 : (0,133:5,0);
+93 : (0,140:5,0);
-99 : (0,135:14,0);
+99 : (0,142:14,0);
-125 : (0,135:17,1);
+125 : (0,142:17,1);
-126 : (0,135:26,0);
+126 : (0,142:26,0);
-155 : (0,135:29,5);
+155 : (0,142:29,5);
-185 : (0,135:41,9);
+185 : (0,142:41,9);
-215 : (0,135:53,13);
+215 : (0,142:53,13);
-221 : (0,135:53,16);
+221 : (0,142:53,16);
-245 : (0,135:4,17);
+245 : (0,142:4,17);
-246 : (0,136:36,0);
+246 : (0,143:36,0);
-251 : (0,136:14,18);
+251 : (0,143:14,18);
-252 : (0,139:36,0);
+252 : (0,146:36,0);
-257 : (0,139:14,21);
+257 : (0,146:14,21);
-261 : (0,140:14,22);
+261 : (0,147:14,22);
-267 : (0,141:20,0);
+267 : (0,148:20,0);
-283 : (0,143:25,34);
+283 : (0,150:25,34);
-293 : (0,144:25,35);
+293 : (0,151:25,35);
-303 : (0,145:25,36);
+303 : (0,152:25,36);
-313 : (0,146:25,37);
+313 : (0,153:25,37);
-323 : (0,147:25,38);
+323 : (0,154:25,38);
-324 : (0,135:4,41);
+324 : (0,142:4,41);
-325 : (0,135:4,41);
+325 : (0,142:4,41);
-326 : (0,135:4,41);
+326 : (0,142:4,41);
-331 : (0,149:0,0);
+331 : (0,156:0,0);
-335 : (0,149:0,42);
+335 : (0,156:0,42);
-336 : (0,149:0,42);
+336 : (0,156:0,42);
-447 : (0,133:5,0);
+447 : (0,140:5,0);
-520 : (0,136:14,18);
+520 : (0,143:14,18);
-548 : (0,149:0,0);
+548 : (0,156:0,0);
-576 : (0,140:14,0);
+576 : (0,147:14,0);
-604 : (0,143:14,0);
+604 : (0,150:14,0);
-632 : (0,144:25,0);
+632 : (0,151:25,0);
-660 : (0,145:25,0);
+660 : (0,152:25,0);
-688 : (0,146:25,0);
+688 : (0,153:25,0);
-716 : (0,147:25,0);
+716 : (0,154:25,0);
-747 : (0,133:5,0);
+747 : (0,140:5,0);
-749 : (0,136:14,0);
+749 : (0,143:14,0);
-755 : (0,149:0,0);
+755 : (0,156:0,0);
-757 : (0,140:14,0);
+757 : (0,147:14,0);
-761 : (0,143:14,0);
+761 : (0,150:14,0);
-763 : (0,144:25,0);
+763 : (0,151:25,0);
-830 : (0,141:20,0);
+830 : (0,148:20,0);
-831 : (0,141:20,30);
+831 : (0,148:20,30);
-832 : (0,141:20,30);
+832 : (0,148:20,30);
-833 : (0,141:20,30);
+833 : (0,148:20,30);
-834 : (0,141:20,30);
+834 : (0,148:20,30);
-835 : (0,141:20,30);
+835 : (0,148:20,30);
-836 : (0,141:20,30);
+836 : (0,148:20,30);
-927 : (0,135:11,0);
+927 : (0,142:11,0);
-928 : (0,135:11,1);
+928 : (0,142:11,1);
-929 : (0,135:11,1);
+929 : (0,142:11,1);
-930 : (0,135:11,1);
+930 : (0,142:11,1);
-931 : (0,135:11,1);
+931 : (0,142:11,1);
-932 : (0,135:11,1);
+932 : (0,142:11,1);
-933 : (0,135:11,1);
+933 : (0,142:11,1);
-941 : (0,135:23,2);
+941 : (0,142:23,2);
-942 : (0,135:23,2);
+942 : (0,142:23,2);
-943 : (0,135:23,2);
+943 : (0,142:23,2);
-944 : (0,135:23,2);
+944 : (0,142:23,2);
-945 : (0,135:23,2);
+945 : (0,142:23,2);
-946 : (0,135:23,2);
+946 : (0,142:23,2);
-954 : (0,135:35,6);
+954 : (0,142:35,6);
-955 : (0,135:35,6);
+955 : (0,142:35,6);
-956 : (0,135:35,6);
+956 : (0,142:35,6);
-957 : (0,135:35,6);
+957 : (0,142:35,6);
-958 : (0,135:35,6);
+958 : (0,142:35,6);
-959 : (0,135:35,6);
+959 : (0,142:35,6);
-967 : (0,135:47,10);
+967 : (0,142:47,10);
-968 : (0,135:47,10);
+968 : (0,142:47,10);
-969 : (0,135:47,10);
+969 : (0,142:47,10);
-970 : (0,135:47,10);
+970 : (0,142:47,10);
-971 : (0,135:47,10);
+971 : (0,142:47,10);
-972 : (0,135:47,10);
+972 : (0,142:47,10);
-980 : (0,135:59,14);
+980 : (0,142:59,14);
-981 : (0,135:59,14);
+981 : (0,142:59,14);
-982 : (0,135:59,14);
+982 : (0,142:59,14);
-983 : (0,135:59,14);
+983 : (0,142:59,14);
-984 : (0,135:59,14);
+984 : (0,142:59,14);
-985 : (0,135:59,14);
+985 : (0,142:59,14);
-992 : (0,135:11,1);
+992 : (0,142:11,1);
-1000 : (0,135:23,2);
+1000 : (0,142:23,2);
-1008 : (0,135:35,6);
+1008 : (0,142:35,6);
-1016 : (0,135:47,10);
+1016 : (0,142:47,10);
-1024 : (0,135:59,14);
+1024 : (0,142:59,14);
-1051 : (0,135:59,14);
+1051 : (0,142:59,14);
-1054 : (0,141:25,0);
+1054 : (0,148:25,0);
-1055 : (0,141:25,27);
+1055 : (0,148:25,27);
-1056 : (0,141:25,27);
+1056 : (0,148:25,27);
-1057 : (0,141:25,27);
+1057 : (0,148:25,27);
-1058 : (0,141:25,27);
+1058 : (0,148:25,27);
-1059 : (0,141:25,27);
+1059 : (0,148:25,27);
-1066 : (0,141:39,0);
+1066 : (0,148:39,0);
-1067 : (0,141:39,33);
+1067 : (0,148:39,33);
-1068 : (0,141:39,33);
+1068 : (0,148:39,33);
-1069 : (0,141:39,33);
+1069 : (0,148:39,33);
-1070 : (0,141:39,33);
+1070 : (0,148:39,33);
-1071 : (0,141:39,33);
+1071 : (0,148:39,33);
-1072 : (0,141:39,33);
+1072 : (0,148:39,33);
-1078 : (0,141:39,0);
+1078 : (0,148:39,0);
-1079 : (0,141:39,33);
+1079 : (0,148:39,33);
-1080 : (0,141:39,33);
+1080 : (0,148:39,33);
-1081 : (0,141:39,33);
+1081 : (0,148:39,33);
-1082 : (0,141:39,33);
+1082 : (0,148:39,33);
-1083 : (0,141:39,33);
+1083 : (0,148:39,33);
-1090 : (0,143:34,34);
+1090 : (0,150:34,34);
-1091 : (0,143:34,34);
+1091 : (0,150:34,34);
-1092 : (0,143:34,34);
+1092 : (0,150:34,34);
-1093 : (0,143:34,34);
+1093 : (0,150:34,34);
-1094 : (0,143:34,34);
+1094 : (0,150:34,34);
-1101 : (0,143:34,0);
+1101 : (0,150:34,0);
-1102 : (0,143:34,34);
+1102 : (0,150:34,34);
-1103 : (0,143:34,34);
+1103 : (0,150:34,34);
-1104 : (0,143:34,34);
+1104 : (0,150:34,34);
-1105 : (0,143:34,34);
+1105 : (0,150:34,34);
-1106 : (0,143:34,34);
+1106 : (0,150:34,34);
-1107 : (0,143:34,34);
+1107 : (0,150:34,34);
-1114 : (0,143:29,34);
+1114 : (0,150:29,34);
-1115 : (0,143:29,34);
+1115 : (0,150:29,34);
-1116 : (0,143:29,34);
+1116 : (0,150:29,34);
-1117 : (0,143:29,34);
+1117 : (0,150:29,34);
-1118 : (0,143:29,34);
+1118 : (0,150:29,34);
-1126 : (0,144:34,35);
+1126 : (0,151:34,35);
-1127 : (0,144:34,35);
+1127 : (0,151:34,35);
-1128 : (0,144:34,35);
+1128 : (0,151:34,35);
-1129 : (0,144:34,35);
+1129 : (0,151:34,35);
-1130 : (0,144:34,35);
+1130 : (0,151:34,35);
-1131 : (0,144:34,35);
+1131 : (0,151:34,35);
-1138 : (0,144:29,35);
+1138 : (0,151:29,35);
-1139 : (0,144:29,35);
+1139 : (0,151:29,35);
-1140 : (0,144:29,35);
+1140 : (0,151:29,35);
-1141 : (0,144:29,35);
+1141 : (0,151:29,35);
-1142 : (0,144:29,35);
+1142 : (0,151:29,35);
-1150 : (0,145:34,36);
+1150 : (0,152:34,36);
-1151 : (0,145:34,36);
+1151 : (0,152:34,36);
-1152 : (0,145:34,36);
+1152 : (0,152:34,36);
-1153 : (0,145:34,36);
+1153 : (0,152:34,36);
-1154 : (0,145:34,36);
+1154 : (0,152:34,36);
-1155 : (0,145:34,36);
+1155 : (0,152:34,36);
-1162 : (0,145:29,36);
+1162 : (0,152:29,36);
-1163 : (0,145:29,36);
+1163 : (0,152:29,36);
-1164 : (0,145:29,36);
+1164 : (0,152:29,36);
-1165 : (0,145:29,36);
+1165 : (0,152:29,36);
-1166 : (0,145:29,36);
+1166 : (0,152:29,36);
-1174 : (0,146:34,37);
+1174 : (0,153:34,37);
-1175 : (0,146:34,37);
+1175 : (0,153:34,37);
-1176 : (0,146:34,37);
+1176 : (0,153:34,37);
-1177 : (0,146:34,37);
+1177 : (0,153:34,37);
-1178 : (0,146:34,37);
+1178 : (0,153:34,37);
-1179 : (0,146:34,37);
+1179 : (0,153:34,37);
-1186 : (0,146:29,37);
+1186 : (0,153:29,37);
-1187 : (0,146:29,37);
+1187 : (0,153:29,37);
-1188 : (0,146:29,37);
+1188 : (0,153:29,37);
-1189 : (0,146:29,37);
+1189 : (0,153:29,37);
-1190 : (0,146:29,37);
+1190 : (0,153:29,37);
-1198 : (0,147:34,38);
+1198 : (0,154:34,38);
-1199 : (0,147:34,38);
+1199 : (0,154:34,38);
-1200 : (0,147:34,38);
+1200 : (0,154:34,38);
-1201 : (0,147:34,38);
+1201 : (0,154:34,38);
-1202 : (0,147:34,38);
+1202 : (0,154:34,38);
-1203 : (0,147:34,38);
+1203 : (0,154:34,38);
-1210 : (0,147:29,38);
+1210 : (0,154:29,38);
-1211 : (0,147:29,38);
+1211 : (0,154:29,38);
-1212 : (0,147:29,38);
+1212 : (0,154:29,38);
-1213 : (0,147:29,38);
+1213 : (0,154:29,38);
-1214 : (0,147:29,38);
+1214 : (0,154:29,38);
-1262 : (0,135:11,1);
+1262 : (0,142:11,1);
-1263 : (0,135:23,2);
+1263 : (0,142:23,2);
-1264 : (0,135:17,4);
+1264 : (0,142:17,4);
-1265 : (0,135:35,6);
+1265 : (0,142:35,6);
-1266 : (0,135:29,8);
+1266 : (0,142:29,8);
-1267 : (0,135:47,10);
+1267 : (0,142:47,10);
-1268 : (0,135:41,12);
+1268 : (0,142:41,12);
-1292 : (0,135:17,1);
+1292 : (0,142:17,1);
-1296 : (0,135:29,5);
+1296 : (0,142:29,5);
-1300 : (0,135:41,9);
+1300 : (0,142:41,9);
-1304 : (0,135:53,13);
+1304 : (0,142:53,13);
-1308 : (0,135:4,17);
+1308 : (0,142:4,17);
--- a/simulation/Release/chesswork/signal_path-fcd1fd.#
+++ b/simulation/Release/chesswork/signal_path-fcd1fd.#
@@ -8,3 +8,9 @@ da39a3ee5e6b4b0d3255bfef95601890afd80709
 0
 0
 0
 0
 0
 0
 0
 0
 2
--- a/simulation/Release/chesswork/signal_path-fcd1fd.sfg
+++ b/simulation/Release/chesswork/signal_path-fcd1fd.sfg
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 15:57:59 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -87,29 +87,29 @@ F_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri {
 } #5 off=0 nxt=-2
 0 : 'signal_processing\\signal_path.c';
 ----------
-5 : (0,105:0,2);
+5 : (0,107:0,2);
 ----------
-75 : (0,103:5,0);
+75 : (0,105:5,0);
-79 : (0,103:5,0);
+79 : (0,105:5,0);
-84 : (0,104:43,1);
+84 : (0,106:43,1);
-91 : (0,104:72,1);
+91 : (0,106:72,1);
-95 : (0,104:91,1);
+95 : (0,106:91,1);
-103 : (0,104:10,1);
+103 : (0,106:10,1);
-104 : (0,105:0,0);
+104 : (0,107:0,0);
-108 : (0,105:0,2);
+108 : (0,107:0,2);
-109 : (0,105:0,2);
+109 : (0,107:0,2);
-155 : (0,104:26,1);
+155 : (0,106:26,1);
-175 : (0,104:58,0);
+175 : (0,106:58,0);
-201 : (0,103:5,0);
+201 : (0,105:5,0);
-229 : (0,104:43,1);
+229 : (0,106:43,1);
-257 : (0,105:0,0);
+257 : (0,107:0,0);
-285 : (0,104:72,0);
+285 : (0,106:72,0);
-341 : (0,104:43,0);
+341 : (0,106:43,0);
-367 : (0,103:5,0);
+367 : (0,105:5,0);
-369 : (0,104:43,0);
+369 : (0,106:43,0);
-375 : (0,105:0,0);
+375 : (0,107:0,0);
-379 : (0,104:72,0);
+379 : (0,106:72,0);
-384 : (0,104:58,0);
+384 : (0,106:58,0);
-385 : (0,104:58,1);
+385 : (0,106:58,1);
-393 : (0,104:91,1);
+393 : (0,106:91,1);
--- a/simulation/Release/chesswork/signal_path.ctt
+++ b/simulation/Release/chesswork/signal_path.ctt
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
--- a/simulation/Release/chesswork/signal_path.dti
+++ b/simulation/Release/chesswork/signal_path.dti
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -195,14 +195,14 @@
                     __PPMvoid__ : _basic() __PPMvoid;
                  __A1__sint_DMA : _array(DMA,4,4) [1] $__sint_DMA;
               __A1DMB__sint_DMB : _array(DMB,4,4) [1] $__sint_DMB;
                     __P__sint__ : _pointer() $__Pvoid__ $__sint_DMA;
                __PDMB__sint_DMA : _pointer(DMA,4,4) $__Pvoid_DMA $__sint_DMB;
                  __PDMB__sint__ : _pointer() $__Pvoid__ $__sint_DMB;
                  __PBufferPtr__ : _pointer() $__Pvoid__ $BufferPtr_DMA;
                     __P__sint__ : _pointer() $__Pvoid__ $__sint_DMA;
 __sint_____PBufferPtr___P__sint___sint___sint__ : _function() $__sint__ $__PBufferPtr__ $__P__sint__ $__sint__ $__sint__;
            __PDMBBufferPtrDMB__ : _pointer() $__Pvoid__ $BufferPtrDMB_DMB;
                  __PDMB__sint__ : _pointer() $__Pvoid__ $__sint_DMB;
 __sint_____PDMBBufferPtrDMB___PDMB__sint___sint___sint__ : _function() $__sint__ $__PDMBBufferPtrDMB__ $__PDMB__sint__ $__sint__ $__sint__;
    void_____PBufferPtr___sint__ : _function() _void $__PBufferPtr__ $__sint__;
                __PDMB__sint_DMA : _pointer(DMA,4,4) $__Pvoid_DMA $__sint_DMB;
                BufferPtrDMB_DMA : _struct(DMA,12,4) BufferPtrDMB {
                                       buffer_len $__sint_DMA @0;
                                       ptr_start $__PDMB__sint_DMA @4;
@@ -240,16 +240,9 @@ __sint_____PSingleSignalPath___sint___3 : _function() $__sint__ $__PSingleSignal
                   __fdouble_DMA : _basic(DMA,8,8) __fdouble;
                  __P__fdouble__ : _pointer() $__Pvoid__ $__fdouble_DMA;
 void_____PSingleSignalPath___PSingleSignalPath___P__fdouble___P__fdouble___sint___sint___fdouble___fdouble___fdouble___sint__ : _function() _void $__PSingleSignalPath__ $__PSingleSignalPath__ $__P__fdouble__ $__P__fdouble__ $__sint__ $__sint__ $__fdouble__ $__fdouble__ $__fdouble__ $__sint__;
                    OutputMode__ : _enum() OutputMode $__sint__ {
                                       OUTPUT_MODE_C_SENSOR = 0;
                                       OUTPUT_MODE_ACC_SENSOR = 1;
                                       OUTPUT_MODE_FIR_LMS = 2;
                                       OUTPUT_MODE_FIR = 3;
                                       OUTPUT_MODE_FIR_LMS_LEAKY = 4;
                                   }
                    __sshort_DMB : _basic(DMB,2,2) __sshort;
                     int16_t_DMB : _typedef(DMB,2,2) int16_t $__sshort_DMB;
                __PDMB__sshort__ : _pointer() $__Pvoid__ $int16_t_DMB;
-void_____PSingleSignalPath___PSingleSignalPath_OutputMode___PDMB__sshort___PDMB__sshort___PDMB__sshort__ : _function() _void $__PSingleSignalPath__ $__PSingleSignalPath__ $OutputMode__ $__PDMB__sshort__ $__PDMB__sshort__ $__PDMB__sshort__;
+void_____PSingleSignalPath___PSingleSignalPath___PDMB__sshort___PDMB__sshort___PDMB__sshort__ : _function() _void $__PSingleSignalPath__ $__PSingleSignalPath__ $__PDMB__sshort__ $__PDMB__sshort__ $__PDMB__sshort__;
                      uint32_t__ : _typedef() uint32_t $__uint__;
                          void__ : _basic() void;
--- a/simulation/Release/chesswork/signal_path.fnm
+++ b/simulation/Release/chesswork/signal_path.fnm
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -8,45 +8,45 @@
 "C:\\Users\\phangl\\00_Repos\\06_DSP_Simulation\\simulation\\signal_processing\\signal_path.c"
 "C:\\Users\\phangl\\00_Repos\\06_DSP_Simulation\\simulation"
-"signal_path-154f66.sfg"
+"signal_path-59265a.sfg"
-  : _Z15sig_init_bufferP9BufferPtrPiii
+  : _Z17initialize_bufferP9BufferPtrPiii
-  : "sig_init_buffer" global "signal_processing\\signal_path.c" 71 Ofile
+  : "initialize_buffer" global "signal_processing\\signal_path.c" 74 Ofile
  (
  )
-"signal_path-f55921.sfg"
+"signal_path-a56564.sfg"
-  : _Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii
+  : _Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii
-  : "sig_init_buffer_DMB" global "signal_processing\\signal_path.c" 87 Ofile
+  : "initialize_buffer_dmb" global "signal_processing\\signal_path.c" 91 Ofile
  (
  )
-"signal_path-fcd1fd.sfg"
+"signal_path-750458.sfg"
-  : _Z32sig_cirular_buffer_ptr_incrementP9BufferPtri
+  : _Z16increment_bufferP9BufferPtri
-  : "sig_cirular_buffer_ptr_increment" global "signal_processing\\signal_path.c" 103 Ofile
+  : "increment_buffer" global "signal_processing\\signal_path.c" 108 Ofile
  (
  )
-"signal_path-352f49.sfg"
+"signal_path-f431c2.sfg"
-  : _Z36sig_cirular_buffer_ptr_increment_DMBP12BufferPtrDMBi
+  : _Z21increment_buffert_DMBP12BufferPtrDMBi
-  : "sig_cirular_buffer_ptr_increment_DMB" global "signal_processing\\signal_path.c" 107 Ofile
+  : "increment_buffert_DMB" global "signal_processing\\signal_path.c" 113 Ofile
  (
  )
-"signal_path-e110bc.sfg"
+"signal_path-4df6b6.sfg"
-  : _Z33sig_cirular_buffer_ptr_put_sampleP9BufferPtri
+  : _Z12write_bufferP9BufferPtri
-  : "sig_cirular_buffer_ptr_put_sample" global "signal_processing\\signal_path.c" 111 Ofile
+  : "write_buffer" global "signal_processing\\signal_path.c" 117 Ofile
  (
  )
-"signal_path-e7968f.sfg"
+"signal_path-a3616e.sfg"
-  : _Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi
+  : _Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi
-  : "sig_cirular_buffer_ptr_put_sample_DMB" global "signal_processing\\signal_path.c" 116 Ofile
+  : "write_buffer_dmb" global "signal_processing\\signal_path.c" 123 Ofile
  (
  )
 "signal_path-f8ba01.sfg"
  : _Z21sig_init_preemph_coefP16SingleSignalPathdddddi
-  : "sig_init_preemph_coef" global "signal_processing\\signal_path.c" 133 Ofile
+  : "sig_init_preemph_coef" global "signal_processing\\signal_path.c" 140 Ofile
  (
    ff_pow
    _Z10float64_eqyy
@@ -58,14 +58,14 @@
 "signal_path-6fcf7f.sfg"
  : _Z14sig_init_delayP16SingleSignalPathi
-  : "sig_init_delay" global "signal_processing\\signal_path.c" 152 Ofile
+  : "sig_init_delay" global "signal_processing\\signal_path.c" 159 Ofile
  (
-    _Z15sig_init_bufferP9BufferPtrPiii
+    _Z17initialize_bufferP9BufferPtrPiii
  )
 "signal_path-d74ce2.sfg"
  : _Z15sig_init_weightP16SingleSignalPathdi
-  : "sig_init_weight" global "signal_processing\\signal_path.c" 157 Ofile
+  : "sig_init_weight" global "signal_processing\\signal_path.c" 164 Ofile
  (
    ff_pow
    _Z10float64_eqyy
@@ -77,41 +77,41 @@
 "signal_path-d6dbe4.sfg"
  : _Z15sig_calc_biquadP16SingleSignalPathi
-  : "sig_calc_biquad" global "signal_processing\\signal_path.c" 173 Ofile
+  : "sig_calc_biquad" global "signal_processing\\signal_path.c" 180 Ofile
  (
  )
 "signal_path-a30375.sfg"
  : _Z29sig_delay_buffer_load_and_getP16SingleSignalPathi
-  : "sig_delay_buffer_load_and_get" global "signal_processing\\signal_path.c" 194 Ofile
+  : "sig_delay_buffer_load_and_get" global "signal_processing\\signal_path.c" 201 Ofile
  (
-    _Z32sig_cirular_buffer_ptr_incrementP9BufferPtri
+    _Z16increment_bufferP9BufferPtri
  )
 "signal_path-530a42.sfg"
  : _Z15sig_calc_weightP16SingleSignalPathi
-  : "sig_calc_weight" global "signal_processing\\signal_path.c" 204 Ofile
+  : "sig_calc_weight" global "signal_processing\\signal_path.c" 211 Ofile
  (
  )
 "signal_path-9c02ae.sfg"
  : _Z4initP16SingleSignalPathS0_PdS1_iidddi
-  : "init" global "signal_processing\\signal_path.c" 303 Ofile
+  : "init" global "signal_processing\\signal_path.c" 306 Ofile
  (
    _Z21sig_init_preemph_coefP16SingleSignalPathdddddi
    _Z14sig_init_delayP16SingleSignalPathi
    _Z15sig_init_weightP16SingleSignalPathdi
-    _Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii
+    _Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii
-    _Z15sig_init_bufferP9BufferPtrPiii
+    _Z17initialize_bufferP9BufferPtrPiii
    _Z11float64_mulyy
    _Z30float64_to_int32_round_to_zeroy
  )
-"signal_path-101f20.sfg"
+"signal_path-a72ab8.sfg"
-  : _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
+  : _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_
-  : "calc" global "signal_processing\\signal_path.c" 343 Ofile
+  : "calc" global "signal_processing\\signal_path.c" 346 Ofile
  (
-    _Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi
+    _Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi
  )
 ""
--- a/simulation/Release/chesswork/signal_path.gvt
+++ b/simulation/Release/chesswork/signal_path.gvt
@@ -1,30 +1,24 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
 [
    1 : _imsk_var_ typ=uint15_ bnd=e sz=1 algn=1 stl=IMSK tref=uint15__IMSK
    2 : _irq_stat_var_ typ=uint15_ bnd=e sz=1 algn=1 stl=irq_stat tref=uint15__irq_stat
    3 : ptr_fir_lms_coeffs typ=int8_ bnd=e sz=12 algn=4 stl=DMA tref=BufferPtr_DMA
    4 : ptr_fir_lms_delay_line typ=int8_ bnd=e sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB
    5 : fir_lms_delay_line typ=int8_ bnd=e sz=256 algn=4 stl=DMB tref=__A64DMB__sint_DMB
    6 : _ZL7counter typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__sint_DMA
    7 : _ZL2mu typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__sint_DMA
    8 : _ZL4leak typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__sint_DMA
-    9 : fir_lms_delay_line typ=int8_ bnd=g sz=256 algn=4 stl=DMB tref=__A64DMB__sint_DMB
+    9 : delay_line typ=int8_ bnd=g sz=256 algn=4 stl=DMB tref=__A64DMB__sint_DMB
-   10 : fir_lms_coeffs typ=int8_ bnd=g sz=256 algn=8 stl=DMA tref=__A64__sint_DMA
+   10 : filter_coefficients typ=int8_ bnd=g sz=256 algn=8 stl=DMA tref=__A64__sint_DMA
-   11 : ptr_fir_lms_delay_line typ=int8_ bnd=g sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB
+   11 : pointer_delay_line typ=int8_ bnd=g sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB
-   12 : ptr_fir_lms_coeffs typ=int8_ bnd=g sz=12 algn=4 stl=DMA tref=BufferPtr_DMA
+   12 : pointer_filter_coefficients typ=int8_ bnd=g sz=12 algn=4 stl=DMA tref=BufferPtr_DMA
-   13 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
+   13 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
-   14 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
+   14 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
-   15 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
+   15 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
-   16 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
+   16 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
-   17 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt typ=int8_ bnd=f sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
+   17 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator typ=int8_ bnd=f sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
-   18 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
+   18 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
   19 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13p_c_block_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__P__sint_DMA
   20 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E16p_acc_block_filt typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__P__sint_DMA
   21 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E8p_out_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__PDMB__sint_DMA
 ]
 __signal_path_sttc {
 } #0
--- a/simulation/Release/chesswork/signal_path.gvt.#
+++ b/simulation/Release/chesswork/signal_path.gvt.#
@@ -1,7 +1,7 @@
 b94f5e81f66808a8f4f9315bd020e05811fb8d4a
 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79
 42695db990e5aaff0b9f36d25938c80e96ce47cc
-45bd86c9978f9b853a202e23dfb09e034eb8b898
+49385fd808e0da9ad176cb538c83ecdbdf700e73
 da39a3ee5e6b4b0d3255bfef95601890afd80709
 da39a3ee5e6b4b0d3255bfef95601890afd80709
 0
--- a/simulation/Release/chesswork/signal_path.gvt.o
+++ b/simulation/Release/chesswork/signal_path.gvt.o
--- a/simulation/Release/chesswork/signal_path.ini
+++ b/simulation/Release/chesswork/signal_path.ini
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -7,15 +7,9 @@ _ZL7counter/6 $ counter
 _ZL2mu/7 $ mu
 _ZL4leak/8 $ leak
 _ZL4leak/8 : #1d #ac #ff #7f 
-_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre/13 $ c_block_pre _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
+_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32/13 $ c_sensor_32 _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_
-_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre/14 $ acc_block_pre _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
+_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32/14 $ acc_sensor_32 _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_
-_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32/15 $ cSensor_32 _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
+_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre/15 $ c_sensor_pre _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_
-_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32/16 $ accSensor_32 _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
+_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre/16 $ acc_sensor_pre _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_
-_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt/17 $ acc_block_filt _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
+_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator/17 $ filter_accumulator _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_
-_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32/18 $ out_32 _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
+_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32/18 $ output_32 _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_
 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13p_c_block_pre/19 $ p_c_block_pre _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13p_c_block_pre/19 : (dmaddr_:int32_:0)_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre #00 #00 #00 #00 
 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E16p_acc_block_filt/20 $ p_acc_block_filt _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E16p_acc_block_filt/20 : (dmaddr_:int32_:0)_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre #00 #00 #00 #00 
 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E8p_out_32/21 $ p_out_32 _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E8p_out_32/21 : (dmaddr_:int32_:0)_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 #00 #00 #00 #00 
--- a/simulation/Release/chesswork/signal_path.lib
+++ b/simulation/Release/chesswork/signal_path.lib
@@ -1,5 +1,5 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -75,19 +75,19 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi : user_defined, called {
    llv : 0 1 0 0 0 ;
 }
-// void calc(SingleSignalPath *, SingleSignalPath *, OutputMode, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)
+// void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)
-F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ : user_defined, called {
+F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ : user_defined, called {
-    fnm : "calc" 'void calc(SingleSignalPath *, SingleSignalPath *, OutputMode, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)';
+    fnm : "calc" 'void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)';
-    arg : ( dmaddr_:i dmaddr_:i dmaddr_:i int32_:i dmaddr_:i dmaddr_:i dmaddr_:i );
+    arg : ( dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i );
-    loc : ( LR[0] A[0] A[1] RA[0] A[4] A[5] __spill_WDMA[0] );
+    loc : ( LR[0] A[0] A[1] A[4] A[5] __spill_WDMA[0] );
    vac : ( srIM[0] );
    frm : ( );
    llv : 0 1 0 0 0 ;
 }
-// int sig_init_buffer(BufferPtr *, int *, int, int)
+// int initialize_buffer(BufferPtr *, int *, int, int)
-F_Z15sig_init_bufferP9BufferPtrPiii : user_defined, called {
+F_Z17initialize_bufferP9BufferPtrPiii : user_defined, called {
-    fnm : "sig_init_buffer" 'int sig_init_buffer(BufferPtr *, int *, int, int)';
+    fnm : "initialize_buffer" 'int initialize_buffer(BufferPtr *, int *, int, int)';
    arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i );
    loc : ( LR[0] RA[0] A[0] A[1] RA[1] RB[0] );
    vac : ( srIM[0] );
@@ -95,9 +95,9 @@ F_Z15sig_init_bufferP9BufferPtrPiii : user_defined, called {
    llv : 0 1 0 0 0 ;
 }
-// int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)
+// int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)
-F_Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii : user_defined, called {
+F_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii : user_defined, called {
-    fnm : "sig_init_buffer_DMB" 'int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)';
+    fnm : "initialize_buffer_dmb" 'int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)';
    arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i );
    loc : ( LR[0] RA[0] A[4] A[5] RA[1] RB[0] );
    vac : ( srIM[0] );
@@ -105,9 +105,9 @@ F_Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMB
    llv : 0 1 0 0 0 ;
 }
-// void sig_cirular_buffer_ptr_increment(BufferPtr *, int)
+// void increment_buffer(BufferPtr *, int)
-F_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri : user_defined, called {
+F_Z16increment_bufferP9BufferPtri : user_defined, called {
-    fnm : "sig_cirular_buffer_ptr_increment" 'void sig_cirular_buffer_ptr_increment(BufferPtr *, int)';
+    fnm : "increment_buffer" 'void increment_buffer(BufferPtr *, int)';
    arg : ( dmaddr_:i dmaddr_:i int32_:i );
    loc : ( LR[0] A[0] RA[0] );
    vac : ( srIM[0] );
@@ -115,9 +115,9 @@ F_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri : user_defined, called {
    llv : 0 0 0 0 0 ;
 }
-// void sig_cirular_buffer_ptr_increment_DMB(BufferPtrDMB *, int)
+// void increment_buffert_DMB(BufferPtrDMB *, int)
-F_Z36sig_cirular_buffer_ptr_increment_DMBP12BufferPtrDMBi : user_defined, called {
+F_Z21increment_buffert_DMBP12BufferPtrDMBi : user_defined, called {
-    fnm : "sig_cirular_buffer_ptr_increment_DMB" 'void sig_cirular_buffer_ptr_increment_DMB(BufferPtrDMB *, int)';
+    fnm : "increment_buffert_DMB" 'void increment_buffert_DMB(BufferPtrDMB *, int)';
    arg : ( dmaddr_:i dmaddr_:i int32_:i );
    loc : ( LR[0] A[0] RA[0] );
    vac : ( srIM[0] );
@@ -125,9 +125,9 @@ F_Z36sig_cirular_buffer_ptr_increment_DMBP12BufferPtrDMBi : user_defined, called
    llv : 0 0 0 0 0 ;
 }
-// void sig_cirular_buffer_ptr_put_sample(BufferPtr *, int)
+// void write_buffer(BufferPtr *, int)
-F_Z33sig_cirular_buffer_ptr_put_sampleP9BufferPtri : user_defined, called {
+F_Z12write_bufferP9BufferPtri : user_defined, called {
-    fnm : "sig_cirular_buffer_ptr_put_sample" 'void sig_cirular_buffer_ptr_put_sample(BufferPtr *, int)';
+    fnm : "write_buffer" 'void write_buffer(BufferPtr *, int)';
    arg : ( dmaddr_:i dmaddr_:i int32_:i );
    loc : ( LR[0] A[0] RA[0] );
    vac : ( srIM[0] );
@@ -135,9 +135,9 @@ F_Z33sig_cirular_buffer_ptr_put_sampleP9BufferPtri : user_defined, called {
    llv : 0 0 0 0 0 ;
 }
-// void sig_cirular_buffer_ptr_put_sample_DMB(BufferPtrDMB chess_storage(DMB) *, int)
+// void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int)
-F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi : user_defined, called {
+F_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi : user_defined, called {
-    fnm : "sig_cirular_buffer_ptr_put_sample_DMB" 'void sig_cirular_buffer_ptr_put_sample_DMB(BufferPtrDMB chess_storage(DMB) *, int)';
+    fnm : "write_buffer_dmb" 'void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int)';
    arg : ( dmaddr_:i dmaddr_:i int32_:i );
    loc : ( LR[0] A[4] RA[0] );
    vac : ( srIM[0] );
--- a/simulation/Release/chesswork/signal_path.objlist
+++ b/simulation/Release/chesswork/signal_path.objlist
@@ -1,15 +1,15 @@
-"signal_path-154f66.o" 0
+"signal_path-59265a.o" 1
-"signal_path-f55921.o" 0
+"signal_path-a56564.o" 2
-"signal_path-fcd1fd.o" 0
+"signal_path-750458.o" 0
-"signal_path-352f49.o" 0
+"signal_path-f431c2.o" 0
-"signal_path-e110bc.o" 0
+"signal_path-4df6b6.o" 0
-"signal_path-e7968f.o" 0
+"signal_path-a3616e.o" 0
-"signal_path-f8ba01.o" 0
+"signal_path-f8ba01.o" 7
-"signal_path-6fcf7f.o" 0
+"signal_path-6fcf7f.o" 5
-"signal_path-d74ce2.o" 0
+"signal_path-d74ce2.o" 7
-"signal_path-d6dbe4.o" 0
+"signal_path-d6dbe4.o" 7
 "signal_path-a30375.o" 0
-"signal_path-530a42.o" 0
+"signal_path-530a42.o" 7
-"signal_path-9c02ae.o" -2
+"signal_path-9c02ae.o" 5
-"signal_path-101f20.o" 0
+"signal_path-a72ab8.o" 0
 "signal_path.gvt.o" 0
--- a/simulation/Release/chesswork/signal_path.tof
+++ b/simulation/Release/chesswork/signal_path.tof
@@ -1,25 +1,25 @@
-// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
+// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
 // per defined called function, table of invoked intrinsic functions (excluding built-in operators):
-// int sig_init_buffer(BufferPtr *, int *, int, int)
+// int initialize_buffer(BufferPtr *, int *, int, int)
-// int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)
+// int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)
-// void sig_cirular_buffer_ptr_increment(BufferPtr *, int)
+// void increment_buffer(BufferPtr *, int)
 void *cyclic_add(void *, int, void *, int)
-// void sig_cirular_buffer_ptr_increment_DMB(BufferPtrDMB *, int)
+// void increment_buffert_DMB(BufferPtrDMB *, int)
 void *cyclic_add(void *, int, void *, int)
-// void sig_cirular_buffer_ptr_put_sample(BufferPtr *, int)
+// void write_buffer(BufferPtr *, int)
 void *cyclic_add(void *, int, void *, int)
-// void sig_cirular_buffer_ptr_put_sample_DMB(BufferPtrDMB chess_storage(DMB) *, int)
+// void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int)
 void *cyclic_add(void *, int, void *, int)
 // void sig_init_preemph_coef(SingleSignalPath *, double, double, double, double, double, int)
@@ -42,7 +42,7 @@ int rnd_saturate(accum_t)
 // void init(SingleSignalPath *, SingleSignalPath *, double *, double *, int, int, double, double, double, int)
-// void calc(SingleSignalPath *, SingleSignalPath *, OutputMode, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)
+// void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)
 accum_t to_accum(int)
 void *cyclic_add(void *, int, void *, int)
 accum_t fract_mult(int, int)
--- a/simulation/Release/main.#
+++ b/simulation/Release/main.#
@@ -1,2 +1,2 @@
-e4fc83ed9ae93d97a22c1d8f29c6c29bca7cf2bc
+1969daa2796df302809897d9d6fdf79d4f513044
 16eb5e4638293780f809bd1de8ff96feb0151a27
--- a/simulation/Release/main.o
+++ b/simulation/Release/main.o
--- a/simulation/Release/main.o.as
+++ b/simulation/Release/main.o.as
@@ -1,14 +1,14 @@
-// File generated by darts version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:27 2026
+// File generated by darts version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:31:49 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\darts.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -d -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 +Mhex +Ihex -g Release/main.o lpdsp32
 // Release: ipp X-2025.06
 .data_segment_name
-.bss local 4 _ZL16corrupted_signal DMA 144
+.bss local 4 _ZL17c_sensor_signal_t DMA 144
 .data_segment_name
-.bss local 4 _ZL22reference_noise_signal DMA 144
+.bss local 4 _ZL19acc_sensor_signal_t DMA 144
 .data_segment_name
 .bss local .at 8388608 _ZL10input_port DMB 8
@@ -34,14 +34,7 @@
 .bss local 2 _ZL6sample DMB 2
 .data_segment_name
-.data local 4 _ZZ4mainvE4mode DMA
+.rodata local 1 _ZL13__strdb58f936 DMA
 	0x2
 	0x0
 	0x0
 	0x0
 .data_segment_name
 .rodata local 1 _ZL13__str8a4fef85 DMA
 	0x2e
 	0x2f
 	0x73
@@ -69,14 +62,13 @@
 	0x78
 	0x5f
 	0x63
 	0x5f
 	0x73
 	0x65
 	0x6e
 	0x73
 	0x6f
 	0x72
 	0x72
 	0x75
 	0x70
 	0x74
 	0x65
 	0x64
 	0x5f
 	0x73
 	0x69
@@ -84,6 +76,8 @@
 	0x6e
 	0x61
 	0x6c
 	0x5f
 	0x74
 	0x2e
 	0x74
 	0x78
@@ -216,13 +210,11 @@
 	0xa
 	0x0
-.undef local data _main__end
+.undef local data _ZL17c_sensor_signal_t
-.undef local data _ZL16corrupted_signal
+.undef local data _ZL19acc_sensor_signal_t
-.undef local data _ZL22reference_noise_signal
+.undef local data _ZL13__strdb58f936
 .undef local data _ZL13__str8a4fef85
 .undef local data _ZL13__str00f02b8f
@@ -237,8 +229,6 @@
 .undef local data _ZL10input_port
 .undef local data _ZZ4mainvE4mode
 .undef local data _ZL11output_port
@@ -248,8 +238,6 @@
 .undef global data stdout
 .undef global data _main
 .data_segment_name
 .rodata.constmem global 8 _ro_data_DM_8___main__3 DM
 .label _ro_lbl_DM_8___main_0_0
@@ -283,245 +271,243 @@
 .text_segment_name
 .text global 2 _main
 .src_ref 0 "main.c" 28 first
-.src_ref 0 "main.c" 33 18
+.src_ref 0 "main.c" 31 18
-.src_ref 0 "main.c" 34 18
+.src_ref 0 "main.c" 32 18
 	/* 0x000000 0x6e000 */    bxl0 = [_ro_lbl_DM_8___main_0_0]
 	/* 0x000001 0x00012 */    /* MW */
 .src_ref 0 "main.c" 28 4
-.src_ref 0 "main.c" 33 24
+.src_ref 0 "main.c" 31 24
-.src_ref 0 "main.c" 33 28
+.src_ref 0 "main.c" 31 28
-.src_ref 0 "main.c" 33 32
+.src_ref 0 "main.c" 31 32
-.src_ref 0 "main.c" 33 36
+.src_ref 0 "main.c" 31 36
-.src_ref 0 "main.c" 34 24
+.src_ref 0 "main.c" 32 24
-.src_ref 0 "main.c" 34 28
+.src_ref 0 "main.c" 32 28
-.src_ref 0 "main.c" 34 32
+.src_ref 0 "main.c" 32 32
-.src_ref 0 "main.c" 34 36
+.src_ref 0 "main.c" 32 36
 	/* 0x000002 0x5c000 */    ax1 = 0; sp+= -0x78
 	/* 0x000003 0xabf10 */    /* MW */
-.src_ref 0 "main.c" 38 4
+.src_ref 0 "main.c" 37 4
 	/* 0x000004 0x5c00a */    ra1 = 2; a2 = sp + 0x20
 	/* 0x000005 0xa4102 */    /* MW */
-.src_ref 0 "main.c" 38 4
+.src_ref 0 "main.c" 37 4
 	/* 0x000006 0x5c103 */    rb0 = 64; a3 = sp + 0x48
 	/* 0x000007 0x24243 */    /* MW */
-.src_ref 0 "main.c" 33 18 first
+.src_ref 0 "main.c" 31 18 first
-.src_ref 0 "main.c" 38 4
+.src_ref 0 "main.c" 37 4
 	/* 0x000008 0x5c00a */    ra0 = 2; a2[0x0] = bhl0
 	/* 0x000009 0x0d07a */    /* MW */
-.src_ref 0 "main.c" 34 18 first
+.src_ref 0 "main.c" 32 18 first
 	/* 0x00000a 0x8d87a */    a3[0x0] = bhl0
-.src_ref 0 "main.c" 33 24 first
+.src_ref 0 "main.c" 31 24 first
 	/* 0x00000b 0x90559 */    sp[0x28] = ahl1
-.src_ref 0 "main.c" 34 24 first
+.src_ref 0 "main.c" 32 24 first
 	/* 0x00000c 0x90a59 */    sp[0x50] = ahl1
-.src_ref 0 "main.c" 33 28 first
+.src_ref 0 "main.c" 31 28 first
 	/* 0x00000d 0x90659 */    sp[0x30] = ahl1
-.src_ref 0 "main.c" 34 28 first
+.src_ref 0 "main.c" 32 28 first
 	/* 0x00000e 0x90b59 */    sp[0x58] = ahl1
-.src_ref 0 "main.c" 33 32 first
+.src_ref 0 "main.c" 31 32 first
 	/* 0x00000f 0x90759 */    sp[0x38] = ahl1
-.src_ref 0 "main.c" 34 32 first
+.src_ref 0 "main.c" 32 32 first
 	/* 0x000010 0x90c59 */    sp[0x60] = ahl1
-.src_ref 0 "main.c" 33 36 first
+.src_ref 0 "main.c" 31 36 first
 	/* 0x000011 0x90859 */    sp[0x40] = ahl1
-.src_ref 0 "main.c" 34 36 first
+.src_ref 0 "main.c" 32 36 first
 	/* 0x000012 0x40000 */    nop; sp[0x68] = ahl1
 	/* 0x000013 0x10d59 */    /* MW */
-.src_ref 0 "main.c" 38 4
+.src_ref 0 "main.c" 37 4
-	/* 0x000014 0x68000 */    a0 = _ZL16corrupted_signal
+	/* 0x000014 0x68000 */    a0 = _ZL17c_sensor_signal_t
 	/* 0x000015 0x00020 */    /* MW */
-.src_ref 0 "main.c" 38 4
+.src_ref 0 "main.c" 37 4
 	/* 0x000016 0x6e000 */    axl1 = [(_ro_lbl_DM_8___main_8_1 + 0)]
 	/* 0x000017 0x00411 */    /* MW */
-.src_ref 0 "main.c" 38 4
+.src_ref 0 "main.c" 37 4
 	/* 0x000018 0x6e000 */    bxl0 = [(_ro_lbl_DM_8___main_16_2 + 0)]
 	/* 0x000019 0x00812 */    /* MW */
-.src_ref 0 "main.c" 38 4
+.src_ref 0 "main.c" 37 4
 	/* 0x00001a 0x55004 */    ax0 = ax1 + 0x0; sp[0x8] = lr
 	/* 0x00001b 0x08176 */    /* MW */
-.src_ref 0 "main.c" 38 4
+.src_ref 0 "main.c" 37 4
-	/* 0x00001c 0x68000 */    a1 = _ZL22reference_noise_signal
+	/* 0x00001c 0x68000 */    a1 = _ZL19acc_sensor_signal_t
 	/* 0x00001d 0x00021 */    /* MW */
-.src_ref 0 "main.c" 38 4 first
+.src_ref 0 "main.c" 37 4 first
 	/* 0x00001e 0x66000 */    call _Z4initP16SingleSignalPathS0_PdS1_iidddi
 	/* 0x00001f 0x00000 */    /* MW */
-.src_ref 0 "main.c" 50 16
+.src_ref 0 "main.c" 49 16
-	/* 0x000020 0x68000 */    a1 = _ZL13__str8a4fef85
+	/* 0x000020 0x68000 */    a1 = _ZL13__strdb58f936
 	/* 0x000021 0x00021 */    /* MW */
-.src_ref 0 "main.c" 50 16
+.src_ref 0 "main.c" 49 16
 	/* 0x000022 0x68000 */    a2 = _ZL13__str00f02b8f
 	/* 0x000023 0x00022 */    /* MW */
-.src_ref 0 "main.c" 50 16 first
+.src_ref 0 "main.c" 49 16 first
 	/* 0x000024 0x66000 */    call fopen
 	/* 0x000025 0x00000 */    /* MW */
 	/* 0x000026 0x88260 */    sp[0x10] = a0
-.src_ref 0 "main.c" 51 16
+.src_ref 0 "main.c" 50 16
 	/* 0x000027 0x68000 */    a1 = _ZL13__strff0646f3
 	/* 0x000028 0x00021 */    /* MW */
-.src_ref 0 "main.c" 51 16
+.src_ref 0 "main.c" 50 16
 	/* 0x000029 0x68000 */    a2 = _ZL13__str00f02b8f
 	/* 0x00002a 0x00022 */    /* MW */
-.src_ref 0 "main.c" 51 16 first
+.src_ref 0 "main.c" 50 16 first
 	/* 0x00002b 0x66000 */    call fopen
 	/* 0x00002c 0x00000 */    /* MW */
 	/* 0x00002d 0x881e0 */    sp[0xc] = a0
-.src_ref 0 "main.c" 52 16
+.src_ref 0 "main.c" 51 16
 	/* 0x00002e 0x68000 */    a1 = _ZL13__str8a32ec0e
 	/* 0x00002f 0x00021 */    /* MW */
-.src_ref 0 "main.c" 52 16
+.src_ref 0 "main.c" 51 16
 	/* 0x000030 0x68000 */    a2 = _ZL13__str00f52cca
 	/* 0x000031 0x00022 */    /* MW */
-.src_ref 0 "main.c" 52 16 first
+.src_ref 0 "main.c" 51 16 first
 	/* 0x000032 0x66000 */    call fopen
 	/* 0x000033 0x00000 */    /* MW */
 	/* 0x000034 0x882e0 */    sp[0x14] = a0
 	/* 0x000035 0x00000 */    nop
-.src_ref 0 "main.c" 56 4
+.src_ref 0 "main.c" 55 4
 	/* 0x000036 0x88220 */    a0 = sp[0x10]
-.src_ref 0 "main.c" 56 4 first
+.src_ref 0 "main.c" 55 4 first
 	/* 0x000037 0x66000 */    call feof
 	/* 0x000038 0x00000 */    /* MW */
-.src_ref 0 "main.c" 56 4
+.src_ref 0 "main.c" 55 4
 	/* 0x000039 0x32020 */    cmp(ra0,0x0)
-.src_ref 0 "main.c" 56 4
+.src_ref 0 "main.c" 55 4
-	/* 0x00003a 0xbc4f1 */    if (nz) jps 0x4f
+	/* 0x00003a 0xbc4d1 */    if (nz) jps 0x4d
-.src_ref 0 "main.c" 56 4
+.src_ref 0 "main.c" 55 4
 	/* 0x00003b 0x881a0 */    a0 = sp[0xc]
-.src_ref 0 "main.c" 56 4
+.src_ref 0 "main.c" 55 4
 	/* 0x00003c 0x66000 */    call feof
 	/* 0x00003d 0x00000 */    /* MW */
-.src_ref 0 "main.c" 56 4
+.src_ref 0 "main.c" 55 4
 	/* 0x00003e 0x32020 */    cmp(ra0,0x0)
-.src_ref 0 "main.c" 56 4
+.src_ref 0 "main.c" 55 4
-.src_ref 0 "main.c" 56 4
+.src_ref 0 "main.c" 55 4
-	/* 0x00003f 0xbc4a1 */    if (nz) jps 0x4a
+	/* 0x00003f 0xbc481 */    if (nz) jps 0x48
 	/* 0x000040 0x68200 */    a1 = -0x800000
 	/* 0x000041 0x00021 */    /* MW */
 	/* 0x000042 0x88361 */    sp[0x18] = a1
 	/* 0x000043 0xa4381 */    a1 = sp + 0x70
-.src_ref 0 "main.c" 58 12
+.src_ref 0 "main.c" 57 12
 	/* 0x000044 0x88220 */    a0 = sp[0x10]
 	/* 0x000045 0x88061 */    sp[0x0] = a1
-.src_ref 0 "main.c" 58 12
+.src_ref 0 "main.c" 57 12
 	/* 0x000046 0x68000 */    a1 = _ZL13__str41232700
 	/* 0x000047 0x00021 */    /* MW */
-.src_ref 0 "main.c" 58 12 first
+.src_ref 0 "main.c" 57 12 first
 	/* 0x000048 0x66000 */    call fscanf
 	/* 0x000049 0x00000 */    /* MW */
 	/* 0x00004a 0xa43a0 */    a0 = sp + 0x74
 	/* 0x00004b 0x88060 */    sp[0x0] = a0
-.src_ref 0 "main.c" 59 12
+.src_ref 0 "main.c" 58 12
 	/* 0x00004c 0x68000 */    a1 = _ZL13__str41232700
 	/* 0x00004d 0x00021 */    /* MW */
-.src_ref 0 "main.c" 59 12
+.src_ref 0 "main.c" 58 12
 	/* 0x00004e 0x40000 */    nop; a0 = sp[0xc]
 	/* 0x00004f 0x081a0 */    /* MW */
-.src_ref 0 "main.c" 59 12 first
+.src_ref 0 "main.c" 58 12 first
 	/* 0x000050 0x66000 */    call fscanf
 	/* 0x000051 0x00000 */    /* MW */
 	/* 0x000052 0x68200 */    a1 = -0x7ffff0
 	/* 0x000053 0x00421 */    /* MW */
 .src_ref 0 "main.c" 59 22
 .src_ref 0 "main.c" 59 28
 .src_ref 0 "main.c" 60 22
-.src_ref 0 "main.c" 60 28
+.src_ref 0 "main.c" 60 30
 .src_ref 0 "main.c" 61 22
 .src_ref 0 "main.c" 61 30
 	/* 0x000054 0x5c808 */    c0 = 2; sp[0x0] = a1
 	/* 0x000055 0x08061 */    /* MW */
-.src_ref 0 "main.c" 63 8
+.src_ref 0 "main.c" 62 8
-	/* 0x000056 0x68000 */    a1 = _ZL22reference_noise_signal
+	/* 0x000056 0x68000 */    a1 = _ZL19acc_sensor_signal_t
 	/* 0x000057 0x00021 */    /* MW */
-.src_ref 0 "main.c" 60 22
+.src_ref 0 "main.c" 59 22
-.src_ref 0 "main.c" 60 28
+.src_ref 0 "main.c" 59 28
-.src_ref 0 "main.c" 63 8
+.src_ref 0 "main.c" 62 8
 	/* 0x000058 0x88320 */    a0 = sp[0x18]
-.src_ref 0 "main.c" 60 38 first
+.src_ref 0 "main.c" 59 38 first
 	/* 0x000059 0x88e01 */    axs1 = sp[0x70]
-.src_ref 0 "main.c" 63 8
+.src_ref 0 "main.c" 62 8
 	/* 0x00005a 0xa0004 */    a4 = a0 + 0x0
-.src_ref 0 "main.c" 60 22
+.src_ref 0 "main.c" 59 22
-.src_ref 0 "main.c" 60 28
+.src_ref 0 "main.c" 59 28
 	/* 0x00005b 0x94051 */    [a0+c0] = axs1.s
-.src_ref 0 "main.c" 63 8
+.src_ref 0 "main.c" 62 8
 	/* 0x00005c 0xa0005 */    a5 = a0 + 0x0
-.src_ref 0 "main.c" 61 40 first
+.src_ref 0 "main.c" 60 40 first
 	/* 0x00005d 0x88e81 */    axs1 = sp[0x74]
-.src_ref 0 "main.c" 61 22
+.src_ref 0 "main.c" 60 22
-.src_ref 0 "main.c" 61 30
+.src_ref 0 "main.c" 60 30
 	/* 0x00005e 0x94251 */    [a0-c0] = axs1.s
 	/* 0x00005f 0x88360 */    sp[0x18] = a0
-.src_ref 0 "main.c" 63 8
+.src_ref 0 "main.c" 62 8
-	/* 0x000060 0x68000 */    a0 = _ZL16corrupted_signal
+	/* 0x000060 0x68000 */    a0 = _ZL17c_sensor_signal_t
 	/* 0x000061 0x00020 */    /* MW */
-.src_ref 0 "main.c" 63 8 first
+.src_ref 0 "main.c" 62 8 first
-	/* 0x000062 0x66000 */    calldb _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
+	/* 0x000062 0x66000 */    call _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_
-	/* 0x000063 0x00008 */    /* MW */
+	/* 0x000063 0x00000 */    /* MW */
-	/* 0x000064 0x6c000 */    ra0 = [_ZZ4mainvE4mode]
+.src_ref 0 "main.c" 65 44 first
-	/* 0x000065 0x00008 */    /* MW */
+	/* 0x000064 0x6e400 */    ra0.s = [0x800010]
-.src_ref 0 "main.c" 66 44 first
+	/* 0x000065 0x00834 */    /* MW */
-	/* 0x000066 0x6e400 */    ra0.s = [0x800010]
+	/* 0x000066 0x88048 */    sp[0x0] = ra0
-	/* 0x000067 0x00834 */    /* MW */
+.src_ref 0 "main.c" 65 12
-	/* 0x000068 0x88048 */    sp[0x0] = ra0
+	/* 0x000067 0x68000 */    a1 = _ZL13__str2eb09b76
-.src_ref 0 "main.c" 66 12
+	/* 0x000068 0x00021 */    /* MW */
-	/* 0x000069 0x68000 */    a1 = _ZL13__str2eb09b76
+.src_ref 0 "main.c" 65 12
-	/* 0x00006a 0x00021 */    /* MW */
+	/* 0x000069 0x882a0 */    a0 = sp[0x14]
-.src_ref 0 "main.c" 66 12
+.src_ref 0 "main.c" 65 12
-	/* 0x00006b 0x882a0 */    a0 = sp[0x14]
+	/* 0x00006a 0x66000 */    call fprintf
-.src_ref 0 "main.c" 66 12
+	/* 0x00006b 0x00000 */    /* MW */
-	/* 0x00006c 0x66000 */    call fprintf
+.src_ref 0 "main.c" 55 13
-	/* 0x00006d 0x00000 */    /* MW */
+	/* 0x00006c 0x40000 */    nop; a0 = sp[0x10]
-.src_ref 0 "main.c" 56 13
+	/* 0x00006d 0x08220 */    /* MW */
-	/* 0x00006e 0x40000 */    nop; a0 = sp[0x10]
+.src_ref 0 "main.c" 55 13 first
-	/* 0x00006f 0x08220 */    /* MW */
+	/* 0x00006e 0x66000 */    call feof
-.src_ref 0 "main.c" 56 13 first
+	/* 0x00006f 0x00000 */    /* MW */
-	/* 0x000070 0x66000 */    call feof
+.src_ref 0 "main.c" 55 23
-	/* 0x000071 0x00000 */    /* MW */
+.src_ref 0 "main.c" 57 12
-.src_ref 0 "main.c" 56 23
+.src_ref 0 "main.c" 68 4
-.src_ref 0 "main.c" 58 12
+	/* 0x000070 0x59010 */    cmp(ra0,0x0); a0 = sp[0x10]
 	/* 0x000071 0x08220 */    /* MW */
 .src_ref 0 "main.c" 55 23
 	/* 0x000072 0x42040 */    if (nz) jps 0x8; a1 = sp + 0x70
 	/* 0x000073 0xa4381 */    /* MW */
 .src_ref 0 "main.c" 55 26
 	/* 0x000074 0x40000 */    nop; a0 = sp[0xc]
 	/* 0x000075 0x081a0 */    /* MW */
 .src_ref 0 "main.c" 55 26
 	/* 0x000076 0x66000 */    call feof
 	/* 0x000077 0x00000 */    /* MW */
 .src_ref 0 "main.c" 55 23
 .src_ref 0 "main.c" 57 12
 .src_ref 0 "main.c" 68 4
 	/* 0x000078 0x59010 */    cmp(ra0,0x0); a0 = sp[0x10]
 	/* 0x000079 0x08220 */    /* MW */
 .src_ref 0 "main.c" 55 4
 .src_ref 0 "main.c" 55 23
 	/* 0x00007a 0x43e48 */    if (z) jps -0x37; a1 = sp + 0x70
 	/* 0x00007b 0x24381 */    /* MW */
 .src_ref 0 "main.c" 68 4 first
 	/* 0x00007c 0x66000 */    call fclose
 	/* 0x00007d 0x00000 */    /* MW */
 .src_ref 0 "main.c" 69 4
-	/* 0x000072 0x59010 */    cmp(ra0,0x0); a0 = sp[0x10]
+	/* 0x00007e 0x881a0 */    a0 = sp[0xc]
 	/* 0x000073 0x08220 */    /* MW */
 .src_ref 0 "main.c" 56 23
 	/* 0x000074 0x42040 */    if (nz) jps 0x8; a1 = sp + 0x70
 	/* 0x000075 0xa4381 */    /* MW */
 .src_ref 0 "main.c" 56 26
 	/* 0x000076 0x40000 */    nop; a0 = sp[0xc]
 	/* 0x000077 0x081a0 */    /* MW */
 .src_ref 0 "main.c" 56 26
 	/* 0x000078 0x66000 */    call feof
 	/* 0x000079 0x00000 */    /* MW */
 .src_ref 0 "main.c" 56 23
 .src_ref 0 "main.c" 58 12
 .src_ref 0 "main.c" 69 4
 	/* 0x00007a 0x59010 */    cmp(ra0,0x0); a0 = sp[0x10]
 	/* 0x00007b 0x08220 */    /* MW */
 .src_ref 0 "main.c" 56 4
 .src_ref 0 "main.c" 56 23
 	/* 0x00007c 0x43e38 */    if (z) jps -0x39; a1 = sp + 0x70
 	/* 0x00007d 0x24381 */    /* MW */
 .src_ref 0 "main.c" 69 4 first
-	/* 0x00007e 0x66000 */    call fclose
+	/* 0x00007f 0x66000 */    call fclose
-	/* 0x00007f 0x00000 */    /* MW */
+	/* 0x000080 0x00000 */    /* MW */
 .src_ref 0 "main.c" 70 4
-	/* 0x000080 0x881a0 */    a0 = sp[0xc]
+	/* 0x000081 0x882a0 */    a0 = sp[0x14]
 .src_ref 0 "main.c" 70 4 first
-	/* 0x000081 0x66000 */    call fclose
+	/* 0x000082 0x66000 */    call fclose
-	/* 0x000082 0x00000 */    /* MW */
+	/* 0x000083 0x00000 */    /* MW */
-.src_ref 0 "main.c" 71 4
+.src_ref 0 "main.c" 71
-	/* 0x000083 0x882a0 */    a0 = sp[0x14]
+	/* 0x000084 0x5c002 */    ra0 = 0; lr = sp[0x8]
-.src_ref 0 "main.c" 71 4 first
+	/* 0x000085 0x08136 */    /* MW */
-	/* 0x000084 0x66000 */    call fclose
+.src_ref 0 "main.c" 71 first
-	/* 0x000085 0x00000 */    /* MW */
+.src_ref 0 "main.c" 71 first
-.src_ref 0 "main.c" 72
+	/* 0x000086 0x460a0 */    ret; sp+= 0x78
-	/* 0x000086 0x5c002 */    ra0 = 0; lr = sp[0x8]
+	/* 0x000087 0x280f0 */    /* MW */
 	/* 0x000087 0x08136 */    /* MW */
 .src_ref 0 "main.c" 72 first
 .src_ref 0 "main.c" 72 first
 	/* 0x000088 0x460a0 */    ret; sp+= 0x78
 	/* 0x000089 0x280f0 */    /* MW */
 .label _main__end last
-.src_ref 0 "main.c" 69 4
+.src_ref 0 "main.c" 68 4
-	/* 0x00008a 0x43f93 */    jps -0xe; a0 = sp[0x10]
+	/* 0x000088 0x43f93 */    jps -0xe; a0 = sp[0x10]
-	/* 0x00008b 0x88220 */    /* MW */
+	/* 0x000089 0x88220 */    /* MW */
 .undef global text _Z4initP16SingleSignalPathS0_PdS1_iidddi
@@ -531,7 +517,7 @@
 .undef global text fscanf
-.undef global text _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_
+.undef global text _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_
 .undef global text fprintf
--- a/simulation/Release/signal_path.#
+++ b/simulation/Release/signal_path.#
@@ -1,2 +1,2 @@
-de8a7891062042bbd6065913c0b229e104d0f002
+e8482bcb4023ecb746c8bd0ceb3440ff47952b54
 16eb5e4638293780f809bd1de8ff96feb0151a27
--- a/simulation/Release/signal_path.o
+++ b/simulation/Release/signal_path.o
--- a/simulation/Release/signal_path.o.as
+++ b/simulation/Release/signal_path.o.as
--- a/simulation/Release/simulation
+++ b/simulation/Release/simulation
--- a/simulation/Release/simulation.as
+++ b/simulation/Release/simulation.as
--- a/simulation/Release/simulation.cmic2
+++ b/simulation/Release/simulation.cmic2
--- a/simulation/Release/simulation.map
+++ b/simulation/Release/simulation.map
@@ -1,5 +1,5 @@
-// File generated by bridge version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:59 2026
+// File generated by bridge version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
 // Copyright 2014-2025 Synopsys, Inc. All rights reserved.
 // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\bridge.exe -oRelease/simulation Release/main.o Release/signal_path.o -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -g -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -cC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/lpdsp32.bcf -LC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -LC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib -LC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib -llpdsp32 -lc -lsoftfloat -lm -a2 -m -fH +work Release/chesswork -plpdsp32
@@ -10,32 +10,31 @@ Memory map for memory 'DM':
    Size   = 16777216
    Width  = 8 bits
    Offset = 0
-    Used   = 10283
+    Used   = 10280
    0x00000001..0x00000002 : Occupied in alias or record memory 'DMA' by symbol '_ZL13__str00f02b8f'
-    0x00000004..0x00000093 : Occupied in alias or record memory 'DMA' by symbol '_ZL16corrupted_signal'
+    0x00000004..0x00000093 : Occupied in alias or record memory 'DMA' by symbol '_ZL17c_sensor_signal_t'
-    0x00000094..0x00000123 : Occupied in alias or record memory 'DMA' by symbol '_ZL22reference_noise_signal'
+    0x00000094..0x00000123 : Occupied in alias or record memory 'DMA' by symbol '_ZL19acc_sensor_signal_t'
-    0x00000124..0x00000127 : Occupied in alias or record memory 'DMA' by symbol '_ZZ4mainvE4mode'
+    0x00000124..0x00000153 : Occupied in alias or record memory 'DMA' by symbol '_ZL13__strdb58f936'
-    0x00000128..0x00000156 : Occupied in alias or record memory 'DMA' by symbol '_ZL13__str8a4fef85'
+    0x00000154..0x0000017e : Occupied in alias or record memory 'DMA' by symbol '_ZL13__strff0646f3'
-    0x00000157..0x00000181 : Occupied in alias or record memory 'DMA' by symbol '_ZL13__strff0646f3'
+    0x0000017f..0x000001b4 : Occupied in alias or record memory 'DMA' by symbol '_ZL13__str8a32ec0e'
-    0x00000182..0x000001b7 : Occupied in alias or record memory 'DMA' by symbol '_ZL13__str8a32ec0e'
+    0x000001b5..0x000001b6 : Occupied in alias or record memory 'DMA' by symbol '_ZL13__str00f52cca'
-    0x000001b8..0x000001b9 : Occupied in alias or record memory 'DMA' by symbol '_ZL13__str00f52cca'
+    0x000001b7..0x000001b9 : Occupied in alias or record memory 'DMA' by symbol '_ZL13__str41232700'
-    0x000001ba..0x000001bc : Occupied in alias or record memory 'DMA' by symbol '_ZL13__str41232700'
+    0x000001ba..0x000001bd : Occupied in alias or record memory 'DMA' by symbol '_ZL13__str2eb09b76'
-    0x000001bd..0x000001c0 : Occupied in alias or record memory 'DMA' by symbol '_ZL13__str2eb09b76'
+    0x000001c0..0x000001d7 (        24 items) : Release/main.o::_ro_data_DM_8___main__3 (Data, Global, .rodata.constmem.DM)
-    0x000001c4..0x000001c7 : Occupied in alias or record memory 'DMA' by symbol '_ZL2mu'
+    0x000001d8..0x000001db : Occupied in alias or record memory 'DMA' by symbol '_ZL2mu'
-    0x000001c8..0x000001df (        24 items) : Release/main.o::_ro_data_DM_8___main__3 (Data, Global, .rodata.constmem.DM)
+    0x000001dc..0x000001df : Occupied in alias or record memory 'DMA' by symbol '_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32'
-    0x000001e0..0x000001e3 : Occupied in alias or record memory 'DMA' by symbol '_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre'
+    0x000001e0..0x000001e3 : Occupied in alias or record memory 'DMA' by symbol '_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32'
-    0x000001e4..0x000001e7 : Occupied in alias or record memory 'DMA' by symbol '_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre'
+    0x000001e4..0x000001e7 : Occupied in alias or record memory 'DMA' by symbol '_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre'
-    0x000001e8..0x000001eb : Occupied in alias or record memory 'DMA' by symbol '_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32'
+    0x000001e8..0x000001eb : Occupied in alias or record memory 'DMA' by symbol '_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre'
-    0x000001ec..0x000001ef : Occupied in alias or record memory 'DMA' by symbol '_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32'
+    0x000001ec..0x000001f7 : Occupied in alias or record memory 'DMA' by symbol 'pointer_filter_coefficients'
-    0x000001f0..0x000001fb : Occupied in alias or record memory 'DMA' by symbol 'ptr_fir_lms_coeffs'
+    0x000001f8..0x000002f7 : Occupied in alias or record memory 'DMA' by symbol 'filter_coefficients'
-    0x000001fc..0x000001ff : Occupied in alias or record memory 'DMA' by symbol 'errno'
+    0x000002f8..0x00000307 (        16 items) : Release/signal_path.o::_ro_data_DM_8___Z21sig_init_preemph_coefP16SingleSignalPathdddddi__2 (Data, Global, .rodata.constmem.DM)
-    0x00000200..0x000002ff : Occupied in alias or record memory 'DMA' by symbol 'fir_lms_coeffs'
+    0x00000308..0x00000317 (        16 items) : Release/signal_path.o::_ro_data_DM_8___Z15sig_init_weightP16SingleSignalPathdi__2 (Data, Global, .rodata.constmem.DM)
-    0x00000300..0x0000030f (        16 items) : Release/signal_path.o::_ro_data_DM_8___Z21sig_init_preemph_coefP16SingleSignalPathdddddi__2 (Data, Global, .rodata.constmem.DM)
+    0x00000318..0x0000031f (         8 items) : Release/signal_path.o::_ro_data_DM_8___Z4initP16SingleSignalPathS0_PdS1_iidddi__1 (Data, Global, .rodata.constmem.DM)
-    0x00000310..0x0000031f (        16 items) : Release/signal_path.o::_ro_data_DM_8___Z15sig_init_weightP16SingleSignalPathdi__2 (Data, Global, .rodata.constmem.DM)
+    0x00000320..0x0000041f : Occupied in alias or record memory 'DMA' by symbol '_main_argv_area'
-    0x00000320..0x00000327 (         8 items) : Release/signal_path.o::_ro_data_DM_8___Z4initP16SingleSignalPathS0_PdS1_iidddi__1 (Data, Global, .rodata.constmem.DM)
+    0x00000420..0x00000423 : Occupied in alias or record memory 'DMA' by symbol 'errno'
-    0x00000328..0x00000427 : Occupied in alias or record memory 'DMA' by symbol '_main_argv_area'
+    0x00000424..0x000004a3 : Occupied in alias or record memory 'DMA' by symbol '_ZL18_hosted_clib_files'
    0x00000428..0x000004a7 : Occupied in alias or record memory 'DMA' by symbol '_ZL18_hosted_clib_files'
    0x000004a8..0x000004b7 (        16 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ro_data_DM_8___ZL18estimateDiv128To64yyy__2 (Data, Local, .rodata.constmem.DM)
    0x000004b8..0x000004c7 (        16 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ro_data_DM_8___ZL19propagateFloat64NaNyy__2 (Data, Local, .rodata.constmem.DM)
    0x000004c8..0x000004cf (         8 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ro_data_DM_8___ZL19roundAndPackFloat64iiy__1 (Data, Local, .rodata.constmem.DM)
@@ -59,39 +58,38 @@ Memory map for memory 'DM':
    0x00000710..0x00000717 (         8 items) : math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)::_ro_data_DM_8__ff_sqrt__6 (Data, Global, .rodata.constmem.DM)
    0x0000e000..0x0000fff7 (      8184 items) : Stack
    0x00800000..0x00800007 : Occupied in alias or record memory 'DMB' by symbol '_ZL10input_port'
-    0x00800008..0x0080000b : Occupied in alias or record memory 'DMB' by symbol '_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt'
+    0x00800008..0x0080000b : Occupied in alias or record memory 'DMB' by symbol '_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator'
-    0x0080000c..0x0080000f : Occupied in alias or record memory 'DMB' by symbol '_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32'
+    0x0080000c..0x0080000f : Occupied in alias or record memory 'DMB' by symbol '_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32'
    0x00800010..0x00800017 : Occupied in alias or record memory 'DMB' by symbol '_ZL11output_port'
-    0x00800018..0x00800117 : Occupied in alias or record memory 'DMB' by symbol 'fir_lms_delay_line'
+    0x00800018..0x00800117 : Occupied in alias or record memory 'DMB' by symbol 'delay_line'
-    0x00800118..0x00800123 : Occupied in alias or record memory 'DMB' by symbol 'ptr_fir_lms_delay_line'
+    0x00800118..0x00800123 : Occupied in alias or record memory 'DMB' by symbol 'pointer_delay_line'
 Memory map for memory 'DMA':
    Size   = 8388608
    Width  = 8 bits
    Offset = 0
-    Used   = 9355
+    Used   = 9352
    0x00000001..0x00000002 (         2 items) : Release/main.o::_ZL13__str00f02b8f (Data, Local, .rodata.DMA.1)
-    0x00000004..0x00000093 (       144 items) : Release/main.o::_ZL16corrupted_signal (Data, Local, .bss.DMA.4)
+    0x00000004..0x00000093 (       144 items) : Release/main.o::_ZL17c_sensor_signal_t (Data, Local, .bss.DMA.4)
-    0x00000094..0x00000123 (       144 items) : Release/main.o::_ZL22reference_noise_signal (Data, Local, .bss.DMA.4)
+    0x00000094..0x00000123 (       144 items) : Release/main.o::_ZL19acc_sensor_signal_t (Data, Local, .bss.DMA.4)
-    0x00000124..0x00000127 (         4 items) : Release/main.o::_ZZ4mainvE4mode (Data, Local, .data.DMA.4)
+    0x00000124..0x00000153 (        48 items) : Release/main.o::_ZL13__strdb58f936 (Data, Local, .rodata.DMA.1)
-    0x00000128..0x00000156 (        47 items) : Release/main.o::_ZL13__str8a4fef85 (Data, Local, .rodata.DMA.1)
+    0x00000154..0x0000017e (        43 items) : Release/main.o::_ZL13__strff0646f3 (Data, Local, .rodata.DMA.1)
-    0x00000157..0x00000181 (        43 items) : Release/main.o::_ZL13__strff0646f3 (Data, Local, .rodata.DMA.1)
+    0x0000017f..0x000001b4 (        54 items) : Release/main.o::_ZL13__str8a32ec0e (Data, Local, .rodata.DMA.1)
-    0x00000182..0x000001b7 (        54 items) : Release/main.o::_ZL13__str8a32ec0e (Data, Local, .rodata.DMA.1)
+    0x000001b5..0x000001b6 (         2 items) : Release/main.o::_ZL13__str00f52cca (Data, Local, .rodata.DMA.1)
-    0x000001b8..0x000001b9 (         2 items) : Release/main.o::_ZL13__str00f52cca (Data, Local, .rodata.DMA.1)
+    0x000001b7..0x000001b9 (         3 items) : Release/main.o::_ZL13__str41232700 (Data, Local, .rodata.DMA.1)
-    0x000001ba..0x000001bc (         3 items) : Release/main.o::_ZL13__str41232700 (Data, Local, .rodata.DMA.1)
+    0x000001ba..0x000001bd (         4 items) : Release/main.o::_ZL13__str2eb09b76 (Data, Local, .rodata.DMA.1)
-    0x000001bd..0x000001c0 (         4 items) : Release/main.o::_ZL13__str2eb09b76 (Data, Local, .rodata.DMA.1)
+    0x000001d8..0x000001db (         4 items) : Release/signal_path.o::_ZL2mu (Data, Local, .bss.DMA.4)
-    0x000001c4..0x000001c7 (         4 items) : Release/signal_path.o::_ZL2mu (Data, Local, .bss.DMA.4)
+    0x000001dc..0x000001df (         4 items) : Release/signal_path.o::_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32 (Data, Local, .bss.DMA.4)
-    0x000001e0..0x000001e3 (         4 items) : Release/signal_path.o::_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre (Data, Local, .bss.DMA.4)
+    0x000001e0..0x000001e3 (         4 items) : Release/signal_path.o::_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32 (Data, Local, .bss.DMA.4)
-    0x000001e4..0x000001e7 (         4 items) : Release/signal_path.o::_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre (Data, Local, .bss.DMA.4)
+    0x000001e4..0x000001e7 (         4 items) : Release/signal_path.o::_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre (Data, Local, .bss.DMA.4)
-    0x000001e8..0x000001eb (         4 items) : Release/signal_path.o::_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32 (Data, Local, .bss.DMA.4)
+    0x000001e8..0x000001eb (         4 items) : Release/signal_path.o::_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre (Data, Local, .bss.DMA.4)
-    0x000001ec..0x000001ef (         4 items) : Release/signal_path.o::_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32 (Data, Local, .bss.DMA.4)
+    0x000001ec..0x000001f7 (        12 items) : Release/signal_path.o::pointer_filter_coefficients (Data, Global, .bss.DMA.4)
-    0x000001f0..0x000001fb (        12 items) : Release/signal_path.o::ptr_fir_lms_coeffs (Data, Global, .bss.DMA.4)
+    0x000001f8..0x000002f7 (       256 items) : Release/signal_path.o::filter_coefficients (Data, Global, .bss.DMA.8)
-    0x000001fc..0x000001ff (         4 items) : errno.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::errno (Data, Global, .bss.DMA.4)
+    0x00000320..0x0000041f (       256 items) : lpdsp32_init.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/liblpdsp32.a)::_main_argv_area (Data, Global, .bss.DMA.0)
-    0x00000200..0x000002ff (       256 items) : Release/signal_path.o::fir_lms_coeffs (Data, Global, .bss.DMA.8)
+    0x00000420..0x00000423 (         4 items) : errno.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::errno (Data, Global, .bss.DMA.4)
-    0x00000328..0x00000427 (       256 items) : lpdsp32_init.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/liblpdsp32.a)::_main_argv_area (Data, Global, .bss.DMA.0)
+    0x00000424..0x000004a3 (       128 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::_ZL18_hosted_clib_files (Data, Local, .bss.DMA.4)
    0x00000428..0x000004a7 (       128 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::_ZL18_hosted_clib_files (Data, Local, .bss.DMA.4)
    0x00000558..0x00000567 (        16 items) : math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)::_ZZ6ff_powddE2bp (Data, Local, .rodata.DMA.8)
    0x00000568..0x00000577 (        16 items) : math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)::_ZZ6ff_powddE4dp_h (Data, Local, .rodata.DMA.8)
    0x00000578..0x00000587 (        16 items) : math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)::_ZZ6ff_powddE4dp_l (Data, Local, .rodata.DMA.8)
@@ -105,55 +103,55 @@ Memory map for memory 'DMB':
    Used   = 292
    0x00800000..0x00800007 (         8 items) : Release/main.o::_ZL10input_port (Data, Local, .bss.DMB.2)
-    0x00800008..0x0080000b (         4 items) : Release/signal_path.o::_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt (Data, Local, .bss.DMB.4)
+    0x00800008..0x0080000b (         4 items) : Release/signal_path.o::_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator (Data, Local, .bss.DMB.4)
-    0x0080000c..0x0080000f (         4 items) : Release/signal_path.o::_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 (Data, Local, .bss.DMB.4)
+    0x0080000c..0x0080000f (         4 items) : Release/signal_path.o::_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32 (Data, Local, .bss.DMB.4)
    0x00800010..0x00800017 (         8 items) : Release/main.o::_ZL11output_port (Data, Local, .bss.DMB.2)
-    0x00800018..0x00800117 (       256 items) : Release/signal_path.o::fir_lms_delay_line (Data, Global, .bss.DMB.4)
+    0x00800018..0x00800117 (       256 items) : Release/signal_path.o::delay_line (Data, Global, .bss.DMB.4)
-    0x00800118..0x00800123 (        12 items) : Release/signal_path.o::ptr_fir_lms_delay_line (Data, Global, .bss.DMB.4)
+    0x00800118..0x00800123 (        12 items) : Release/signal_path.o::pointer_delay_line (Data, Global, .bss.DMB.4)
 Memory map for memory 'PM':
    Size   = 16777216
    Width  = 20 bits
    Offset = 0
-    Used   = 3486
+    Used   = 3484
    0x00000000..0x0000001f (        32 items) : lpdsp32_init.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/liblpdsp32.a)::_ivt (Function, Global, .text)
    0x00000020..0x00000025 (         6 items) : lpdsp32_init.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/liblpdsp32.a)::_main_init (Function, Global, .text)
-    0x00000026..0x000000b1 (       140 items) : Release/main.o::_main (Function, Global, .text) (stack frame size = 120)
+    0x00000026..0x000000af (       138 items) : Release/main.o::_main (Function, Global, .text) (stack frame size = 120)
-    0x000000b2..0x000000c3 (        18 items) : Release/signal_path.o::_Z15sig_init_bufferP9BufferPtrPiii (Function, Global, .text)
+    0x000000b0..0x000000c1 (        18 items) : Release/signal_path.o::_Z17initialize_bufferP9BufferPtrPiii (Function, Global, .text)
-    0x000000c4..0x000000d5 (        18 items) : Release/signal_path.o::_Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii (Function, Global, .text)
+    0x000000c2..0x000000d3 (        18 items) : Release/signal_path.o::_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii (Function, Global, .text)
-    0x000000d6..0x000000e3 (        14 items) : Release/signal_path.o::_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi (Function, Global, .text)
+    0x000000d4..0x000000e1 (        14 items) : Release/signal_path.o::_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi (Function, Global, .text)
-    0x000000e4..0x00000169 (       134 items) : Release/signal_path.o::_Z21sig_init_preemph_coefP16SingleSignalPathdddddi (Function, Global, .text) (stack frame size = 48)
+    0x000000e2..0x00000167 (       134 items) : Release/signal_path.o::_Z21sig_init_preemph_coefP16SingleSignalPathdddddi (Function, Global, .text) (stack frame size = 48)
-    0x0000016a..0x0000016f (         6 items) : Release/signal_path.o::_Z14sig_init_delayP16SingleSignalPathi (Function, Global, .text)
+    0x00000168..0x0000016d (         6 items) : Release/signal_path.o::_Z14sig_init_delayP16SingleSignalPathi (Function, Global, .text)
-    0x00000170..0x000001a5 (        54 items) : Release/signal_path.o::_Z15sig_init_weightP16SingleSignalPathdi (Function, Global, .text) (stack frame size = 24)
+    0x0000016e..0x000001a3 (        54 items) : Release/signal_path.o::_Z15sig_init_weightP16SingleSignalPathdi (Function, Global, .text) (stack frame size = 24)
-    0x000001a6..0x00000203 (        94 items) : Release/signal_path.o::_Z4initP16SingleSignalPathS0_PdS1_iidddi (Function, Global, .text) (stack frame size = 64)
+    0x000001a4..0x00000201 (        94 items) : Release/signal_path.o::_Z4initP16SingleSignalPathS0_PdS1_iidddi (Function, Global, .text) (stack frame size = 64)
-    0x00000204..0x00000255 (        82 items) : Release/signal_path.o::_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ (Function, Global, .text) (stack frame size = 8)
+    0x00000202..0x00000253 (        82 items) : Release/signal_path.o::_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ (Function, Global, .text) (stack frame size = 8)
-    0x00000256..0x00000271 (        28 items) : lpdsp32_div.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/liblpdsp32.a)::_Z16div64_pos_called7accum_tS_Ry (Function, Global, .text)
+    0x00000254..0x0000026f (        28 items) : lpdsp32_div.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/liblpdsp32.a)::_Z16div64_pos_called7accum_tS_Ry (Function, Global, .text)
-    0x00000272..0x00000273 (         2 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::_ZL14clib_hosted_ioP16Hosted_clib_vars (Function, Local, .text)
+    0x00000270..0x00000271 (         2 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::_ZL14clib_hosted_ioP16Hosted_clib_vars (Function, Local, .text)
-    0x00000274..0x000002a5 (        50 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::fopen (Function, Global, .text) (stack frame size = 80)
+    0x00000272..0x000002a3 (        50 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::fopen (Function, Global, .text) (stack frame size = 80)
-    0x000002a6..0x000002c5 (        32 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::fclose (Function, Global, .text) (stack frame size = 80)
+    0x000002a4..0x000002c3 (        32 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::fclose (Function, Global, .text) (stack frame size = 80)
-    0x000002c6..0x000002dd (        24 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::feof (Function, Global, .text) (stack frame size = 80)
+    0x000002c4..0x000002db (        24 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::feof (Function, Global, .text) (stack frame size = 80)
-    0x000002de..0x000002ef (        18 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::fprintf (Function, Global, .text) (stack frame size = 80)
+    0x000002dc..0x000002ed (        18 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::fprintf (Function, Global, .text) (stack frame size = 80)
-    0x000002f0..0x00000301 (        18 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::fscanf (Function, Global, .text) (stack frame size = 80)
+    0x000002ee..0x000002ff (        18 items) : stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)::fscanf (Function, Global, .text) (stack frame size = 80)
-    0x00000302..0x00000391 (       144 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ZL18estimateDiv128To64yyy (Function, Local, .text) (stack frame size = 72)
+    0x00000300..0x0000038f (       144 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ZL18estimateDiv128To64yyy (Function, Local, .text) (stack frame size = 72)
-    0x00000392..0x000003bf (        46 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ZL19propagateFloat64NaNyy (Function, Local, .text) (stack frame size = 8)
+    0x00000390..0x000003bd (        46 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ZL19propagateFloat64NaNyy (Function, Local, .text) (stack frame size = 8)
-    0x000003c0..0x0000040d (        78 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ZL19roundAndPackFloat64iiy (Function, Local, .text)
+    0x000003be..0x0000040b (        78 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ZL19roundAndPackFloat64iiy (Function, Local, .text)
-    0x0000040e..0x00000413 (         6 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ZL28normalizeRoundAndPackFloat64iiy (Function, Local, .text)
+    0x0000040c..0x00000411 (         6 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ZL28normalizeRoundAndPackFloat64iiy (Function, Local, .text)
-    0x00000414..0x00000431 (        30 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z16int32_to_float64i (Function, Global, .text)
+    0x00000412..0x0000042f (        30 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z16int32_to_float64i (Function, Global, .text)
-    0x00000432..0x00000465 (        52 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z30float64_to_int32_round_to_zeroy (Function, Global, .text)
+    0x00000430..0x00000463 (        52 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z30float64_to_int32_round_to_zeroy (Function, Global, .text)
-    0x00000466..0x0000051b (       182 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ZL14addFloat64Sigsyyi (Function, Local, .text) (stack frame size = 24)
+    0x00000464..0x00000519 (       182 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ZL14addFloat64Sigsyyi (Function, Local, .text) (stack frame size = 24)
-    0x0000051c..0x000005c3 (       168 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ZL14subFloat64Sigsyyi (Function, Local, .text) (stack frame size = 32)
+    0x0000051a..0x000005c1 (       168 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_ZL14subFloat64Sigsyyi (Function, Local, .text) (stack frame size = 32)
-    0x000005c4..0x000005cf (        12 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z11float64_addyy (Function, Global, .text)
+    0x000005c2..0x000005cd (        12 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z11float64_addyy (Function, Global, .text)
-    0x000005d0..0x000005db (        12 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z11float64_subyy (Function, Global, .text)
+    0x000005ce..0x000005d9 (        12 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z11float64_subyy (Function, Global, .text)
-    0x000005dc..0x00000687 (       172 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z11float64_mulyy (Function, Global, .text) (stack frame size = 24)
+    0x000005da..0x00000685 (       172 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z11float64_mulyy (Function, Global, .text) (stack frame size = 24)
-    0x00000688..0x0000075b (       212 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z11float64_divyy (Function, Global, .text) (stack frame size = 40)
+    0x00000686..0x00000759 (       212 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z11float64_divyy (Function, Global, .text) (stack frame size = 40)
-    0x0000075c..0x00000787 (        44 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z10float64_eqyy (Function, Global, .text)
+    0x0000075a..0x00000785 (        44 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z10float64_eqyy (Function, Global, .text)
-    0x00000788..0x000007c5 (        62 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z10float64_leyy (Function, Global, .text)
+    0x00000786..0x000007c3 (        62 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z10float64_leyy (Function, Global, .text)
-    0x000007c6..0x00000805 (        64 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z10float64_ltyy (Function, Global, .text)
+    0x000007c4..0x00000803 (        64 items) : softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)::_Z10float64_ltyy (Function, Global, .text)
-    0x00000806..0x0000087d (       120 items) : math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)::ff_ldexp (Function, Global, .text) (stack frame size = 32)
+    0x00000804..0x0000087b (       120 items) : math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)::ff_ldexp (Function, Global, .text) (stack frame size = 32)
-    0x0000087e..0x00000cb9 (      1084 items) : math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)::ff_pow (Function, Global, .text) (stack frame size = 88)
+    0x0000087c..0x00000cb7 (      1084 items) : math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)::ff_pow (Function, Global, .text) (stack frame size = 88)
-    0x00000cba..0x00000d9d (       228 items) : math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)::ff_sqrt (Function, Global, .text) (stack frame size = 24)
+    0x00000cb8..0x00000d9b (       228 items) : math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)::ff_sqrt (Function, Global, .text) (stack frame size = 24)
 External symbols:
@@ -162,43 +160,43 @@ External symbols:
    _ctors_start = 0x0
    _dtors_end = 0x0
    _dtors_start = 0x0
-    _pc_end = 0xd9e
+    _pc_end = 0xd9c
    _pc_start = 0x0
    _sp_end_DMA = 0xe000
    _sp_start_DMA = 0xfff8
 Section summary for memory 'DM':
-       .bss       .data     .rodata  File
+       .bss     .rodata  File
- ----------  ----------  ----------  ----------
+ ----------  ----------  ----------
-          0           0         176  softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)
+          0         176  softfloat.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/softfloat/lib/libsoftfloat.a)
-          0           0         396  math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)
+          0         396  math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)
-          0           0          48  math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a) (in DMA)
+          0          48  math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a) (in DMA)
-        256           0           0  lpdsp32_init.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/liblpdsp32.a) (in DMA)
+        256           0  lpdsp32_init.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/liblpdsp32.a) (in DMA)
-          4           0           0  errno.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a) (in DMA)
+          4           0  errno.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a) (in DMA)
-        128           0           0  stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a) (in DMA)
+        128           0  stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a) (in DMA)
-          0           0          24  Release/main.o
+          0          24  Release/main.o
-        288           4         155  Release/main.o (in DMA)
+        288         156  Release/main.o (in DMA)
-         16           0           0  Release/main.o (in DMB)
+         16           0  Release/main.o (in DMB)
-          0           0          40  Release/signal_path.o
+          0          40  Release/signal_path.o
-        288           0           0  Release/signal_path.o (in DMA)
+        288           0  Release/signal_path.o (in DMA)
-        276           0           0  Release/signal_path.o (in DMB)
+        276           0  Release/signal_path.o (in DMB)
- ----------  ----------  ----------  ----------
+ ----------  ----------  ----------
-       1256           4         839  Total
+       1256         840  Total
 Section summary for memory 'DMA':
-       .bss       .data     .rodata      .stack  File
+       .bss     .rodata      .stack  File
- ----------  ----------  ----------  ----------  ----------
+ ----------  ----------  ----------  ----------
-          0           0           0        8184 
+          0           0        8184 
-          0           0          48           0  math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)
+          0          48           0  math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)
-        256           0           0           0  lpdsp32_init.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/liblpdsp32.a)
+        256           0           0  lpdsp32_init.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/liblpdsp32.a)
-          4           0           0           0  errno.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)
+          4           0           0  errno.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)
-        128           0           0           0  stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)
+        128           0           0  stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)
-        288           4         155           0  Release/main.o
+        288         156           0  Release/main.o
-        288           0           0           0  Release/signal_path.o
+        288           0           0  Release/signal_path.o
- ----------  ----------  ----------  ----------  ----------
+ ----------  ----------  ----------  ----------
-        964           4         203        8184  Total
+        964         204        8184  Total
 Section summary for memory 'DMB':
@@ -218,18 +216,18 @@ Section summary for memory 'PM':
       1432  math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libm.a)
         38  lpdsp32_init.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/liblpdsp32.a)
        144  stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)
-        140  Release/main.o
+        138  Release/main.o
        420  Release/signal_path.o
 ----------  ----------
-       3486  Total
+       3484  Total
 File summary:
 Release/main.o
                  DM                  24
-                 DMA                 447
+                 DMA                 444
                 DMB                  16
-                  PM                 140
+                  PM                 138
 Release/signal_path.o
                  DM                  40
@@ -246,13 +244,13 @@ math.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/
                 DMA                  48
                  PM                1432
 errno.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)
                 DMA                   4
 lpdsp32_init.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/liblpdsp32.a)
                 DMA                 256
                  PM                  38
 errno.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)
                 DMA                   4
 stdio.o(C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/lib/libc.a)
                 DMA                 128
                  PM                 144
--- a/simulation/Release/simulation.srv
+++ b/simulation/Release/simulation.srv
--- a/simulation/main.c
+++ b/simulation/main.c
@@ -4,39 +4,38 @@
 #include <stdint.h>
 #include "signal_processing/include/signal_path.h"
-// Register und Bitmasken f<EFBFBD>r Interrupts zwischen ARM und LPDSP Prozessor
+// Register und Bitmasken für Interrupts zwischen ARM und LPDSP Prozessor
 #define CSS_CMD 0xC00004 
 #define CSS_CMD_0 (1<<0)
 #define CSS_CMD_1 (1<<1)
 // Shared Memory von ARM und DSP definieren
-#define INPUT_PORT0_ADD 0x800000  // Feste Adressen f<EFBFBD>r Eingangsdaten im Shared Memory
+#define INPUT_PORT0_ADD 0x800000  // Feste Adressen für Eingangsdaten im Shared Memory
-#define OUTPUT_PORT_ADD (INPUT_PORT0_ADD + 16) // Feste Adressen f<EFBFBD>r Ausgangsdatensdaten im Shared Memory, 16 Byte von Eingangsadresse Weg
+#define OUTPUT_PORT_ADD (INPUT_PORT0_ADD + 16) // Feste Adressen für Ausgangsdatensdaten im Shared Memory, 16 Byte von Eingangsadresse Weg
 // Structs anlegen f<>r die Signalpfade - hier werden Konfigurationen abgelegt(signal_path.h)
-static SingleSignalPath corrupted_signal;
+static SingleSignalPath c_sensor_signal_t;
-static SingleSignalPath reference_noise_signal;
+static SingleSignalPath acc_sensor_signal_t;
-static volatile int16_t chess_storage(DMB:INPUT_PORT0_ADD) input_port[4]; //Array mit 4x16 Bit Eintr<EFBFBD>gen auf 2x32 Bit Registern - nur die ersten 2 werden genutzt
+static volatile int16_t chess_storage(DMB:INPUT_PORT0_ADD) input_port[4]; //Array mit 4x16 Bit Einträgen auf 2x32 Bit Registern - nur die ersten 2 werden genutzt
-static volatile int16_t chess_storage(DMB:OUTPUT_PORT_ADD) output_port[4]; //Array mit 4x16 Bit Eintr<EFBFBD>gen auf 2x32 Bit Registern - alle werden genutzt
+static volatile int16_t chess_storage(DMB:OUTPUT_PORT_ADD) output_port[4]; //Array mit 4x16 Bit Einträgen auf 2x32 Bit Registern - alle werden genutzt
 static volatile int16_t chess_storage(DMB) *input_pointer_0;
 static volatile int16_t chess_storage(DMB) *input_pointer_1;
 static volatile int16_t chess_storage(DMB) *output_pointer;
 static volatile int16_t chess_storage(DMB) *sample_pointer;
-static volatile int16_t chess_storage(DMB) sample;  //Speicherplatz f<EFBFBD>r Ergebnis der calc()-Funktion
+static volatile int16_t chess_storage(DMB) sample;  //Speicherplatz für Ergebnis der calc()-Funktion
 int main(void) {
-    // Enum, welcher den Ausgabemodus definiert - wird in calc()-Funktion verwendet
+    // Biquad Filter für C-Sensor und Acc-Sensor anlegen
    static OutputMode mode = OUTPUT_MODE_FIR_LMS;
    // Biquad Filter f<>r C-Sensor und Acc-Sensor anlegen
    // Alle 0 bis auf b[0] -> einfacher Gain auf 0,75
    double b0[5]={0.75, 0., 0., 0., 0.};
    double b1[5]={0.75, 0., 0., 0., 0.};
-    int coefficients = MAX_FIR_COEFFS; // 64 Koeffizienten f<EFBFBD>r ANR
+    int coefficients = MAX_FIR_COEFFS; // 64 Koeffizienten für ANR
-    // Signale initialisieren, oben angelegte Structs mit Parametern f<EFBFBD>llen
+    // Signale initialisieren: oben angelegte Structs mit Parametern füllen
    // Buffer für Delay-Line und Koeffizienten initialisieren
    init(
-        &corrupted_signal, &reference_noise_signal,   //Signal-Structs
+        &c_sensor_signal_t, &acc_sensor_signal_t,   //Signal-Structs
        b0,     // Biqquad Koeffizienten C-Sensor
        b1,     // Biqquad Koeffizienten Acc-Sensor  
        2,      // Sample Delay C-Sensor
@@ -47,7 +46,7 @@ int main(void) {
        coefficients // Anzahl Filterkoeffizienten
    );
-    FILE *fp1 = fopen("./simulation_data/complex_corrupted_signal.txt", "r");
+    FILE *fp1 = fopen("./simulation_data/complex_c_sensor_signal_t.txt", "r");
    FILE *fp2 = fopen("./simulation_data/complex_noise_signal.txt", "r");
    FILE *fp3 = fopen("./simulation_data/output/complex_output_simulated.txt", "w");
@@ -61,7 +60,7 @@ int main(void) {
            input_port[i+1] = (int16_t) d1;
        }
        calc(
-            &corrupted_signal, &reference_noise_signal, mode, &input_port[0], &input_port[1], output_port);
+            &c_sensor_signal_t, &acc_sensor_signal_t, &input_port[0], &input_port[1], output_port);
        for (int i=0; i<BLOCK_LEN; i++){
            fprintf(fp3, "%d\n", output_port[i]);
        }
--- a/simulation/signal_processing/include/signal_path.h
+++ b/simulation/signal_processing/include/signal_path.h
@@ -88,8 +88,8 @@ BufferPtr extern ptr_fir_lms_coeffs;
 //int extern chess_storage(DMA % (sizeof(long long))) fir_lms_coeffs[MAX_FIR_COEFFS]; // The coefficients for the adaptive filter
 // typedef struct SignalPath{
-//     SingleSignalPath cSensorSignal;
+//     SingleSignalPath c_sensor_signal_t;
-//     SingleSignalPath accSensorSignal;
+//     SingleSignalPath acc_sensor_signal_t;
 //     LmsFilter lms;
 //     volatile int chess_storage(DMIO:INPUT_PORT_ADD) input_port;
 //     int chess_storage(DMIO:OUTPUT_PORT_ADD) output_port;
@@ -119,21 +119,14 @@ typedef enum OutputMode{
 // top level init and calc functions
 void init(
-        SingleSignalPath *cSensorSignal, SingleSignalPath *accSensorSignal,
+        SingleSignalPath *c_sensor_signal_t, SingleSignalPath *acc_sensor_signal_t,
        //BufferPtrDMB chess_storage(DMB) *ptr_fir_lms_delay_line, BufferPtr *ptr_fir_lms_coeffs,
        double *b_c, double *b_acc, int delay_c, int delay_acc, double weight_c, double weight_acc, double lms_mu, int lms_fir_num_coeffs);
 void calc(
-        SingleSignalPath *cSensorSignal, SingleSignalPath *accSensorSignal,
+        SingleSignalPath *c_sensor_signal_t, 
-        //BufferPtrDMB chess_storage(DMB) *ptr_fir_lms_delay_line, BufferPtr *ptr_fir_lms_coeffs,
+        SingleSignalPath *acc_sensor_signal_t,
-        OutputMode output_mode,
+        int16_t volatile chess_storage(DMB) *c_sensor_input,
-        #if BLOCK_LEN != 1
+        int16_t volatile chess_storage(DMB) *acc_sensor_input,
-        int16_t *cSensor,
+        int16_t volatile chess_storage(DMB) *output_port
        int16_t *accSensor,
        #else
        int16_t volatile chess_storage(DMB) *cSensor,
        int16_t volatile chess_storage(DMB) *accSensor,
        #endif
        int16_t volatile chess_storage(DMB) *out_16
        );
--- a/simulation/signal_processing/signal_path.c
+++ b/simulation/signal_processing/signal_path.c
@@ -1,17 +1,19 @@
 #include "include/signal_path.h"
 #define BLOCK_LEN 1
-/* Global variables decleration*/
+//Globale Variable setzen
 static int counter=0;
 static int mu;
 static int leak=2147462173; //0.999 // (1 ? <20>?)
-int chess_storage(DMB) fir_lms_delay_line[MAX_FIR_COEFFS];  //Int-Array für Acc-Sensors Samples (Delay Line) anlegen
+// Int Arrays für Delay Line (Acc-Sensor Samples) sowie Filterkoeffizienten anlegen
-int chess_storage(DMA % (sizeof(long long))) fir_lms_coeffs[MAX_FIR_COEFFS]; //Int-Array für Filterkoeffizienten anlegen
+int chess_storage(DMB) delay_line[MAX_FIR_COEFFS];  
 int chess_storage(DMA % (sizeof(long long))) filter_coefficients[MAX_FIR_COEFFS];
-BufferPtrDMB chess_storage(DMB) ptr_fir_lms_delay_line; 
+// Structs für Pointerinkrementierung auf Delay Line- und Koeffizieten-Arrays anlegen
-BufferPtr ptr_fir_lms_coeffs;
+BufferPtrDMB chess_storage(DMB) pointer_delay_line; 
 BufferPtr pointer_filter_coefficients;
@@ -68,7 +70,8 @@ BufferPtr ptr_fir_lms_coeffs;
    }
 #endif
-int sig_init_buffer(BufferPtr *buffer, int *buffer_start_add, int length, int max_buffer_len) {
+//Allgemeinen Buffer initialisieren
 int initialize_buffer(BufferPtr *buffer, int *buffer_start_add, int length, int max_buffer_len) {
    buffer->buffer_len = length;
    buffer->ptr_start = buffer_start_add;
    buffer->ptr_current = buffer_start_add;
@@ -84,7 +87,8 @@ int sig_init_buffer(BufferPtr *buffer, int *buffer_start_add, int length, int ma
    }
 }
-int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *buffer, int chess_storage(DMB) *buffer_start_add, int length, int max_buffer_len){
+//DMB Buffer initialisieren
 int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *buffer, int chess_storage(DMB) *buffer_start_add, int length, int max_buffer_len){
    buffer->buffer_len = length;
    buffer->ptr_start = buffer_start_add;
    buffer->ptr_current = buffer_start_add;
@@ -100,25 +104,28 @@ int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *buffer, int chess_stora
    }
 }
-void sig_cirular_buffer_ptr_increment(BufferPtr *buffer, int i_incr){
+//Allgemeinen Buffer um bestimmten Eingabewert inkrementieren - nicht in Verwendung
 void increment_buffer(BufferPtr *buffer, int i_incr){
    buffer->ptr_current = cyclic_add(buffer->ptr_current, i_incr, buffer->ptr_start, buffer->buffer_len);
 }
-void sig_cirular_buffer_ptr_increment_DMB(BufferPtrDMB *buffer, int i_incr){
+//DMB-Buffer um bestimmten Eingabewert inkrementieren - nicht in Verwendung
 void increment_buffert_DMB(BufferPtrDMB *buffer, int i_incr){
    buffer->ptr_current = cyclic_add(buffer->ptr_current, i_incr, buffer->ptr_start, buffer->buffer_len);
 }
-
+//Übergabesample in allgemeinen Buffer schreiben und Buffer inkrementieren - nicht in Verwendung
-void sig_cirular_buffer_ptr_put_sample(BufferPtr *buffer, int sample){
+void write_buffer(BufferPtr *buffer, int sample){
    *buffer->ptr_current = sample;
    buffer->ptr_current = cyclic_add(buffer->ptr_current, 1, buffer->ptr_start, buffer->buffer_len);
 }
-void sig_cirular_buffer_ptr_put_sample_DMB(BufferPtrDMB chess_storage(DMB) *buffer, int sample){
+//Übergabesample in DMB Buffer schreiben (Delay-Line) und Buffer inkrementieren
 void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *buffer, int sample){
    *buffer->ptr_current = sample;  //Sample des Acc-Sensors wird in Adresse geschrieben, auf die der Pointer zeigt
    buffer->ptr_current = cyclic_add(buffer->ptr_current, 1, buffer->ptr_start, buffer->buffer_len);    //Pointer wird inkrementiert
 }
-void static inline sig_circular_buffer_ptr_put_block(BufferPtr *buffer, int* block){
+void static inline write_buffer_block(BufferPtr *buffer, int* block){
    // increment pointer to oldest block
    //buffer->ptr_current = cyclic_add(buffer->ptr_current, BLOCK_LEN, buffer->ptr_start, buffer->buffer_len);
    // load the next block
@@ -129,7 +136,7 @@ void static inline sig_circular_buffer_ptr_put_block(BufferPtr *buffer, int* blo
    }
 }
-//Initialisierungsfunktion f<EFBFBD>r Biquad Filter Koeffizienten
+//Initialisierungsfunktion für Biquad Filter Koeffizienten
 void sig_init_preemph_coef(SingleSignalPath *signal, double b0, double b1, double b2, double a1, double a2, int scale_bits) {
    // Wenn b0=1 und Rest 0 -> kein Filter weil effektiv 1*Xn
    if (b0 == 1. && b1 == 0. && b2 == 0. && a1 == 0. && a2 == 0.) {
@@ -150,10 +157,10 @@ void sig_init_preemph_coef(SingleSignalPath *signal, double b0, double b1, doubl
 /*Initialization functions - make sure all of them were called to ensure functionality*/
 int sig_init_delay(SingleSignalPath *signal, int n_delay) {
-    return sig_init_buffer(&signal->delay_buffer, signal->_delay_buffer, n_delay, MAX_DELAY_SAMPS);
+    return initialize_buffer(&signal->delay_buffer, signal->_delay_buffer, n_delay, MAX_DELAY_SAMPS);
 }
-//Initialisierungsfunktion f<EFBFBD>r Gewichtung
+//Initialisierungsfunktion für Gewichtung
 void sig_init_weight(SingleSignalPath *signal, double weight, int scale_nbits) {
    // Wenn Gewichtung 1 -> kein Effekt
    if (weight == 1.) {
@@ -197,7 +204,7 @@ int sig_delay_buffer_load_and_get(SingleSignalPath *signal, int x) {
    }
    int out = *signal->delay_buffer.ptr_current;
    *signal->delay_buffer.ptr_current = x;
-    sig_cirular_buffer_ptr_increment(&signal->delay_buffer, 1);
+    increment_buffer(&signal->delay_buffer, 1);
    return out;
 }
@@ -210,15 +217,15 @@ int sig_calc_weight(SingleSignalPath *signal, int x) {
    return rnd_saturate(acc);
 }
-int inline sig_calc_fir_lpdsp32_single(BufferPtrDMB chess_storage(DMB) *ptr_fir_lms_delay_line, BufferPtr *ptr_fir_lms_coeffs){
+int inline apply_fir_filter(BufferPtrDMB chess_storage(DMB) *pointer_delay_line, BufferPtr *pointer_filter_coefficients){
    // Filterkoeffizienten mit Acc-Sensor Samples multiplizieren und aufsummieren um Akkumulator Output des adaptiven Filters zu erhalten
    //Pointer für Koeffizienten und Delay Line Samples anlegen
-    int chess_storage(DMB) *p_x0 = ptr_fir_lms_delay_line->ptr_current; 
+    int chess_storage(DMB) *p_x0 = pointer_delay_line->ptr_current; 
-    int chess_storage(DMB) *px_start = ptr_fir_lms_delay_line->ptr_start;
+    int chess_storage(DMB) *px_start = pointer_delay_line->ptr_start;
-    int *p_h = ptr_fir_lms_coeffs->ptr_current;
+    int *p_h = pointer_filter_coefficients->ptr_current;
-    int delay_line_len = ptr_fir_lms_delay_line->buffer_len;
+    int delay_line_len = pointer_delay_line->buffer_len;
-    int n_coeff = ptr_fir_lms_coeffs->buffer_len;
+    int n_coeff = pointer_filter_coefficients->buffer_len;
    //Variablen und Akkumulatoren (72-Bit) anlegen
    int d0,d1,h0,h1;
@@ -226,12 +233,6 @@ int inline sig_calc_fir_lpdsp32_single(BufferPtrDMB chess_storage(DMB) *ptr_fir_
    accum_t acc1_B = to_accum(0);
    accum_t acc1_C;
    // iterate over the coefficients to calculate the filter on x - the canceller
    /* Abschaetzung cycles per 2coefficient:
    dual - load : 1
    dual mac and dual load: 1
    -> 48/2 * 2 = 48 cycles for 48 coefficents
    */
    // In 2er Schritten durch die Koeffizienten iterieren, immer 2 Samples und 2 Koeffizienten pro Schleifendurchlauf -> DUAL LOAD und DUAL MAC
    for (int i=0; i < n_coeff; i+=2) chess_loop_range(1,){
        d0 = *p_x0; //Sample 1 aus Delay Line
@@ -252,18 +253,18 @@ int inline sig_calc_fir_lpdsp32_single(BufferPtrDMB chess_storage(DMB) *ptr_fir_
    return rnd_saturate(acc1_C);
 }
-void static inline adapt_coeffs_lpdsp32_single_v1(BufferPtrDMB chess_storage(DMB) *ptr_fir_lms_delay_line, BufferPtr *ptr_fir_lms_coeffs, int out){
+void static inline update_filter_coefficients(BufferPtrDMB chess_storage(DMB) *pointer_delay_line, BufferPtr *pointer_filter_coefficients, int out){
-    int chess_storage(DMA) *p_h0 = ptr_fir_lms_coeffs->ptr_start; //Pointer auf Filterkoeffizienten-Array
+    int chess_storage(DMA) *p_h0 = pointer_filter_coefficients->ptr_start; //Pointer auf Filterkoeffizienten-Array
-    int chess_storage(DMB) *p_x0 = ptr_fir_lms_delay_line->ptr_current; //Current-Pointer 1 auf Delay-Line Array
+    int chess_storage(DMB) *p_x0 = pointer_delay_line->ptr_current; //Current-Pointer 1 auf Delay-Line Array
-    int chess_storage(DMB) *p_x1 = ptr_fir_lms_delay_line->ptr_current; //Current-Pointer 2 auf Delay-Line Array
+    int chess_storage(DMB) *p_x1 = pointer_delay_line->ptr_current; //Current-Pointer 2 auf Delay-Line Array
-    int chess_storage(DMB) *px_start = ptr_fir_lms_delay_line->ptr_start; //Start-Pointer auf Delay-Line Array
+    int chess_storage(DMB) *px_start = pointer_delay_line->ptr_start; //Start-Pointer auf Delay-Line Array
-    int delay_line_len = ptr_fir_lms_delay_line->buffer_len;    // Länge des Delay-Line Arrays
+    int delay_line_len = pointer_delay_line->buffer_len;    // Länge des Delay-Line Arrays
-    int n_coeff = ptr_fir_lms_coeffs->buffer_len;               // Anzahl der Filterkoeffizienten
+    int n_coeff = pointer_filter_coefficients->buffer_len;               // Anzahl der Filterkoeffizienten
    int prod, x0, x1, h0, h1;
-    p_x1 = cyclic_add(p_x1, -1, ptr_fir_lms_delay_line->ptr_start, ptr_fir_lms_delay_line->buffer_len); //Current-Pointer 2 dekrementieren um 1
+    p_x1 = cyclic_add(p_x1, -1, pointer_delay_line->ptr_start, pointer_delay_line->buffer_len); //Current-Pointer 2 dekrementieren um 1
    accum_t acc_A, acc_B;
@@ -279,11 +280,7 @@ void static inline adapt_coeffs_lpdsp32_single_v1(BufferPtrDMB chess_storage(DMB
    */
    for (int i=0; i< n_coeff; i+=2) chess_loop_range(1,){
        // Calculate the coefficient wise adaption
        #ifdef PLATFORM_GENERIC
            lldecompose(*((long long *)p_h0), &h0, &h1);
        #else
        lldecompose(*((long long *)p_h0), h0, h1);
        #endif
        acc_A = to_accum(h0);
        acc_B = to_accum(h1);
@@ -301,8 +298,8 @@ void static inline adapt_coeffs_lpdsp32_single_v1(BufferPtrDMB chess_storage(DMB
 }
 void init(
-    SingleSignalPath *cSensorSignal,
+    SingleSignalPath *c_sensor_signal_t,
-    SingleSignalPath *accSensorSignal,
+    SingleSignalPath *acc_sensor_signal_t,
    double *b_c,
    double *b_acc,
    int delay_c,
@@ -310,87 +307,86 @@ void init(
    double weight_c,
    double weight_acc,
    double lms_mu,
-    int lms_fir_num_coeffs
+    int number_coefficients
    ){
    int scale_bits=31;
    // C-Sensor Initialisierung: Biquad, Delay, Weight skalieren und in Struct schreiben
-    sig_init_preemph_coef(cSensorSignal, b_c[0], b_c[1], b_c[2], b_c[3], b_c[4], scale_bits);
+    sig_init_preemph_coef(c_sensor_signal_t, b_c[0], b_c[1], b_c[2], b_c[3], b_c[4], scale_bits);
-    sig_init_delay(cSensorSignal, delay_c);
+    sig_init_delay(c_sensor_signal_t, delay_c);
-    sig_init_weight(cSensorSignal, weight_c, scale_bits);
+    sig_init_weight(c_sensor_signal_t, weight_c, scale_bits);
    // Acc-Sensor Initialisierung: Biquad, Delay, Weight skalieren und in Struct schreiben
-    sig_init_preemph_coef(accSensorSignal, b_acc[0], b_acc[1], b_acc[2], b_acc[3], b_acc[4], scale_bits);
+    sig_init_preemph_coef(acc_sensor_signal_t, b_acc[0], b_acc[1], b_acc[2], b_acc[3], b_acc[4], scale_bits);
-    sig_init_delay(accSensorSignal, delay_acc);
+    sig_init_delay(acc_sensor_signal_t, delay_acc);
-    sig_init_weight(accSensorSignal, weight_acc, 31);
+    sig_init_weight(acc_sensor_signal_t, weight_acc, 31);
    //Mu Skalierung und in globale Variable schreiben
    int scale = pow(2, scale_bits) - 1;
    mu = lms_mu * scale;
    // Buffer Initialisierung (Delay Line und Koeffizienten) 
-    sig_init_buffer_DMB(&ptr_fir_lms_delay_line, fir_lms_delay_line, lms_fir_num_coeffs, MAX_FIR_COEFFS);
+    initialize_buffer_dmb(&pointer_delay_line, delay_line, number_coefficients, MAX_FIR_COEFFS);
-    sig_init_buffer(&ptr_fir_lms_coeffs, fir_lms_coeffs, lms_fir_num_coeffs, MAX_FIR_COEFFS);
+    initialize_buffer(&pointer_filter_coefficients, filter_coefficients, number_coefficients, MAX_FIR_COEFFS);
    // Einträge in Delay Line und Koeffizienten-Array auf 0 setzen 
-    for (int i = 0; i < lms_fir_num_coeffs; i++) {
+    for (int i = 0; i < number_coefficients; i++) {
-        ptr_fir_lms_delay_line.ptr_start[i] = 0;
+        pointer_delay_line.ptr_start[i] = 0;
-        ptr_fir_lms_coeffs.ptr_start[i] = 0;
+        pointer_filter_coefficients.ptr_start[i] = 0;
    }
 }
-// Data d(cSensor) is signal + noise
+// C-Sensor (d) = Corrupted Signal (Desired Signal + Corruption Noise Signal)
-// x (accSensor) is reference noise signal
+// Acc-Sensor (x) = Reference Noise Signal
 void calc(
-    SingleSignalPath *cSensorSignal,
+    SingleSignalPath *c_sensor_signal_t,
-    SingleSignalPath *accSensorSignal,
+    SingleSignalPath *acc_sensor_signal_t,
-    OutputMode output_mode,
+    int16_t volatile chess_storage(DMB) *c_sensor_input,   //Pointer auf Input-Port im Shared Memory
-    int16_t volatile chess_storage(DMB) *cSensor,   //Pointer auf Input-Port im Shared Memory
+    int16_t volatile chess_storage(DMB) *acc_sensor_input, //Pointer auf Input-Port im Shared Memory
-    int16_t volatile chess_storage(DMB) *accSensor, //Pointer auf Input-Port im Shared Memory
+    int16_t volatile chess_storage(DMB) *output_port     //Pointer auf Output-Port im Shared Memory
    int16_t volatile chess_storage(DMB) *out_16     //Pointer auf Output-Port im Shared Memory
    ){
    //Speicherbereiche anlegen -> bei blockweiser Verarbeitung hat jedes Array nur den Eintrag [0]
-    static int chess_storage(DMA) c_block_pre[BLOCK_LEN];   //Speicherbereich für C-Sensor Preemphasis Input
+    static int chess_storage(DMA) c_sensor_32[BLOCK_LEN];    //Speicherbereich für 32-Bit C-Sensor Input
-    static int chess_storage(DMA) acc_block_pre[BLOCK_LEN]; //Speicherbereich für Acc-Sensor Preemphasis Input
+    static int chess_storage(DMA) acc_sensor_32[BLOCK_LEN];  //Speicherbereich für 32-Bit Acc-Sensor Input
-    static int chess_storage(DMA) cSensor_32[BLOCK_LEN];    //Speicherbereich für 32-Bit C-Sensor Input
+    static int chess_storage(DMA) c_sensor_pre[BLOCK_LEN];   //Speicherbereich für C-Sensor Preemphasis Input
-    static int chess_storage(DMA) accSensor_32[BLOCK_LEN];  //Speicherbereich für 32-Bit Acc-Sensor Input
+    static int chess_storage(DMA) acc_sensor_pre[BLOCK_LEN]; //Speicherbereich für Acc-Sensor Preemphasis Input
-    static int chess_storage(DMB) acc_block_filt[BLOCK_LEN];    //Speicherbereich für Akkumulator Output des adaptiven Filters
+    static int chess_storage(DMB) filter_accumulator[BLOCK_LEN];    //Speicherbereich für Akkumulator Output des adaptiven Filters
-    static int chess_storage(DMB) out_32[BLOCK_LEN];          //Speicherbereich für 32-Bit Output Signal
+    static int chess_storage(DMB) output_32[BLOCK_LEN];          //Speicherbereich für 32-Bit Output Signal
-    // Pointer auf die Arrays anlegen
+    // Pointer auf Sample-Speicherbereiche legen - wird nicht benötigt, wenn allgemeine allgemein Arrays für Blockverarbeitung verwendet werden (Array -> automatisch Pointer)
-    static int chess_storage(DMA) *p_c_block_pre =c_block_pre;
+    // static int chess_storage(DMA) *pointer_c_sensor_pre =c_sensor_pre;  
-    static int chess_storage(DMA) *p_acc_block_filt =acc_block_pre;
+    // static int chess_storage(DMA) *pointer_filter_accumulator =acc_sensor_pre; 
-    static int chess_storage(DMB) *p_out_32=out_32;
+    // static int chess_storage(DMB) *pointer_output_32=output_32; 
    // 16-Bit Eingangssignale auf 32-Bit konvertieren mit Bitshift, in neuem Speicherbereich ablegen
    for (uint32_t i=0; i<BLOCK_LEN; i++) chess_loop_range(1,){
-        cSensor_32[i] =  ((int) cSensor[i]) << BITSHIFT_16_TO_32;
+        c_sensor_32[i] =  ((int) c_sensor_input[i]) << BITSHIFT_16_TO_32;
-        accSensor_32[i] = ((int) accSensor[i]) << BITSHIFT_16_TO_32;
+        acc_sensor_32[i] = ((int) acc_sensor_input[i]) << BITSHIFT_16_TO_32;
    }    
    // Preemphasis Filter anwenden - wird hier aber nicht genutzt (nur Durchreichen), in neuen Speicherbereich ablegen
    for (uint32_t i=0; i<BLOCK_LEN; i++) chess_loop_range(1,){
-         c_block_pre[i] = cSensor_32[i];
+         c_sensor_pre[i] = c_sensor_32[i];
-         acc_block_pre[i] = accSensor_32[i];
+         acc_sensor_pre[i] = acc_sensor_32[i];
    }
    // Adaptiven Filter auf C-Sensor Signal anwenden
    //Aktuelles Sample des Acc-Sensors wird in aktuelle Speicheradresse des Pointers der Delay Line geschrieben, dann wird der Pointer inkrementiert -> Delay Line hat Länge der Filterkoeffizienten
-    sig_cirular_buffer_ptr_put_sample_DMB(&ptr_fir_lms_delay_line, acc_block_pre[0]);
+    write_buffer_dmb(&pointer_delay_line, acc_sensor_pre[0]);
    // Filter auf Acc-Sensor Signal anwenden und Korrektursignal berechnen
    // Sample des Acc-Sensors in der Delay-Line werden mit den Filterkoeffizienten multipliziert und aufsummiert -> Akkumulator Output des adaptiven Filters
-    acc_block_filt[0]= sig_calc_fir_lpdsp32_single(&ptr_fir_lms_delay_line, &ptr_fir_lms_coeffs);
+    filter_accumulator[0] = apply_fir_filter(&pointer_delay_line, &pointer_filter_coefficients);
    // Output-Signal berechnen -> C-Sensor Sample -  Akkumulator Output des adaptiven Filters
-    out_32[0] = c_block_pre[0] - acc_block_filt[0];
+    output_32[0] = c_sensor_pre[0] - filter_accumulator[0];
    // Filterkoeffizienten adaptieren
-    adapt_coeffs_lpdsp32_single_v1(&ptr_fir_lms_delay_line, &ptr_fir_lms_coeffs, out_32[0]);
+    update_filter_coefficients(&pointer_delay_line, &pointer_filter_coefficients, output_32[0]);
    // Bitshift zurück auf 16-Bit und in Ausgangsarray schreiben
    for (uint32_t i=0; i<BLOCK_LEN; i++) chess_flatten_loop
    {
-        out_16[i] = rnd_saturate(to_accum(out_32[i]) >> BITSHIFT_16_TO_32); // 12 cycles for blocksize 4 //TODO: use rnd_saturate(out_32[i] >> input_nbit_bitshift)
+        output_port[i] = rnd_saturate(to_accum(output_32[i]) >> BITSHIFT_16_TO_32);
    }
 }
`@@ -8,3 +8,8 @@ cef764f6402a6eeb549cc520677fd8828baab91e`
	`0`	`0`
	`0`	`0`
	`0`	`0`
		`0`
		`0`
		`0`
		`0`
		`0`
`@@ -8,3 +8,9 @@ b6139837f6ca35c36b0c65fc4fb39c9f43e36de9`
	`0`	`0`
	`0`	`0`
	`0`	`0`
		`0`
		`0`
		`0`
		`0`
		`0`
		`2`
`@@ -8,3 +8,11 @@ da39a3ee5e6b4b0d3255bfef95601890afd80709`
	`0`	`0`
	`0`	`0`
	`0`	`0`
		`0`
		`0`
		`0`
		`0`
		`0`
		`2`
		`7`
		`7`
`@@ -8,3 +8,9 @@ db8ac96f746c20d8257c01deb0158ddbdd492022`
	`0`	`0`
	`0`	`0`
	`0`	`0`
		`0`
		`0`
		`0`
		`0`
		`0`
		`2`
`@@ -8,3 +8,6 @@ a930397de8fa3f7e26f75e262973f1cd15f811d0`
	`0`	`0`
	`0`	`0`
	`0`	`0`
		`0`
		`0`
		`0`
`@@ -8,3 +8,8 @@ ed333c6a3e8d1aafe83fb852bbcd140ff4272cff`
	`0`	`0`
	`0`	`0`
	`0`	`0`
		`0`
		`0`
		`0`
		`0`
		`0`
`@@ -8,3 +8,9 @@ da39a3ee5e6b4b0d3255bfef95601890afd80709`
	`0`	`0`
	`0`	`0`
	`0`	`0`
		`0`
		`0`
		`0`
		`0`
		`0`
		`2`
`@@ -1,2 +1,2 @@`
	`e4fc83ed9ae93d97a22c1d8f29c6c29bca7cf2bc`	`1969daa2796df302809897d9d6fdf79d4f513044`
	`16eb5e4638293780f809bd1de8ff96feb0151a27`	`16eb5e4638293780f809bd1de8ff96feb0151a27`
`@@ -1,2 +1,2 @@`
	`de8a7891062042bbd6065913c0b229e104d0f002`	`e8482bcb4023ecb746c8bd0ceb3440ff47952b54`
	`16eb5e4638293780f809bd1de8ff96feb0151a27`	`16eb5e4638293780f809bd1de8ff96feb0151a27`