From 6f52b7ace4c72257762906ac93544e06d0429f41 Mon Sep 17 00:00:00 2001 From: Patrick Hangl Date: Tue, 27 Jan 2026 16:38:58 +0100 Subject: [PATCH] Calc Funktion weitergecoded - kompiliert --- .../index/signal_path.c.EFF85444D3BB52AD.idx | Bin 8456 -> 8456 bytes simulation/Release/chesswork/main-9f2435.# | 4 +- simulation/Release/chesswork/main-9f2435.o | Bin 10164 -> 10084 bytes simulation/Release/chesswork/main-9f2435.sfg | 1527 ++-- simulation/Release/chesswork/main.ctt | 2 +- simulation/Release/chesswork/main.dti | 11 +- simulation/Release/chesswork/main.fnm | 8 +- simulation/Release/chesswork/main.gvt | 21 +- simulation/Release/chesswork/main.gvt.# | 2 +- simulation/Release/chesswork/main.gvt.o | Bin 6776 -> 6212 bytes simulation/Release/chesswork/main.ini | 36 +- simulation/Release/chesswork/main.lib | 12 +- simulation/Release/chesswork/main.tof | 2 +- .../Release/chesswork/signal_path-101f20.# | 6 +- .../Release/chesswork/signal_path-101f20.o | Bin 8924 -> 8964 bytes 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2 +- simulation/Release/chesswork/signal_path.dti | 17 +- simulation/Release/chesswork/signal_path.fnm | 68 +- simulation/Release/chesswork/signal_path.gvt | 28 +- .../Release/chesswork/signal_path.gvt.# | 2 +- .../Release/chesswork/signal_path.gvt.o | Bin 7464 -> 6076 bytes simulation/Release/chesswork/signal_path.ini | 20 +- simulation/Release/chesswork/signal_path.lib | 48 +- .../Release/chesswork/signal_path.objlist | 26 +- simulation/Release/chesswork/signal_path.tof | 16 +- simulation/Release/main.# | 2 +- simulation/Release/main.o | Bin 14648 -> 14008 bytes simulation/Release/main.o.as | 322 +- simulation/Release/signal_path.# | 2 +- simulation/Release/signal_path.o | Bin 65984 -> 63604 bytes simulation/Release/signal_path.o.as | 1046 ++- simulation/Release/simulation | Bin 94840 -> 92556 bytes simulation/Release/simulation.as | 7594 ++++++++-------- simulation/Release/simulation.cmic2 | 7715 ++++++++--------- simulation/Release/simulation.map | 244 +- simulation/Release/simulation.srv | 7715 ++++++++--------- simulation/main.c | 31 +- .../signal_processing/include/signal_path.h | 23 +- simulation/signal_processing/signal_path.c | 162 +- 93 files changed, 15970 insertions(+), 14407 deletions(-) create mode 100644 simulation/Release/chesswork/signal_path-4df6b6.# create mode 100644 simulation/Release/chesswork/signal_path-4df6b6.o create mode 100644 simulation/Release/chesswork/signal_path-4df6b6.sfg create mode 100644 simulation/Release/chesswork/signal_path-59265a.# create mode 100644 simulation/Release/chesswork/signal_path-59265a.o create mode 100644 simulation/Release/chesswork/signal_path-59265a.sfg create mode 100644 simulation/Release/chesswork/signal_path-750458.# create mode 100644 simulation/Release/chesswork/signal_path-750458.o create mode 100644 simulation/Release/chesswork/signal_path-750458.sfg create mode 100644 simulation/Release/chesswork/signal_path-a3616e.# create mode 100644 simulation/Release/chesswork/signal_path-a3616e.o create mode 100644 simulation/Release/chesswork/signal_path-a3616e.sfg create mode 100644 simulation/Release/chesswork/signal_path-a56564.# create mode 100644 simulation/Release/chesswork/signal_path-a56564.o create mode 100644 simulation/Release/chesswork/signal_path-a56564.sfg create mode 100644 simulation/Release/chesswork/signal_path-a72ab8.# create mode 100644 simulation/Release/chesswork/signal_path-a72ab8.o create mode 100644 simulation/Release/chesswork/signal_path-a72ab8.sfg create mode 100644 simulation/Release/chesswork/signal_path-f431c2.# create mode 100644 simulation/Release/chesswork/signal_path-f431c2.o create mode 100644 simulation/Release/chesswork/signal_path-f431c2.sfg create mode 100644 simulation/Release/chesswork/signal_path-f66b97.# create mode 100644 simulation/Release/chesswork/signal_path-f66b97.o create mode 100644 simulation/Release/chesswork/signal_path-f66b97.sfg diff --git a/simulation/Release/.cache/clangd/index/signal_path.c.EFF85444D3BB52AD.idx b/simulation/Release/.cache/clangd/index/signal_path.c.EFF85444D3BB52AD.idx index f03adafc6565dadefc86fae197a6e262fd1b2904..b8cb47dd1ecdd3d658a04e281a71f37a569b01c5 100644 GIT binary patch delta 1211 zcmYk6UuaWT9LJaMJ&u-K@~|x@=a1Sc= zVz?p1m*2)1bn4P6>sf~tQs7N>0jZ)G6H36r4dIPPs5RhE1zA7|GW2Lh>HO@ z2IxP>pDYKKqu-t5!G7rdXpj{h+e>FQ9MQSWFWwq|<7x?-8Z)&fsXRJ2dL?wSD_p5~ zlStF9Q#=Wlgk5^*A_bPBL+;;LA8PvOwR>azEWER5`rzH8ivqj_G*PR^Uq1)u91JDR z!#NLwdOaKHJC7@}0Ovxr{2b2b)%*g^7c}Pa(~4&v9p8jXH`H2La}Uv}EKu(Wnd>mZAN&f-`bA6el|HkQTa zECuTa*?qX~Q@-9Cd;<0a4!QrQx$ecqwoRvPhR7hCAzQ=+3Ae#+)87p@W0zsStZwR!RWySwYK9DUW$=k&OXC(jSlzuh3ttwk(oq+A)Z`IT zT!JWJk8D;KWwe)ZK(VPsOgiRk<|%|zSR)g3F$p$FU;8e_hQNlvmE$nja5YbZO@k}P z8L%1p)PFOQfIR`PbTq_uIIqK}_y(Les3p)`IbxQj?!b8DTU1s|y)H#Wi`cGs8PR3h zWE_l`*ll8;w9-Wa?FsBroJTlMKN!ud1XiL+5U0FChaZA(1OKf|I zeJW!K9ZT4+*wQ*Jty}U?>lcIn6#Dq9##A8a&7pM`eBa`5J`PIjq_Db!5Cuegk!GES&WQ`>3MOsIvAgN?%@3k`7x z><+oZJ$&;ebgIMzjwEo3z6{@sq)@r?kdzFOhC7Xb;sLk^sJGF};#xFLXB%58e*!%T cx2)hIiMk~H+_=7`_tzft+4169nr~e9Kha*Cp#T5? delta 1202 zcmYk6TWC~Q6oxzh-pYhI%q@E|PIBgAGN~Ci7&If*#%n6YO4ODbp|lTe z80D1X>A(o9eJIpG!UTn(HZc}yEhYgY8fGd9lt$x(iniJ^fk_@B)Dn6u-Q9E8FCS~I z|6glgj@@VXjn;g89_!|*?%T&lv2JucYkZ9LITp>aZ8Yxh5k>fm2;P}_`q|2XpAtfj zz&}EN`G4dU@CyA9xE>#bF^H(jczNgFA8bBm2v4j0SNO|dXWU}kV(lvO^Cwpa6YumT z-Hhjs^h@xh$b;wMQyPXWfEVcX(DxJzr`Fr>+KAB6aBE8ykt*6>`0q31A|i`ur-ATh z{s@6bbUti~#|S)zsdJtn@Pw*vu_0>+)EYxe2rSW3_|J45O?8A+hlX55(`qBztjVTl z%}4eQAvlB$s!>x8BRJg14%_Ikj1szf{;kiSUHfjgM@WZlci2m0i}$#L7oG8^qTR#G z*jlD|%O!pr!P|7FB@$l%Uw~iLfAed9t=6;Ul*g1MBunIpek!KGr_ii6(UdpAZxTiK zhzals#B|^W_zn6kdL?@fzH|D3o=as)*sf#e7h-tovz(wk8>u|T2m#M$)dipE4E324-w;eW4GUt5XH|NaU zd*{sTo?QCNl6_(8!{em~thuw+CAv1WcWvoRbZvaTy}2#XEs0f&s_L58{r^C9BGJ{| zxxOV{+gev$qi$I{Q*Zj#`qZ3^m@2XJt+=YP=c%iKm>RP4)l564uGlNAnCj1nr8+X2 zELG}{g{o>Lkyzi;+}WCFYunh>T~$@b0QFdAK0;s2imAPs`KlwUI`v&7ti8TIs8o!vv z{}4$IOI+~wFcTpkLnAwAz;E1{>~M!V<1@hXjPd%k@dnKUNb$=kX}XJ#mMxZEpSoYN zq*n*HJX3bx#j|DqT|7sIz}?CDPyzW3yu_KyZzXJZ8!KY`6Q^?*IYX@Iv zj2{PoaF{0paudSC!$Lsfqebcs-UHrk@K3{~9MdUW} zQ6{g4kYftqp)|fEjX!I0l^aauoy+V$oY90-@rT3NXZqFI;ATtIywH5>akVQHSEoYn zC*ycNKOX>X6}mOsfwG^NUj(fm-NS7LZb7c~5F@br20jVy=|cv-PCN$&ji(;iU7>=> za~)mg67$QW4G`BmP_`Sm+rg@$prxiDWC#3xKA&Y571$Glb~tF42koNJ2o6+NX4pah zHpFDufg<8wb*iAks#d=i?69g-YvG`^M_n%*U%3ZM1^7r@Gq4+mil3~HfF(^3;Li7@ zW{s;4jNJ>E8P8cP^Fx2j%KZ4gq;FGdZ*ka{tiuS}RGP^&BKOgh;icfJhzmp*7T35D z-bsT#4ngy%>)eIJI+tfr9-t9fN`nbF=W^mHG`K`p(&~gY#5FV`%`}y6LM!pTG$Na5 zw7!LS7LC5}wLU;WKM=nSUx4jh8m%8BF2E%of42Tl+pp#ttSvDUvJhQ1Z<01pkIRvI+wT}DAWTh;8|;4!ZfY-z|S^x)*vT32EWA6 zmudYR`~-wJZwQw`JeEec@$gA>T%%4T^Y}HSmV4V%WIdNd|GE4d`A`Y$Vn-!O!jK+YOy{?@i?VxQE?&xD8(X z2gG`wW5jyl6mi&zPdfYKC49{Ro$w>EPWXv9>@L84^Wtw3>-amwI^NGW3cK+=$Z}f8 zw9~Uv-J3?_ybhxKnI?vgcA2=^UHB{or}9L8Ahv1TLSB>Q(k6Ho_5$>y%q8hl`=*>p zW@^S?2@kge)ukHC z%W}`=Vop4#55cu+u)Ns5oG)@veNP-GQI?YmRs%l4m8c5PYo$}I(3bRpQVO>f zY@h-`PZWa)G*kl#LS#tr2V#`SharJPzcjqd#$zix%bX_ z-T7(pi6y&&)}NnF-fPv)Sk>9p)w{MQ*3#77_Hsw_8fsecR3y?BYmIfqI#$J+Iy&3B zV@9sLqN%C7r>m;DvNhIP6%~J5Z)B~gY;SJsSU0b-y|X12?{hV~M6(?cS+-w{a;&%g zR+aFll?%bFTCz*_QgPK2i8rP+TjE-JMBGUATM^OVt`JeLU-;50#CosaigIxze#%>9 zxys8p8xa}lm-WqZGS+97mo4e-S=-yQh#xF=WE6NRnx3hMAI{j|a^4~$H(x{^S}CIf zi$hnE-kGFFlJtoreKtv7Nz%U)Id?5QkR&Jz)F<_TG%UJ#CzzBkOVV>#`)I8G>7;y2 zYY*SiO{vsn>E|mWjRtiAf}7H5$2je!J>zr+9U7-I=_G4)FTAsdZnK^w@1=B&i|8>! z_d9IV8OCYWDTcno8Z9wJwM<|o^dOV1hCai3o1s(rZH5iKkhMAG&Q3N8je-lThYX!- z6Fq6@Wvm+v{Q>KRhW>%|JVQ_BU-N{aTUhsuX@?H6v3|^;-&pq>x-6AwqoI3PHyQdQ z>lY0D7whK@J` z247?FSGcb=OV!jH9EU=}|H$Asz-QBZ+2dO!Brip0OaQk!@LEY}JNO*MHygZ9a&ax^ zrOf<*?Q!?HT$WvsFY0si1Ci+|cD8#1J1Mp&AG}}m<(BdhI+8nJEfQ1mwprW7k-U4R zZ|56(@N;WHh8f_vp*DeFO@nwa^_$|i@@hRfJD7T-nTx0{aGRF-qq`i}n)v*ppv$S@ z47d9L*#F$70ZRBMa3}}QBdX>Q)qFWeX!!YDG#6a=eH>i(#b#8Uh?aoQQ1^Tmycocz z>N242&42|wThdxd-($^odunsODFh@`_8pQA)YYN+Lw zngE067I3ffF&Z=xpl3qY%XOfCfZS3+RgXnTlL6{br76nC+MytT2-EGLh+kA5bcsdL zhOAx_8196>(eSr|2LWpRC+@Q!hF)9;!S#KPfd>IZae#WRBj+d4;cFyxhs)qW0MS)| z>LBMWQGW}*uD=5w1n?fT7<4^$NTR+7T-VDf4q^Pc$vNgRMm`GALs|_UQvMupIS>5Z z0@p)|^+I93xGe|gy^PQTxSua>IPy?~fOVAEO&c7D2UKFnNDOO^@HRjm3PkUMKd9>W zf=}m*+W~OB{jeaZ3@#6~;hzSV2MX^jT_c~5l}Ztm6J69r2;TuJ;1c}^Ua1~@9!3p- z=o^3yPz$*~T}g+dhdnIBqv#8PV^QvP2sEE)oD%0Rt4g; (__M_WDMA.9 var=11) st_def () <18>; (__R_SP.24 var=26) st_def () <48>; @@ -237,737 +234,731 @@ F_main { (__sp.32 var=34) source () <56>; (b0.33 var=35) source () <57>; (b1.34 var=36) source () <58>; - (_ZL16corrupted_signal.35 var=37) source () <59>; + (_ZL17c_sensor_signal_t.35 var=37) source () <59>; (__extDM_SingleSignalPath.36 var=38) source () <60>; - (_ZL22reference_noise_signal.37 var=39) source () <61>; + (_ZL19acc_sensor_signal_t.37 var=39) source () <61>; (d0.44 var=46) source () <68>; (d1.45 var=47) source () <69>; (_ZL10input_port.46 var=48) source () <70>; (__extDM_int16_.47 var=49) source () <71>; - (_ZZ4mainvE4mode.48 var=50) source () <72>; - (_ZL11output_port.49 var=51) source () <73>; - (__extDM_void.51 var=53) source () <75>; - (__extPM_void.52 var=54) source () <76>; - (__extDM_int64_.53 var=55) source () <77>; - (__extDM_int8_.54 var=56) source () <78>; - (__extPM_FILE.55 var=57) source () <79>; - (__extDM_int32_.56 var=58) source () <80>; - (__ptr_corrupted_signal.58 var=61) const () <82>; - (__ptr_reference_noise_signal.60 var=63) const () <84>; - (__ct_0.84 var=84) const () <108>; - (__la.86 var=85 stl=LR off=0) inp () <110>; - (__la.87 var=85) deassign (__la.86) <111>; - (__rd___sp.90 var=59) rd_res_reg (__R_SP.24 __sp.32) <114>; - (__R_SP.94 var=26 __sp.95 var=34) wr_res_reg (__rt.1727 __sp.32) <118>; - (__rd___sp.96 var=59) rd_res_reg (__R_SP.24 __sp.95) <120>; - (__ct_4604930618986332160.123 var=113) const () <147>; - (__M_LDMA.128 var=14 b0.129 var=35) store (__ct_4604930618986332160.123 __rt.1749 b0.33) <152>; - (__ct_0.130 var=118) const () <153>; - (__M_LDMA.135 var=14 b0.136 var=35) store (__ct_0.130 __rt.1913 b0.129) <158>; - (__M_LDMA.142 var=14 b0.143 var=35) store (__ct_0.130 __rt.1935 b0.136) <164>; - (__M_LDMA.149 var=14 b0.150 var=35) store (__ct_0.130 __rt.1957 b0.143) <170>; - (__M_LDMA.156 var=14 b0.157 var=35) store (__ct_0.130 __rt.1979 b0.150) <176>; - (__M_LDMA.163 var=14 b1.164 var=36) store (__ct_4604930618986332160.123 __rt.1771 b1.34) <182>; - (__M_LDMA.170 var=14 b1.171 var=36) store (__ct_0.130 __rt.2001 b1.164) <188>; - (__M_LDMA.177 var=14 b1.178 var=36) store (__ct_0.130 __rt.2023 b1.171) <194>; - (__M_LDMA.184 var=14 b1.185 var=36) store (__ct_0.130 __rt.2045 b1.178) <200>; - (__M_LDMA.191 var=14 b1.192 var=36) store (__ct_0.130 __rt.2067 b1.185) <206>; - (__ct_2.197 var=163) const () <211>; - (__ct_4606281698874543309.203 var=167) const () <217>; - (__ct_4576918229304087675.209 var=171) const () <223>; - (__ct_64.212 var=173) const () <226>; - (_Z4initP16SingleSignalPathS0_PdS1_iidddi.215 var=175) const () <229>; - (__link.217 var=177) dmaddr__call_dmaddr_ (_Z4initP16SingleSignalPathS0_PdS1_iidddi.215) <231>; - (__rt.1727 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.90 __ct_m88S0.2080) <1472>; - (__rt.1749 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_0t0.2082) <1500>; - (__rt.1771 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_40t0.2083) <1528>; - (__rt.1913 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_8t0.2094) <1712>; - (__rt.1935 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_16t0.2097) <1740>; - (__rt.1957 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_24t0.2100) <1768>; - (__rt.1979 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_32t0.2103) <1796>; - (__rt.2001 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_48t0.2106) <1824>; - (__rt.2023 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_56t0.2109) <1852>; - (__rt.2045 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_64t0.2112) <1880>; - (__rt.2067 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_72t0.2115) <1908>; - (__ct_m88S0.2080 var=402) const () <1969>; - (__ct_0t0.2082 var=404) const () <1973>; - (__ct_40t0.2083 var=405) const () <1975>; - (__ct_8t0.2094 var=416) const () <1997>; - (__ct_16t0.2097 var=419) const () <2003>; - (__ct_24t0.2100 var=422) const () <2009>; - (__ct_32t0.2103 var=425) const () <2015>; - (__ct_48t0.2106 var=428) const () <2021>; - (__ct_56t0.2109 var=431) const () <2027>; - (__ct_64t0.2112 var=434) const () <2033>; - (__ct_72t0.2115 var=437) const () <2039>; + (_ZL11output_port.48 var=50) source () <72>; + (__extDM_void.50 var=52) source () <74>; + (__extPM_void.51 var=53) source () <75>; + (__extDM_int64_.52 var=54) source () <76>; + (__extDM_int8_.53 var=55) source () <77>; + (__extPM_FILE.54 var=56) source () <78>; + (__extDM_int32_.55 var=57) source () <79>; + (__ptr_c_sensor_signal_t.57 var=60) const () <81>; + (__ptr_acc_sensor_signal_t.59 var=62) const () <83>; + (__ct_0.81 var=81) const () <105>; + (__la.83 var=82 stl=LR off=0) inp () <107>; + (__la.84 var=82) deassign (__la.83) <108>; + (__rd___sp.87 var=58) rd_res_reg (__R_SP.24 __sp.32) <111>; + (__R_SP.91 var=26 __sp.92 var=34) wr_res_reg (__rt.1692 __sp.32) <115>; + (__rd___sp.93 var=58) rd_res_reg (__R_SP.24 __sp.92) <117>; + (__ct_4604930618986332160.120 var=110) const () <144>; + (__M_LDMA.125 var=14 b0.126 var=35) store (__ct_4604930618986332160.120 __rt.1714 b0.33) <149>; + (__ct_0.127 var=115) const () <150>; + (__M_LDMA.132 var=14 b0.133 var=35) store (__ct_0.127 __rt.1878 b0.126) <155>; + (__M_LDMA.139 var=14 b0.140 var=35) store (__ct_0.127 __rt.1900 b0.133) <161>; + (__M_LDMA.146 var=14 b0.147 var=35) store (__ct_0.127 __rt.1922 b0.140) <167>; + (__M_LDMA.153 var=14 b0.154 var=35) store (__ct_0.127 __rt.1944 b0.147) <173>; + (__M_LDMA.160 var=14 b1.161 var=36) store (__ct_4604930618986332160.120 __rt.1736 b1.34) <179>; + (__M_LDMA.167 var=14 b1.168 var=36) store (__ct_0.127 __rt.1966 b1.161) <185>; + (__M_LDMA.174 var=14 b1.175 var=36) store (__ct_0.127 __rt.1988 b1.168) <191>; + (__M_LDMA.181 var=14 b1.182 var=36) store (__ct_0.127 __rt.2010 b1.175) <197>; + (__M_LDMA.188 var=14 b1.189 var=36) store (__ct_0.127 __rt.2032 b1.182) <203>; + (__ct_2.194 var=160) const () <208>; + (__ct_4606281698874543309.200 var=164) const () <214>; + (__ct_4576918229304087675.206 var=168) const () <220>; + (__ct_64.209 var=170) const () <223>; + (_Z4initP16SingleSignalPathS0_PdS1_iidddi.212 var=172) const () <226>; + (__link.214 var=174) dmaddr__call_dmaddr_ (_Z4initP16SingleSignalPathS0_PdS1_iidddi.212) <228>; + (__rt.1692 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.87 __ct_m88S0.2045) <1439>; + (__rt.1714 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.93 __ct_0t0.2047) <1467>; + (__rt.1736 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.93 __ct_40t0.2048) <1495>; + (__rt.1878 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.93 __ct_8t0.2059) <1679>; + (__rt.1900 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.93 __ct_16t0.2062) <1707>; + (__rt.1922 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.93 __ct_24t0.2065) <1735>; + (__rt.1944 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.93 __ct_32t0.2068) <1763>; + (__rt.1966 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.93 __ct_48t0.2071) <1791>; + (__rt.1988 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.93 __ct_56t0.2074) <1819>; + (__rt.2010 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.93 __ct_64t0.2077) <1847>; + (__rt.2032 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.93 __ct_72t0.2080) <1875>; + (__ct_m88S0.2045 var=398) const () <1935>; + (__ct_0t0.2047 var=400) const () <1939>; + (__ct_40t0.2048 var=401) const () <1941>; + (__ct_8t0.2059 var=412) const () <1963>; + (__ct_16t0.2062 var=415) const () <1969>; + (__ct_24t0.2065 var=418) const () <1975>; + (__ct_32t0.2068 var=421) const () <1981>; + (__ct_48t0.2071 var=424) const () <1987>; + (__ct_56t0.2074 var=427) const () <1993>; + (__ct_64t0.2077 var=430) const () <1999>; + (__ct_72t0.2080 var=433) const () <2005>; call { - (__ptr_corrupted_signal.193 var=60 stl=A off=0) assign (__ptr_corrupted_signal.58) <207>; - (__ptr_reference_noise_signal.194 var=62 stl=A off=1) assign (__ptr_reference_noise_signal.60) <208>; - (__ptr_b0.195 var=90 stl=A off=2) assign (__rt.1749) <209>; - (__ptr_b1.196 var=94 stl=A off=3) assign (__rt.1771) <210>; - (__ct.199 var=164 stl=RA off=0) assign (__ct_2.197) <213>; - (__ct.202 var=166 stl=RA off=1) assign (__ct_2.197) <216>; - (__ct.205 var=168 stl=AX off=0) assign (__ct_4606281698874543309.203) <219>; - (__ct.208 var=170 stl=AX off=1) assign (__ct_4606281698874543309.203) <222>; - (__ct.211 var=172 stl=BX off=0) assign (__ct_4576918229304087675.209) <225>; - (__ct.214 var=174 stl=RB off=0) assign (__ct_64.212) <228>; - (__link.218 var=177 stl=LR off=0) assign (__link.217) <232>; - (_ZL10input_port.219 var=48 _ZL11output_port.220 var=51 _ZL16corrupted_signal.221 var=37 _ZL22reference_noise_signal.222 var=39 __extDM.223 var=32 __extDM_SingleSignalPath.224 var=38 __extDM_int16_.225 var=49 __extDM_int32_.226 var=58 __extDM_int64_.227 var=55 __extDM_int8_.228 var=56 __extDM_void.229 var=53 __extPM.230 var=33 __extPM_FILE.231 var=57 __extPM_void.232 var=54 b0.233 var=35 b1.234 var=36 __vola.235 var=29) F_Z4initP16SingleSignalPathS0_PdS1_iidddi (__link.218 __ptr_corrupted_signal.193 __ptr_reference_noise_signal.194 __ptr_b0.195 __ptr_b1.196 __ct.199 __ct.202 __ct.205 __ct.208 __ct.211 __ct.214 _ZL10input_port.46 _ZL11output_port.49 _ZL16corrupted_signal.35 _ZL22reference_noise_signal.37 __extDM.30 __extDM_SingleSignalPath.36 __extDM_int16_.47 __extDM_int32_.56 __extDM_int64_.53 __extDM_int8_.54 __extDM_void.51 __extPM.31 __extPM_FILE.55 __extPM_void.52 b0.157 b1.192 __vola.27) <233>; + (__ptr_c_sensor_signal_t.190 var=59 stl=A off=0) assign (__ptr_c_sensor_signal_t.57) <204>; + (__ptr_acc_sensor_signal_t.191 var=61 stl=A off=1) assign (__ptr_acc_sensor_signal_t.59) <205>; + (__ptr_b0.192 var=87 stl=A off=2) assign (__rt.1714) <206>; + (__ptr_b1.193 var=91 stl=A off=3) assign (__rt.1736) <207>; + (__ct.196 var=161 stl=RA off=0) assign (__ct_2.194) <210>; + (__ct.199 var=163 stl=RA off=1) assign (__ct_2.194) <213>; + (__ct.202 var=165 stl=AX off=0) assign (__ct_4606281698874543309.200) <216>; + (__ct.205 var=167 stl=AX off=1) assign (__ct_4606281698874543309.200) <219>; + (__ct.208 var=169 stl=BX off=0) assign (__ct_4576918229304087675.206) <222>; + (__ct.211 var=171 stl=RB off=0) assign (__ct_64.209) <225>; + (__link.215 var=174 stl=LR off=0) assign (__link.214) <229>; + (_ZL10input_port.216 var=48 _ZL11output_port.217 var=50 _ZL17c_sensor_signal_t.218 var=37 _ZL19acc_sensor_signal_t.219 var=39 __extDM.220 var=32 __extDM_SingleSignalPath.221 var=38 __extDM_int16_.222 var=49 __extDM_int32_.223 var=57 __extDM_int64_.224 var=54 __extDM_int8_.225 var=55 __extDM_void.226 var=52 __extPM.227 var=33 __extPM_FILE.228 var=56 __extPM_void.229 var=53 b0.230 var=35 b1.231 var=36 __vola.232 var=29) F_Z4initP16SingleSignalPathS0_PdS1_iidddi (__link.215 __ptr_c_sensor_signal_t.190 __ptr_acc_sensor_signal_t.191 __ptr_b0.192 __ptr_b1.193 __ct.196 __ct.199 __ct.202 __ct.205 __ct.208 __ct.211 _ZL10input_port.46 _ZL11output_port.48 _ZL17c_sensor_signal_t.35 _ZL19acc_sensor_signal_t.37 __extDM.30 __extDM_SingleSignalPath.36 __extDM_int16_.47 __extDM_int32_.55 __extDM_int64_.52 __extDM_int8_.53 __extDM_void.50 __extPM.31 __extPM_FILE.54 __extPM_void.51 b0.154 b1.189 __vola.27) <230>; } #4 off=1 #5 off=2 - (__ptr___str8a4fef85.62 var=65) const () <86>; - (__ptr___str00f02b8f.64 var=67) const () <88>; - (fopen.239 var=178) const () <237>; - (__link.241 var=180) dmaddr__call_dmaddr_ (fopen.239) <239>; + (__ptr___strdb58f936.61 var=64) const () <85>; + (__ptr___str00f02b8f.63 var=66) const () <87>; + (fopen.236 var=175) const () <234>; + (__link.238 var=177) dmaddr__call_dmaddr_ (fopen.236) <236>; call { - (__ptr___str8a4fef85.237 var=64 stl=A off=1) assign (__ptr___str8a4fef85.62) <235>; - (__ptr___str00f02b8f.238 var=66 stl=A off=2) assign (__ptr___str00f02b8f.64) <236>; - (__link.242 var=180 stl=LR off=0) assign (__link.241) <240>; - (__tmp.243 var=181 stl=A off=0 _ZL10input_port.246 var=48 _ZL11output_port.247 var=51 _ZL16corrupted_signal.248 var=37 _ZL22reference_noise_signal.249 var=39 __extDM.250 var=32 __extDM_SingleSignalPath.251 var=38 __extDM_int16_.252 var=49 __extDM_int32_.253 var=58 __extDM_int64_.254 var=55 __extDM_int8_.255 var=56 __extDM_void.256 var=53 __extPM.257 var=33 __extPM_FILE.258 var=57 __extPM_void.259 var=54 b0.260 var=35 b1.261 var=36 __vola.262 var=29) Ffopen (__link.242 __ptr___str8a4fef85.237 __ptr___str00f02b8f.238 _ZL10input_port.219 _ZL11output_port.220 _ZL16corrupted_signal.221 _ZL22reference_noise_signal.222 __extDM.223 __extDM_SingleSignalPath.224 __extDM_int16_.225 __extDM_int32_.226 __extDM_int64_.227 __extDM_int8_.228 __extDM_void.229 __extPM.230 __extPM_FILE.231 __extPM_void.232 b0.233 b1.234 __vola.235) <241>; - (__tmp.244 var=181) deassign (__tmp.243) <242>; + (__ptr___strdb58f936.234 var=63 stl=A off=1) assign (__ptr___strdb58f936.61) <232>; + (__ptr___str00f02b8f.235 var=65 stl=A off=2) assign (__ptr___str00f02b8f.63) <233>; + (__link.239 var=177 stl=LR off=0) assign (__link.238) <237>; + (__tmp.240 var=178 stl=A off=0 _ZL10input_port.243 var=48 _ZL11output_port.244 var=50 _ZL17c_sensor_signal_t.245 var=37 _ZL19acc_sensor_signal_t.246 var=39 __extDM.247 var=32 __extDM_SingleSignalPath.248 var=38 __extDM_int16_.249 var=49 __extDM_int32_.250 var=57 __extDM_int64_.251 var=54 __extDM_int8_.252 var=55 __extDM_void.253 var=52 __extPM.254 var=33 __extPM_FILE.255 var=56 __extPM_void.256 var=53 b0.257 var=35 b1.258 var=36 __vola.259 var=29) Ffopen (__link.239 __ptr___strdb58f936.234 __ptr___str00f02b8f.235 _ZL10input_port.216 _ZL11output_port.217 _ZL17c_sensor_signal_t.218 _ZL19acc_sensor_signal_t.219 __extDM.220 __extDM_SingleSignalPath.221 __extDM_int16_.222 __extDM_int32_.223 __extDM_int64_.224 __extDM_int8_.225 __extDM_void.226 __extPM.227 __extPM_FILE.228 __extPM_void.229 b0.230 b1.231 __vola.232) <238>; + (__tmp.241 var=178) deassign (__tmp.240) <239>; } #6 off=3 #7 off=4 - (__ptr___strff0646f3.66 var=69) const () <90>; - (__link.268 var=184) dmaddr__call_dmaddr_ (fopen.239) <249>; + (__ptr___strff0646f3.65 var=68) const () <89>; + (__link.265 var=181) dmaddr__call_dmaddr_ (fopen.236) <246>; call { - (__ptr___strff0646f3.264 var=68 stl=A off=1) assign (__ptr___strff0646f3.66) <245>; - (__ptr___str00f02b8f.265 var=66 stl=A off=2) assign (__ptr___str00f02b8f.64) <246>; - (__link.269 var=184 stl=LR off=0) assign (__link.268) <250>; - (__tmp.270 var=185 stl=A off=0 _ZL10input_port.273 var=48 _ZL11output_port.274 var=51 _ZL16corrupted_signal.275 var=37 _ZL22reference_noise_signal.276 var=39 __extDM.277 var=32 __extDM_SingleSignalPath.278 var=38 __extDM_int16_.279 var=49 __extDM_int32_.280 var=58 __extDM_int64_.281 var=55 __extDM_int8_.282 var=56 __extDM_void.283 var=53 __extPM.284 var=33 __extPM_FILE.285 var=57 __extPM_void.286 var=54 b0.287 var=35 b1.288 var=36 __vola.289 var=29) Ffopen (__link.269 __ptr___strff0646f3.264 __ptr___str00f02b8f.265 _ZL10input_port.246 _ZL11output_port.247 _ZL16corrupted_signal.248 _ZL22reference_noise_signal.249 __extDM.250 __extDM_SingleSignalPath.251 __extDM_int16_.252 __extDM_int32_.253 __extDM_int64_.254 __extDM_int8_.255 __extDM_void.256 __extPM.257 __extPM_FILE.258 __extPM_void.259 b0.260 b1.261 __vola.262) <251>; - (__tmp.271 var=185) deassign (__tmp.270) <252>; + (__ptr___strff0646f3.261 var=67 stl=A off=1) assign (__ptr___strff0646f3.65) <242>; + (__ptr___str00f02b8f.262 var=65 stl=A off=2) assign (__ptr___str00f02b8f.63) <243>; + (__link.266 var=181 stl=LR off=0) assign (__link.265) <247>; + (__tmp.267 var=182 stl=A off=0 _ZL10input_port.270 var=48 _ZL11output_port.271 var=50 _ZL17c_sensor_signal_t.272 var=37 _ZL19acc_sensor_signal_t.273 var=39 __extDM.274 var=32 __extDM_SingleSignalPath.275 var=38 __extDM_int16_.276 var=49 __extDM_int32_.277 var=57 __extDM_int64_.278 var=54 __extDM_int8_.279 var=55 __extDM_void.280 var=52 __extPM.281 var=33 __extPM_FILE.282 var=56 __extPM_void.283 var=53 b0.284 var=35 b1.285 var=36 __vola.286 var=29) Ffopen (__link.266 __ptr___strff0646f3.261 __ptr___str00f02b8f.262 _ZL10input_port.243 _ZL11output_port.244 _ZL17c_sensor_signal_t.245 _ZL19acc_sensor_signal_t.246 __extDM.247 __extDM_SingleSignalPath.248 __extDM_int16_.249 __extDM_int32_.250 __extDM_int64_.251 __extDM_int8_.252 __extDM_void.253 __extPM.254 __extPM_FILE.255 __extPM_void.256 b0.257 b1.258 __vola.259) <248>; + (__tmp.268 var=182) deassign (__tmp.267) <249>; } #8 off=5 #9 off=6 - (__ptr___str8a32ec0e.68 var=71) const () <92>; - (__ptr___str00f52cca.70 var=73) const () <94>; - (__link.295 var=188) dmaddr__call_dmaddr_ (fopen.239) <259>; + (__ptr___str8a32ec0e.67 var=70) const () <91>; + (__ptr___str00f52cca.69 var=72) const () <93>; + (__link.292 var=185) dmaddr__call_dmaddr_ (fopen.236) <256>; call { - (__ptr___str8a32ec0e.291 var=70 stl=A off=1) assign (__ptr___str8a32ec0e.68) <255>; - (__ptr___str00f52cca.292 var=72 stl=A off=2) assign (__ptr___str00f52cca.70) <256>; - (__link.296 var=188 stl=LR off=0) assign (__link.295) <260>; - (__tmp.297 var=189 stl=A off=0 _ZL10input_port.300 var=48 _ZL11output_port.301 var=51 _ZL16corrupted_signal.302 var=37 _ZL22reference_noise_signal.303 var=39 __extDM.304 var=32 __extDM_SingleSignalPath.305 var=38 __extDM_int16_.306 var=49 __extDM_int32_.307 var=58 __extDM_int64_.308 var=55 __extDM_int8_.309 var=56 __extDM_void.310 var=53 __extPM.311 var=33 __extPM_FILE.312 var=57 __extPM_void.313 var=54 b0.314 var=35 b1.315 var=36 __vola.316 var=29) Ffopen (__link.296 __ptr___str8a32ec0e.291 __ptr___str00f52cca.292 _ZL10input_port.273 _ZL11output_port.274 _ZL16corrupted_signal.275 _ZL22reference_noise_signal.276 __extDM.277 __extDM_SingleSignalPath.278 __extDM_int16_.279 __extDM_int32_.280 __extDM_int64_.281 __extDM_int8_.282 __extDM_void.283 __extPM.284 __extPM_FILE.285 __extPM_void.286 b0.287 b1.288 __vola.289) <261>; - (__tmp.298 var=189) deassign (__tmp.297) <262>; + (__ptr___str8a32ec0e.288 var=69 stl=A off=1) assign (__ptr___str8a32ec0e.67) <252>; + (__ptr___str00f52cca.289 var=71 stl=A off=2) assign (__ptr___str00f52cca.69) <253>; + (__link.293 var=185 stl=LR off=0) assign (__link.292) <257>; + (__tmp.294 var=186 stl=A off=0 _ZL10input_port.297 var=48 _ZL11output_port.298 var=50 _ZL17c_sensor_signal_t.299 var=37 _ZL19acc_sensor_signal_t.300 var=39 __extDM.301 var=32 __extDM_SingleSignalPath.302 var=38 __extDM_int16_.303 var=49 __extDM_int32_.304 var=57 __extDM_int64_.305 var=54 __extDM_int8_.306 var=55 __extDM_void.307 var=52 __extPM.308 var=33 __extPM_FILE.309 var=56 __extPM_void.310 var=53 b0.311 var=35 b1.312 var=36 __vola.313 var=29) Ffopen (__link.293 __ptr___str8a32ec0e.288 __ptr___str00f52cca.289 _ZL10input_port.270 _ZL11output_port.271 _ZL17c_sensor_signal_t.272 _ZL19acc_sensor_signal_t.273 __extDM.274 __extDM_SingleSignalPath.275 __extDM_int16_.276 __extDM_int32_.277 __extDM_int64_.278 __extDM_int8_.279 __extDM_void.280 __extPM.281 __extPM_FILE.282 __extPM_void.283 b0.284 b1.285 __vola.286) <258>; + (__tmp.295 var=186) deassign (__tmp.294) <259>; } #10 off=7 #11 off=8 - (feof.318 var=190) const () <265>; - (__link.320 var=192) dmaddr__call_dmaddr_ (feof.318) <267>; + (feof.315 var=187) const () <262>; + (__link.317 var=189) dmaddr__call_dmaddr_ (feof.315) <264>; call { - (fp1.317 var=106 stl=A off=0) assign (__tmp.244) <264>; - (__link.321 var=192 stl=LR off=0) assign (__link.320) <268>; - (__tmp.322 var=193 stl=RA off=0 _ZL10input_port.325 var=48 _ZL11output_port.326 var=51 _ZL16corrupted_signal.327 var=37 _ZL22reference_noise_signal.328 var=39 __extDM.329 var=32 __extDM_SingleSignalPath.330 var=38 __extDM_int16_.331 var=49 __extDM_int32_.332 var=58 __extDM_int64_.333 var=55 __extDM_int8_.334 var=56 __extDM_void.335 var=53 __extPM.336 var=33 __extPM_FILE.337 var=57 __extPM_void.338 var=54 b0.339 var=35 b1.340 var=36 __vola.341 var=29) Ffeof (__link.321 fp1.317 _ZL10input_port.300 _ZL11output_port.301 _ZL16corrupted_signal.302 _ZL22reference_noise_signal.303 __extDM.304 __extDM_SingleSignalPath.305 __extDM_int16_.306 __extDM_int32_.307 __extDM_int64_.308 __extDM_int8_.309 __extDM_void.310 __extPM.311 __extPM_FILE.312 __extPM_void.313 b0.314 b1.315 __vola.316) <269>; - (__tmp.323 var=193) deassign (__tmp.322) <270>; + (fp1.314 var=103 stl=A off=0) assign (__tmp.241) <261>; + (__link.318 var=189 stl=LR off=0) assign (__link.317) <265>; + (__tmp.319 var=190 stl=RA off=0 _ZL10input_port.322 var=48 _ZL11output_port.323 var=50 _ZL17c_sensor_signal_t.324 var=37 _ZL19acc_sensor_signal_t.325 var=39 __extDM.326 var=32 __extDM_SingleSignalPath.327 var=38 __extDM_int16_.328 var=49 __extDM_int32_.329 var=57 __extDM_int64_.330 var=54 __extDM_int8_.331 var=55 __extDM_void.332 var=52 __extPM.333 var=33 __extPM_FILE.334 var=56 __extPM_void.335 var=53 b0.336 var=35 b1.337 var=36 __vola.338 var=29) Ffeof (__link.318 fp1.314 _ZL10input_port.297 _ZL11output_port.298 _ZL17c_sensor_signal_t.299 _ZL19acc_sensor_signal_t.300 __extDM.301 __extDM_SingleSignalPath.302 __extDM_int16_.303 __extDM_int32_.304 __extDM_int64_.305 __extDM_int8_.306 __extDM_void.307 __extPM.308 __extPM_FILE.309 __extPM_void.310 b0.311 b1.312 __vola.313) <266>; + (__tmp.320 var=190) deassign (__tmp.319) <267>; } #12 off=9 - #692 off=10 - (__ct_0.125 var=115) const () <149>; - (__tmp.2130 var=443) uint3__cmp_int72__int72_ (__tmp.323 __ct_0.125) <2064>; - (__tmp.2140 var=386) bool_nequal_uint3_ (__tmp.2130) <2123>; - (__trgt.2149 var=457) const () <2220>; - () void_jump_bool_int10_ (__tmp.2140 __trgt.2149) <2221>; - (__either.2150 var=456) undefined () <2222>; + #717 off=10 + (__ct_0.122 var=112) const () <146>; + (__tmp.2095 var=439) uint3__cmp_int72__int72_ (__tmp.320 __ct_0.122) <2030>; + (__tmp.2105 var=382) bool_nequal_uint3_ (__tmp.2095) <2088>; + (__trgt.2114 var=453) const () <2183>; + () void_jump_bool_int10_ (__tmp.2105 __trgt.2114) <2184>; + (__either.2115 var=452) undefined () <2185>; if { { - () if_expr (__either.2150) <330>; + () if_expr (__either.2115) <325>; } #15 { - (__true.2156 var=454) const () <2230>; + (__true.2121 var=450) const () <2193>; } #16 { #18 off=11 - (__link.405 var=201) dmaddr__call_dmaddr_ (feof.318) <336>; + (__link.400 var=198) dmaddr__call_dmaddr_ (feof.315) <331>; call { - (fp2.402 var=107 stl=A off=0) assign (__tmp.271) <333>; - (__link.406 var=201 stl=LR off=0) assign (__link.405) <337>; - (__tmp.407 var=202 stl=RA off=0 _ZL10input_port.410 var=48 _ZL11output_port.411 var=51 _ZL16corrupted_signal.412 var=37 _ZL22reference_noise_signal.413 var=39 __extDM.414 var=32 __extDM_SingleSignalPath.415 var=38 __extDM_int16_.416 var=49 __extDM_int32_.417 var=58 __extDM_int64_.418 var=55 __extDM_int8_.419 var=56 __extDM_void.420 var=53 __extPM.421 var=33 __extPM_FILE.422 var=57 __extPM_void.423 var=54 b0.424 var=35 b1.425 var=36 __vola.426 var=29) Ffeof (__link.406 fp2.402 _ZL10input_port.325 _ZL11output_port.326 _ZL16corrupted_signal.327 _ZL22reference_noise_signal.328 __extDM.329 __extDM_SingleSignalPath.330 __extDM_int16_.331 __extDM_int32_.332 __extDM_int64_.333 __extDM_int8_.334 __extDM_void.335 __extPM.336 __extPM_FILE.337 __extPM_void.338 b0.339 b1.340 __vola.341) <338>; - (__tmp.408 var=202) deassign (__tmp.407) <339>; + (fp2.397 var=104 stl=A off=0) assign (__tmp.268) <328>; + (__link.401 var=198 stl=LR off=0) assign (__link.400) <332>; + (__tmp.402 var=199 stl=RA off=0 _ZL10input_port.405 var=48 _ZL11output_port.406 var=50 _ZL17c_sensor_signal_t.407 var=37 _ZL19acc_sensor_signal_t.408 var=39 __extDM.409 var=32 __extDM_SingleSignalPath.410 var=38 __extDM_int16_.411 var=49 __extDM_int32_.412 var=57 __extDM_int64_.413 var=54 __extDM_int8_.414 var=55 __extDM_void.415 var=52 __extPM.416 var=33 __extPM_FILE.417 var=56 __extPM_void.418 var=53 b0.419 var=35 b1.420 var=36 __vola.421 var=29) Ffeof (__link.401 fp2.397 _ZL10input_port.322 _ZL11output_port.323 _ZL17c_sensor_signal_t.324 _ZL19acc_sensor_signal_t.325 __extDM.326 __extDM_SingleSignalPath.327 __extDM_int16_.328 __extDM_int32_.329 __extDM_int64_.330 __extDM_int8_.331 __extDM_void.332 __extPM.333 __extPM_FILE.334 __extPM_void.335 b0.336 b1.337 __vola.338) <333>; + (__tmp.403 var=199) deassign (__tmp.402) <334>; } #19 off=12 - #686 off=13 - (__tmp.2120 var=443) uint3__cmp_int72__int72_ (__tmp.408 __ct_0.125) <2048>; - (__tmp.2145 var=205) bool_nequal_uint3_ (__tmp.2120) <2172>; - (__trgt.2157 var=460) const () <2231>; - () void_jump_bool_int10_ (__tmp.2145 __trgt.2157) <2232>; - (__either.2158 var=456) undefined () <2233>; + #711 off=13 + (__tmp.2085 var=439) uint3__cmp_int72__int72_ (__tmp.403 __ct_0.122) <2014>; + (__tmp.2110 var=202) bool_nequal_uint3_ (__tmp.2085) <2136>; + (__trgt.2122 var=456) const () <2194>; + () void_jump_bool_int10_ (__tmp.2110 __trgt.2122) <2195>; + (__either.2123 var=452) undefined () <2196>; } #17 { - (__vola.431 var=29) merge (__vola.341 __vola.426) <345>; - (__extDM.432 var=32) merge (__extDM.329 __extDM.414) <346>; - (__extPM.433 var=33) merge (__extPM.336 __extPM.421) <347>; - (b0.434 var=35) merge (b0.339 b0.424) <348>; - (b1.435 var=36) merge (b1.340 b1.425) <349>; - (_ZL16corrupted_signal.436 var=37) merge (_ZL16corrupted_signal.327 _ZL16corrupted_signal.412) <350>; - (__extDM_SingleSignalPath.437 var=38) merge (__extDM_SingleSignalPath.330 __extDM_SingleSignalPath.415) <351>; - (_ZL22reference_noise_signal.438 var=39) merge (_ZL22reference_noise_signal.328 _ZL22reference_noise_signal.413) <352>; - (_ZL10input_port.439 var=48) merge (_ZL10input_port.325 _ZL10input_port.410) <353>; - (__extDM_int16_.440 var=49) merge (__extDM_int16_.331 __extDM_int16_.416) <354>; - (_ZL11output_port.441 var=51) merge (_ZL11output_port.326 _ZL11output_port.411) <355>; - (__extDM_void.442 var=53) merge (__extDM_void.335 __extDM_void.420) <356>; - (__extPM_void.443 var=54) merge (__extPM_void.338 __extPM_void.423) <357>; - (__extDM_int64_.444 var=55) merge (__extDM_int64_.333 __extDM_int64_.418) <358>; - (__extDM_int8_.445 var=56) merge (__extDM_int8_.334 __extDM_int8_.419) <359>; - (__extPM_FILE.446 var=57) merge (__extPM_FILE.337 __extPM_FILE.422) <360>; - (__extDM_int32_.447 var=58) merge (__extDM_int32_.332 __extDM_int32_.417) <361>; - (__tmp.2146 var=206) merge (__true.2156 __either.2158) <2173>; + (__vola.426 var=29) merge (__vola.338 __vola.421) <340>; + (__extDM.427 var=32) merge (__extDM.326 __extDM.409) <341>; + (__extPM.428 var=33) merge (__extPM.333 __extPM.416) <342>; + (b0.429 var=35) merge (b0.336 b0.419) <343>; + (b1.430 var=36) merge (b1.337 b1.420) <344>; + (_ZL17c_sensor_signal_t.431 var=37) merge (_ZL17c_sensor_signal_t.324 _ZL17c_sensor_signal_t.407) <345>; + (__extDM_SingleSignalPath.432 var=38) merge (__extDM_SingleSignalPath.327 __extDM_SingleSignalPath.410) <346>; + (_ZL19acc_sensor_signal_t.433 var=39) merge (_ZL19acc_sensor_signal_t.325 _ZL19acc_sensor_signal_t.408) <347>; + (_ZL10input_port.434 var=48) merge (_ZL10input_port.322 _ZL10input_port.405) <348>; + (__extDM_int16_.435 var=49) merge (__extDM_int16_.328 __extDM_int16_.411) <349>; + (_ZL11output_port.436 var=50) merge (_ZL11output_port.323 _ZL11output_port.406) <350>; + (__extDM_void.437 var=52) merge (__extDM_void.332 __extDM_void.415) <351>; + (__extPM_void.438 var=53) merge (__extPM_void.335 __extPM_void.418) <352>; + (__extDM_int64_.439 var=54) merge (__extDM_int64_.330 __extDM_int64_.413) <353>; + (__extDM_int8_.440 var=55) merge (__extDM_int8_.331 __extDM_int8_.414) <354>; + (__extPM_FILE.441 var=56) merge (__extPM_FILE.334 __extPM_FILE.417) <355>; + (__extDM_int32_.442 var=57) merge (__extDM_int32_.329 __extDM_int32_.412) <356>; + (__tmp.2111 var=203) merge (__true.2121 __either.2123) <2137>; } #21 } #14 if { { - () if_expr (__tmp.2146) <418>; - () chess_frequent_else () <419>; - () chess_rear_then () <2234>; + () if_expr (__tmp.2111) <411>; + () chess_frequent_else () <412>; + () chess_rear_then () <2197>; } #24 { - (__trgt.2159 var=461) const () <2235>; - () void_jump_int10_ (__trgt.2159) <2236>; + (__trgt.2124 var=457) const () <2198>; + () void_jump_int10_ (__trgt.2124) <2199>; } #72 off=30 { - #92 off=14 - (__ptr___str41232700.72 var=75) const () <96>; - (__ct_8388608.74 var=77) const () <98>; - (__ptr_mode.77 var=79) const () <101>; - (__ct_8388624.79 var=81) const () <103>; - (__ptr___str2eb09b76.82 var=83) const () <106>; - (fscanf.678 var=213) const () <596>; - (__fch__ZZ4mainvE4mode.892 var=242) load (__M_WDMA.9 __ptr_mode.77 _ZZ4mainvE4mode.48) <715>; - (_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.903 var=249) const () <726>; - (fprintf.1053 var=263) const () <858>; - (__rt.1793 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_80t0.2086) <1556>; - (__rt.1815 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_84t0.2089) <1584>; - (__ct_80t0.2086 var=408) const () <1981>; - (__ct_84t0.2089 var=411) const () <1987>; - (__ct_2.2092 var=414) const () <1993>; - (__trgt.2151 var=458) const () <2223>; - (__trgt.2154 var=459) const () <2227>; + #760 off=14 + (__ptr___str41232700.71 var=74) const () <95>; + (__ct_8388608.73 var=76) const () <97>; + (__ct_8388624.76 var=78) const () <100>; + (__ptr___str2eb09b76.79 var=80) const () <103>; + (fscanf.665 var=210) const () <583>; + (_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_.884 var=245) const () <709>; + (fprintf.1030 var=259) const () <837>; + (__rt.1758 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.93 __ct_80t0.2051) <1523>; + (__rt.1780 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.93 __ct_84t0.2054) <1551>; + (__ct_80t0.2051 var=404) const () <1947>; + (__ct_84t0.2054 var=407) const () <1953>; + (__ct_2.2057 var=410) const () <1959>; + (__trgt.2116 var=454) const () <2186>; + (__trgt.2119 var=455) const () <2190>; do { { - (__vola.504 var=29) entry (__vola.1354 __vola.431) <420>; - (__extDM.507 var=32) entry (__extDM.1360 __extDM.432) <423>; - (__extPM.508 var=33) entry (__extPM.1362 __extPM.433) <424>; - (b0.510 var=35) entry (b0.1366 b0.434) <426>; - (b1.511 var=36) entry (b1.1368 b1.435) <427>; - (_ZL16corrupted_signal.512 var=37) entry (_ZL16corrupted_signal.1370 _ZL16corrupted_signal.436) <428>; - (__extDM_SingleSignalPath.513 var=38) entry (__extDM_SingleSignalPath.1372 __extDM_SingleSignalPath.437) <429>; - (_ZL22reference_noise_signal.514 var=39) entry (_ZL22reference_noise_signal.1374 _ZL22reference_noise_signal.438) <430>; - (d0.521 var=46) entry (d0.1388 d0.44) <437>; - (d1.522 var=47) entry (d1.1390 d1.45) <438>; - (_ZL10input_port.523 var=48) entry (_ZL10input_port.1392 _ZL10input_port.439) <439>; - (__extDM_int16_.524 var=49) entry (__extDM_int16_.1394 __extDM_int16_.440) <440>; - (_ZL11output_port.526 var=51) entry (_ZL11output_port.1398 _ZL11output_port.441) <442>; - (__extDM_void.528 var=53) entry (__extDM_void.1402 __extDM_void.442) <444>; - (__extPM_void.529 var=54) entry (__extPM_void.1404 __extPM_void.443) <445>; - (__extDM_int64_.530 var=55) entry (__extDM_int64_.1406 __extDM_int64_.444) <446>; - (__extDM_int8_.531 var=56) entry (__extDM_int8_.1408 __extDM_int8_.445) <447>; - (__extPM_FILE.532 var=57) entry (__extPM_FILE.1410 __extPM_FILE.446) <448>; - (__extDM_int32_.533 var=58) entry (__extDM_int32_.1412 __extDM_int32_.447) <449>; - (__shv___ptr_input_port.1681 var=337) entry (__shv___ptr_input_port.1679 __ct_8388608.74) <1370>; + (__vola.497 var=29) entry (__vola.1325 __vola.426) <413>; + (__extDM.500 var=32) entry (__extDM.1331 __extDM.427) <416>; + (__extPM.501 var=33) entry (__extPM.1333 __extPM.428) <417>; + (b0.503 var=35) entry (b0.1337 b0.429) <419>; + (b1.504 var=36) entry (b1.1339 b1.430) <420>; + (_ZL17c_sensor_signal_t.505 var=37) entry (_ZL17c_sensor_signal_t.1341 _ZL17c_sensor_signal_t.431) <421>; + (__extDM_SingleSignalPath.506 var=38) entry (__extDM_SingleSignalPath.1343 __extDM_SingleSignalPath.432) <422>; + (_ZL19acc_sensor_signal_t.507 var=39) entry (_ZL19acc_sensor_signal_t.1345 _ZL19acc_sensor_signal_t.433) <423>; + (d0.514 var=46) entry (d0.1359 d0.44) <430>; + (d1.515 var=47) entry (d1.1361 d1.45) <431>; + (_ZL10input_port.516 var=48) entry (_ZL10input_port.1363 _ZL10input_port.434) <432>; + (__extDM_int16_.517 var=49) entry (__extDM_int16_.1365 __extDM_int16_.435) <433>; + (_ZL11output_port.518 var=50) entry (_ZL11output_port.1367 _ZL11output_port.436) <434>; + (__extDM_void.520 var=52) entry (__extDM_void.1371 __extDM_void.437) <436>; + (__extPM_void.521 var=53) entry (__extPM_void.1373 __extPM_void.438) <437>; + (__extDM_int64_.522 var=54) entry (__extDM_int64_.1375 __extDM_int64_.439) <438>; + (__extDM_int8_.523 var=55) entry (__extDM_int8_.1377 __extDM_int8_.440) <439>; + (__extPM_FILE.524 var=56) entry (__extPM_FILE.1379 __extPM_FILE.441) <440>; + (__extDM_int32_.525 var=57) entry (__extDM_int32_.1381 __extDM_int32_.442) <441>; + (__shv___ptr_input_port.1646 var=333) entry (__shv___ptr_input_port.1644 __ct_8388608.73) <1338>; } #27 { #36 off=15 - (__link.680 var=215) dmaddr__call_dmaddr_ (fscanf.678) <598>; + (__link.667 var=212) dmaddr__call_dmaddr_ (fscanf.665) <585>; call { - (fp1.675 var=106 stl=A off=0) assign (__tmp.244) <593>; - (__ptr___str41232700.676 var=74 stl=A off=1) assign (__ptr___str41232700.72) <594>; - (__ptr_d0.677 var=98 stl=__spill_WDMA off=0) assign (__rt.1793) <595>; - (__link.681 var=215 stl=LR off=0) assign (__link.680) <599>; - (__tmp.682 var=216 stl=RA off=0 _ZL10input_port.685 var=48 _ZL11output_port.686 var=51 _ZL16corrupted_signal.687 var=37 _ZL22reference_noise_signal.688 var=39 __extDM.689 var=32 __extDM_SingleSignalPath.690 var=38 __extDM_int16_.691 var=49 __extDM_int32_.692 var=58 __extDM_int64_.693 var=55 __extDM_int8_.694 var=56 __extDM_void.695 var=53 __extPM.696 var=33 __extPM_FILE.697 var=57 __extPM_void.698 var=54 b0.699 var=35 b1.700 var=36 d0.701 var=46 __vola.702 var=29) VA0Ffscanf (__link.681 fp1.675 __ptr___str41232700.676 __ptr_d0.677 _ZL10input_port.523 _ZL11output_port.526 _ZL16corrupted_signal.512 _ZL22reference_noise_signal.514 __extDM.507 __extDM_SingleSignalPath.513 __extDM_int16_.524 __extDM_int32_.533 __extDM_int64_.530 __extDM_int8_.531 __extDM_void.528 __extPM.508 __extPM_FILE.532 __extPM_void.529 b0.510 b1.511 d0.521 __vola.504) <600>; + (fp1.662 var=103 stl=A off=0) assign (__tmp.241) <580>; + (__ptr___str41232700.663 var=73 stl=A off=1) assign (__ptr___str41232700.71) <581>; + (__ptr_d0.664 var=95 stl=__spill_WDMA off=0) assign (__rt.1758) <582>; + (__link.668 var=212 stl=LR off=0) assign (__link.667) <586>; + (__tmp.669 var=213 stl=RA off=0 _ZL10input_port.672 var=48 _ZL11output_port.673 var=50 _ZL17c_sensor_signal_t.674 var=37 _ZL19acc_sensor_signal_t.675 var=39 __extDM.676 var=32 __extDM_SingleSignalPath.677 var=38 __extDM_int16_.678 var=49 __extDM_int32_.679 var=57 __extDM_int64_.680 var=54 __extDM_int8_.681 var=55 __extDM_void.682 var=52 __extPM.683 var=33 __extPM_FILE.684 var=56 __extPM_void.685 var=53 b0.686 var=35 b1.687 var=36 d0.688 var=46 __vola.689 var=29) VA0Ffscanf (__link.668 fp1.662 __ptr___str41232700.663 __ptr_d0.664 _ZL10input_port.516 _ZL11output_port.518 _ZL17c_sensor_signal_t.505 _ZL19acc_sensor_signal_t.507 __extDM.500 __extDM_SingleSignalPath.506 __extDM_int16_.517 __extDM_int32_.525 __extDM_int64_.522 __extDM_int8_.523 __extDM_void.520 __extPM.501 __extPM_FILE.524 __extPM_void.521 b0.503 b1.504 d0.514 __vola.497) <587>; } #37 off=16 #38 off=17 - (__link.708 var=219) dmaddr__call_dmaddr_ (fscanf.678) <608>; + (__link.695 var=216) dmaddr__call_dmaddr_ (fscanf.665) <595>; call { - (fp2.703 var=107 stl=A off=0) assign (__tmp.271) <603>; - (__ptr___str41232700.704 var=74 stl=A off=1) assign (__ptr___str41232700.72) <604>; - (__ptr_d1.705 var=102 stl=__spill_WDMA off=0) assign (__rt.1815) <605>; - (__link.709 var=219 stl=LR off=0) assign (__link.708) <609>; - (__tmp.710 var=220 stl=RA off=0 _ZL10input_port.713 var=48 _ZL11output_port.714 var=51 _ZL16corrupted_signal.715 var=37 _ZL22reference_noise_signal.716 var=39 __extDM.717 var=32 __extDM_SingleSignalPath.718 var=38 __extDM_int16_.719 var=49 __extDM_int32_.720 var=58 __extDM_int64_.721 var=55 __extDM_int8_.722 var=56 __extDM_void.723 var=53 __extPM.724 var=33 __extPM_FILE.725 var=57 __extPM_void.726 var=54 b0.727 var=35 b1.728 var=36 d0.729 var=46 d1.730 var=47 __vola.731 var=29) VA1Ffscanf (__link.709 fp2.703 __ptr___str41232700.704 __ptr_d1.705 _ZL10input_port.685 _ZL11output_port.686 _ZL16corrupted_signal.687 _ZL22reference_noise_signal.688 __extDM.689 __extDM_SingleSignalPath.690 __extDM_int16_.691 __extDM_int32_.692 __extDM_int64_.693 __extDM_int8_.694 __extDM_void.695 __extPM.696 __extPM_FILE.697 __extPM_void.698 b0.699 b1.700 d0.701 d1.522 __vola.702) <610>; + (fp2.690 var=104 stl=A off=0) assign (__tmp.268) <590>; + (__ptr___str41232700.691 var=73 stl=A off=1) assign (__ptr___str41232700.71) <591>; + (__ptr_d1.692 var=99 stl=__spill_WDMA off=0) assign (__rt.1780) <592>; + (__link.696 var=216 stl=LR off=0) assign (__link.695) <596>; + (__tmp.697 var=217 stl=RA off=0 _ZL10input_port.700 var=48 _ZL11output_port.701 var=50 _ZL17c_sensor_signal_t.702 var=37 _ZL19acc_sensor_signal_t.703 var=39 __extDM.704 var=32 __extDM_SingleSignalPath.705 var=38 __extDM_int16_.706 var=49 __extDM_int32_.707 var=57 __extDM_int64_.708 var=54 __extDM_int8_.709 var=55 __extDM_void.710 var=52 __extPM.711 var=33 __extPM_FILE.712 var=56 __extPM_void.713 var=53 b0.714 var=35 b1.715 var=36 d0.716 var=46 d1.717 var=47 __vola.718 var=29) VA1Ffscanf (__link.696 fp2.690 __ptr___str41232700.691 __ptr_d1.692 _ZL10input_port.672 _ZL11output_port.673 _ZL17c_sensor_signal_t.674 _ZL19acc_sensor_signal_t.675 __extDM.676 __extDM_SingleSignalPath.677 __extDM_int16_.678 __extDM_int32_.679 __extDM_int64_.680 __extDM_int8_.681 __extDM_void.682 __extPM.683 __extPM_FILE.684 __extPM_void.685 b0.686 b1.687 d0.688 d1.515 __vola.689) <597>; } #39 off=18 - #474 off=19 - (__fch_d0.732 var=221) load (__M_WDMA.9 __rt.1793 d0.729) <613>; - (__tmp.733 var=222) __sshort___sshort___sint (__fch_d0.732) <614>; - (__M_SDMB.738 var=8 _ZL10input_port.739 var=48 __vola.740 var=29) store (__tmp.733 __shv___ptr_input_port.1681 _ZL10input_port.713 __vola.731) <619>; - (__fch_d1.741 var=227) load (__M_WDMA.9 __rt.1815 d1.730) <620>; - (__tmp.742 var=228) __sshort___sshort___sint (__fch_d1.741) <621>; - (__M_SDMB.750 var=8 _ZL10input_port.751 var=48 __vola.752 var=29) store (__tmp.742 __rt.1869 _ZL10input_port.739 __vola.740) <629>; - (__link.905 var=251) dmaddr__call_dmaddr_ (_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.903) <728>; - (__rt.1869 var=361) __Pvoid__pl___Pvoid_int18_ (__shv___ptr_input_port.1681 __ct_2.2092) <1656>; - (__rt.1891 var=361) __Pvoid__mi___Pvoid_int18_ (__rt.1869 __ct_2.2092) <1684>; + #490 off=19 + (__fch_d0.719 var=218) load (__M_WDMA.9 __rt.1758 d0.716) <600>; + (__tmp.720 var=219) __sshort___sshort___sint (__fch_d0.719) <601>; + (__M_SDMB.725 var=8 _ZL10input_port.726 var=48 __vola.727 var=29) store (__tmp.720 __shv___ptr_input_port.1646 _ZL10input_port.700 __vola.718) <606>; + (__fch_d1.728 var=224) load (__M_WDMA.9 __rt.1780 d1.717) <607>; + (__tmp.729 var=225) __sshort___sshort___sint (__fch_d1.728) <608>; + (__M_SDMB.737 var=8 _ZL10input_port.738 var=48 __vola.739 var=29) store (__tmp.729 __rt.1834 _ZL10input_port.726 __vola.727) <616>; + (__link.886 var=247) dmaddr__call_dmaddr_ (_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_.884) <711>; + (__rt.1834 var=357) __Pvoid__pl___Pvoid_int18_ (__shv___ptr_input_port.1646 __ct_2.2057) <1623>; + (__rt.1856 var=357) __Pvoid__mi___Pvoid_int18_ (__rt.1834 __ct_2.2057) <1651>; call { - (__ptr_corrupted_signal.890 var=60 stl=A off=0) assign (__ptr_corrupted_signal.58) <713>; - (__ptr_reference_noise_signal.891 var=62 stl=A off=1) assign (__ptr_reference_noise_signal.60) <714>; - (__fch__ZZ4mainvE4mode.893 var=242 stl=RA off=0) assign (__fch__ZZ4mainvE4mode.892) <716>; - (__tmp.897 var=245 stl=A off=4) assign (__shv___ptr_input_port.1681) <720>; - (__tmp.901 var=248 stl=A off=5) assign (__rt.1869) <724>; - (__ptr_output_port.902 var=80 stl=__spill_WDMA off=0) assign (__ct_8388624.79) <725>; - (__link.906 var=251 stl=LR off=0) assign (__link.905) <729>; - (_ZL10input_port.907 var=48 _ZL11output_port.908 var=51 _ZL16corrupted_signal.909 var=37 _ZL22reference_noise_signal.910 var=39 __extDM.911 var=32 __extDM_SingleSignalPath.912 var=38 __extDM_int16_.913 var=49 __extDM_int32_.914 var=58 __extDM_int64_.915 var=55 __extDM_int8_.916 var=56 __extDM_void.917 var=53 __extPM.918 var=33 __extPM_FILE.919 var=57 __extPM_void.920 var=54 b0.921 var=35 b1.922 var=36 d0.923 var=46 d1.924 var=47 __vola.925 var=29) F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ (__link.906 __ptr_corrupted_signal.890 __ptr_reference_noise_signal.891 __fch__ZZ4mainvE4mode.893 __tmp.897 __tmp.901 __ptr_output_port.902 _ZL10input_port.751 _ZL11output_port.714 _ZL16corrupted_signal.715 _ZL22reference_noise_signal.716 __extDM.717 __extDM_SingleSignalPath.718 __extDM_int16_.719 __extDM_int32_.720 __extDM_int64_.721 __extDM_int8_.722 __extDM_void.723 __extPM.724 __extPM_FILE.725 __extPM_void.726 b0.727 b1.728 d0.729 d1.730 __vola.752) <730>; + (__ptr_c_sensor_signal_t.873 var=59 stl=A off=0) assign (__ptr_c_sensor_signal_t.57) <698>; + (__ptr_acc_sensor_signal_t.874 var=61 stl=A off=1) assign (__ptr_acc_sensor_signal_t.59) <699>; + (__tmp.878 var=241 stl=A off=4) assign (__shv___ptr_input_port.1646) <703>; + (__tmp.882 var=244 stl=A off=5) assign (__rt.1834) <707>; + (__ptr_output_port.883 var=77 stl=__spill_WDMA off=0) assign (__ct_8388624.76) <708>; + (__link.887 var=247 stl=LR off=0) assign (__link.886) <712>; + (_ZL10input_port.888 var=48 _ZL11output_port.889 var=50 _ZL17c_sensor_signal_t.890 var=37 _ZL19acc_sensor_signal_t.891 var=39 __extDM.892 var=32 __extDM_SingleSignalPath.893 var=38 __extDM_int16_.894 var=49 __extDM_int32_.895 var=57 __extDM_int64_.896 var=54 __extDM_int8_.897 var=55 __extDM_void.898 var=52 __extPM.899 var=33 __extPM_FILE.900 var=56 __extPM_void.901 var=53 b0.902 var=35 b1.903 var=36 d0.904 var=46 d1.905 var=47 __vola.906 var=29) F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ (__link.887 __ptr_c_sensor_signal_t.873 __ptr_acc_sensor_signal_t.874 __tmp.878 __tmp.882 __ptr_output_port.883 _ZL10input_port.738 _ZL11output_port.701 _ZL17c_sensor_signal_t.702 _ZL19acc_sensor_signal_t.703 __extDM.704 __extDM_SingleSignalPath.705 __extDM_int16_.706 __extDM_int32_.707 __extDM_int64_.708 __extDM_int8_.709 __extDM_void.710 __extPM.711 __extPM_FILE.712 __extPM_void.713 b0.714 b1.715 d0.716 d1.717 __vola.739) <713>; } #45 off=20 #53 off=21 - (__fch__ZL11output_port.1048 var=261 _ZL11output_port.1049 var=51 __vola.1050 var=29) load (__M_SDMB.6 __ct_8388624.79 _ZL11output_port.908 __vola.925) <855>; - (__link.1055 var=265) dmaddr__call_dmaddr_ (fprintf.1053) <860>; + (__fch__ZL11output_port.1025 var=257 _ZL11output_port.1026 var=50 __vola.1027 var=29) load (__M_SDMB.6 __ct_8388624.76 _ZL11output_port.889 __vola.906) <834>; + (__link.1032 var=261) dmaddr__call_dmaddr_ (fprintf.1030) <839>; call { - (fp3.1042 var=108 stl=A off=0) assign (__tmp.298) <849>; - (__ptr___str2eb09b76.1043 var=82 stl=A off=1) assign (__ptr___str2eb09b76.82) <850>; - (__fch__ZL11output_port.1052 var=262 stl=__spill_WDMA off=0) assign (__fch__ZL11output_port.1048) <857>; - (__link.1056 var=265 stl=LR off=0) assign (__link.1055) <861>; - (__tmp.1057 var=266 stl=RA off=0 _ZL10input_port.1060 var=48 _ZL11output_port.1061 var=51 _ZL16corrupted_signal.1062 var=37 _ZL22reference_noise_signal.1063 var=39 __extDM.1064 var=32 __extDM_SingleSignalPath.1065 var=38 __extDM_int16_.1066 var=49 __extDM_int32_.1067 var=58 __extDM_int64_.1068 var=55 __extDM_int8_.1069 var=56 __extDM_void.1070 var=53 __extPM.1071 var=33 __extPM_FILE.1072 var=57 __extPM_void.1073 var=54 b0.1074 var=35 b1.1075 var=36 d0.1076 var=46 d1.1077 var=47 __vola.1078 var=29) VA2Ffprintf (__link.1056 fp3.1042 __ptr___str2eb09b76.1043 __fch__ZL11output_port.1052 _ZL10input_port.907 _ZL11output_port.1049 _ZL16corrupted_signal.909 _ZL22reference_noise_signal.910 __extDM.911 __extDM_SingleSignalPath.912 __extDM_int16_.913 __extDM_int32_.914 __extDM_int64_.915 __extDM_int8_.916 __extDM_void.917 __extPM.918 __extPM_FILE.919 __extPM_void.920 b0.921 b1.922 d0.923 d1.924 __vola.1050) <862>; + (fp3.1019 var=105 stl=A off=0) assign (__tmp.295) <828>; + (__ptr___str2eb09b76.1020 var=79 stl=A off=1) assign (__ptr___str2eb09b76.79) <829>; + (__fch__ZL11output_port.1029 var=258 stl=__spill_WDMA off=0) assign (__fch__ZL11output_port.1025) <836>; + (__link.1033 var=261 stl=LR off=0) assign (__link.1032) <840>; + (__tmp.1034 var=262 stl=RA off=0 _ZL10input_port.1037 var=48 _ZL11output_port.1038 var=50 _ZL17c_sensor_signal_t.1039 var=37 _ZL19acc_sensor_signal_t.1040 var=39 __extDM.1041 var=32 __extDM_SingleSignalPath.1042 var=38 __extDM_int16_.1043 var=49 __extDM_int32_.1044 var=57 __extDM_int64_.1045 var=54 __extDM_int8_.1046 var=55 __extDM_void.1047 var=52 __extPM.1048 var=33 __extPM_FILE.1049 var=56 __extPM_void.1050 var=53 b0.1051 var=35 b1.1052 var=36 d0.1053 var=46 d1.1054 var=47 __vola.1055 var=29) VA2Ffprintf (__link.1033 fp3.1019 __ptr___str2eb09b76.1020 __fch__ZL11output_port.1029 _ZL10input_port.888 _ZL11output_port.1026 _ZL17c_sensor_signal_t.890 _ZL19acc_sensor_signal_t.891 __extDM.892 __extDM_SingleSignalPath.893 __extDM_int16_.894 __extDM_int32_.895 __extDM_int64_.896 __extDM_int8_.897 __extDM_void.898 __extPM.899 __extPM_FILE.900 __extPM_void.901 b0.902 b1.903 d0.904 d1.905 __vola.1027) <841>; } #54 off=22 #59 off=23 - (__link.1219 var=275) dmaddr__call_dmaddr_ (feof.318) <951>; + (__link.1192 var=271) dmaddr__call_dmaddr_ (feof.315) <928>; call { - (fp1.1216 var=106 stl=A off=0) assign (__tmp.244) <948>; - (__link.1220 var=275 stl=LR off=0) assign (__link.1219) <952>; - (__tmp.1221 var=276 stl=RA off=0 _ZL10input_port.1224 var=48 _ZL11output_port.1225 var=51 _ZL16corrupted_signal.1226 var=37 _ZL22reference_noise_signal.1227 var=39 __extDM.1228 var=32 __extDM_SingleSignalPath.1229 var=38 __extDM_int16_.1230 var=49 __extDM_int32_.1231 var=58 __extDM_int64_.1232 var=55 __extDM_int8_.1233 var=56 __extDM_void.1234 var=53 __extPM.1235 var=33 __extPM_FILE.1236 var=57 __extPM_void.1237 var=54 b0.1238 var=35 b1.1239 var=36 d0.1240 var=46 d1.1241 var=47 __vola.1242 var=29) Ffeof (__link.1220 fp1.1216 _ZL10input_port.1060 _ZL11output_port.1061 _ZL16corrupted_signal.1062 _ZL22reference_noise_signal.1063 __extDM.1064 __extDM_SingleSignalPath.1065 __extDM_int16_.1066 __extDM_int32_.1067 __extDM_int64_.1068 __extDM_int8_.1069 __extDM_void.1070 __extPM.1071 __extPM_FILE.1072 __extPM_void.1073 b0.1074 b1.1075 d0.1076 d1.1077 __vola.1078) <953>; - (__tmp.1222 var=276) deassign (__tmp.1221) <954>; + (fp1.1189 var=103 stl=A off=0) assign (__tmp.241) <925>; + (__link.1193 var=271 stl=LR off=0) assign (__link.1192) <929>; + (__tmp.1194 var=272 stl=RA off=0 _ZL10input_port.1197 var=48 _ZL11output_port.1198 var=50 _ZL17c_sensor_signal_t.1199 var=37 _ZL19acc_sensor_signal_t.1200 var=39 __extDM.1201 var=32 __extDM_SingleSignalPath.1202 var=38 __extDM_int16_.1203 var=49 __extDM_int32_.1204 var=57 __extDM_int64_.1205 var=54 __extDM_int8_.1206 var=55 __extDM_void.1207 var=52 __extPM.1208 var=33 __extPM_FILE.1209 var=56 __extPM_void.1210 var=53 b0.1211 var=35 b1.1212 var=36 d0.1213 var=46 d1.1214 var=47 __vola.1215 var=29) Ffeof (__link.1193 fp1.1189 _ZL10input_port.1037 _ZL11output_port.1038 _ZL17c_sensor_signal_t.1039 _ZL19acc_sensor_signal_t.1040 __extDM.1041 __extDM_SingleSignalPath.1042 __extDM_int16_.1043 __extDM_int32_.1044 __extDM_int64_.1045 __extDM_int8_.1046 __extDM_void.1047 __extPM.1048 __extPM_FILE.1049 __extPM_void.1050 b0.1051 b1.1052 d0.1053 d1.1054 __vola.1055) <930>; + (__tmp.1195 var=272) deassign (__tmp.1194) <931>; } #60 off=24 - #697 off=25 - (__tmp.2135 var=443) uint3__cmp_int72__int72_ (__tmp.1222 __ct_0.125) <2072>; - (__tmp.2141 var=386) bool_nequal_uint3_ (__tmp.2135) <2124>; - () void_jump_bool_int10_ (__tmp.2141 __trgt.2151) <2224>; - (__either.2152 var=456) undefined () <2225>; + #722 off=25 + (__tmp.2100 var=439) uint3__cmp_int72__int72_ (__tmp.1195 __ct_0.122) <2038>; + (__tmp.2106 var=382) bool_nequal_uint3_ (__tmp.2100) <2089>; + () void_jump_bool_int10_ (__tmp.2106 __trgt.2116) <2187>; + (__either.2117 var=452) undefined () <2188>; if { { - () if_expr (__either.2152) <1014>; + () if_expr (__either.2117) <989>; } #63 { - (__false.2153 var=455) const () <2226>; + (__false.2118 var=451) const () <2189>; } #64 { #66 off=26 - (__link.1306 var=284) dmaddr__call_dmaddr_ (feof.318) <1020>; + (__link.1277 var=280) dmaddr__call_dmaddr_ (feof.315) <995>; call { - (fp2.1303 var=107 stl=A off=0) assign (__tmp.271) <1017>; - (__link.1307 var=284 stl=LR off=0) assign (__link.1306) <1021>; - (__tmp.1308 var=285 stl=RA off=0 _ZL10input_port.1311 var=48 _ZL11output_port.1312 var=51 _ZL16corrupted_signal.1313 var=37 _ZL22reference_noise_signal.1314 var=39 __extDM.1315 var=32 __extDM_SingleSignalPath.1316 var=38 __extDM_int16_.1317 var=49 __extDM_int32_.1318 var=58 __extDM_int64_.1319 var=55 __extDM_int8_.1320 var=56 __extDM_void.1321 var=53 __extPM.1322 var=33 __extPM_FILE.1323 var=57 __extPM_void.1324 var=54 b0.1325 var=35 b1.1326 var=36 d0.1327 var=46 d1.1328 var=47 __vola.1329 var=29) Ffeof (__link.1307 fp2.1303 _ZL10input_port.1224 _ZL11output_port.1225 _ZL16corrupted_signal.1226 _ZL22reference_noise_signal.1227 __extDM.1228 __extDM_SingleSignalPath.1229 __extDM_int16_.1230 __extDM_int32_.1231 __extDM_int64_.1232 __extDM_int8_.1233 __extDM_void.1234 __extPM.1235 __extPM_FILE.1236 __extPM_void.1237 b0.1238 b1.1239 d0.1240 d1.1241 __vola.1242) <1022>; - (__tmp.1309 var=285) deassign (__tmp.1308) <1023>; + (fp2.1274 var=104 stl=A off=0) assign (__tmp.268) <992>; + (__link.1278 var=280 stl=LR off=0) assign (__link.1277) <996>; + (__tmp.1279 var=281 stl=RA off=0 _ZL10input_port.1282 var=48 _ZL11output_port.1283 var=50 _ZL17c_sensor_signal_t.1284 var=37 _ZL19acc_sensor_signal_t.1285 var=39 __extDM.1286 var=32 __extDM_SingleSignalPath.1287 var=38 __extDM_int16_.1288 var=49 __extDM_int32_.1289 var=57 __extDM_int64_.1290 var=54 __extDM_int8_.1291 var=55 __extDM_void.1292 var=52 __extPM.1293 var=33 __extPM_FILE.1294 var=56 __extPM_void.1295 var=53 b0.1296 var=35 b1.1297 var=36 d0.1298 var=46 d1.1299 var=47 __vola.1300 var=29) Ffeof (__link.1278 fp2.1274 _ZL10input_port.1197 _ZL11output_port.1198 _ZL17c_sensor_signal_t.1199 _ZL19acc_sensor_signal_t.1200 __extDM.1201 __extDM_SingleSignalPath.1202 __extDM_int16_.1203 __extDM_int32_.1204 __extDM_int64_.1205 __extDM_int8_.1206 __extDM_void.1207 __extPM.1208 __extPM_FILE.1209 __extPM_void.1210 b0.1211 b1.1212 d0.1213 d1.1214 __vola.1215) <997>; + (__tmp.1280 var=281) deassign (__tmp.1279) <998>; } #67 off=27 - #689 off=28 - (__tmp.2125 var=443) uint3__cmp_int72__int72_ (__tmp.1309 __ct_0.125) <2056>; - (__tmp.2126 var=288) bool_equal_uint3_ (__tmp.2125) <2057>; - () void_jump_bool_int10_ (__tmp.2126 __trgt.2154) <2228>; - (__either.2155 var=456) undefined () <2229>; + #714 off=28 + (__tmp.2090 var=439) uint3__cmp_int72__int72_ (__tmp.1280 __ct_0.122) <2022>; + (__tmp.2091 var=284) bool_equal_uint3_ (__tmp.2090) <2023>; + () void_jump_bool_int10_ (__tmp.2091 __trgt.2119) <2191>; + (__either.2120 var=452) undefined () <2192>; } #65 { - (__vola.1334 var=29) merge (__vola.1242 __vola.1329) <1029>; - (__extDM.1335 var=32) merge (__extDM.1228 __extDM.1315) <1030>; - (__extPM.1336 var=33) merge (__extPM.1235 __extPM.1322) <1031>; - (b0.1337 var=35) merge (b0.1238 b0.1325) <1032>; - (b1.1338 var=36) merge (b1.1239 b1.1326) <1033>; - (_ZL16corrupted_signal.1339 var=37) merge (_ZL16corrupted_signal.1226 _ZL16corrupted_signal.1313) <1034>; - (__extDM_SingleSignalPath.1340 var=38) merge (__extDM_SingleSignalPath.1229 __extDM_SingleSignalPath.1316) <1035>; - (_ZL22reference_noise_signal.1341 var=39) merge (_ZL22reference_noise_signal.1227 _ZL22reference_noise_signal.1314) <1036>; - (d0.1342 var=46) merge (d0.1240 d0.1327) <1037>; - (d1.1343 var=47) merge (d1.1241 d1.1328) <1038>; - (_ZL10input_port.1344 var=48) merge (_ZL10input_port.1224 _ZL10input_port.1311) <1039>; - (__extDM_int16_.1345 var=49) merge (__extDM_int16_.1230 __extDM_int16_.1317) <1040>; - (_ZL11output_port.1346 var=51) merge (_ZL11output_port.1225 _ZL11output_port.1312) <1041>; - (__extDM_void.1347 var=53) merge (__extDM_void.1234 __extDM_void.1321) <1042>; - (__extPM_void.1348 var=54) merge (__extPM_void.1237 __extPM_void.1324) <1043>; - (__extDM_int64_.1349 var=55) merge (__extDM_int64_.1232 __extDM_int64_.1319) <1044>; - (__extDM_int8_.1350 var=56) merge (__extDM_int8_.1233 __extDM_int8_.1320) <1045>; - (__extPM_FILE.1351 var=57) merge (__extPM_FILE.1236 __extPM_FILE.1323) <1046>; - (__extDM_int32_.1352 var=58) merge (__extDM_int32_.1231 __extDM_int32_.1318) <1047>; - (__tmp.1639 var=289) merge (__false.2153 __either.2155) <1331>; + (__vola.1305 var=29) merge (__vola.1215 __vola.1300) <1004>; + (__extDM.1306 var=32) merge (__extDM.1201 __extDM.1286) <1005>; + (__extPM.1307 var=33) merge (__extPM.1208 __extPM.1293) <1006>; + (b0.1308 var=35) merge (b0.1211 b0.1296) <1007>; + (b1.1309 var=36) merge (b1.1212 b1.1297) <1008>; + (_ZL17c_sensor_signal_t.1310 var=37) merge (_ZL17c_sensor_signal_t.1199 _ZL17c_sensor_signal_t.1284) <1009>; + (__extDM_SingleSignalPath.1311 var=38) merge (__extDM_SingleSignalPath.1202 __extDM_SingleSignalPath.1287) <1010>; + (_ZL19acc_sensor_signal_t.1312 var=39) merge (_ZL19acc_sensor_signal_t.1200 _ZL19acc_sensor_signal_t.1285) <1011>; + (d0.1313 var=46) merge (d0.1213 d0.1298) <1012>; + (d1.1314 var=47) merge (d1.1214 d1.1299) <1013>; + (_ZL10input_port.1315 var=48) merge (_ZL10input_port.1197 _ZL10input_port.1282) <1014>; + (__extDM_int16_.1316 var=49) merge (__extDM_int16_.1203 __extDM_int16_.1288) <1015>; + (_ZL11output_port.1317 var=50) merge (_ZL11output_port.1198 _ZL11output_port.1283) <1016>; + (__extDM_void.1318 var=52) merge (__extDM_void.1207 __extDM_void.1292) <1017>; + (__extPM_void.1319 var=53) merge (__extPM_void.1210 __extPM_void.1295) <1018>; + (__extDM_int64_.1320 var=54) merge (__extDM_int64_.1205 __extDM_int64_.1290) <1019>; + (__extDM_int8_.1321 var=55) merge (__extDM_int8_.1206 __extDM_int8_.1291) <1020>; + (__extPM_FILE.1322 var=56) merge (__extPM_FILE.1209 __extPM_FILE.1294) <1021>; + (__extDM_int32_.1323 var=57) merge (__extDM_int32_.1204 __extDM_int32_.1289) <1022>; + (__tmp.1604 var=285) merge (__false.2118 __either.2120) <1299>; } #69 } #62 } #28 { - () while_expr (__tmp.1639) <1049>; - (__vola.1354 var=29 __vola.1355 var=29) exit (__vola.1334) <1050>; - (__extDM.1360 var=32 __extDM.1361 var=32) exit (__extDM.1335) <1053>; - (__extPM.1362 var=33 __extPM.1363 var=33) exit (__extPM.1336) <1054>; - (b0.1366 var=35 b0.1367 var=35) exit (b0.1337) <1056>; - (b1.1368 var=36 b1.1369 var=36) exit (b1.1338) <1057>; - (_ZL16corrupted_signal.1370 var=37 _ZL16corrupted_signal.1371 var=37) exit (_ZL16corrupted_signal.1339) <1058>; - (__extDM_SingleSignalPath.1372 var=38 __extDM_SingleSignalPath.1373 var=38) exit (__extDM_SingleSignalPath.1340) <1059>; - (_ZL22reference_noise_signal.1374 var=39 _ZL22reference_noise_signal.1375 var=39) exit (_ZL22reference_noise_signal.1341) <1060>; - (d0.1388 var=46 d0.1389 var=46) exit (d0.1342) <1067>; - (d1.1390 var=47 d1.1391 var=47) exit (d1.1343) <1068>; - (_ZL10input_port.1392 var=48 _ZL10input_port.1393 var=48) exit (_ZL10input_port.1344) <1069>; - (__extDM_int16_.1394 var=49 __extDM_int16_.1395 var=49) exit (__extDM_int16_.1345) <1070>; - (_ZL11output_port.1398 var=51 _ZL11output_port.1399 var=51) exit (_ZL11output_port.1346) <1072>; - (__extDM_void.1402 var=53 __extDM_void.1403 var=53) exit (__extDM_void.1347) <1074>; - (__extPM_void.1404 var=54 __extPM_void.1405 var=54) exit (__extPM_void.1348) <1075>; - (__extDM_int64_.1406 var=55 __extDM_int64_.1407 var=55) exit (__extDM_int64_.1349) <1076>; - (__extDM_int8_.1408 var=56 __extDM_int8_.1409 var=56) exit (__extDM_int8_.1350) <1077>; - (__extPM_FILE.1410 var=57 __extPM_FILE.1411 var=57) exit (__extPM_FILE.1351) <1078>; - (__extDM_int32_.1412 var=58 __extDM_int32_.1413 var=58) exit (__extDM_int32_.1352) <1079>; - (__shv___ptr_input_port.1679 var=337 __shv___ptr_input_port.1680 var=337) exit (__rt.1891) <1369>; + () while_expr (__tmp.1604) <1024>; + (__vola.1325 var=29 __vola.1326 var=29) exit (__vola.1305) <1025>; + (__extDM.1331 var=32 __extDM.1332 var=32) exit (__extDM.1306) <1028>; + (__extPM.1333 var=33 __extPM.1334 var=33) exit (__extPM.1307) <1029>; + (b0.1337 var=35 b0.1338 var=35) exit (b0.1308) <1031>; + (b1.1339 var=36 b1.1340 var=36) exit (b1.1309) <1032>; + (_ZL17c_sensor_signal_t.1341 var=37 _ZL17c_sensor_signal_t.1342 var=37) exit (_ZL17c_sensor_signal_t.1310) <1033>; + (__extDM_SingleSignalPath.1343 var=38 __extDM_SingleSignalPath.1344 var=38) exit (__extDM_SingleSignalPath.1311) <1034>; + (_ZL19acc_sensor_signal_t.1345 var=39 _ZL19acc_sensor_signal_t.1346 var=39) exit (_ZL19acc_sensor_signal_t.1312) <1035>; + (d0.1359 var=46 d0.1360 var=46) exit (d0.1313) <1042>; + (d1.1361 var=47 d1.1362 var=47) exit (d1.1314) <1043>; + (_ZL10input_port.1363 var=48 _ZL10input_port.1364 var=48) exit (_ZL10input_port.1315) <1044>; + (__extDM_int16_.1365 var=49 __extDM_int16_.1366 var=49) exit (__extDM_int16_.1316) <1045>; + (_ZL11output_port.1367 var=50 _ZL11output_port.1368 var=50) exit (_ZL11output_port.1317) <1046>; + (__extDM_void.1371 var=52 __extDM_void.1372 var=52) exit (__extDM_void.1318) <1048>; + (__extPM_void.1373 var=53 __extPM_void.1374 var=53) exit (__extPM_void.1319) <1049>; + (__extDM_int64_.1375 var=54 __extDM_int64_.1376 var=54) exit (__extDM_int64_.1320) <1050>; + (__extDM_int8_.1377 var=55 __extDM_int8_.1378 var=55) exit (__extDM_int8_.1321) <1051>; + (__extPM_FILE.1379 var=56 __extPM_FILE.1380 var=56) exit (__extPM_FILE.1322) <1052>; + (__extDM_int32_.1381 var=57 __extDM_int32_.1382 var=57) exit (__extDM_int32_.1323) <1053>; + (__shv___ptr_input_port.1644 var=333 __shv___ptr_input_port.1645 var=333) exit (__rt.1856) <1337>; } #71 } #26 rng=[1,65535] } #25 { - (__vola.1464 var=29) merge (__vola.431 __vola.1355) <1105>; - (__extDM.1465 var=32) merge (__extDM.432 __extDM.1361) <1106>; - (__extPM.1466 var=33) merge (__extPM.433 __extPM.1363) <1107>; - (b0.1467 var=35) merge (b0.434 b0.1367) <1108>; - (b1.1468 var=36) merge (b1.435 b1.1369) <1109>; - (_ZL16corrupted_signal.1469 var=37) merge (_ZL16corrupted_signal.436 _ZL16corrupted_signal.1371) <1110>; - (__extDM_SingleSignalPath.1470 var=38) merge (__extDM_SingleSignalPath.437 __extDM_SingleSignalPath.1373) <1111>; - (_ZL22reference_noise_signal.1471 var=39) merge (_ZL22reference_noise_signal.438 _ZL22reference_noise_signal.1375) <1112>; - (d0.1472 var=46) merge (d0.44 d0.1389) <1113>; - (d1.1473 var=47) merge (d1.45 d1.1391) <1114>; - (_ZL10input_port.1474 var=48) merge (_ZL10input_port.439 _ZL10input_port.1393) <1115>; - (__extDM_int16_.1475 var=49) merge (__extDM_int16_.440 __extDM_int16_.1395) <1116>; - (_ZL11output_port.1476 var=51) merge (_ZL11output_port.441 _ZL11output_port.1399) <1117>; - (__extDM_void.1477 var=53) merge (__extDM_void.442 __extDM_void.1403) <1118>; - (__extPM_void.1478 var=54) merge (__extPM_void.443 __extPM_void.1405) <1119>; - (__extDM_int64_.1479 var=55) merge (__extDM_int64_.444 __extDM_int64_.1407) <1120>; - (__extDM_int8_.1480 var=56) merge (__extDM_int8_.445 __extDM_int8_.1409) <1121>; - (__extPM_FILE.1481 var=57) merge (__extPM_FILE.446 __extPM_FILE.1411) <1122>; - (__extDM_int32_.1482 var=58) merge (__extDM_int32_.447 __extDM_int32_.1413) <1123>; + (__vola.1431 var=29) merge (__vola.426 __vola.1326) <1078>; + (__extDM.1432 var=32) merge (__extDM.427 __extDM.1332) <1079>; + (__extPM.1433 var=33) merge (__extPM.428 __extPM.1334) <1080>; + (b0.1434 var=35) merge (b0.429 b0.1338) <1081>; + (b1.1435 var=36) merge (b1.430 b1.1340) <1082>; + (_ZL17c_sensor_signal_t.1436 var=37) merge (_ZL17c_sensor_signal_t.431 _ZL17c_sensor_signal_t.1342) <1083>; + (__extDM_SingleSignalPath.1437 var=38) merge (__extDM_SingleSignalPath.432 __extDM_SingleSignalPath.1344) <1084>; + (_ZL19acc_sensor_signal_t.1438 var=39) merge (_ZL19acc_sensor_signal_t.433 _ZL19acc_sensor_signal_t.1346) <1085>; + (d0.1439 var=46) merge (d0.44 d0.1360) <1086>; + (d1.1440 var=47) merge (d1.45 d1.1362) <1087>; + (_ZL10input_port.1441 var=48) merge (_ZL10input_port.434 _ZL10input_port.1364) <1088>; + (__extDM_int16_.1442 var=49) merge (__extDM_int16_.435 __extDM_int16_.1366) <1089>; + (_ZL11output_port.1443 var=50) merge (_ZL11output_port.436 _ZL11output_port.1368) <1090>; + (__extDM_void.1444 var=52) merge (__extDM_void.437 __extDM_void.1372) <1091>; + (__extPM_void.1445 var=53) merge (__extPM_void.438 __extPM_void.1374) <1092>; + (__extDM_int64_.1446 var=54) merge (__extDM_int64_.439 __extDM_int64_.1376) <1093>; + (__extDM_int8_.1447 var=55) merge (__extDM_int8_.440 __extDM_int8_.1378) <1094>; + (__extPM_FILE.1448 var=56) merge (__extPM_FILE.441 __extPM_FILE.1380) <1095>; + (__extDM_int32_.1449 var=57) merge (__extDM_int32_.442 __extDM_int32_.1382) <1096>; } #73 } #23 #74 off=31 - (fclose.1488 var=291) const () <1129>; - (__link.1490 var=293) dmaddr__call_dmaddr_ (fclose.1488) <1131>; + (fclose.1455 var=287) const () <1102>; + (__link.1457 var=289) dmaddr__call_dmaddr_ (fclose.1455) <1104>; call { - (fp1.1487 var=106 stl=A off=0) assign (__tmp.244) <1128>; - (__link.1491 var=293 stl=LR off=0) assign (__link.1490) <1132>; - (__tmp.1492 var=294 stl=RA off=0 _ZL10input_port.1495 var=48 _ZL11output_port.1496 var=51 _ZL16corrupted_signal.1497 var=37 _ZL22reference_noise_signal.1498 var=39 __extDM.1499 var=32 __extDM_SingleSignalPath.1500 var=38 __extDM_int16_.1501 var=49 __extDM_int32_.1502 var=58 __extDM_int64_.1503 var=55 __extDM_int8_.1504 var=56 __extDM_void.1505 var=53 __extPM.1506 var=33 __extPM_FILE.1507 var=57 __extPM_void.1508 var=54 b0.1509 var=35 b1.1510 var=36 d0.1511 var=46 d1.1512 var=47 __vola.1513 var=29) Ffclose (__link.1491 fp1.1487 _ZL10input_port.1474 _ZL11output_port.1476 _ZL16corrupted_signal.1469 _ZL22reference_noise_signal.1471 __extDM.1465 __extDM_SingleSignalPath.1470 __extDM_int16_.1475 __extDM_int32_.1482 __extDM_int64_.1479 __extDM_int8_.1480 __extDM_void.1477 __extPM.1466 __extPM_FILE.1481 __extPM_void.1478 b0.1467 b1.1468 d0.1472 d1.1473 __vola.1464) <1133>; + (fp1.1454 var=103 stl=A off=0) assign (__tmp.241) <1101>; + (__link.1458 var=289 stl=LR off=0) assign (__link.1457) <1105>; + (__tmp.1459 var=290 stl=RA off=0 _ZL10input_port.1462 var=48 _ZL11output_port.1463 var=50 _ZL17c_sensor_signal_t.1464 var=37 _ZL19acc_sensor_signal_t.1465 var=39 __extDM.1466 var=32 __extDM_SingleSignalPath.1467 var=38 __extDM_int16_.1468 var=49 __extDM_int32_.1469 var=57 __extDM_int64_.1470 var=54 __extDM_int8_.1471 var=55 __extDM_void.1472 var=52 __extPM.1473 var=33 __extPM_FILE.1474 var=56 __extPM_void.1475 var=53 b0.1476 var=35 b1.1477 var=36 d0.1478 var=46 d1.1479 var=47 __vola.1480 var=29) Ffclose (__link.1458 fp1.1454 _ZL10input_port.1441 _ZL11output_port.1443 _ZL17c_sensor_signal_t.1436 _ZL19acc_sensor_signal_t.1438 __extDM.1432 __extDM_SingleSignalPath.1437 __extDM_int16_.1442 __extDM_int32_.1449 __extDM_int64_.1446 __extDM_int8_.1447 __extDM_void.1444 __extPM.1433 __extPM_FILE.1448 __extPM_void.1445 b0.1434 b1.1435 d0.1439 d1.1440 __vola.1431) <1106>; } #75 off=32 #76 off=33 - (__link.1517 var=297) dmaddr__call_dmaddr_ (fclose.1488) <1139>; + (__link.1484 var=293) dmaddr__call_dmaddr_ (fclose.1455) <1112>; call { - (fp2.1514 var=107 stl=A off=0) assign (__tmp.271) <1136>; - (__link.1518 var=297 stl=LR off=0) assign (__link.1517) <1140>; - (__tmp.1519 var=298 stl=RA off=0 _ZL10input_port.1522 var=48 _ZL11output_port.1523 var=51 _ZL16corrupted_signal.1524 var=37 _ZL22reference_noise_signal.1525 var=39 __extDM.1526 var=32 __extDM_SingleSignalPath.1527 var=38 __extDM_int16_.1528 var=49 __extDM_int32_.1529 var=58 __extDM_int64_.1530 var=55 __extDM_int8_.1531 var=56 __extDM_void.1532 var=53 __extPM.1533 var=33 __extPM_FILE.1534 var=57 __extPM_void.1535 var=54 b0.1536 var=35 b1.1537 var=36 d0.1538 var=46 d1.1539 var=47 __vola.1540 var=29) Ffclose (__link.1518 fp2.1514 _ZL10input_port.1495 _ZL11output_port.1496 _ZL16corrupted_signal.1497 _ZL22reference_noise_signal.1498 __extDM.1499 __extDM_SingleSignalPath.1500 __extDM_int16_.1501 __extDM_int32_.1502 __extDM_int64_.1503 __extDM_int8_.1504 __extDM_void.1505 __extPM.1506 __extPM_FILE.1507 __extPM_void.1508 b0.1509 b1.1510 d0.1511 d1.1512 __vola.1513) <1141>; + (fp2.1481 var=104 stl=A off=0) assign (__tmp.268) <1109>; + (__link.1485 var=293 stl=LR off=0) assign (__link.1484) <1113>; + (__tmp.1486 var=294 stl=RA off=0 _ZL10input_port.1489 var=48 _ZL11output_port.1490 var=50 _ZL17c_sensor_signal_t.1491 var=37 _ZL19acc_sensor_signal_t.1492 var=39 __extDM.1493 var=32 __extDM_SingleSignalPath.1494 var=38 __extDM_int16_.1495 var=49 __extDM_int32_.1496 var=57 __extDM_int64_.1497 var=54 __extDM_int8_.1498 var=55 __extDM_void.1499 var=52 __extPM.1500 var=33 __extPM_FILE.1501 var=56 __extPM_void.1502 var=53 b0.1503 var=35 b1.1504 var=36 d0.1505 var=46 d1.1506 var=47 __vola.1507 var=29) Ffclose (__link.1485 fp2.1481 _ZL10input_port.1462 _ZL11output_port.1463 _ZL17c_sensor_signal_t.1464 _ZL19acc_sensor_signal_t.1465 __extDM.1466 __extDM_SingleSignalPath.1467 __extDM_int16_.1468 __extDM_int32_.1469 __extDM_int64_.1470 __extDM_int8_.1471 __extDM_void.1472 __extPM.1473 __extPM_FILE.1474 __extPM_void.1475 b0.1476 b1.1477 d0.1478 d1.1479 __vola.1480) <1114>; } #77 off=34 #78 off=35 - (__link.1544 var=301) dmaddr__call_dmaddr_ (fclose.1488) <1147>; + (__link.1511 var=297) dmaddr__call_dmaddr_ (fclose.1455) <1120>; call { - (fp3.1541 var=108 stl=A off=0) assign (__tmp.298) <1144>; - (__link.1545 var=301 stl=LR off=0) assign (__link.1544) <1148>; - (__tmp.1546 var=302 stl=RA off=0 _ZL10input_port.1549 var=48 _ZL11output_port.1550 var=51 _ZL16corrupted_signal.1551 var=37 _ZL22reference_noise_signal.1552 var=39 __extDM.1553 var=32 __extDM_SingleSignalPath.1554 var=38 __extDM_int16_.1555 var=49 __extDM_int32_.1556 var=58 __extDM_int64_.1557 var=55 __extDM_int8_.1558 var=56 __extDM_void.1559 var=53 __extPM.1560 var=33 __extPM_FILE.1561 var=57 __extPM_void.1562 var=54 b0.1563 var=35 b1.1564 var=36 d0.1565 var=46 d1.1566 var=47 __vola.1567 var=29) Ffclose (__link.1545 fp3.1541 _ZL10input_port.1522 _ZL11output_port.1523 _ZL16corrupted_signal.1524 _ZL22reference_noise_signal.1525 __extDM.1526 __extDM_SingleSignalPath.1527 __extDM_int16_.1528 __extDM_int32_.1529 __extDM_int64_.1530 __extDM_int8_.1531 __extDM_void.1532 __extPM.1533 __extPM_FILE.1534 __extPM_void.1535 b0.1536 b1.1537 d0.1538 d1.1539 __vola.1540) <1149>; + (fp3.1508 var=105 stl=A off=0) assign (__tmp.295) <1117>; + (__link.1512 var=297 stl=LR off=0) assign (__link.1511) <1121>; + (__tmp.1513 var=298 stl=RA off=0 _ZL10input_port.1516 var=48 _ZL11output_port.1517 var=50 _ZL17c_sensor_signal_t.1518 var=37 _ZL19acc_sensor_signal_t.1519 var=39 __extDM.1520 var=32 __extDM_SingleSignalPath.1521 var=38 __extDM_int16_.1522 var=49 __extDM_int32_.1523 var=57 __extDM_int64_.1524 var=54 __extDM_int8_.1525 var=55 __extDM_void.1526 var=52 __extPM.1527 var=33 __extPM_FILE.1528 var=56 __extPM_void.1529 var=53 b0.1530 var=35 b1.1531 var=36 d0.1532 var=46 d1.1533 var=47 __vola.1534 var=29) Ffclose (__link.1512 fp3.1508 _ZL10input_port.1489 _ZL11output_port.1490 _ZL17c_sensor_signal_t.1491 _ZL19acc_sensor_signal_t.1492 __extDM.1493 __extDM_SingleSignalPath.1494 __extDM_int16_.1495 __extDM_int32_.1496 __extDM_int64_.1497 __extDM_int8_.1498 __extDM_void.1499 __extPM.1500 __extPM_FILE.1501 __extPM_void.1502 b0.1503 b1.1504 d0.1505 d1.1506 __vola.1507) <1122>; } #79 off=36 #82 off=37 nxt=-2 - (__R_SP.1574 var=26 __sp.1575 var=34) wr_res_reg (__rt.1847 __sp.95) <1158>; - () void_ret_dmaddr_ (__la.87) <1159>; - (__rt.1576 var=86 stl=RA off=0) assign (__ct_0.125) <1160>; - () out (__rt.1576) <1161>; - () sink (__vola.1567) <1162>; - () sink (__extDM.1553) <1165>; - () sink (__extPM.1560) <1166>; - () sink (__sp.1575) <1167>; - () sink (_ZL16corrupted_signal.1551) <1168>; - () sink (__extDM_SingleSignalPath.1554) <1169>; - () sink (_ZL22reference_noise_signal.1552) <1170>; - () sink (_ZL10input_port.1549) <1177>; - () sink (__extDM_int16_.1555) <1178>; - () sink (_ZL11output_port.1550) <1180>; - () sink (__extDM_void.1559) <1182>; - () sink (__extPM_void.1562) <1183>; - () sink (__extDM_int64_.1557) <1184>; - () sink (__extDM_int8_.1558) <1185>; - () sink (__extPM_FILE.1561) <1186>; - () sink (__extDM_int32_.1556) <1187>; - () sink (__ct_0.84) <1188>; - (__rt.1847 var=361) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_88s0.2081) <1628>; - (__ct_88s0.2081 var=403) const () <1971>; + (__R_SP.1541 var=26 __sp.1542 var=34) wr_res_reg (__rt.1812 __sp.92) <1131>; + () void_ret_dmaddr_ (__la.84) <1132>; + (__rt.1543 var=83 stl=RA off=0) assign (__ct_0.122) <1133>; + () out (__rt.1543) <1134>; + () sink (__vola.1534) <1135>; + () sink (__extDM.1520) <1138>; + () sink (__extPM.1527) <1139>; + () sink (__sp.1542) <1140>; + () sink (_ZL17c_sensor_signal_t.1518) <1141>; + () sink (__extDM_SingleSignalPath.1521) <1142>; + () sink (_ZL19acc_sensor_signal_t.1519) <1143>; + () sink (_ZL10input_port.1516) <1150>; + () sink (__extDM_int16_.1522) <1151>; + () sink (_ZL11output_port.1517) <1152>; + () sink (__extDM_void.1526) <1154>; + () sink (__extPM_void.1529) <1155>; + () sink (__extDM_int64_.1524) <1156>; + () sink (__extDM_int8_.1525) <1157>; + () sink (__extPM_FILE.1528) <1158>; + () sink (__extDM_int32_.1523) <1159>; + () sink (__ct_0.81) <1160>; + (__rt.1812 var=357) __Pvoid__pl___Pvoid_int18_ (__rd___sp.93 __ct_88s0.2046) <1595>; + (__ct_88s0.2046 var=399) const () <1937>; } #0 0 : 'main.c'; ---------- 0 : (0,28:0,0); -4 : (0,38:4,15); -5 : (0,50:72,16); -6 : (0,50:16,16); -7 : (0,51:68,17); -8 : (0,51:16,17); -9 : (0,52:79,18); -10 : (0,52:16,18); -11 : (0,56:4,20); -12 : (0,56:4,20); -14 : (0,56:4,20); -16 : (0,56:4,21); -17 : (0,56:4,22); -18 : (0,56:4,22); -19 : (0,56:4,22); -23 : (0,56:4,24); -25 : (0,56:4,25); -26 : (0,56:4,25); -28 : (0,56:37,25); -36 : (0,58:22,27); -37 : (0,58:12,27); -38 : (0,59:22,28); -39 : (0,59:12,28); -45 : (0,63:8,40); -53 : (0,66:23,43); -54 : (0,66:12,43); -59 : (0,56:18,54); -60 : (0,56:13,54); -62 : (0,56:23,54); -64 : (0,56:23,55); -65 : (0,56:23,56); -66 : (0,56:31,56); -67 : (0,56:26,56); -72 : (0,56:4,60); -74 : (0,69:11,63); -75 : (0,69:4,63); -76 : (0,70:11,64); -77 : (0,70:4,64); -78 : (0,71:11,65); -79 : (0,71:4,65); -82 : (0,72:0,66); -352 : (0,38:4,15); -474 : (0,63:8,40); -686 : (0,56:4,22); -689 : (0,56:23,56); -692 : (0,56:4,20); -697 : (0,56:23,54); +4 : (0,37:4,14); +5 : (0,49:73,15); +6 : (0,49:16,15); +7 : (0,50:68,16); +8 : (0,50:16,16); +9 : (0,51:79,17); +10 : (0,51:16,17); +11 : (0,55:4,19); +12 : (0,55:4,19); +14 : (0,55:4,19); +16 : (0,55:4,20); +17 : (0,55:4,21); +18 : (0,55:4,21); +19 : (0,55:4,21); +23 : (0,55:4,23); +25 : (0,55:4,24); +26 : (0,55:4,24); +28 : (0,55:37,24); +36 : (0,57:22,26); +37 : (0,57:12,26); +38 : (0,58:22,27); +39 : (0,58:12,27); +45 : (0,62:8,39); +53 : (0,65:23,42); +54 : (0,65:12,42); +59 : (0,55:18,53); +60 : (0,55:13,53); +62 : (0,55:23,53); +64 : (0,55:23,54); +65 : (0,55:23,55); +66 : (0,55:31,55); +67 : (0,55:26,55); +72 : (0,55:4,59); +74 : (0,68:11,62); +75 : (0,68:4,62); +76 : (0,69:11,63); +77 : (0,69:4,63); +78 : (0,70:11,64); +79 : (0,70:4,64); +82 : (0,71:0,65); +368 : (0,37:4,14); +490 : (0,62:8,39); +711 : (0,55:4,21); +714 : (0,55:23,55); +717 : (0,55:4,19); +722 : (0,55:23,53); ---------- -86 : (0,50:22,0); -88 : (0,50:72,0); -90 : (0,51:22,0); -92 : (0,52:22,0); -94 : (0,52:79,0); -114 : (0,28:4,0); -118 : (0,28:4,0); -120 : (0,33:11,0); -147 : (0,33:18,0); -149 : (0,33:18,0); -152 : (0,33:18,2); -153 : (0,33:24,0); -158 : (0,33:24,3); -164 : (0,33:28,4); -170 : (0,33:32,5); -176 : (0,33:36,6); -182 : (0,34:18,8); -188 : (0,34:24,9); -194 : (0,34:28,10); -200 : (0,34:32,11); -206 : (0,34:36,12); -207 : (0,39:8,0); -208 : (0,39:27,0); -209 : (0,40:8,0); +85 : (0,49:22,0); +87 : (0,49:73,0); +89 : (0,50:22,0); +91 : (0,51:22,0); +93 : (0,51:79,0); +111 : (0,28:4,0); +115 : (0,28:4,0); +117 : (0,31:11,0); +144 : (0,31:18,0); +146 : (0,31:18,0); +149 : (0,31:18,1); +150 : (0,31:24,0); +155 : (0,31:24,2); +161 : (0,31:28,3); +167 : (0,31:32,4); +173 : (0,31:36,5); +179 : (0,32:18,7); +185 : (0,32:24,8); +191 : (0,32:28,9); +197 : (0,32:32,10); +203 : (0,32:36,11); +204 : (0,38:8,0); +205 : (0,38:28,0); +206 : (0,39:8,0); +207 : (0,40:8,0); +208 : (0,41:8,0); 210 : (0,41:8,0); -211 : (0,42:8,0); 213 : (0,42:8,0); +214 : (0,43:8,0); 216 : (0,43:8,0); -217 : (0,44:8,0); 219 : (0,44:8,0); +220 : (0,45:8,0); 222 : (0,45:8,0); 223 : (0,46:8,0); 225 : (0,46:8,0); -226 : (0,47:8,0); -228 : (0,47:8,0); -231 : (0,38:4,15); -232 : (0,38:4,0); -233 : (0,38:4,15); -235 : (0,50:22,0); -236 : (0,50:72,0); -239 : (0,50:16,16); -240 : (0,50:16,0); -241 : (0,50:16,16); -245 : (0,51:22,0); -246 : (0,51:68,0); -249 : (0,51:16,17); -250 : (0,51:16,0); -251 : (0,51:16,17); -255 : (0,52:22,0); -256 : (0,52:79,0); -259 : (0,52:16,18); -260 : (0,52:16,0); -261 : (0,52:16,18); -264 : (0,56:4,0); -267 : (0,56:4,20); -268 : (0,56:4,0); -269 : (0,56:4,20); -330 : (0,56:4,20); -333 : (0,56:4,0); -336 : (0,56:4,22); -337 : (0,56:4,0); -338 : (0,56:4,22); -345 : (0,56:4,23); -346 : (0,56:4,23); -347 : (0,56:4,23); -348 : (0,56:4,23); -349 : (0,56:4,23); -350 : (0,56:4,23); -351 : (0,56:4,23); -352 : (0,56:4,23); -353 : (0,56:4,23); -354 : (0,56:4,23); -355 : (0,56:4,23); -356 : (0,56:4,23); -357 : (0,56:4,23); -358 : (0,56:4,23); -359 : (0,56:4,23); -360 : (0,56:4,23); -361 : (0,56:4,23); -418 : (0,56:4,24); -420 : (0,56:4,25); -423 : (0,56:4,25); -424 : (0,56:4,25); -426 : (0,56:4,25); -427 : (0,56:4,25); -428 : (0,56:4,25); -429 : (0,56:4,25); -430 : (0,56:4,25); -437 : (0,56:4,25); -438 : (0,56:4,25); -439 : (0,56:4,25); -440 : (0,56:4,25); -442 : (0,56:4,25); -444 : (0,56:4,25); -445 : (0,56:4,25); -446 : (0,56:4,25); -447 : (0,56:4,25); -448 : (0,56:4,25); -449 : (0,56:4,25); -593 : (0,58:19,0); -594 : (0,58:24,0); -595 : (0,58:22,0); -598 : (0,58:12,27); -599 : (0,58:12,0); -600 : (0,58:12,27); -603 : (0,59:19,0); -604 : (0,59:24,0); -605 : (0,59:22,0); -608 : (0,59:12,28); -609 : (0,59:12,0); -610 : (0,59:12,28); -613 : (0,60:38,29); -614 : (0,60:28,29); -619 : (0,60:22,29); -620 : (0,61:40,30); -621 : (0,61:30,30); -629 : (0,61:22,30); -713 : (0,64:12,0); -714 : (0,64:31,0); -715 : (0,64:56,40); -716 : (0,64:56,0); -720 : (0,64:73,0); -724 : (0,64:89,0); -725 : (0,64:94,0); -728 : (0,63:8,40); -729 : (0,63:8,0); -730 : (0,63:8,40); -849 : (0,66:20,0); -850 : (0,66:25,0); -855 : (0,66:44,43); -857 : (0,66:23,0); -860 : (0,66:12,43); -861 : (0,66:12,0); -862 : (0,66:12,43); -948 : (0,56:18,0); -951 : (0,56:13,54); -952 : (0,56:13,0); -953 : (0,56:13,54); -1014 : (0,56:23,54); -1017 : (0,56:31,0); -1020 : (0,56:26,56); -1021 : (0,56:26,0); -1022 : (0,56:26,56); -1029 : (0,56:23,57); -1030 : (0,56:23,57); -1031 : (0,56:23,57); -1032 : (0,56:23,57); -1033 : (0,56:23,57); -1034 : (0,56:23,57); -1035 : (0,56:23,57); -1036 : (0,56:23,57); -1037 : (0,56:23,57); -1038 : (0,56:23,57); -1039 : (0,56:23,57); -1040 : (0,56:23,57); -1041 : (0,56:23,57); -1042 : (0,56:23,57); -1043 : (0,56:23,57); -1044 : (0,56:23,57); -1045 : (0,56:23,57); -1046 : (0,56:23,57); -1047 : (0,56:23,57); -1049 : (0,56:4,58); -1050 : (0,56:4,58); -1053 : (0,56:4,58); -1054 : (0,56:4,58); -1056 : (0,56:4,58); -1057 : (0,56:4,58); -1058 : (0,56:4,58); -1059 : (0,56:4,58); -1060 : (0,56:4,58); -1067 : (0,56:4,58); -1068 : (0,56:4,58); -1069 : (0,56:4,58); -1070 : (0,56:4,58); -1072 : (0,56:4,58); -1074 : (0,56:4,58); -1075 : (0,56:4,58); -1076 : (0,56:4,58); -1077 : (0,56:4,58); -1078 : (0,56:4,58); -1079 : (0,56:4,58); -1105 : (0,56:4,62); -1106 : (0,56:4,62); -1107 : (0,56:4,62); -1108 : (0,56:4,62); -1109 : (0,56:4,62); -1110 : (0,56:4,62); -1111 : (0,56:4,62); -1112 : (0,56:4,62); -1113 : (0,56:4,62); -1114 : (0,56:4,62); -1115 : (0,56:4,62); -1116 : (0,56:4,62); -1117 : (0,56:4,62); -1118 : (0,56:4,62); -1119 : (0,56:4,62); -1120 : (0,56:4,62); -1121 : (0,56:4,62); -1122 : (0,56:4,62); -1123 : (0,56:4,62); -1128 : (0,69:11,0); -1131 : (0,69:4,63); -1132 : (0,69:4,0); -1133 : (0,69:4,63); -1136 : (0,70:11,0); -1139 : (0,70:4,64); -1140 : (0,70:4,0); -1141 : (0,70:4,64); -1144 : (0,71:11,0); -1147 : (0,71:4,65); -1148 : (0,71:4,0); -1149 : (0,71:4,65); -1158 : (0,72:0,66); -1159 : (0,72:0,66); -1160 : (0,72:0,0); -1331 : (0,56:23,57); -1472 : (0,28:4,0); -1500 : (0,33:11,0); -1528 : (0,34:11,0); -1556 : (0,54:8,0); -1584 : (0,54:12,0); -1628 : (0,72:0,0); -1656 : (0,64:89,0); -1712 : (0,33:24,0); -1740 : (0,33:28,0); -1768 : (0,33:32,0); -1796 : (0,33:36,0); -1824 : (0,34:24,0); -1852 : (0,34:28,0); -1880 : (0,34:32,0); -1908 : (0,34:36,0); -1969 : (0,28:4,0); -1971 : (0,28:4,0); -1973 : (0,33:11,0); -1975 : (0,34:11,0); -1981 : (0,54:8,0); -1987 : (0,54:12,0); -1993 : (0,64:89,0); -1997 : (0,33:24,0); -2003 : (0,33:28,0); -2009 : (0,33:32,0); -2015 : (0,33:36,0); -2021 : (0,34:24,0); -2027 : (0,34:28,0); -2033 : (0,34:32,0); -2039 : (0,34:36,0); -2048 : (0,56:4,22); -2056 : (0,56:23,56); -2057 : (0,56:23,56); -2064 : (0,56:4,20); -2072 : (0,56:23,54); -2123 : (0,56:4,20); -2124 : (0,56:23,54); -2172 : (0,56:4,22); -2173 : (0,56:4,23); -2221 : (0,56:4,20); -2224 : (0,56:23,54); -2228 : (0,56:4,58); -2232 : (0,56:4,24); +228 : (0,37:4,14); +229 : (0,37:4,0); +230 : (0,37:4,14); +232 : (0,49:22,0); +233 : (0,49:73,0); +236 : (0,49:16,15); +237 : (0,49:16,0); +238 : (0,49:16,15); +242 : (0,50:22,0); +243 : (0,50:68,0); +246 : (0,50:16,16); +247 : (0,50:16,0); +248 : (0,50:16,16); +252 : (0,51:22,0); +253 : (0,51:79,0); +256 : (0,51:16,17); +257 : (0,51:16,0); +258 : (0,51:16,17); +261 : (0,55:4,0); +264 : (0,55:4,19); +265 : (0,55:4,0); +266 : (0,55:4,19); +325 : (0,55:4,19); +328 : (0,55:4,0); +331 : (0,55:4,21); +332 : (0,55:4,0); +333 : (0,55:4,21); +340 : (0,55:4,22); +341 : (0,55:4,22); +342 : (0,55:4,22); +343 : (0,55:4,22); +344 : (0,55:4,22); +345 : (0,55:4,22); +346 : (0,55:4,22); +347 : (0,55:4,22); +348 : (0,55:4,22); +349 : (0,55:4,22); +350 : (0,55:4,22); +351 : (0,55:4,22); +352 : (0,55:4,22); +353 : (0,55:4,22); +354 : (0,55:4,22); +355 : (0,55:4,22); +356 : (0,55:4,22); +411 : (0,55:4,23); +413 : (0,55:4,24); +416 : (0,55:4,24); +417 : (0,55:4,24); +419 : (0,55:4,24); +420 : (0,55:4,24); +421 : (0,55:4,24); +422 : (0,55:4,24); +423 : (0,55:4,24); +430 : (0,55:4,24); +431 : (0,55:4,24); +432 : (0,55:4,24); +433 : (0,55:4,24); +434 : (0,55:4,24); +436 : (0,55:4,24); +437 : (0,55:4,24); +438 : (0,55:4,24); +439 : (0,55:4,24); +440 : (0,55:4,24); +441 : (0,55:4,24); +580 : (0,57:19,0); +581 : (0,57:24,0); +582 : (0,57:22,0); +585 : (0,57:12,26); +586 : (0,57:12,0); +587 : (0,57:12,26); +590 : (0,58:19,0); +591 : (0,58:24,0); +592 : (0,58:22,0); +595 : (0,58:12,27); +596 : (0,58:12,0); +597 : (0,58:12,27); +600 : (0,59:38,28); +601 : (0,59:28,28); +606 : (0,59:22,28); +607 : (0,60:40,29); +608 : (0,60:30,29); +616 : (0,60:22,29); +698 : (0,63:12,0); +699 : (0,63:32,0); +703 : (0,63:65,0); +707 : (0,63:81,0); +708 : (0,63:86,0); +711 : (0,62:8,39); +712 : (0,62:8,0); +713 : (0,62:8,39); +828 : (0,65:20,0); +829 : (0,65:25,0); +834 : (0,65:44,42); +836 : (0,65:23,0); +839 : (0,65:12,42); +840 : (0,65:12,0); +841 : (0,65:12,42); +925 : (0,55:18,0); +928 : (0,55:13,53); +929 : (0,55:13,0); +930 : (0,55:13,53); +989 : (0,55:23,53); +992 : (0,55:31,0); +995 : (0,55:26,55); +996 : (0,55:26,0); +997 : (0,55:26,55); +1004 : (0,55:23,56); +1005 : (0,55:23,56); +1006 : (0,55:23,56); +1007 : (0,55:23,56); +1008 : (0,55:23,56); +1009 : (0,55:23,56); +1010 : (0,55:23,56); +1011 : (0,55:23,56); +1012 : (0,55:23,56); +1013 : (0,55:23,56); +1014 : (0,55:23,56); +1015 : (0,55:23,56); +1016 : (0,55:23,56); +1017 : (0,55:23,56); +1018 : (0,55:23,56); +1019 : (0,55:23,56); +1020 : (0,55:23,56); +1021 : (0,55:23,56); +1022 : (0,55:23,56); +1024 : (0,55:4,57); +1025 : (0,55:4,57); +1028 : (0,55:4,57); +1029 : (0,55:4,57); +1031 : (0,55:4,57); +1032 : (0,55:4,57); +1033 : (0,55:4,57); +1034 : (0,55:4,57); +1035 : (0,55:4,57); +1042 : (0,55:4,57); +1043 : (0,55:4,57); +1044 : (0,55:4,57); +1045 : (0,55:4,57); +1046 : (0,55:4,57); +1048 : (0,55:4,57); +1049 : (0,55:4,57); +1050 : (0,55:4,57); +1051 : (0,55:4,57); +1052 : (0,55:4,57); +1053 : (0,55:4,57); +1078 : (0,55:4,61); +1079 : (0,55:4,61); +1080 : (0,55:4,61); +1081 : (0,55:4,61); +1082 : (0,55:4,61); +1083 : (0,55:4,61); +1084 : (0,55:4,61); +1085 : (0,55:4,61); +1086 : (0,55:4,61); +1087 : (0,55:4,61); +1088 : (0,55:4,61); +1089 : (0,55:4,61); +1090 : (0,55:4,61); +1091 : (0,55:4,61); +1092 : (0,55:4,61); +1093 : (0,55:4,61); +1094 : (0,55:4,61); +1095 : (0,55:4,61); +1096 : (0,55:4,61); +1101 : (0,68:11,0); +1104 : (0,68:4,62); +1105 : (0,68:4,0); +1106 : (0,68:4,62); +1109 : (0,69:11,0); +1112 : (0,69:4,63); +1113 : (0,69:4,0); +1114 : (0,69:4,63); +1117 : (0,70:11,0); +1120 : (0,70:4,64); +1121 : (0,70:4,0); +1122 : (0,70:4,64); +1131 : (0,71:0,65); +1132 : (0,71:0,65); +1133 : (0,71:0,0); +1299 : (0,55:23,56); +1439 : (0,28:4,0); +1467 : (0,31:11,0); +1495 : (0,32:11,0); +1523 : (0,53:8,0); +1551 : (0,53:12,0); +1595 : (0,71:0,0); +1623 : (0,63:81,0); +1679 : (0,31:24,0); +1707 : (0,31:28,0); +1735 : (0,31:32,0); +1763 : (0,31:36,0); +1791 : (0,32:24,0); +1819 : (0,32:28,0); +1847 : (0,32:32,0); +1875 : (0,32:36,0); +1935 : (0,28:4,0); +1937 : (0,28:4,0); +1939 : (0,31:11,0); +1941 : (0,32:11,0); +1947 : (0,53:8,0); +1953 : (0,53:12,0); +1959 : (0,63:81,0); +1963 : (0,31:24,0); +1969 : (0,31:28,0); +1975 : (0,31:32,0); +1981 : (0,31:36,0); +1987 : (0,32:24,0); +1993 : (0,32:28,0); +1999 : (0,32:32,0); +2005 : (0,32:36,0); +2014 : (0,55:4,21); +2022 : (0,55:23,55); +2023 : (0,55:23,55); +2030 : (0,55:4,19); +2038 : (0,55:23,53); +2088 : (0,55:4,19); +2089 : (0,55:23,53); +2136 : (0,55:4,21); +2137 : (0,55:4,22); +2184 : (0,55:4,19); +2187 : (0,55:23,53); +2191 : (0,55:4,57); +2195 : (0,55:4,23); diff --git a/simulation/Release/chesswork/main.ctt b/simulation/Release/chesswork/main.ctt index ac5271f..bc681c1 100644 --- a/simulation/Release/chesswork/main.ctt +++ b/simulation/Release/chesswork/main.ctt @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32 diff --git a/simulation/Release/chesswork/main.dti b/simulation/Release/chesswork/main.dti index a7c0af0..f041cfc 100644 --- a/simulation/Release/chesswork/main.dti +++ b/simulation/Release/chesswork/main.dti @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32 @@ -215,15 +215,8 @@ __PDMAvoid__ : _basic() __PDMAvoid; __PDMIOvoid__ : _basic() __PDMIOvoid; __PPMvoid__ : _basic() __PPMvoid; - OutputMode_DMA : _enum(DMA,4,4) OutputMode $__sint_DMA { - OUTPUT_MODE_C_SENSOR = 0; - OUTPUT_MODE_ACC_SENSOR = 1; - OUTPUT_MODE_FIR_LMS = 2; - OUTPUT_MODE_FIR = 3; - OUTPUT_MODE_FIR_LMS_LEAKY = 4; - } __cchar_DMA : _basic(DMA,1,1) __cchar; - __A47__cchar_DMA : _array(DMA,47,1) [47] $__cchar_DMA; + __A48__cchar_DMA : _array(DMA,48,1) [48] $__cchar_DMA; __A2__cchar_DMA : _array(DMA,2,1) [2] $__cchar_DMA; __A43__cchar_DMA : _array(DMA,43,1) [43] $__cchar_DMA; __A54__cchar_DMA : _array(DMA,54,1) [54] $__cchar_DMA; diff --git a/simulation/Release/chesswork/main.fnm b/simulation/Release/chesswork/main.fnm index 323ce95..81cf919 100644 --- a/simulation/Release/chesswork/main.fnm +++ b/simulation/Release/chesswork/main.fnm @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32 @@ -16,7 +16,7 @@ fopen feof fscanf - _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ + _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ fprintf fclose ) @@ -46,8 +46,8 @@ ) "" - : _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ - : "calc" global "signal_processing\\include\\signal_path.h" 125 Ofile + : _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ + : "calc" global "signal_processing\\include\\signal_path.h" 124 Ofile ( ) diff --git a/simulation/Release/chesswork/main.gvt b/simulation/Release/chesswork/main.gvt index 6655e63..00a1d4a 100644 --- a/simulation/Release/chesswork/main.gvt +++ b/simulation/Release/chesswork/main.gvt @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32 @@ -8,8 +8,8 @@ 2 : _irq_stat_var_ typ=uint15_ bnd=e sz=1 algn=1 stl=irq_stat tref=uint15__irq_stat 4 : stdin typ=int8_ bnd=e sz=4 algn=4 stl=DMA tref=__PFILE_DMA 5 : stdout typ=int8_ bnd=e sz=4 algn=4 stl=DMA tref=__PFILE_DMA - 10 : _ZL16corrupted_signal typ=int8_ bnd=f sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA - 11 : _ZL22reference_noise_signal typ=int8_ bnd=f sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA + 10 : _ZL17c_sensor_signal_t typ=int8_ bnd=f sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA + 11 : _ZL19acc_sensor_signal_t typ=int8_ bnd=f sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA 12 : _ZL10input_port typ=int8_ val=8388608f bnd=f sz=8 algn=2 stl=DMB tref=__A4DMB__sshort_DMB 13 : _ZL11output_port typ=int8_ val=8388624f bnd=f sz=8 algn=2 stl=DMB tref=__A4DMB__sshort_DMB 14 : _ZL15input_pointer_0 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__PDMB__sshort_DMA @@ -17,14 +17,13 @@ 16 : _ZL14output_pointer typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__PDMB__sshort_DMA 17 : _ZL14sample_pointer typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__PDMB__sshort_DMA 18 : _ZL6sample typ=int8_ bnd=f sz=2 algn=2 stl=DMB tref=int16_t_DMB - 19 : _ZZ4mainvE4mode typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=OutputMode_DMA - 20 : _ZL13__str8a4fef85 typ=int8_ bnd=F sz=47 algn=1 stl=DMA tref=__A47__cchar_DMA - 21 : _ZL13__str00f02b8f typ=int8_ bnd=F sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA - 22 : _ZL13__strff0646f3 typ=int8_ bnd=F sz=43 algn=1 stl=DMA tref=__A43__cchar_DMA - 23 : _ZL13__str8a32ec0e typ=int8_ bnd=F sz=54 algn=1 stl=DMA tref=__A54__cchar_DMA - 24 : _ZL13__str00f52cca typ=int8_ bnd=F sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA - 25 : _ZL13__str41232700 typ=int8_ bnd=F sz=3 algn=1 stl=DMA tref=__A3__cchar_DMA - 26 : _ZL13__str2eb09b76 typ=int8_ bnd=F sz=4 algn=1 stl=DMA tref=__A4__cchar_DMA + 19 : _ZL13__strdb58f936 typ=int8_ bnd=F sz=48 algn=1 stl=DMA tref=__A48__cchar_DMA + 20 : _ZL13__str00f02b8f typ=int8_ bnd=F sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA + 21 : _ZL13__strff0646f3 typ=int8_ bnd=F sz=43 algn=1 stl=DMA tref=__A43__cchar_DMA + 22 : _ZL13__str8a32ec0e typ=int8_ bnd=F sz=54 algn=1 stl=DMA tref=__A54__cchar_DMA + 23 : _ZL13__str00f52cca typ=int8_ bnd=F sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA + 24 : _ZL13__str41232700 typ=int8_ bnd=F sz=3 algn=1 stl=DMA tref=__A3__cchar_DMA + 25 : _ZL13__str2eb09b76 typ=int8_ bnd=F sz=4 algn=1 stl=DMA tref=__A4__cchar_DMA ] __main_sttc { } #0 diff --git a/simulation/Release/chesswork/main.gvt.# b/simulation/Release/chesswork/main.gvt.# index 80d5c8e..c08fa78 100644 --- a/simulation/Release/chesswork/main.gvt.# +++ b/simulation/Release/chesswork/main.gvt.# @@ -1,7 +1,7 @@ b94f5e81f66808a8f4f9315bd020e05811fb8d4a 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 42695db990e5aaff0b9f36d25938c80e96ce47cc -71526df70ad714866e87fde227f899b3f5e3c622 +93d7916815179fe21c6cc81c73f7c33d50df4bf6 da39a3ee5e6b4b0d3255bfef95601890afd80709 da39a3ee5e6b4b0d3255bfef95601890afd80709 0 diff --git a/simulation/Release/chesswork/main.gvt.o b/simulation/Release/chesswork/main.gvt.o index 1e3139586e03f6dfef882a04f1f949dcdbee0078..4baf6bd725c054e61091b76df7a9fc0728b1d7d4 100644 GIT binary patch literal 6212 zcmeHLU2G#)6+X_`iDPH~no=$7LsPP?Ry1|Sj^oX)*zG3GqNeOZRBP!j3L3`aaXgYU zc0H5bWF^FkR;c_G3Kg&tMSVet@=(N&3Y1EqB7Pn~{0ONCsS-$tRy?&x2!ROYJ9qB2 zugBxnKJu_vxijDS&Uf#*bLYWC zb`40~cejLH3xdMx`Q<{H3K3i>l&H{c*X__2jv^K6Zf$$hYI(k^u;(}03fr|>*S)N) zR@+gq(Y3dFExNY9=?2P$Q7G8iuKCdQT(HC44%=O~We>#Gh-d&BA>wMb46ZS11fdgd zx#Hnz%l7<&L)Hh+6^}bs;QB$kYX#n>Z?~*a&?jss*FI3O4z z7F7?PAG%%36!BtYQIO?cUqTvjfxXpfxfno?t3;G=FIX1lxL#XaYMfZ8Xq0I-%u;Qs zp;3*7St(Z<3mUa#FO*!zbTtYM7fX&~YgD;dS|}Yiqmf4uOK#0PQ9F)^R{e_IZA7a^ z8FHy8li!)b;)N=9HV8`=bw%7~&m6@Iz2eow=E>Fbr;0R4EDtd& zL(JOyW7Iixv^3BWnB_RNe*RQN7tMlL(20{(^izs6%fr;lFoiJYGau#ai>_hHXz_Ag-{L>)ur_^;s3#Y9cfIQ>oH$Ujbd zuuG`-O8-Ih^&#Mjv}a*I4XpGP*k6EcNdFq_>%h@?$7usL7q$(WAaB5)q#bGV&7d4T zK453*a|3pso*l5K=y_>#j62L35B zPT=-+78qwGN*fm>${L$M--L6@cvNyT#>atP1b5Wj&x@pg=;L6zlz&wv>rc; zOZMOducMEFdlL11pyC~u_Hti=>$#Ec$rs@=#<;uO%YeT_{Zc|l7~yMh{d2T?YMkf@ z>WJ3!aGf6Qei*Jxs63G2hsf07N@d1R;ZroT6Esh`7MQE3tDxcyihDvi24#wJPeS!& zRDZPcUMSy1x#yvJ3HADDWd+Jb%KaLuS5aS1ROa4*>%XWs2x*|BG0Gjn8n_cRk99EO zG15@tHJ6||gSwcgq|~95vH!^amHc%6?)_LR(=hXRTgE;z_ODGZ<*_m)1e-YuHlIHY zc083@o6hG8fD?DoJM;4ZS|2}00x84r(OD_~?y38y9(yP?hBcqRLj>Su zEYrdVPHtQX+-|VZX(D-TZJ4I@u-j<|8)n5?t*%?u-X^ut->>L_2hUckb2HUlzugIT zgPAqonVa!CotcaGmCVv&!K}>8_3`Xd*|p0JvsQFwON(a3EK$`%Ft;kQ&~-a(Qj{kK zj@@!;$MS1lXrTs8uMtwG>$+Q=re!;!ci9fzI@K)6kph-zDjEi4?bONIMXkFnd)KOM zHyUo21`O=E!pG@kKv!IEvl&JK(0yc*CFy~#vCaA+t%xqyk>N+3TP@e8PKd-hw2>?` za<;o&7gEbwzuflfG_j_$3#|4-)w^|HfVzU^tl^`rYGn6B`+}NRj{ce^)qjgd^JAIhVreQ*3)^Kz#a< zvFPm@o@XqwRH7vfi_;B$|G9LTm-q?B$bGno6OF{*Wm?fIm@H%5;Q(P`-SP=4`kYdW-CKxfTJYUG#=tsD-?y==rHtnZ?+C3@vlKBDwHP9YN(cuDbXO#%`)$;N^;; zdlGbV=HThaDgtwJ6`T8eh6S>yuJ4DfFuSfHZB8oh1sT_USPfQd@JLMeCoIdyG{1sw zOy|gDs{HESxk=qeZc_It==5Q8+-kxze=*kI3z%emp5YedYq;w3@(YMANuPdu0fu^q z%-?R9L` zw>I9ryPO2-NqkW%D$!PiA|W9KAsT)Fs{T-~2<8mF*%!KzhVN8zelt}AR83QcEA zNws=W!E)2yX!U5??ghtFDvU_M#%95VT}uVo-)XSibZT}-Y>fy8pb;XjCd=R&qekEt z{S8M<1Z~(=H&rC-{Bk;1tT&sR4c{qQUiE@&*O<*@noikiI&RUi+G+o-Px{XcW zYSf#)@DP^M^-aISpo^GM9;&YIG%ZuO36W_*W?R05X~22*Mx*9n04**TP*9)G^1W>> zW;g03N0?7r7G{0c&X%3>?2Ja4X4%XXX3H8?E}OY*t~{+#v-WhxDVn-3bezc)i?(K! zO=qSv$IRePf`}QXV1BM}EJqfP$g&)_M3zes)ellTZzMER;rZA??o=?J8w!;^g`EF{Vn}V;-o|aXtyPj{cgU$(4 znjZJ7RJf_|Ehtrw5n*{Ys-RG?~yatijG$rDo&AlNh8SA9o~(uX%j zr0NB<5sK2M(K1%@aj9p!2o2I>Lf#eE2>PD~Vx7`I1H6}Zab^1tZ+sbT5<#Ovj?#;0 z4{7p`ARp1>Hy}@H@*g4ZMIAup_f&DOz!&e&e15$r4 z_n<4q_kR04eYRao_Y}RbQT6Zme$xRjOyp3MOO7DCDr2LCM z;WgE_gZ@Sk#@(jDw%rOLcX2rarzCo9)8P_+G5R59mM06>$SlCaEDUVoI`BF!FOcy& zG*{WccuS(F@mGmPjE{hR2IZJ>Lvl%D-yjh$oI}Rl5=|NhfPM=uYupcX4akok17gp+ z6kU|?YZN^z;U$VbE#dP-gLUBO;1JvIOAceq0*(Mi0{95vIE`$4{sQd7aXOp$F4#3eqZ&VF@%X4jE|vt2)&0EaT(b= zjP9|0;68(T8dTVE=6Y-jst5b3N0*^82H0KfEMN)s#zPkR6psj{xwwB z`m5iA>H}0BNcT;Q{Tr$%Ph%p&la|v9S@X7u1`CG~j4}Vn<>1AZos+BXJv1SYo-HhSfUiS9)4fBOnUe10;S-*M{=Z^uh6xy8w3 zwb4jEbu?pUW>RJ@IoZYsXR{7Yl4c=YJeZj=b7qF}RRnYL;_SR;`xOcfw_ee%Idsu- z3sv7j^(xh}PmQMIY&0sCUG%G4HV)lXup~zcSfZ=w=#h01r^X%Bl2fyHtiom)=W^;0 zu$>DXpMgEvcB&UDeh>ie1CcCAceuu(-t}ogxLiYG5;(VNj!O-{iBq$U6F#HjW)ryp z&X?BOR=rxH@Eb!Mgu4@o{y9Yd{KE3Q3MUpASvqHN+mTA>xkf8Bkal?q#s>6V=b@bJ50faWwx=F7v~@UBFXG1lr34sV#RLaG51cG+Bp;( z^hlrD6dUwNrrJ~xqARs(XInBvIMHh7UTn}K?P^nO&`!dT>W1<%nFQb7Hg0bl?LFr9 zwsCvgxcRn$laELZN#rej{wQ@Ye2DKl6I=y}Z56K$k$1G;xqM=WB6#WX$y9qC@KF>W z4#b{}{MY2FNtKlkR9G|!}HGGLNPR(3i)bMMJas1=*3k{0|b2Q-J zVP4{YGL8lO#~L2zF^ZEJ(cKzOF&+!-k7;;|aU$TK)$l8fdAd?*R2+|<#?)O0r-oFDhl$P>vm5;@jsoA9r)gOu2gvfBjkt4 z+yP1Q+}(r9>p{6Vg^`;o7l{t5W2tn(Z4b$VF2$Vb)6`rTyE!42xtC#?` zlY55v|GyWq`<49ju$|mDgx$YxVyC8@+abizz=3p diff --git a/simulation/Release/chesswork/main.ini b/simulation/Release/chesswork/main.ini index 061917c..29617b2 100644 --- a/simulation/Release/chesswork/main.ini +++ b/simulation/Release/chesswork/main.ini @@ -1,10 +1,10 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32 -_ZL16corrupted_signal/10 $ corrupted_signal -_ZL22reference_noise_signal/11 $ reference_noise_signal +_ZL17c_sensor_signal_t/10 $ c_sensor_signal_t +_ZL19acc_sensor_signal_t/11 $ acc_sensor_signal_t _ZL10input_port/12 $ input_port _ZL11output_port/13 $ output_port _ZL15input_pointer_0/14 $ input_pointer_0 @@ -12,19 +12,17 @@ _ZL15input_pointer_1/15 $ input_pointer_1 _ZL14output_pointer/16 $ output_pointer _ZL14sample_pointer/17 $ sample_pointer _ZL6sample/18 $ sample -_ZZ4mainvE4mode/19 $ mode _main -_ZZ4mainvE4mode/19 : #02 #00 #00 #00 -_ZL13__str8a4fef85/20 $ __str8a4fef85 -_ZL13__str8a4fef85/20 : #2e #2f #73 #69 #6d #75 #6c #61 #74 #69 #6f #6e #5f #64 #61 #74 #61 #2f #63 #6f #6d #70 #6c #65 #78 #5f #63 #6f #72 #72 #75 #70 #74 #65 #64 #5f #73 #69 #67 #6e #61 #6c #2e #74 #78 #74 #00 -_ZL13__str00f02b8f/21 $ __str00f02b8f -_ZL13__str00f02b8f/21 : #72 #00 -_ZL13__strff0646f3/22 $ __strff0646f3 -_ZL13__strff0646f3/22 : #2e #2f #73 #69 #6d #75 #6c #61 #74 #69 #6f #6e #5f #64 #61 #74 #61 #2f #63 #6f #6d #70 #6c #65 #78 #5f #6e #6f #69 #73 #65 #5f #73 #69 #67 #6e #61 #6c #2e #74 #78 #74 #00 -_ZL13__str8a32ec0e/23 $ __str8a32ec0e -_ZL13__str8a32ec0e/23 : #2e #2f #73 #69 #6d #75 #6c #61 #74 #69 #6f #6e #5f #64 #61 #74 #61 #2f #6f #75 #74 #70 #75 #74 #2f #63 #6f #6d #70 #6c #65 #78 #5f #6f #75 #74 #70 #75 #74 #5f #73 #69 #6d #75 #6c #61 #74 #65 #64 #2e #74 #78 #74 #00 -_ZL13__str00f52cca/24 $ __str00f52cca -_ZL13__str00f52cca/24 : #77 #00 -_ZL13__str41232700/25 $ __str41232700 -_ZL13__str41232700/25 : #25 #64 #00 -_ZL13__str2eb09b76/26 $ __str2eb09b76 -_ZL13__str2eb09b76/26 : #25 #64 #0a #00 +_ZL13__strdb58f936/19 $ __strdb58f936 +_ZL13__strdb58f936/19 : #2e #2f #73 #69 #6d #75 #6c #61 #74 #69 #6f #6e #5f #64 #61 #74 #61 #2f #63 #6f #6d #70 #6c #65 #78 #5f #63 #5f #73 #65 #6e #73 #6f #72 #5f #73 #69 #67 #6e #61 #6c #5f #74 #2e #74 #78 #74 #00 +_ZL13__str00f02b8f/20 $ __str00f02b8f +_ZL13__str00f02b8f/20 : #72 #00 +_ZL13__strff0646f3/21 $ __strff0646f3 +_ZL13__strff0646f3/21 : #2e #2f #73 #69 #6d #75 #6c #61 #74 #69 #6f #6e #5f #64 #61 #74 #61 #2f #63 #6f #6d #70 #6c #65 #78 #5f #6e #6f #69 #73 #65 #5f #73 #69 #67 #6e #61 #6c #2e #74 #78 #74 #00 +_ZL13__str8a32ec0e/22 $ __str8a32ec0e +_ZL13__str8a32ec0e/22 : #2e #2f #73 #69 #6d #75 #6c #61 #74 #69 #6f #6e #5f #64 #61 #74 #61 #2f #6f #75 #74 #70 #75 #74 #2f #63 #6f #6d #70 #6c #65 #78 #5f #6f #75 #74 #70 #75 #74 #5f #73 #69 #6d #75 #6c #61 #74 #65 #64 #2e #74 #78 #74 #00 +_ZL13__str00f52cca/23 $ __str00f52cca +_ZL13__str00f52cca/23 : #77 #00 +_ZL13__str41232700/24 $ __str41232700 +_ZL13__str41232700/24 : #25 #64 #00 +_ZL13__str2eb09b76/25 $ __str2eb09b76 +_ZL13__str2eb09b76/25 : #25 #64 #0a #00 diff --git a/simulation/Release/chesswork/main.lib b/simulation/Release/chesswork/main.lib index 0e500e2..061d4b5 100644 --- a/simulation/Release/chesswork/main.lib +++ b/simulation/Release/chesswork/main.lib @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32 @@ -64,11 +64,11 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi : user_defined, called { vac : ( srIM[0] ); } -// void calc(SingleSignalPath *, SingleSignalPath *, OutputMode, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *) -F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ : user_defined, called { - fnm : "calc" 'void calc(SingleSignalPath *, SingleSignalPath *, OutputMode, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)'; - arg : ( dmaddr_:i dmaddr_:i dmaddr_:i int32_:i dmaddr_:i dmaddr_:i dmaddr_:i ); - loc : ( LR[0] A[0] A[1] RA[0] A[4] A[5] __spill_WDMA[0] ); +// void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *) +F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ : user_defined, called { + fnm : "calc" 'void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)'; + arg : ( dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i ); + loc : ( LR[0] A[0] A[1] A[4] A[5] __spill_WDMA[0] ); vac : ( srIM[0] ); } diff --git a/simulation/Release/chesswork/main.tof b/simulation/Release/chesswork/main.tof index 8e34ae2..d8c6fd4 100644 --- a/simulation/Release/chesswork/main.tof +++ b/simulation/Release/chesswork/main.tof @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32 diff --git a/simulation/Release/chesswork/signal_path-101f20.# b/simulation/Release/chesswork/signal_path-101f20.# index f0a5edc..c86b17c 100644 --- a/simulation/Release/chesswork/signal_path-101f20.# +++ b/simulation/Release/chesswork/signal_path-101f20.# @@ -1,8 +1,10 @@ 6bd14b3bc305504dd7bb9269fe30bf59aca75a76 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 42695db990e5aaff0b9f36d25938c80e96ce47cc -4d136b3bc1359e2f4d279472cff46f21cdcb5b6c +a40858c0f076a4ec624a8b1d7201496a733ce879 da39a3ee5e6b4b0d3255bfef95601890afd80709 -7735b3b2a4dcf96232e36dd19984284915d22b06 +b5c9fb263d6b7e717ed7db0752d7b88c6c485ee9 343 0 +0 +0 diff --git a/simulation/Release/chesswork/signal_path-101f20.o b/simulation/Release/chesswork/signal_path-101f20.o index fceeede48a3fcc679daf2c709c22c7672dfc2ddb..5dc4fa67f83d4f43d8e6b48e9f88d364a20ded06 100644 GIT binary patch delta 1544 zcma)+Uu+ar6vofJGk1D-yIrQUZCz~3&eGCtw3K2u+Q!7hCL3q&k4<8yy2>PAnwoLov&Ca>s z?>pz7nc2O2uWXun;$SF7=Cj`lcjNHTr1?t>nm?ryte)0zc8^W&n=nV^lePI>!%

#U2akR`%1;}%28)Pm*?s35RfqrcCdV51)o~MO>(iCh*O0X zJZ{-V&LNLpU&gvj)7Id{4#nuuGOnQ$%Q#MzWn4>NS$3+=;Zhue^&$^K?1=CzSS@kc zrJrGJT{2wi!lTwlxCHhhdsx2XBe+ zS#Vc`V>Lt@B0LCwEW)#39t*ev^t)=AJ$|v9QD!5dIdx|Qm78@pM0ta=TBv-e9!Pmg zIeVlO>LKS|p{f0QX6H3dcL&{Jhyc%8tdhMd z2*9tP1j!&+x;&NXLE;T5AI6=Q`tYKrI~`S9k8&HlZf;t~g{bQZ!yrVH&{Ms=p6WBl z{q^bZuq*!Nogq8%^YV}dh%xhv|6uuZsAJe~!?4wP3;P+q2YiOi+YCPfeg_<3_`||U zhJP)b2Y4R#!#^m)hsSjeHMKAgl5W8?zzN-Hm8<)(=c=aG15i7VPUvT>7wQ7kPI&El z)T%E1GSpspdChAlpo+0+C~o~G#oo7aiehtC9-!DsE2oL#Uqid9mg^fr(;76Fzk!p` zmuwB`pP=4D+SR{Wr75`p=?Gqxyj_*2@hWlN@UB`_he>>boS%jwe?7DRIHL5QMRfcZ z5%Gt7i!D|E4yGTtm4VQXyapYgt$Z0=an{*GY^X3cUMkYvQ_LECT$PHI(&`UH<*9U1 z{O|feiRa9LHP_5bnMcH^nai|^FU*BZPI^hRkm(S&Olz1^$5#>EZ_b4&vorL?MKcQT zVnB4kJeoCd)_e)D`br)HXoCaZ;q zv%ZYAm`}4Eva!Wn##G;GZf85hyJp?moR~A)sO|%S`8OzJfeLykxq1}$jN+g%Tuq2dtr^8lnoZ;wu}E7UiwrrS4YimNAL-2F z0&+T!{p4~Uk0Ez7v)n#R@&~N+FfW8?@NgHHk8s8$FJaV=7$%8gt3@8(47NOc3p~Zc zzrbZ4o`>#JJ=_Vd^zaMttYOX&+z{Ot4IAJV@L~`5fU7+G8$8{^3kwLD>)|f28b5G3 z==Vai^3;QU_OPQ2DpYD{I3&x012hw3<0-Fld1c7roHZK;<&%1st9808Mz0n6gW zNw!DjN|M}6TD-J6&dn0cY_Cekow(~Fz|)pe!5Z#3;N2)e(s4#Ei-!|P>@$qnxYI}< zwa6Lj$Ri1E7F%)E)UOIrmvCLjMHAQJi5iQ~l->5UvPU=ued=f!6Y%@0VXTB$E5F&b znM+U?ao|$0d5?x&3VH#zkvXd18K56JP);Yj_B-J_3HC3?DTU2nUG{=!5oW zvX7lNtaN$PwjJpFIdr{z7MV=1 z$nTMuF*sIEax3UpIp2-Z({d|fuRNKH_uUvj9>QMab~hvkU7KEzW1}&nW1QR`DUtP2 zn|F*O9oy; (__extPM.31 var=33) source () <55>; (__sp.32 var=34) source () <56>; - (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.33 var=35) source () <57>; - (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.34 var=36) source () <58>; - (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.35 var=37) source () <59>; - (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.36 var=38) source () <60>; + (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32.33 var=35) source () <57>; + (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32.34 var=36) source () <58>; + (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.35 var=37) source () <59>; + (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.36 var=38) source () <60>; (ptr_fir_lms_delay_line.37 var=39) source () <61>; (__extDM_BufferPtrDMB.38 var=40) source () <62>; (ptr_fir_lms_coeffs.39 var=41) source () <63>; (__extDM_BufferPtr.40 var=42) source () <64>; - (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.41 var=43) source () <65>; - (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.42 var=44) source () <66>; + (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator.41 var=43) source () <65>; + (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.42 var=44) source () <66>; (_ZL2mu.43 var=45) source () <67>; (__extDM_int32_.44 var=46) source () <68>; (__extDM_int16_.45 var=47) source () <69>; @@ -184,10 +184,10 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ { (ptr_fir_lms_coeffs_buffer_len.53 var=55) source () <77>; (ptr_fir_lms_coeffs_ptr_start.54 var=56) source () <78>; (__extDM_int64_.55 var=57) source () <79>; - (__ptr_cSensor_32.57 var=60) const () <81>; - (__ptr_accSensor_32.59 var=62) const () <83>; - (__ptr_c_block_pre.61 var=64) const () <85>; - (__ptr_acc_block_pre.63 var=66) const () <87>; + (__ptr_c_sensor_32.57 var=60) const () <81>; + (__ptr_acc_sensor_32.59 var=62) const () <83>; + (__ptr_c_sensor_pre.61 var=64) const () <85>; + (__ptr_acc_sensor_pre.63 var=66) const () <87>; (__ptr_ptr_fir_lms_delay_line.65 var=68) const () <89>; (__ct_0.75 var=77) const () <99>; (__la.77 var=78 stl=LR off=0) inp () <101>; @@ -195,21 +195,21 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ { (cSensorSignal.80 var=79 stl=A off=0) inp () <104>; (accSensorSignal.83 var=80 stl=A off=1) inp () <107>; (output_mode.86 var=81 stl=RA off=0) inp () <110>; - (cSensor.89 var=82 stl=A off=4) inp () <113>; - (cSensor.90 var=82) deassign (cSensor.89) <114>; - (accSensor.92 var=83 stl=A off=5) inp () <116>; - (accSensor.93 var=83) deassign (accSensor.92) <117>; - (out_16.95 var=84 stl=__spill_WDMA off=0) inp () <119>; - (out_16.96 var=84) deassign (out_16.95) <120>; + (c_sensor_input.89 var=82 stl=A off=4) inp () <113>; + (c_sensor_input.90 var=82) deassign (c_sensor_input.89) <114>; + (acc_sensor_input.92 var=83 stl=A off=5) inp () <116>; + (acc_sensor_input.93 var=83) deassign (acc_sensor_input.92) <117>; + (output.95 var=84 stl=__spill_WDMA off=0) inp () <119>; + (output.96 var=84) deassign (output.95) <120>; (__rd___sp.98 var=58) rd_res_reg (__R_SP.24 __sp.32) <122>; (__R_SP.102 var=26 __sp.103 var=34) wr_res_reg (__rt.2219 __sp.32) <126>; - (__fch___extDM_int16_.246 var=141 __extDM_int16_.247 var=47 __vola.248 var=29) load (__M_SDMB.6 cSensor.90 __extDM_int16_.45 __vola.27) <270>; + (__fch___extDM_int16_.246 var=141 __extDM_int16_.247 var=47 __vola.248 var=29) load (__M_SDMB.6 c_sensor_input.90 __extDM_int16_.45 __vola.27) <270>; (__ct_16.250 var=143) const () <272>; - (__M_WDMA.258 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.259 var=35) store (__tmp.2415 __ptr_cSensor_32.57 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.33) <280>; - (__fch___extDM_int16_.265 var=156 __extDM_int16_.266 var=47 __vola.267 var=29) load (__M_SDMB.6 accSensor.93 __extDM_int16_.247 __vola.248) <286>; - (__M_WDMA.277 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.278 var=36) store (__tmp.2420 __ptr_accSensor_32.59 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.34) <296>; - (__M_WDMA.563 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.564 var=37) store (__tmp.2415 __ptr_c_block_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.35) <494>; - (__M_WDMA.576 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.577 var=38) store (__tmp.2420 __ptr_acc_block_pre.63 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.36) <506>; + (__M_WDMA.258 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32.259 var=35) store (__tmp.2415 __ptr_c_sensor_32.57 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32.33) <280>; + (__fch___extDM_int16_.265 var=156 __extDM_int16_.266 var=47 __vola.267 var=29) load (__M_SDMB.6 acc_sensor_input.93 __extDM_int16_.247 __vola.248) <286>; + (__M_WDMA.277 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32.278 var=36) store (__tmp.2420 __ptr_acc_sensor_32.59 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32.34) <296>; + (__M_WDMA.563 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.564 var=37) store (__tmp.2415 __ptr_c_sensor_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.35) <494>; + (__M_WDMA.576 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.577 var=38) store (__tmp.2420 __ptr_acc_sensor_pre.63 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.36) <506>; (_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi.766 var=206) const () <608>; (__link.768 var=208) dmaddr__call_dmaddr_ (_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi.766) <610>; (__rt.2219 var=481) __Pvoid__pl___Pvoid_int18_ (__rd___sp.98 __ct_0S0.2408) <1905>; @@ -219,9 +219,9 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ { (__tmp.2420 var=160) int72__shift_int72__int72__uint2_ (__fch___extDM_int16_.265 __ct_16.250 __ct_2.2414) <2192>; call { (__ptr_ptr_fir_lms_delay_line.760 var=67 stl=A off=4) assign (__ptr_ptr_fir_lms_delay_line.65) <602>; - (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.765 var=205 stl=RA off=0) assign (__tmp.2420) <607>; + (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.765 var=205 stl=RA off=0) assign (__tmp.2420) <607>; (__link.769 var=208 stl=LR off=0) assign (__link.768) <611>; - (_ZL2mu.770 var=45 __extDM.771 var=32 __extDM_BufferPtr.772 var=42 __extDM_BufferPtrDMB.773 var=40 __extDM___PDMint32_.774 var=51 __extDM_int16_.775 var=47 __extDM_int32_.776 var=46 __extDM_int64_.777 var=57 __extDM_void.778 var=48 __extPM.779 var=33 __extPM_void.780 var=49 ptr_fir_lms_coeffs.781 var=41 ptr_fir_lms_coeffs_buffer_len.782 var=55 ptr_fir_lms_coeffs_ptr_current.783 var=53 ptr_fir_lms_coeffs_ptr_start.784 var=56 ptr_fir_lms_delay_line.785 var=39 ptr_fir_lms_delay_line_buffer_len.786 var=54 ptr_fir_lms_delay_line_ptr_current.787 var=50 ptr_fir_lms_delay_line_ptr_start.788 var=52 __vola.789 var=29) F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi (__link.769 __ptr_ptr_fir_lms_delay_line.760 __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.765 _ZL2mu.43 __extDM.30 __extDM_BufferPtr.40 __extDM_BufferPtrDMB.38 __extDM___PDMint32_.49 __extDM_int16_.266 __extDM_int32_.44 __extDM_int64_.55 __extDM_void.46 __extPM.31 __extPM_void.47 ptr_fir_lms_coeffs.39 ptr_fir_lms_coeffs_buffer_len.53 ptr_fir_lms_coeffs_ptr_current.51 ptr_fir_lms_coeffs_ptr_start.54 ptr_fir_lms_delay_line.37 ptr_fir_lms_delay_line_buffer_len.52 ptr_fir_lms_delay_line_ptr_current.48 ptr_fir_lms_delay_line_ptr_start.50 __vola.267) <612>; + (_ZL2mu.770 var=45 __extDM.771 var=32 __extDM_BufferPtr.772 var=42 __extDM_BufferPtrDMB.773 var=40 __extDM___PDMint32_.774 var=51 __extDM_int16_.775 var=47 __extDM_int32_.776 var=46 __extDM_int64_.777 var=57 __extDM_void.778 var=48 __extPM.779 var=33 __extPM_void.780 var=49 ptr_fir_lms_coeffs.781 var=41 ptr_fir_lms_coeffs_buffer_len.782 var=55 ptr_fir_lms_coeffs_ptr_current.783 var=53 ptr_fir_lms_coeffs_ptr_start.784 var=56 ptr_fir_lms_delay_line.785 var=39 ptr_fir_lms_delay_line_buffer_len.786 var=54 ptr_fir_lms_delay_line_ptr_current.787 var=50 ptr_fir_lms_delay_line_ptr_start.788 var=52 __vola.789 var=29) F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi (__link.769 __ptr_ptr_fir_lms_delay_line.760 __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.765 _ZL2mu.43 __extDM.30 __extDM_BufferPtr.40 __extDM_BufferPtrDMB.38 __extDM___PDMint32_.49 __extDM_int16_.266 __extDM_int32_.44 __extDM_int64_.55 __extDM_void.46 __extPM.31 __extPM_void.47 ptr_fir_lms_coeffs.39 ptr_fir_lms_coeffs_buffer_len.53 ptr_fir_lms_coeffs_ptr_current.51 ptr_fir_lms_coeffs_ptr_start.54 ptr_fir_lms_delay_line.37 ptr_fir_lms_delay_line_buffer_len.52 ptr_fir_lms_delay_line_ptr_current.48 ptr_fir_lms_delay_line_ptr_start.50 __vola.267) <612>; } #14 off=1 #616 off=2 (__ptr_ptr_fir_lms_coeffs.67 var=70) const () <91>; @@ -282,15 +282,15 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ { } #19 } #16 rng=[1,65535] #99 off=4 - (__ptr_acc_block_filt.69 var=72) const () <93>; - (__ptr_out_32.71 var=74) const () <95>; + (__ptr_filter_accumulator.69 var=72) const () <93>; + (__ptr_output_32.71 var=74) const () <95>; (__ptr_mu.73 var=76) const () <97>; (__inl_acc1_C.1130 var=111) accum_t__pl_accum_t_accum_t (__inl_acc1_A.1059 __inl_acc1_B.1061) <866>; (__tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131 var=92) __sint_rnd_saturate_accum_t (__inl_acc1_C.1130) <867>; - (__M_WDMB.1135 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.1136 var=43) store (__tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131 __ptr_acc_block_filt.69 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.41) <871>; - (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.1140 var=275) load (__M_WDMA.9 __ptr_c_block_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.564) <875>; - (__tmp.1145 var=280) __sint__mi___sint___sint (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.1140 __tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131) <880>; - (__M_WDMB.1149 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1150 var=44) store (__tmp.1145 __ptr_out_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.42) <884>; + (__M_WDMB.1135 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator.1136 var=43) store (__tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131 __ptr_filter_accumulator.69 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator.41) <871>; + (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.1140 var=275) load (__M_WDMA.9 __ptr_c_sensor_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.564) <875>; + (__tmp.1145 var=280) __sint__mi___sint___sint (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.1140 __tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131) <880>; + (__M_WDMB.1149 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1150 var=44) store (__tmp.1145 __ptr_output_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.42) <884>; (__fch_ptr_fir_lms_coeffs_ptr_start.1166 var=291) load (__M_WDMA.9 __rt.2395 ptr_fir_lms_coeffs_ptr_start.784) <900>; (__fch__ZL2mu.1214 var=328) load (__M_WDMA.9 __ptr_mu.73 _ZL2mu.770) <948>; (__inl_prod.1216 var=125) __sint_rnd_saturate_accum_t (__inl_acc_C.2046) <950>; @@ -341,10 +341,10 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ { } #24 } #21 rng=[1,65535] #36 off=6 nxt=-2 - (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1712 var=378) load (__M_WDMB.10 __ptr_out_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1150) <1355>; + (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1712 var=378) load (__M_WDMB.10 __ptr_output_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1150) <1355>; (__tmp.1717 var=383) __sint_rnd_saturate_accum_t (__tmp.2430) <1360>; (__tmp.1718 var=384) __sshort___sshort___sint (__tmp.1717) <1361>; - (__M_SDMB.1724 var=8 __extDM_int16_.1725 var=47 __vola.1726 var=29) store (__tmp.1718 out_16.96 __extDM_int16_.775 __vola.789) <1367>; + (__M_SDMB.1724 var=8 __extDM_int16_.1725 var=47 __vola.1726 var=29) store (__tmp.1718 output.96 __extDM_int16_.775 __vola.789) <1367>; (__rd___sp.1913 var=58) rd_res_reg (__R_SP.24 __sp.103) <1467>; (__R_SP.1917 var=26 __sp.1918 var=34) wr_res_reg (__rt.2241 __sp.103) <1471>; () void_ret_dmaddr_ (__la.78) <1472>; @@ -352,16 +352,16 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ { () sink (__extDM.771) <1476>; () sink (__extPM.779) <1477>; () sink (__sp.1918) <1478>; - () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.259) <1479>; - () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.278) <1480>; - () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.564) <1481>; - () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.577) <1482>; + () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32.259) <1479>; + () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32.278) <1480>; + () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.564) <1481>; + () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.577) <1482>; () sink (ptr_fir_lms_delay_line.785) <1483>; () sink (__extDM_BufferPtrDMB.773) <1484>; () sink (ptr_fir_lms_coeffs.781) <1485>; () sink (__extDM_BufferPtr.772) <1486>; - () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.1136) <1487>; - () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1150) <1488>; + () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator.1136) <1487>; + () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1150) <1488>; () sink (_ZL2mu.1382) <1489>; () sink (__extDM_int32_.1384) <1490>; () sink (__extDM_int16_.1725) <1491>; @@ -378,69 +378,69 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ { () sink (__ct_0.75) <1502>; (__rt.2241 var=481) __Pvoid__pl___Pvoid_int18_ (__rd___sp.1913 __ct_0s0.2409) <1933>; (__ct_0s0.2409 var=510) const () <2174>; - (__tmp.2430 var=382) int72__shift_int72__int72__uint2_ (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1712 __ct_16.250 __ct_1.2429) <2208>; + (__tmp.2430 var=382) int72__shift_int72__int72__uint2_ (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1712 __ct_16.250 __ct_1.2429) <2208>; } #0 0 : 'signal_processing\\signal_path.c'; ---------- 0 : (0,343:0,0); 14 : (0,381:4,26); -16 : (0,384:23,43); +16 : (0,384:27,43); 21 : (0,388:4,85); 36 : (0,396:0,113); 99 : (0,388:4,83); -404 : (0,384:23,56); +404 : (0,384:27,56); 474 : (0,388:4,0); 594 : (0,381:4,26); -616 : (0,384:23,43); +616 : (0,384:27,43); ---------- -85 : (0,386:16,0); +85 : (0,386:19,0); 87 : (0,381:67,0); -89 : (0,384:23,0); -91 : (0,384:23,0); +89 : (0,384:27,0); +91 : (0,384:27,0); 93 : (0,384:4,0); 95 : (0,386:4,0); 122 : (0,343:5,0); 126 : (0,343:5,0); -266 : (0,368:39,0); -270 : (0,368:39,11); -272 : (0,368:47,0); -280 : (0,368:18,11); -286 : (0,369:42,12); -296 : (0,369:20,12); -494 : (0,374:20,19); -506 : (0,375:22,20); +266 : (0,368:47,0); +270 : (0,368:47,11); +272 : (0,368:55,0); +280 : (0,368:19,11); +286 : (0,369:50,12); +296 : (0,369:21,12); +494 : (0,374:21,19); +506 : (0,375:23,20); 602 : (0,381:42,0); -603 : (0,381:81,0); -607 : (0,381:80,0); +603 : (0,381:82,0); +607 : (0,381:81,0); 610 : (0,381:4,26); 611 : (0,381:4,0); 612 : (0,381:4,26); -622 : (0,384:23,33); -627 : (0,384:23,34); -632 : (0,384:23,35); -637 : (0,384:23,36); -642 : (0,384:23,37); -706 : (0,384:23,43); -708 : (0,384:23,43); -711 : (0,384:23,43); -712 : (0,384:23,43); -747 : (0,384:23,43); -748 : (0,384:23,44); -758 : (0,384:23,49); -759 : (0,384:23,50); -770 : (0,384:23,55); -772 : (0,384:23,56); -777 : (0,384:23,59); -825 : (0,384:23,59); -827 : (0,384:23,59); -830 : (0,384:23,59); -831 : (0,384:23,59); -866 : (0,384:23,60); -867 : (0,384:23,61); -871 : (0,384:18,64); -875 : (0,386:27,65); -880 : (0,386:31,65); -884 : (0,386:10,65); +622 : (0,384:27,33); +627 : (0,384:27,34); +632 : (0,384:27,35); +637 : (0,384:27,36); +642 : (0,384:27,37); +706 : (0,384:27,43); +708 : (0,384:27,43); +711 : (0,384:27,43); +712 : (0,384:27,43); +747 : (0,384:27,43); +748 : (0,384:27,44); +758 : (0,384:27,49); +759 : (0,384:27,50); +770 : (0,384:27,55); +772 : (0,384:27,56); +777 : (0,384:27,59); +825 : (0,384:27,59); +827 : (0,384:27,59); +830 : (0,384:27,59); +831 : (0,384:27,59); +866 : (0,384:27,60); +867 : (0,384:27,61); +871 : (0,384:22,64); +875 : (0,386:31,65); +880 : (0,386:35,65); +884 : (0,386:13,65); 900 : (0,388:4,73); 948 : (0,388:4,82); 950 : (0,388:4,83); @@ -471,45 +471,45 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ { 1148 : (0,388:4,96); 1149 : (0,388:4,96); 1150 : (0,388:4,96); -1355 : (0,393:48,103); +1355 : (0,393:51,103); 1360 : (0,393:20,103); 1361 : (0,393:18,103); 1367 : (0,393:14,103); 1467 : (0,396:0,0); 1471 : (0,396:0,113); 1472 : (0,396:0,113); -1624 : (0,384:23,48); -1635 : (0,384:23,54); -1643 : (0,384:23,55); -1651 : (0,384:23,56); +1624 : (0,384:27,48); +1635 : (0,384:27,54); +1643 : (0,384:27,55); +1651 : (0,384:27,56); 1662 : (0,388:4,80); 1670 : (0,388:4,82); 1678 : (0,388:4,88); 1686 : (0,388:4,89); 1697 : (0,388:4,90); 1708 : (0,388:4,91); -1738 : (0,384:23,0); +1738 : (0,384:27,0); 1740 : (0,388:4,0); -1861 : (0,384:23,0); +1861 : (0,384:27,0); 1905 : (0,343:5,0); 1933 : (0,396:0,0); -1961 : (0,384:23,0); -1989 : (0,384:23,0); +1961 : (0,384:27,0); +1989 : (0,384:27,0); 2017 : (0,388:4,0); -2045 : (0,384:23,0); -2073 : (0,384:23,0); -2101 : (0,384:23,0); +2045 : (0,384:27,0); +2073 : (0,384:27,0); +2101 : (0,384:27,0); 2129 : (0,388:4,0); 2172 : (0,343:5,0); 2174 : (0,396:0,0); -2176 : (0,384:23,0); +2176 : (0,384:27,0); 2178 : (0,388:4,0); -2183 : (0,368:44,0); -2184 : (0,368:44,11); -2192 : (0,369:47,12); -2200 : (0,384:23,48); -2207 : (0,393:53,0); -2208 : (0,393:53,103); -2309 : (0,384:23,59); +2183 : (0,368:52,0); +2184 : (0,368:52,11); +2192 : (0,369:55,12); +2200 : (0,384:27,48); +2207 : (0,393:56,0); +2208 : (0,393:56,103); +2309 : (0,384:27,59); 2312 : (0,388:4,96); diff --git a/simulation/Release/chesswork/signal_path-154f66.# b/simulation/Release/chesswork/signal_path-154f66.# index fb67ad7..82ff704 100644 --- a/simulation/Release/chesswork/signal_path-154f66.# +++ b/simulation/Release/chesswork/signal_path-154f66.# @@ -8,3 +8,8 @@ cef764f6402a6eeb549cc520677fd8828baab91e 0 0 0 +0 +0 +0 +0 +0 diff --git a/simulation/Release/chesswork/signal_path-154f66.sfg b/simulation/Release/chesswork/signal_path-154f66.sfg index 6cbe03e..078a3d1 100644 --- a/simulation/Release/chesswork/signal_path-154f66.sfg +++ b/simulation/Release/chesswork/signal_path-154f66.sfg @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 14:00:48 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 diff --git a/simulation/Release/chesswork/signal_path-352f49.# b/simulation/Release/chesswork/signal_path-352f49.# index 5da6bf0..9b8ff3d 100644 --- a/simulation/Release/chesswork/signal_path-352f49.# +++ b/simulation/Release/chesswork/signal_path-352f49.# @@ -8,3 +8,9 @@ b6139837f6ca35c36b0c65fc4fb39c9f43e36de9 0 0 0 +0 +0 +0 +0 +0 +2 diff --git a/simulation/Release/chesswork/signal_path-352f49.sfg b/simulation/Release/chesswork/signal_path-352f49.sfg index fc83432..871e9f2 100644 --- a/simulation/Release/chesswork/signal_path-352f49.sfg +++ b/simulation/Release/chesswork/signal_path-352f49.sfg @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 15:57:59 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 @@ -87,29 +87,29 @@ F_Z36sig_cirular_buffer_ptr_increment_DMBP12BufferPtrDMBi { } #5 off=0 nxt=-2 0 : 'signal_processing\\signal_path.c'; ---------- -5 : (0,109:0,2); +5 : (0,111:0,2); ---------- -75 : (0,107:5,0); -79 : (0,107:5,0); -84 : (0,108:43,1); -91 : (0,108:72,1); -95 : (0,108:91,1); -103 : (0,108:10,1); -104 : (0,109:0,0); -108 : (0,109:0,2); -109 : (0,109:0,2); -155 : (0,108:26,1); -175 : (0,108:58,0); -201 : (0,107:5,0); -229 : (0,108:43,1); -257 : (0,109:0,0); -285 : (0,108:72,0); -341 : (0,108:43,0); -367 : (0,107:5,0); -369 : (0,108:43,0); -375 : (0,109:0,0); -379 : (0,108:72,0); -384 : (0,108:58,0); -385 : (0,108:58,1); -393 : (0,108:91,1); +75 : (0,109:5,0); +79 : (0,109:5,0); +84 : (0,110:43,1); +91 : (0,110:72,1); +95 : (0,110:91,1); +103 : (0,110:10,1); +104 : (0,111:0,0); +108 : (0,111:0,2); +109 : (0,111:0,2); +155 : (0,110:26,1); +175 : (0,110:58,0); +201 : (0,109:5,0); +229 : (0,110:43,1); +257 : (0,111:0,0); +285 : (0,110:72,0); +341 : (0,110:43,0); +367 : (0,109:5,0); +369 : (0,110:43,0); +375 : (0,111:0,0); +379 : (0,110:72,0); +384 : (0,110:58,0); +385 : (0,110:58,1); +393 : (0,110:91,1); diff --git a/simulation/Release/chesswork/signal_path-4df6b6.# b/simulation/Release/chesswork/signal_path-4df6b6.# new file mode 100644 index 0000000..5e421b3 --- /dev/null +++ b/simulation/Release/chesswork/signal_path-4df6b6.# @@ -0,0 +1,9 @@ +6bd14b3bc305504dd7bb9269fe30bf59aca75a76 +842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 +42695db990e5aaff0b9f36d25938c80e96ce47cc +f120f5de328ad64582ff8b5317653c8c0e1bc5a4 +da39a3ee5e6b4b0d3255bfef95601890afd80709 +d14eceba62157a1c418a76571f06326e1f2b1b57 +120 +0 +0 diff --git a/simulation/Release/chesswork/signal_path-4df6b6.o b/simulation/Release/chesswork/signal_path-4df6b6.o new file mode 100644 index 0000000000000000000000000000000000000000..7a714f2032a05ea402d87d5274e47a6784a6e5f4 GIT binary patch literal 3888 zcmds3O>7%Q6rQ!ceomd5Gzo1kCz(2#`2%gA=E60Eq(^Bsg*4fPe!BP6(u4I3q3`K&ZSoJCm$8p%OhZ(#*W~y>H%o zGdn+f`}mm?ilQ)CNZQaC`zq>MbQVWpKif&xq`hK0ZO1I3B>T=P*B$GY!;%%Nw6<*2 zYYj`vwMMlmWwTUjTQ{UuZBid$T*|Mbx<4Cc!R%#$`-GsW+X_4Nx>SkAL z58x)?0eD=GE`oaynSoPwRxNjWR?b*N~&a;RZG(+^>S%kubS!XWLlpvOL}oWbbDJUb)jiTM%FTxD804UP!K7u2 z`AQQ`%0C5Z+9D&vuv@iyeald;Wy?^mY0FTqX(N}Zz`EGKmG6J!x~rArU9YM0)_WCkvO8+$|8WxVfD z_r@PYVi+-LFN%c65bI}{mHJIzfXze#!;wHDvbczF1U2nm&+AE)L)Y&q-z$+>6J-h& zViVXZ3i~Uz9Xk|wQRICR0I`F&)oAb!riA;$>d=5Xj~yF8=(RvV zQRj!%Q1Es@QPhiv!f|ydp5)eThy|2@f-#%uf>sk-t7(0R@3x9%INDY66T@aYELkY(A#O9&{(S5PLT^KHj zKqGdncZbri+&LA!durDh!oesbfQGVQY-u2Xn5uIz9X--}tT&+$6dpw=8a*oBLmoN6 z-jiE_5|CJiE25zckvHwf6qc9J*C;%|62c`?luRVkn`1ByN8vP_fg#ufyWt7g3A<0}Ja1fGk2(mB%hhY*@kcM&4;Q+h@MR*ymg9+EbfV1!l6yQ8u zfvfN$CHscGdbuE6T0szLWD)#S6C8wu`M5eDv!@ zO*770t)^Ynvc^IoZxm{)Yjys};y@{~`NiXfLLy%1G@32DW5<^o( zQp?5@8}i6u-7@v6R!Wse(ittQrJ46>e)#iZo2#w5g-==A!3K{Cb@?03T4nvk|3A*{ z5Pmy;`WcWt( zLxnPJvMGWDpWn@bf0}UQ&=qlwWWg~=Mx3sRA(GvTmEW=AS|W6vA0k=!~> zQWLZ0qjYSC2oyz%biH|bXVLJ!7ZCgb?8OW?@+;;?QzT5xl22t1>g1cAGb*3sXBcxu z-bx?CsL342a36VZaYlD@5LGX486Df*6s}GBct0VJZwVjwq>q;Y#?JXTq@MTj?jr9# z8GMDdnm517zkH`v{Mey$dc@$6XC&Eep6RYXry@R|_GI|R6!@m?(@$f!H9vww* GA^jif; + (__R_SP.24 var=26) st_def () <48>; + (__sp.32 var=34) source () <56>; + (__extDM_BufferPtr_ptr_current.34 var=36) source () <58>; + (__extDM_BufferPtr_ptr_start.36 var=38) source () <60>; + (__extDM_BufferPtr_buffer_len.37 var=39) source () <61>; + (__extDM_int32_.38 var=40) source () <62>; + (__ct_0.40 var=42) const () <64>; + (__la.42 var=43 stl=LR off=0) inp () <66>; + (__la.43 var=43) deassign (__la.42) <67>; + (buffer.45 var=44 stl=A off=0) inp () <69>; + (buffer.46 var=44) deassign (buffer.45) <70>; + (sample.48 var=45 stl=RA off=0) inp () <72>; + (sample.49 var=45) deassign (sample.48) <73>; + (__rd___sp.51 var=41) rd_res_reg (__R_SP.24 __sp.32) <75>; + (__R_SP.55 var=26 __sp.56 var=34) wr_res_reg (__rt.140 __sp.32) <79>; + (__fch___extDM_BufferPtr_ptr_current.60 var=52) load (__M_WDMA.9 __rt.162 __extDM_BufferPtr_ptr_current.34) <84>; + (__M_WDMA.61 var=11 __extDM_BufferPtr_buffer_len.62 var=39 __extDM_int32_.63 var=40) store (sample.49 __fch___extDM_BufferPtr_ptr_current.60 __extDM_BufferPtr_buffer_len.37 __extDM_int32_.38) <85>; + (__fch___extDM_BufferPtr_ptr_start.73 var=62) load (__M_WDMA.9 __rt.206 __extDM_BufferPtr_ptr_start.36) <95>; + (__fch___extDM_BufferPtr_buffer_len.77 var=66) load (__M_WDMA.9 __rt.228 __extDM_BufferPtr_buffer_len.62) <99>; + (__M_WDMA.85 var=11 __extDM_BufferPtr_ptr_current.86 var=36) store (__tmp.116 __rt.250 __extDM_BufferPtr_ptr_current.34) <107>; + (__rd___sp.87 var=41) rd_res_reg (__R_SP.24 __sp.56) <108>; + (__R_SP.91 var=26 __sp.92 var=34) wr_res_reg (__rt.184 __sp.56) <112>; + () void_ret_dmaddr_ (__la.43) <113>; + () sink (__sp.92) <119>; + () sink (__extDM_BufferPtr_ptr_current.86) <121>; + () sink (__extDM_BufferPtr_buffer_len.62) <124>; + () sink (__extDM_int32_.63) <125>; + () sink (__ct_0.40) <126>; + (__tmp.116 var=70) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch___extDM_BufferPtr_ptr_current.60 __ct_4.120 __fch___extDM_BufferPtr_ptr_start.73 __tmp.272) <159>; + (__ct_4.120 var=89) const () <173>; + (__ct_2.126 var=94) const () <181>; + (__rt.140 var=97) __Pvoid__pl___Pvoid_int18_ (__rd___sp.51 __ct_0S0.263) <208>; + (__rt.162 var=97) __Pvoid__pl___Pvoid_int18_ (buffer.46 __ct_8.264) <236>; + (__rt.184 var=97) __Pvoid__pl___Pvoid_int18_ (__rd___sp.87 __ct_0s0.267) <264>; + (__rt.206 var=97) __Pvoid__mi___Pvoid_int18_ (__rt.162 __ct_4.120) <292>; + (__rt.228 var=97) __Pvoid__mi___Pvoid_int18_ (__rt.206 __ct_4.120) <320>; + (__rt.250 var=97) __Pvoid__pl___Pvoid_int18_ (__rt.228 __ct_8.264) <348>; + (__ct_0S0.263 var=122) const () <375>; + (__ct_8.264 var=123) const () <377>; + (__ct_0s0.267 var=126) const () <383>; + (__ct_2.271 var=131) const () <390>; + (__tmp.272 var=135) int72__shift_int72__int72__uint2_ (__fch___extDM_BufferPtr_buffer_len.77 __ct_2.126 __ct_2.271) <391>; +} #5 off=0 nxt=-2 +0 : 'signal_processing\\signal_path.c'; +---------- +5 : (0,120:0,3); +---------- +75 : (0,117:5,0); +79 : (0,117:5,0); +84 : (0,118:11,1); +85 : (0,118:4,1); +95 : (0,119:67,2); +99 : (0,119:86,2); +107 : (0,119:10,2); +108 : (0,120:0,0); +112 : (0,120:0,3); +113 : (0,120:0,3); +159 : (0,119:26,2); +173 : (0,119:26,0); +181 : (0,119:86,0); +208 : (0,117:5,0); +236 : (0,118:11,1); +264 : (0,120:0,0); +292 : (0,119:67,0); +348 : (0,118:11,0); +375 : (0,117:5,0); +377 : (0,118:11,0); +383 : (0,120:0,0); +390 : (0,119:86,0); +391 : (0,119:86,2); + diff --git a/simulation/Release/chesswork/signal_path-530a42.# b/simulation/Release/chesswork/signal_path-530a42.# index 66f51d6..7f856fa 100644 --- a/simulation/Release/chesswork/signal_path-530a42.# +++ b/simulation/Release/chesswork/signal_path-530a42.# @@ -8,3 +8,11 @@ da39a3ee5e6b4b0d3255bfef95601890afd80709 0 0 0 +0 +0 +0 +0 +0 +2 +7 +7 diff --git a/simulation/Release/chesswork/signal_path-530a42.sfg b/simulation/Release/chesswork/signal_path-530a42.sfg index 6822f71..1c0d575 100644 --- a/simulation/Release/chesswork/signal_path-530a42.sfg +++ b/simulation/Release/chesswork/signal_path-530a42.sfg @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 @@ -103,35 +103,35 @@ F_Z15sig_calc_weightP16SingleSignalPathi { } #0 0 : 'signal_processing\\signal_path.c'; ---------- -0 : (0,204:0,0); -4 : (0,205:4,1); -6 : (0,205:37,2); -10 : (0,210:4,11); -144 : (0,210:11,7); -194 : (0,205:31,1); +0 : (0,211:0,0); +4 : (0,212:4,1); +6 : (0,212:37,2); +10 : (0,217:4,11); +144 : (0,217:11,7); +194 : (0,212:31,1); ---------- -74 : (0,204:4,0); -78 : (0,204:4,0); -84 : (0,205:14,1); -85 : (0,205:34,0); -103 : (0,205:4,1); -108 : (0,208:38,6); -110 : (0,210:11,7); -111 : (0,205:4,10); -113 : (0,210:4,0); -117 : (0,210:4,11); -118 : (0,210:4,11); -119 : (0,210:4,0); -161 : (0,208:18,6); -200 : (0,204:4,0); -228 : (0,205:14,1); -256 : (0,208:38,6); -284 : (0,210:4,0); -309 : (0,204:4,0); -311 : (0,205:14,0); -317 : (0,208:38,0); -323 : (0,210:4,0); -328 : (0,205:31,1); -329 : (0,205:31,1); -364 : (0,205:4,1); +74 : (0,211:4,0); +78 : (0,211:4,0); +84 : (0,212:14,1); +85 : (0,212:34,0); +103 : (0,212:4,1); +108 : (0,215:38,6); +110 : (0,217:11,7); +111 : (0,212:4,10); +113 : (0,217:4,0); +117 : (0,217:4,11); +118 : (0,217:4,11); +119 : (0,217:4,0); +161 : (0,215:18,6); +200 : (0,211:4,0); +228 : (0,212:14,1); +256 : (0,215:38,6); +284 : (0,217:4,0); +309 : (0,211:4,0); +311 : (0,212:14,0); +317 : (0,215:38,0); +323 : (0,217:4,0); +328 : (0,212:31,1); +329 : (0,212:31,1); +364 : (0,212:4,1); diff --git a/simulation/Release/chesswork/signal_path-59265a.# b/simulation/Release/chesswork/signal_path-59265a.# new file mode 100644 index 0000000..f06fdee --- /dev/null +++ b/simulation/Release/chesswork/signal_path-59265a.# @@ -0,0 +1,10 @@ +6bd14b3bc305504dd7bb9269fe30bf59aca75a76 +842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 +42695db990e5aaff0b9f36d25938c80e96ce47cc +7b022b02776bb92fed762bace59f48566912702b +da39a3ee5e6b4b0d3255bfef95601890afd80709 +b9e9afcc2aae2fa7eb9404b36c097ce78ba46a5d +73 +0 +1 +1 diff --git a/simulation/Release/chesswork/signal_path-59265a.o b/simulation/Release/chesswork/signal_path-59265a.o new file mode 100644 index 0000000000000000000000000000000000000000..4fab0303925c1ab29f852b7b759f9cead6656e21 GIT binary patch literal 5412 zcmeHKUu+{s8J~@J{W)>sUXr`Z(JRHhT;W=B!FFutPn)|W_otV;OPgMLckMOpvbNWW zCC9ex%{93KRVye(wAD$p5-&(p2mzv0LWmb6q(1Nh5)u+T@PGuo^1>gf2*E@7eX}#p z*v`W#yfV`6{J!7(_M4e+XXl%J<-*mAmSqWD80}d?yg3}UWJMC-lo;dI$<}5oXa-&Z zNY}et(hmHcKunhW!uEz+t<-#tE46Z6W3NzX`nR=Jtrs;cH@&U)6HTwS;kR@X`q8kl zU8q6VZh{@`HrQ_ZRj;FOg9ry;5VBvxR-GG+9zjqHw)}8<&7dWx>DQ~WE^hj*7WeMe zYW2ViD)k!kqE*?bc~!UJ1)Gya;oeG5S8A1@;#Dhme7CS&F8j^Z*`=@!nyZyc#dZB! zNw{w5C9hcyL#GWDFKzO`HI}o|MmPg)snKh*TCKE#l$*&F%Bf;*x|k`HGO205Fg07q zq|2qLLaAIXPUVWJbS|5nnsqy7;HKI=NGI6kxY^figq6*0bW5})l$l~S-d zcYb9)-9;?+FiSnm@>5;ZRXCdIa0F(tn_69&&zqug5K|^Gw+26%Zf3EUTI!`Rrp_mC z!dJG#7nsFfYN?lkug)i3w^*;W0+$_h228i?Ghf|=Np(*_H|;Yb*KIW_)#|=og)RGb z6*leLRoJxGm0$4YQyiF*1SP-f?YgaMJrD*A)7#$NOn$cb`^Wd8iF05?N^CK!q_*T7 zak0ZDab4N$Cn93P>#(Du)?xRHFLc-g;_J%R{rwiU+5ZD@9QtOVElM!@fwca8*h7Z> z5p2h>=lg^hFznZ1M-BVeuoH%T1dcfd+W!k75P5JT=wC$cCY`&7g;=(e`PjmrV+&q1 ziMAuSP-3w=5$pSQa@czN4d=sXWS@neZ8+rjiM#bY@XOpm-;ZTC0RP}-^d{{QslyFZ7VqPd@nAN>VT|LlIlc^p z&5=CB$aw?~{sM4{jTDTJ03Ksw5e7SYl8sBsD8Pu`gu%V4f!u~AXdR^O#EPf}`?qla zJ=6U=Kz{_V`(INiCg^QI+ZlKlRm5W5z_%p)3B&KUS^5z}64tO4NgPis#Yf{0Ck~Ba z>XRU9iL-;l)`<1$<@lE`k3BlJJPL6f+7XURT!g@JL?p31+J~p2SqU@o#|O_2PFPIQ zNl@|l8AK&E3ZHR+{vj!w0UWqbHct()Z&`TCed6wlGEFYm%~@i#mwLLJg10mKa96rH z<&6hmiME$t!2B4+#zL{ITr4-ZB50n@&=tB$_tSAYMxUUgG)9N%2%VsDO4390AbpA+ zpihz@i~1-+HaQd}qLcJ6eVRT)kJ4vpjvk}4v_OlrM2BdYMrf4I(RsQ+7wHMQM9XxU zR_GL^Xo61DBz=zZG)*%!OKHl`6lLiVdWP2N1^PUB^gOxrB)v#$bd8>)Tl6%o(o=Mu zZqQA7_AsK!t5z3|bu1TK!BqCXu=Yo{u0O-@40~>F{d&u9w$>Y)IG9)0Qz`eF->A3N zQ+fCN+N!%&+1jqk127)cP@KDTVQp<9xwc!YH(I-`-Q|lS}1O8PRiWzPI!r9Z+fk=*7Yt4& z%>XxSHGya!%Jsu6XavpBiA2TiX48jMJ>j~mx9b%?yYFA?IQ~Df^0x;+a_Y7G&ynTy zft?G5ckl;M-^-tte1Nxty+?WbRd18G#=SMbd!}mOU0A${2m|xONrhT=TlZoNB(IZ~^sq7_0GoPw|{>?q{qLK4&+TB^kB#GI6T$%iTr! zImQ~r_rwQ#K97^fr29R~crfI7e44+;7$+Lm^H?=sW~_Lb8R3)59ljy&vi?=ZDsEp< znEBr@R`2e2jKifMr}rA>%X7le#Rn{AgMEL1s~rG-N!-9MmutRa2Ie4Wo;_(tta%p? zX)Wu%t!%)1D(p+W6sgbReu7C=G~_{>x*KTtArH8#a3E9wWQ#>YEI`Yg3X)uu$6>Q? zxe`z>VG?`{)J6Mv2n6eN*@5mYZ5Z`wU{mKH7%`JjT0U}{^bi92Rl|>l{Pmc+cc6Pm zHySmsC{uR|f%=otuA$qdi(z%{SGGW!ac135buf$vc7V-(e~wiuzW_tS@Qp6rzo1*{ z(y;kWT)f6~nZruwA@W%CYi9cgxJ=ze=>Dd3`dzZ_XI;8H7Ws!t$Lo~~>wbmH^!HEb z_-p5Wc|CJs-5+q7x`f)PSjXQ47uNk1*NyB*gKaLX; + (__sp.32 var=34) source () <56>; + (__extDM_int32_.34 var=36) source () <58>; + (__extDM_BufferPtr_buffer_len.35 var=37) source () <59>; + (__extDM_BufferPtr_ptr_start.36 var=38) source () <60>; + (__extDM_BufferPtr_ptr_current.38 var=40) source () <62>; + (__ct_0.40 var=42) const () <64>; + (__la.42 var=43 stl=LR off=0) inp () <66>; + (__la.43 var=43) deassign (__la.42) <67>; + (buffer.46 var=45 stl=A off=0) inp () <70>; + (buffer.47 var=45) deassign (buffer.46) <71>; + (buffer_start_add.49 var=46 stl=A off=1) inp () <73>; + (buffer_start_add.50 var=46) deassign (buffer_start_add.49) <74>; + (length.52 var=47 stl=RA off=1) inp () <76>; + (length.53 var=47) deassign (length.52) <77>; + (max_buffer_len.55 var=48 stl=RB off=0) inp () <79>; + (max_buffer_len.56 var=48) deassign (max_buffer_len.55) <80>; + (__rd___sp.58 var=41) rd_res_reg (__R_SP.24 __sp.32) <82>; + (__R_SP.62 var=26 __sp.63 var=34) wr_res_reg (__rt.274 __sp.32) <86>; + (__ct_0.66 var=54) const () <90>; + (__M_WDMA.69 var=11 __extDM_BufferPtr_buffer_len.70 var=37) store (length.53 buffer.47 __extDM_BufferPtr_buffer_len.35) <93>; + (__M_WDMA.74 var=11 __extDM_BufferPtr_ptr_start.75 var=38) store (buffer_start_add.50 __rt.340 __extDM_BufferPtr_ptr_start.36) <97>; + (__M_WDMA.79 var=11 __extDM_BufferPtr_ptr_current.80 var=40) store (buffer_start_add.50 __rt.362 __extDM_BufferPtr_ptr_current.38) <101>; + (__rt.274 var=103) __Pvoid__pl___Pvoid_int18_ (__rd___sp.58 __ct_0S0.375) <320>; + (__rt.340 var=103) __Pvoid__pl___Pvoid_int18_ (buffer.47 __ct_4.377) <404>; + (__rt.362 var=103) __Pvoid__pl___Pvoid_int18_ (__rt.340 __ct_4.377) <432>; + (__ct_0S0.375 var=127) const () <457>; + (__ct_4.377 var=129) const () <461>; + (__tmp.380 var=133) uint3__cmp_int72__int72_ (length.53 __ct_0.66) <466>; + (__tmp.393 var=65) bool_nplus_uint3_ (__tmp.380) <500>; + (__trgt.396 var=149) const () <511>; + () void_jump_bool_int10_ (__tmp.393 __trgt.396) <512>; + (__either.397 var=148) undefined () <513>; + if { + { + () if_expr (__either.397) <126>; + () chess_frequent_else () <127>; + () chess_rear_then () <514>; + } #5 + { + (__trgt.398 var=150) const () <515>; + () void_jump_int10_ (__trgt.398) <516>; + } #11 off=4 + { + #30 off=1 + (__cv.254 var=95) uint16__uint16____sint (length.53) <288>; + (__trgt.402 var=153) const () <522>; + () void_doloop_uint16__uint16_ (__cv.254 __trgt.402) <523>; + (__vcnt.403 var=154) undefined () <524>; + for { + { + (__extDM_int32_.112 var=36) entry (__extDM_int32_.152 __extDM_int32_.34) <135>; + (__extDM_BufferPtr_buffer_len.113 var=37) entry (__extDM_BufferPtr_buffer_len.154 __extDM_BufferPtr_buffer_len.70) <136>; + (__iv1_i.245 var=92) entry (__iv1_i.246 buffer_start_add.50) <279>; + } #8 + { + (__M_WDMA.131 var=11 __extDM_BufferPtr_buffer_len.132 var=37 __extDM_int32_.133 var=36) store (__ct_0.66 __iv1_i.245 __extDM_BufferPtr_buffer_len.113 __extDM_int32_.112) <154>; + (__rt.318 var=103) __Pvoid__pl___Pvoid_int18_ (__iv1_i.245 __ct_4.377) <376>; + } #173 off=2 + { + () for_count (__vcnt.403) <159>; + (__extDM_int32_.152 var=36 __extDM_int32_.153 var=36) exit (__extDM_int32_.133) <167>; + (__extDM_BufferPtr_buffer_len.154 var=37 __extDM_BufferPtr_buffer_len.155 var=37) exit (__extDM_BufferPtr_buffer_len.132) <168>; + (__iv1_i.246 var=92 __iv1_i.247 var=92) exit (__rt.318) <280>; + } #10 + } #7 rng=[1,65535] + } #6 + { + (__extDM_int32_.178 var=36) merge (__extDM_int32_.34 __extDM_int32_.153) <180>; + (__extDM_BufferPtr_buffer_len.179 var=37) merge (__extDM_BufferPtr_buffer_len.70 __extDM_BufferPtr_buffer_len.155) <181>; + } #12 + } #4 + #242 off=5 + (__tmp.385 var=138) uint3__cmp_int72__int72_ (length.53 max_buffer_len.56) <474>; + (__tmp.386 var=76) bool_neg_uint3_ (__tmp.385) <475>; + (__trgt.399 var=151) const () <517>; + () void_jump_bool_int10_ (__tmp.386 __trgt.399) <518>; + (__either.400 var=148) undefined () <519>; + if { + { + () if_expr (__either.400) <205>; + } #15 + { + } #16 off=7 + { + (__ct_1.134 var=72) const () <155>; + (__trgt.401 var=152) const () <520>; + () void_jump_int10_ (__trgt.401) <521>; + } #17 off=6 + { + (__rt.207 var=44) merge (__ct_0.66 __ct_1.134) <210>; + } #18 + } #14 + #20 off=8 nxt=-2 + (__rd___sp.208 var=41) rd_res_reg (__R_SP.24 __sp.63) <211>; + (__R_SP.212 var=26 __sp.213 var=34) wr_res_reg (__rt.296 __sp.63) <215>; + () void_ret_dmaddr_ (__la.43) <216>; + (__rt.214 var=44 stl=RA off=0) assign (__rt.207) <217>; + () out (__rt.214) <218>; + () sink (__sp.213) <224>; + () sink (__extDM_int32_.178) <226>; + () sink (__extDM_BufferPtr_buffer_len.179) <227>; + () sink (__extDM_BufferPtr_ptr_start.75) <228>; + () sink (__extDM_BufferPtr_ptr_current.80) <230>; + () sink (__ct_0.40) <231>; + (__rt.296 var=103) __Pvoid__pl___Pvoid_int18_ (__rd___sp.208 __ct_0s0.376) <348>; + (__ct_0s0.376 var=128) const () <459>; +} #0 +0 : 'signal_processing\\signal_path.c'; +---------- +0 : (0,74:0,0); +4 : (0,79:4,5); +6 : (0,79:4,6); +7 : (0,79:4,6); +11 : (0,79:4,13); +14 : (0,82:4,16); +16 : (0,86:8,17); +17 : (0,83:8,21); +20 : (0,82:4,26); +173 : (0,79:37,6); +239 : (0,79:4,5); +242 : (0,82:14,16); +---------- +82 : (0,74:4,0); +86 : (0,74:4,0); +90 : (0,75:10,0); +93 : (0,75:10,1); +97 : (0,76:10,2); +101 : (0,77:10,3); +126 : (0,79:4,5); +135 : (0,79:4,6); +136 : (0,79:4,6); +154 : (0,80:24,6); +155 : (0,79:33,0); +159 : (0,79:4,11); +167 : (0,79:4,11); +168 : (0,79:4,11); +180 : (0,79:4,15); +181 : (0,79:4,15); +205 : (0,82:4,16); +210 : (0,82:4,25); +211 : (0,82:4,0); +215 : (0,82:4,26); +216 : (0,82:4,26); +217 : (0,82:4,0); +320 : (0,74:4,0); +348 : (0,82:4,0); +404 : (0,76:10,0); +432 : (0,77:10,0); +457 : (0,74:4,0); +459 : (0,82:4,0); +466 : (0,79:4,5); +474 : (0,82:14,16); +475 : (0,82:14,16); +500 : (0,79:4,5); +512 : (0,79:4,5); +518 : (0,82:4,16); +523 : (0,79:4,11); + diff --git a/simulation/Release/chesswork/signal_path-6fcf7f.# b/simulation/Release/chesswork/signal_path-6fcf7f.# index f943af1..50c4d51 100644 --- a/simulation/Release/chesswork/signal_path-6fcf7f.# +++ b/simulation/Release/chesswork/signal_path-6fcf7f.# @@ -1,10 +1,10 @@ 6bd14b3bc305504dd7bb9269fe30bf59aca75a76 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 42695db990e5aaff0b9f36d25938c80e96ce47cc -57cf3fdd8d7def6492095f180e9539315d131531 +cea6e007e8dbd729468865732ec224bd2aae703b da39a3ee5e6b4b0d3255bfef95601890afd80709 -da7a8c19e98dc87d8274bee4a21dcd27ad1cbf24 -152 -0 -0 +7ae292d5e0a5177af75ba2447688ad365bb9ca60 +154 0 +5 +5 diff --git a/simulation/Release/chesswork/signal_path-6fcf7f.o b/simulation/Release/chesswork/signal_path-6fcf7f.o index 59ee911d4482debf99c08e259998eb1452ba4973..f93c93b70adbc19fb65aa7445c92da5ac37ec531 100644 GIT binary patch delta 210 zcmZ1?zeIk+1txCu%)HE!%*33`s?^OlnM#>?XE8FestB`k>#^yvT5XPIThGe4aWXfL z|Ku1R8^$A(XYwdBvQFO1qt5tj@>3xBV=^zVIx7ns14H~|LmuJDKD+{q$&+J&V()-r zv0$+|Kr!#hYk^{G*%=rffW_YM3NZC@0GVQwMfe05dnc>%sWWCx_T^J&UCzb8pb1vg p1C+Tic`i`q&g7#&vSRXEAo*dkD8D)*$7EYDnF=HYCin7-0|1ZdIdcF2 delta 208 zcmZ1?zeIk+1tw0@;>`5;%)HE!&9|9KnR#b0GO{WOvvTXP>9JaDj%8cV%D8?qFOUD^ zC>}e;Lz8FnC^Iro-pixT_+;`^Ao*=FFRwZ)6B`3V{A5EO;mJO{0*r~1V}W9CfMT&= zu{l67&&g|nVyoF17#@Jd-tY=Ab#nljVv|Mq1Q@#~tMaKcW=!_wQ)gYu#lWBmR@4KO nIX8JOQ0CU;qd>B3@>?MJZn7x9IwRX;TQHdlB>5)y@{0oi%tJV7 diff --git a/simulation/Release/chesswork/signal_path-6fcf7f.sfg b/simulation/Release/chesswork/signal_path-6fcf7f.sfg index bc99c75..5966d6c 100644 --- a/simulation/Release/chesswork/signal_path-6fcf7f.sfg +++ b/simulation/Release/chesswork/signal_path-6fcf7f.sfg @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 @@ -14,9 +14,9 @@ F_Z14sig_init_delayP16SingleSignalPathi : user_defined, called { frm : ( ); } **** -!! int sig_init_buffer(BufferPtr *, int *, int, int) -F_Z15sig_init_bufferP9BufferPtrPiii : user_defined, called { - fnm : "sig_init_buffer" 'int sig_init_buffer(BufferPtr *, int *, int, int)'; +!! int initialize_buffer(BufferPtr *, int *, int, int) +F_Z17initialize_bufferP9BufferPtrPiii : user_defined, called { + fnm : "initialize_buffer" 'int initialize_buffer(BufferPtr *, int *, int, int)'; arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i ); loc : ( LR[0] RA[0] A[0] A[1] RA[1] RB[0] ); vac : ( srIM[0] ); @@ -48,7 +48,7 @@ F_Z15sig_init_bufferP9BufferPtrPiii : user_defined, called { 56 : __tmp typ=dmaddr_ bnd=m 57 : __ct_16 typ=int32_ val=16f bnd=m 58 : __ct typ=int32_ bnd=m - 59 : _Z15sig_init_bufferP9BufferPtrPiii typ=dmaddr_ val=0r bnd=m + 59 : _Z17initialize_bufferP9BufferPtrPiii typ=dmaddr_ val=0r bnd=m 62 : __tmp typ=int32_ bnd=m 76 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__ 99 : __ct_0S0 typ=int18_ val=0S0 bnd=m @@ -80,7 +80,7 @@ F_Z14sig_init_delayP16SingleSignalPathi { (__rd___sp.53 var=42) rd_res_reg (__R_SP.24 __sp.32) <77>; (__R_SP.57 var=26 __sp.58 var=34) wr_res_reg (__rt.132 __sp.32) <81>; (__ct_16.68 var=57) const () <92>; - (_Z15sig_init_bufferP9BufferPtrPiii.71 var=59) const () <95>; + (_Z17initialize_bufferP9BufferPtrPiii.71 var=59) const () <95>; (__rd___sp.88 var=42) rd_res_reg (__R_SP.24 __sp.58) <102>; (__R_SP.92 var=26 __sp.93 var=34) wr_res_reg (__rt.176 __sp.58) <106>; (__rt.132 var=76) __Pvoid__pl___Pvoid_int18_ (__rd___sp.53 __ct_0S0.211) <192>; @@ -91,14 +91,14 @@ F_Z14sig_init_delayP16SingleSignalPathi { (__ct_116.212 var=100) const () <305>; (__ct_0s0.215 var=103) const () <311>; (__ct_64.217 var=105) const () <315>; - () void_jump_dmaddr_ (_Z15sig_init_bufferP9BufferPtrPiii.71) <339>; + () void_jump_dmaddr_ (_Z17initialize_bufferP9BufferPtrPiii.71) <339>; call { (__tmp.62 var=53 stl=A off=0) assign (__rt.154) <86>; (__tmp.66 var=56 stl=A off=1) assign (__rt.198) <90>; (n_delay.67 var=47 stl=RA off=1) assign (n_delay.51) <91>; (__ct.70 var=58 stl=RB off=0) assign (__ct_16.68) <94>; (__la.74 var=44 stl=LR off=0) assign (__la.44) <98>; - (__tmp.75 var=62 stl=RA off=0 __extDM.78 var=32 __extDM_BufferPtr.79 var=37 __extDM_SingleSignalPath.80 var=35 __extDM_SingleSignalPath__delay_buffer.81 var=38 __extDM_SingleSignalPath_delay_buffer.82 var=36 __extDM_int32_.83 var=39 __extDM_void.84 var=40 __extPM.85 var=33 __extPM_void.86 var=41 __vola.87 var=29) F_Z15sig_init_bufferP9BufferPtrPiii (__la.74 __tmp.62 __tmp.66 n_delay.67 __ct.70 __extDM.30 __extDM_BufferPtr.35 __extDM_SingleSignalPath.33 __extDM_SingleSignalPath__delay_buffer.36 __extDM_SingleSignalPath_delay_buffer.34 __extDM_int32_.37 __extDM_void.38 __extPM.31 __extPM_void.39 __vola.27) <99>; + (__tmp.75 var=62 stl=RA off=0 __extDM.78 var=32 __extDM_BufferPtr.79 var=37 __extDM_SingleSignalPath.80 var=35 __extDM_SingleSignalPath__delay_buffer.81 var=38 __extDM_SingleSignalPath_delay_buffer.82 var=36 __extDM_int32_.83 var=39 __extDM_void.84 var=40 __extPM.85 var=33 __extPM_void.86 var=41 __vola.87 var=29) F_Z17initialize_bufferP9BufferPtrPiii (__la.74 __tmp.62 __tmp.66 n_delay.67 __ct.70 __extDM.30 __extDM_BufferPtr.35 __extDM_SingleSignalPath.33 __extDM_SingleSignalPath__delay_buffer.36 __extDM_SingleSignalPath_delay_buffer.34 __extDM_int32_.37 __extDM_void.38 __extPM.31 __extPM_void.39 __vola.27) <99>; (__tmp.76 var=62) deassign (__tmp.75) <100>; } #4 off=1 #6 off=2 nxt=-2 @@ -119,30 +119,30 @@ F_Z14sig_init_delayP16SingleSignalPathi { } #0 0 : 'signal_processing\\signal_path.c'; ---------- -0 : (0,152:0,0); -4 : (0,153:11,1); -6 : (0,153:4,1); -142 : (0,153:4,1); +0 : (0,159:0,0); +4 : (0,160:11,1); +6 : (0,160:4,1); +142 : (0,160:4,1); ---------- -77 : (0,152:4,0); -81 : (0,152:4,0); -86 : (0,153:34,0); -90 : (0,153:56,0); -91 : (0,153:73,0); -92 : (0,153:82,0); -94 : (0,153:82,0); -98 : (0,153:11,0); -99 : (0,153:11,1); -102 : (0,153:4,0); -106 : (0,153:4,1); -108 : (0,153:26,0); -192 : (0,152:4,0); -220 : (0,153:34,1); -248 : (0,153:4,0); -276 : (0,153:56,0); -303 : (0,152:4,0); -305 : (0,153:34,0); -311 : (0,153:4,0); -315 : (0,153:56,0); -339 : (0,153:11,1); +77 : (0,159:4,0); +81 : (0,159:4,0); +86 : (0,160:36,0); +90 : (0,160:58,0); +91 : (0,160:75,0); +92 : (0,160:84,0); +94 : (0,160:84,0); +98 : (0,160:11,0); +99 : (0,160:11,1); +102 : (0,160:4,0); +106 : (0,160:4,1); +108 : (0,160:28,0); +192 : (0,159:4,0); +220 : (0,160:36,1); +248 : (0,160:4,0); +276 : (0,160:58,0); +303 : (0,159:4,0); +305 : (0,160:36,0); +311 : (0,160:4,0); +315 : (0,160:58,0); +339 : (0,160:11,1); diff --git a/simulation/Release/chesswork/signal_path-750458.# b/simulation/Release/chesswork/signal_path-750458.# new file mode 100644 index 0000000..d7f3306 --- /dev/null +++ b/simulation/Release/chesswork/signal_path-750458.# @@ -0,0 +1,9 @@ +6bd14b3bc305504dd7bb9269fe30bf59aca75a76 +842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 +42695db990e5aaff0b9f36d25938c80e96ce47cc +6d3a3001c15687e535493bad0a74e05b41f1e09b +da39a3ee5e6b4b0d3255bfef95601890afd80709 +c32d64301301b61633bc0c543dea27e53e53033a +110 +0 +0 diff --git a/simulation/Release/chesswork/signal_path-750458.o b/simulation/Release/chesswork/signal_path-750458.o new file mode 100644 index 0000000000000000000000000000000000000000..59013c367bd928c3e0262d540bd780e766802486 GIT binary patch literal 3912 zcmds3O>7%Q6rQ!cer}wGG%0OJp|~W4G)>L=C$5t=%}>*xv~}wy^oJ&8v$ofXi@mnI zo3@dVs+J-U5)u*|kT~=J7cShm^niqf#E+2Rz<~pYUXZv{h$|e*d$TjidJ|OCBO}es zd*A!!y*IP-v$u|&Ij$%QlZB*pjj>;%t|iT4C=9S2WR2U)w$pTs0!p%9t#REkZ#pbq zG7Bq9dbMJiQm$C#x|EGVp=n;1TD4x3V!3J5)j~oGrO{68CAVu zILq-O)2}2l6|2}ZYo_Jsg_UyIZ01L%+}>$cbltQ{OxH^{jAq$gE~$t$k}4%DWj+(B zxLHe0WGvNcwPHJ(o)|HPGg`J>9!X`(nL@%WYo(N#88OP~Y%yCXYKihl*3eA7C3{_4 zi^%;XQcvnA(dsDqq<)f*T~L^U+gi+ln>FIUzPIxFL?IY^p^Ec3$Y@C&(h~YKtCb*IM)~>}HGJ z#@-gXjQ1nz-uOM}IDnY6FN%Z*5$j@@mHKUGfK8}9vn;SD5*Uh1w5dH;lsf}k?!=K2 zTKrV`L5WNnDBmWX9mG~q*xwynu|t6uMIQTRy@TK58K~{1tXVV9GWn*s-f)D%u_0 z+tIlb!^IJ>I>y_#DP79#Q_;Jpb`ByOj4}dfC<}JXbO#Vq(_BnO54VrE4=DtN`w@yp zkBC>1M-H&}a}-$?$_6pHc{nVvG0CBxFooqM^fd~Pu!L}l6lFLv+@51F21npDoPl20 z1wHT#?0}uH9iE04pbuiO2X@2r@GLwB3={}J5JI3r7y$ZVFT4mZ!6591Q8)zSFaeV= z1)Z=Bx}Y15!ZaL%<8T5_!VH{(91MU4LvR4%@G@lJAY@?#5|D%xq+uVt0t;{z7Qujd z(BUk+26HeAufi2L4|zBT7vLgXg3H@+A?SO_LI)}`9LeES*7wxfHd~Mz&wVYAjxJoV z&8EH3SjMNnx}a(Ltl6mB3tC2>p3CcVmD);`KeaeeitOmgV{>yuvAI>N-mq8g*o;*i zid7no*yRIBEjb+5GO?j`xi6bGjdWQnB#M2>VJ)L2ng4-){3BD*X$(GUO$Qr1Fx2I* z*DIy9_y7Mq#}s}`eitx0&%3cc?mq`9jP1p`K8((=SUWnwa{W+b)6}$6;~sOi#g&Js zYje*{f@GB%=HAjM)5aSmK=6-{EcmBMMh;yY^CSz7PBP+jb@Y<#UbQSta)=sH1fN5~ zC*SA-?;)DNDTegVbH>Yp&N{!I1b>1!g8viAV!l6cokhbvFCh5c*o*u*@({D52@)pe$Y>(Fu##`S z(Aa;8A7K!CS)`9W2*@1B_B-<4k|a-m0A(+)hK_BIU5X<<-UH;ky zIHb<{c<&3?B0JiJek*H1=IA%FPa Q!b%?AH^`&?>n)`J19y_Sod5s; literal 0 HcmV?d00001 diff --git a/simulation/Release/chesswork/signal_path-750458.sfg b/simulation/Release/chesswork/signal_path-750458.sfg new file mode 100644 index 0000000..6c0088a --- /dev/null +++ b/simulation/Release/chesswork/signal_path-750458.sfg @@ -0,0 +1,115 @@ + +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026 +// Copyright 2014-2025 Synopsys, Inc. All rights reserved. +// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 + + +/*** +!! void increment_buffer(BufferPtr *, int) +F_Z16increment_bufferP9BufferPtri : user_defined, called { + fnm : "increment_buffer" 'void increment_buffer(BufferPtr *, int)'; + arg : ( dmaddr_:i dmaddr_:i int32_:i ); + loc : ( LR[0] A[0] RA[0] ); + vac : ( srIM[0] ); + frm : ( ); +} +**** +***/ + +[ + 0 : _Z16increment_bufferP9BufferPtri typ=uint20_ bnd=e stl=PM tref=void_____PBufferPtr___sint__ + 11 : __M_WDMA typ=int32_ bnd=d stl=WDMA + 26 : __R_SP typ=dmaddr_ bnd=d stl=SP + 34 : __sp typ=dmaddr_ bnd=b stl=SP + 36 : __extDM_BufferPtr_ptr_current typ=int8_ bnd=b stl=DM + 38 : __extDM_BufferPtr_ptr_start typ=int8_ bnd=b stl=DM + 39 : __extDM_BufferPtr_buffer_len typ=int8_ bnd=b stl=DM + 41 : __rd___sp typ=dmaddr_ bnd=m + 42 : __ct_0 typ=uint1_ val=0f bnd=m + 43 : __la typ=dmaddr_ bnd=p tref=dmaddr___ + 44 : buffer typ=dmaddr_ bnd=p tref=__PBufferPtr__ + 45 : i_incr typ=int32_ bnd=p tref=__sint__ + 52 : __fch___extDM_BufferPtr_ptr_current typ=dmaddr_ bnd=m + 59 : __fch___extDM_BufferPtr_ptr_start typ=dmaddr_ bnd=m + 63 : __fch___extDM_BufferPtr_buffer_len typ=int32_ bnd=m + 67 : __tmp typ=dmaddr_ bnd=m + 90 : __ct_2 typ=int32_ val=2f bnd=m + 93 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__ + 118 : __ct_0S0 typ=int18_ val=0S0 bnd=m + 119 : __ct_8 typ=int18_ val=8f bnd=m + 122 : __ct_0s0 typ=int18_ val=0s0 bnd=m + 124 : __ct_4 typ=int18_ val=4f bnd=m + 128 : __ct_2 typ=uint2_ val=2f bnd=m + 133 : __tmp typ=int18_ bnd=m + 134 : __tmp typ=int18_ bnd=m +] +F_Z16increment_bufferP9BufferPtri { + (__M_WDMA.9 var=11) st_def () <18>; + (__R_SP.24 var=26) st_def () <48>; + (__sp.32 var=34) source () <56>; + (__extDM_BufferPtr_ptr_current.34 var=36) source () <58>; + (__extDM_BufferPtr_ptr_start.36 var=38) source () <60>; + (__extDM_BufferPtr_buffer_len.37 var=39) source () <61>; + (__ct_0.40 var=42) const () <64>; + (__la.42 var=43 stl=LR off=0) inp () <66>; + (__la.43 var=43) deassign (__la.42) <67>; + (buffer.45 var=44 stl=A off=0) inp () <69>; + (buffer.46 var=44) deassign (buffer.45) <70>; + (i_incr.48 var=45 stl=RA off=0) inp () <72>; + (i_incr.49 var=45) deassign (i_incr.48) <73>; + (__rd___sp.51 var=41) rd_res_reg (__R_SP.24 __sp.32) <75>; + (__R_SP.55 var=26 __sp.56 var=34) wr_res_reg (__rt.133 __sp.32) <79>; + (__fch___extDM_BufferPtr_ptr_current.60 var=52) load (__M_WDMA.9 __rt.155 __extDM_BufferPtr_ptr_current.34) <84>; + (__fch___extDM_BufferPtr_ptr_start.67 var=59) load (__M_WDMA.9 __rt.199 __extDM_BufferPtr_ptr_start.36) <91>; + (__fch___extDM_BufferPtr_buffer_len.71 var=63) load (__M_WDMA.9 __rt.221 __extDM_BufferPtr_buffer_len.37) <95>; + (__M_WDMA.79 var=11 __extDM_BufferPtr_ptr_current.80 var=36) store (__tmp.110 __rt.243 __extDM_BufferPtr_ptr_current.34) <103>; + (__rd___sp.81 var=41) rd_res_reg (__R_SP.24 __sp.56) <104>; + (__R_SP.85 var=26 __sp.86 var=34) wr_res_reg (__rt.177 __sp.56) <108>; + () void_ret_dmaddr_ (__la.43) <109>; + () sink (__sp.86) <115>; + () sink (__extDM_BufferPtr_ptr_current.80) <117>; + () sink (__ct_0.40) <122>; + (__tmp.110 var=67) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch___extDM_BufferPtr_ptr_current.60 __tmp.266 __fch___extDM_BufferPtr_ptr_start.67 __tmp.271) <155>; + (__ct_2.119 var=90) const () <175>; + (__rt.133 var=93) __Pvoid__pl___Pvoid_int18_ (__rd___sp.51 __ct_0S0.256) <201>; + (__rt.155 var=93) __Pvoid__pl___Pvoid_int18_ (buffer.46 __ct_8.257) <229>; + (__rt.177 var=93) __Pvoid__pl___Pvoid_int18_ (__rd___sp.81 __ct_0s0.260) <257>; + (__rt.199 var=93) __Pvoid__mi___Pvoid_int18_ (__rt.155 __ct_4.262) <285>; + (__rt.221 var=93) __Pvoid__mi___Pvoid_int18_ (__rt.199 __ct_4.262) <313>; + (__rt.243 var=93) __Pvoid__pl___Pvoid_int18_ (__rt.221 __ct_8.257) <341>; + (__ct_0S0.256 var=118) const () <367>; + (__ct_8.257 var=119) const () <369>; + (__ct_0s0.260 var=122) const () <375>; + (__ct_4.262 var=124) const () <379>; + (__ct_2.265 var=128) const () <384>; + (__tmp.266 var=133) int72__shift_int72__int72__uint2_ (i_incr.49 __ct_2.119 __ct_2.265) <385>; + (__tmp.271 var=134) int72__shift_int72__int72__uint2_ (__fch___extDM_BufferPtr_buffer_len.71 __ct_2.119 __ct_2.265) <393>; +} #5 off=0 nxt=-2 +0 : 'signal_processing\\signal_path.c'; +---------- +5 : (0,110:0,2); +---------- +75 : (0,108:5,0); +79 : (0,108:5,0); +84 : (0,109:43,1); +91 : (0,109:72,1); +95 : (0,109:91,1); +103 : (0,109:10,1); +104 : (0,110:0,0); +108 : (0,110:0,2); +109 : (0,110:0,2); +155 : (0,109:26,1); +175 : (0,109:58,0); +201 : (0,108:5,0); +229 : (0,109:43,1); +257 : (0,110:0,0); +285 : (0,109:72,0); +341 : (0,109:43,0); +367 : (0,108:5,0); +369 : (0,109:43,0); +375 : (0,110:0,0); +379 : (0,109:72,0); +384 : (0,109:58,0); +385 : (0,109:58,1); +393 : (0,109:91,1); + diff --git a/simulation/Release/chesswork/signal_path-9c02ae.# b/simulation/Release/chesswork/signal_path-9c02ae.# index 86e7c51..8c64979 100644 --- a/simulation/Release/chesswork/signal_path-9c02ae.# +++ b/simulation/Release/chesswork/signal_path-9c02ae.# @@ -1,9 +1,10 @@ 6bd14b3bc305504dd7bb9269fe30bf59aca75a76 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 42695db990e5aaff0b9f36d25938c80e96ce47cc -48e27357cf6b74d9a9ddfe61cbe4d757b31f02a7 +ac11bb208ce215cfbff1d17e7da4a6e4beeb0a71 da39a3ee5e6b4b0d3255bfef95601890afd80709 -069b2d9d62c8563308a7ea5192abeefe363b7d77 -305 +ba86b497a3de6671eb03ed7e1bc1c184ce6ac84a +301 0 --2 +5 +5 diff --git a/simulation/Release/chesswork/signal_path-9c02ae.o b/simulation/Release/chesswork/signal_path-9c02ae.o index 871205963e1eefb5246c948ab98396a04bea7760..c76cd584baba5ea303bb74239ad28b8089a11928 100644 GIT binary patch delta 1239 zcmbu8OK1~O6o${8%o!&&Ch62iZAB-fO$tpW(^6{%scr;81ua%67GskpbtF!0lOl>5 zQSkwa;#~-$8y^%w#S#%8xNCRqMsz1GTogov3gQE_dTzXE8<$?lneY40xp#(Paz1q{ zb;)G?W1%I1&4Z3x$P6d@Gr7J)$(-Y6U=ALT-K>)nL+QaxHtVFFj9bXVzZowE&Ma$f zaa^b1^yQqxnPh4tn-z!ePx1QT`h{!$wo2)sM=QQx1b~pGK7B@JrjGP3?o-yFdnLv6 zMMO{7I)FC4o=`kw!P`V6jy?|Fc8RCJyHVm<@NSWK9-wLuzg-{g9iYUg56K+#BSi1$ z2vt8VNeBOBLJt!s`>&SKPgr$>P*?qT%gIlXJS0@H>KR?UYSl!kX+<42B=Z?JKRBGs zI|FWCE?I!SbhGwKtyDygl^&Bfa(B(nRw;#tZRv zY>U=Bf3?sD0I zBH`dSE^Ve1<0$M#DZx$?m#`^Exg0{Nz|MItF;gCM={MygmlNiiY9WKq7(-i+i?GA5 zencs|Je$Of6ir~5CGu6gUEss=Et5p~kx8=r9O*K4i{&{p)8tP`H!yR{UrlP1za!nF zErf(*1wR#k$+S|A#J3(Mird7~MA>BGC{dbC94Exu!KT)F4t8QvEbC@Yoo%Cev>{rvh_Yy#%qKs2atToc>vg;-qBWNbR8>M%IGRZHCBsHfA`&N& z?(U_|63(q9{4DYVm>B5Q^G7RJ?cPY)yA8Adw|1sT3FDs~@DuONy=<7G?5uY?HP}-PwQ8jE<#S={e{L5-06 zY{c(^Ej5I+VqVG~_#JeBJ;T8_HSCMOR+z70)qz^NhqVPf^djrUI>RRN^&!?L>^0U` IY-MouFR4r2RR910 diff --git a/simulation/Release/chesswork/signal_path-9c02ae.sfg b/simulation/Release/chesswork/signal_path-9c02ae.sfg index e20f97d..dd95003 100644 --- a/simulation/Release/chesswork/signal_path-9c02ae.sfg +++ b/simulation/Release/chesswork/signal_path-9c02ae.sfg @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 @@ -38,17 +38,17 @@ F_Z15sig_init_weightP16SingleSignalPathdi : user_defined, called { vac : ( srIM[0] ); llv : 0 1 0 0 0 ; } -!! int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int) -F_Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii : user_defined, called { - fnm : "sig_init_buffer_DMB" 'int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)'; +!! int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int) +F_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii : user_defined, called { + fnm : "initialize_buffer_dmb" 'int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)'; arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i ); loc : ( LR[0] RA[0] A[4] A[5] RA[1] RB[0] ); vac : ( srIM[0] ); llv : 0 1 0 0 0 ; } -!! int sig_init_buffer(BufferPtr *, int *, int, int) -F_Z15sig_init_bufferP9BufferPtrPiii : user_defined, called { - fnm : "sig_init_buffer" 'int sig_init_buffer(BufferPtr *, int *, int, int)'; +!! int initialize_buffer(BufferPtr *, int *, int, int) +F_Z17initialize_bufferP9BufferPtrPiii : user_defined, called { + fnm : "initialize_buffer" 'int initialize_buffer(BufferPtr *, int *, int, int)'; arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i ); loc : ( LR[0] RA[0] A[0] A[1] RA[1] RB[0] ); vac : ( srIM[0] ); @@ -84,33 +84,33 @@ F_Z30float64_to_int32_round_to_zeroy : user_defined, called { 34 : __sp typ=dmaddr_ bnd=b stl=SP 35 : _ZL2mu typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__sint_DMA 36 : __extDM_int32_ typ=int8_ bnd=b stl=DM - 37 : ptr_fir_lms_delay_line typ=int8_ bnd=e sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB + 37 : pointer_delay_line typ=int8_ bnd=e sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB 38 : __extDM_BufferPtrDMB typ=int8_ bnd=b stl=DM - 39 : fir_lms_delay_line typ=int8_ bnd=e sz=256 algn=4 stl=DMB tref=__A64DMB__sint_DMB - 40 : ptr_fir_lms_coeffs typ=int8_ bnd=e sz=12 algn=4 stl=DMA tref=BufferPtr_DMA + 39 : delay_line typ=int8_ bnd=e sz=256 algn=4 stl=DMB tref=__A64DMB__sint_DMB + 40 : pointer_filter_coefficients typ=int8_ bnd=e sz=12 algn=4 stl=DMA tref=BufferPtr_DMA 41 : __extDM_BufferPtr typ=int8_ bnd=b stl=DM - 42 : fir_lms_coeffs typ=int8_ bnd=e sz=256 algn=8 stl=DMA tref=__A64__sint_DMA + 42 : filter_coefficients typ=int8_ bnd=e sz=256 algn=8 stl=DMA tref=__A64__sint_DMA 43 : __extDM_SingleSignalPath typ=int8_ bnd=b stl=DM 44 : __extDM_int64_ typ=int8_ bnd=b stl=DM 45 : __extDM_void typ=int8_ bnd=b stl=DM 46 : __extPM_void typ=uint20_ bnd=b stl=PM - 47 : ptr_fir_lms_delay_line_ptr_start typ=int8_ bnd=b stl=DM + 47 : pointer_delay_line_ptr_start typ=int8_ bnd=b stl=DM 48 : __extDM___PDMint32_ typ=int8_ bnd=b stl=DM - 49 : ptr_fir_lms_coeffs_ptr_start typ=int8_ bnd=b stl=DM + 49 : pointer_filter_coefficients_ptr_start typ=int8_ bnd=b stl=DM 50 : __rd___sp typ=dmaddr_ bnd=m 52 : __ptr_mu typ=dmaddr_ val=0a bnd=m adro=35 - 53 : __ptr_ptr_fir_lms_delay_line typ=dmaddr_ bnd=m - 54 : __ptr_ptr_fir_lms_delay_line typ=dmaddr_ val=0a bnd=m adro=37 - 55 : __ptr_fir_lms_delay_line typ=dmaddr_ bnd=m - 56 : __ptr_fir_lms_delay_line typ=dmaddr_ val=0a bnd=m adro=39 - 57 : __ptr_ptr_fir_lms_coeffs typ=dmaddr_ bnd=m - 58 : __ptr_ptr_fir_lms_coeffs typ=dmaddr_ val=0a bnd=m adro=40 - 59 : __ptr_fir_lms_coeffs typ=dmaddr_ bnd=m - 60 : __ptr_fir_lms_coeffs typ=dmaddr_ val=0a bnd=m adro=42 + 53 : __ptr_pointer_delay_line typ=dmaddr_ bnd=m + 54 : __ptr_pointer_delay_line typ=dmaddr_ val=0a bnd=m adro=37 + 55 : __ptr_delay_line typ=dmaddr_ bnd=m + 56 : __ptr_delay_line typ=dmaddr_ val=0a bnd=m adro=39 + 57 : __ptr_pointer_filter_coefficients typ=dmaddr_ bnd=m + 58 : __ptr_pointer_filter_coefficients typ=dmaddr_ val=0a bnd=m adro=40 + 59 : __ptr_filter_coefficients typ=dmaddr_ bnd=m + 60 : __ptr_filter_coefficients typ=dmaddr_ val=0a bnd=m adro=42 61 : __ct_0 typ=uint1_ val=0f bnd=m 62 : __la typ=dmaddr_ bnd=p tref=dmaddr___ - 63 : cSensorSignal typ=dmaddr_ bnd=p tref=__PSingleSignalPath__ - 64 : accSensorSignal typ=dmaddr_ bnd=p tref=__PSingleSignalPath__ + 63 : c_sensor_signal_t typ=dmaddr_ bnd=p tref=__PSingleSignalPath__ + 64 : acc_sensor_signal_t typ=dmaddr_ bnd=p tref=__PSingleSignalPath__ 65 : b_c typ=dmaddr_ bnd=p tref=__P__fdouble__ 66 : b_acc typ=dmaddr_ bnd=p tref=__P__fdouble__ 67 : delay_c typ=int32_ bnd=p tref=__sint__ @@ -118,7 +118,7 @@ F_Z30float64_to_int32_round_to_zeroy : user_defined, called { 69 : weight_c typ=int64_ bnd=p tref=__fdouble__ 70 : weight_acc typ=int64_ bnd=p tref=__fdouble__ 71 : lms_mu typ=int64_ bnd=p tref=__fdouble__ - 72 : lms_fir_num_coeffs typ=int32_ bnd=p tref=__sint__ + 72 : number_coefficients typ=int32_ bnd=p tref=__sint__ 78 : __ct_0 typ=int32_ val=0f bnd=m 81 : __fch___extDM_int64_ typ=int64_ bnd=m 85 : __fch___extDM_int64_ typ=int64_ bnd=m @@ -151,21 +151,21 @@ F_Z30float64_to_int32_round_to_zeroy : user_defined, called { 149 : __tmp typ=int32_ bnd=m 150 : __ct_64 typ=int32_ val=64f bnd=m 151 : __ct typ=int32_ bnd=m - 152 : _Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii typ=dmaddr_ val=0r bnd=m + 152 : _Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii typ=dmaddr_ val=0r bnd=m 154 : __link typ=dmaddr_ bnd=m 155 : __tmp typ=int32_ bnd=m 157 : __ct typ=int32_ bnd=m - 158 : _Z15sig_init_bufferP9BufferPtrPiii typ=dmaddr_ val=0r bnd=m + 158 : _Z17initialize_bufferP9BufferPtrPiii typ=dmaddr_ val=0r bnd=m 160 : __link typ=dmaddr_ bnd=m 161 : __tmp typ=int32_ bnd=m 164 : __tmp typ=bool bnd=m - 170 : __fch_ptr_fir_lms_delay_line_ptr_start typ=dmaddr_ bnd=m - 180 : __fch_ptr_fir_lms_coeffs_ptr_start typ=dmaddr_ bnd=m + 170 : __fch_pointer_delay_line_ptr_start typ=dmaddr_ bnd=m + 180 : __fch_pointer_filter_coefficients_ptr_start typ=dmaddr_ bnd=m 201 : __iv1_i typ=dmaddr_ bnd=m 202 : __iv2_i typ=dmaddr_ bnd=m 205 : __cv typ=uint16_ bnd=m - 213 : __ptr_ptr_fir_lms_delay_line__a4 typ=dmaddr_ val=4a bnd=m adro=37 - 214 : __ptr_ptr_fir_lms_coeffs__a4 typ=dmaddr_ val=4a bnd=m adro=40 + 213 : __ptr_pointer_delay_line__a4 typ=dmaddr_ val=4a bnd=m adro=37 + 214 : __ptr_pointer_filter_coefficients__a4 typ=dmaddr_ val=4a bnd=m adro=40 217 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__ 248 : __ct_0S0 typ=int18_ val=-8S0 bnd=m 249 : __ct_0s0 typ=int18_ val=8s0 bnd=m @@ -196,26 +196,26 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi { (__sp.32 var=34) source () <56>; (_ZL2mu.33 var=35) source () <57>; (__extDM_int32_.34 var=36) source () <58>; - (ptr_fir_lms_delay_line.35 var=37) source () <59>; + (pointer_delay_line.35 var=37) source () <59>; (__extDM_BufferPtrDMB.36 var=38) source () <60>; - (fir_lms_delay_line.37 var=39) source () <61>; - (ptr_fir_lms_coeffs.38 var=40) source () <62>; + (delay_line.37 var=39) source () <61>; + (pointer_filter_coefficients.38 var=40) source () <62>; (__extDM_BufferPtr.39 var=41) source () <63>; - (fir_lms_coeffs.40 var=42) source () <64>; + (filter_coefficients.40 var=42) source () <64>; (__extDM_SingleSignalPath.41 var=43) source () <65>; (__extDM_int64_.42 var=44) source () <66>; (__extDM_void.43 var=45) source () <67>; (__extPM_void.44 var=46) source () <68>; - (ptr_fir_lms_delay_line_ptr_start.45 var=47) source () <69>; + (pointer_delay_line_ptr_start.45 var=47) source () <69>; (__extDM___PDMint32_.46 var=48) source () <70>; - (ptr_fir_lms_coeffs_ptr_start.47 var=49) source () <71>; + (pointer_filter_coefficients_ptr_start.47 var=49) source () <71>; (__ct_0.59 var=61) const () <83>; (__la.61 var=62 stl=LR off=0) inp () <85>; (__la.62 var=62) deassign (__la.61) <86>; - (cSensorSignal.64 var=63 stl=A off=0) inp () <88>; - (cSensorSignal.65 var=63) deassign (cSensorSignal.64) <89>; - (accSensorSignal.67 var=64 stl=A off=1) inp () <91>; - (accSensorSignal.68 var=64) deassign (accSensorSignal.67) <92>; + (c_sensor_signal_t.64 var=63 stl=A off=0) inp () <88>; + (c_sensor_signal_t.65 var=63) deassign (c_sensor_signal_t.64) <89>; + (acc_sensor_signal_t.67 var=64 stl=A off=1) inp () <91>; + (acc_sensor_signal_t.68 var=64) deassign (acc_sensor_signal_t.67) <92>; (b_c.70 var=65 stl=A off=2) inp () <94>; (b_c.71 var=65) deassign (b_c.70) <95>; (b_acc.73 var=66 stl=A off=3) inp () <97>; @@ -230,8 +230,8 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi { (weight_acc.86 var=70) deassign (weight_acc.85) <110>; (lms_mu.88 var=71 stl=BX off=0) inp () <112>; (lms_mu.89 var=71) deassign (lms_mu.88) <113>; - (lms_fir_num_coeffs.91 var=72 stl=RB off=0) inp () <115>; - (lms_fir_num_coeffs.92 var=72) deassign (lms_fir_num_coeffs.91) <116>; + (number_coefficients.91 var=72 stl=RB off=0) inp () <115>; + (number_coefficients.92 var=72) deassign (number_coefficients.91) <116>; (__rd___sp.94 var=50) rd_res_reg (__R_SP.24 __sp.32) <118>; (__R_SP.98 var=26 __sp.99 var=34) wr_res_reg (__rt.679 __sp.32) <122>; (__fch___extDM_int64_.106 var=81) load (__M_LDMA.12 b_c.71 __extDM_int64_.42) <130>; @@ -250,7 +250,7 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi { (__ct_0S0.934 var=248) const () <965>; (__ct_8.937 var=251) const () <971>; call { - (cSensorSignal.102 var=63 stl=A off=0) assign (cSensorSignal.65) <126>; + (c_sensor_signal_t.102 var=63 stl=A off=0) assign (c_sensor_signal_t.65) <126>; (__fch___extDM_int64_.107 var=81 stl=AX off=0) assign (__fch___extDM_int64_.106) <131>; (__fch___extDM_int64_.112 var=85 stl=AX off=1) assign (__fch___extDM_int64_.111) <136>; (__fch___extDM_int64_.117 var=89 stl=BX off=0) assign (__fch___extDM_int64_.116) <141>; @@ -258,26 +258,26 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi { (__fch___extDM_int64_.127 var=97 stl=__spill_LDMA off=0) assign (__fch___extDM_int64_.126) <151>; (__ct.130 var=99 stl=RA off=0) assign (__ct_31.128) <154>; (__link.134 var=102 stl=LR off=0) assign (__link.133) <158>; - (_ZL2mu.135 var=35 __extDM.136 var=32 __extDM_BufferPtr.137 var=41 __extDM_BufferPtrDMB.138 var=38 __extDM_SingleSignalPath.139 var=43 __extDM___PDMint32_.140 var=48 __extDM_int32_.141 var=36 __extDM_int64_.142 var=44 __extDM_void.143 var=45 __extPM.144 var=33 __extPM_void.145 var=46 fir_lms_coeffs.146 var=42 fir_lms_delay_line.147 var=39 ptr_fir_lms_coeffs.148 var=40 ptr_fir_lms_coeffs_ptr_start.149 var=49 ptr_fir_lms_delay_line.150 var=37 ptr_fir_lms_delay_line_ptr_start.151 var=47 __vola.152 var=29) F_Z21sig_init_preemph_coefP16SingleSignalPathdddddi (__link.134 cSensorSignal.102 __fch___extDM_int64_.107 __fch___extDM_int64_.112 __fch___extDM_int64_.117 __fch___extDM_int64_.122 __fch___extDM_int64_.127 __ct.130 _ZL2mu.33 __extDM.30 __extDM_BufferPtr.39 __extDM_BufferPtrDMB.36 __extDM_SingleSignalPath.41 __extDM___PDMint32_.46 __extDM_int32_.34 __extDM_int64_.42 __extDM_void.43 __extPM.31 __extPM_void.44 fir_lms_coeffs.40 fir_lms_delay_line.37 ptr_fir_lms_coeffs.38 ptr_fir_lms_coeffs_ptr_start.47 ptr_fir_lms_delay_line.35 ptr_fir_lms_delay_line_ptr_start.45 __vola.27) <159>; + (_ZL2mu.135 var=35 __extDM.136 var=32 __extDM_BufferPtr.137 var=41 __extDM_BufferPtrDMB.138 var=38 __extDM_SingleSignalPath.139 var=43 __extDM___PDMint32_.140 var=48 __extDM_int32_.141 var=36 __extDM_int64_.142 var=44 __extDM_void.143 var=45 __extPM.144 var=33 __extPM_void.145 var=46 delay_line.146 var=39 filter_coefficients.147 var=42 pointer_delay_line.148 var=37 pointer_delay_line_ptr_start.149 var=47 pointer_filter_coefficients.150 var=40 pointer_filter_coefficients_ptr_start.151 var=49 __vola.152 var=29) F_Z21sig_init_preemph_coefP16SingleSignalPathdddddi (__link.134 c_sensor_signal_t.102 __fch___extDM_int64_.107 __fch___extDM_int64_.112 __fch___extDM_int64_.117 __fch___extDM_int64_.122 __fch___extDM_int64_.127 __ct.130 _ZL2mu.33 __extDM.30 __extDM_BufferPtr.39 __extDM_BufferPtrDMB.36 __extDM_SingleSignalPath.41 __extDM___PDMint32_.46 __extDM_int32_.34 __extDM_int64_.42 __extDM_void.43 __extPM.31 __extPM_void.44 delay_line.37 filter_coefficients.40 pointer_delay_line.35 pointer_delay_line_ptr_start.45 pointer_filter_coefficients.38 pointer_filter_coefficients_ptr_start.47 __vola.27) <159>; } #4 off=1 #5 off=2 (_Z14sig_init_delayP16SingleSignalPathi.155 var=103) const () <162>; (__link.157 var=105) dmaddr__call_dmaddr_ (_Z14sig_init_delayP16SingleSignalPathi.155) <164>; call { - (cSensorSignal.153 var=63 stl=A off=0) assign (cSensorSignal.65) <160>; + (c_sensor_signal_t.153 var=63 stl=A off=0) assign (c_sensor_signal_t.65) <160>; (delay_c.154 var=67 stl=RA off=1) assign (delay_c.77) <161>; (__link.158 var=105 stl=LR off=0) assign (__link.157) <165>; - (__tmp.159 var=106 stl=RA off=0 _ZL2mu.162 var=35 __extDM.163 var=32 __extDM_BufferPtr.164 var=41 __extDM_BufferPtrDMB.165 var=38 __extDM_SingleSignalPath.166 var=43 __extDM___PDMint32_.167 var=48 __extDM_int32_.168 var=36 __extDM_int64_.169 var=44 __extDM_void.170 var=45 __extPM.171 var=33 __extPM_void.172 var=46 fir_lms_coeffs.173 var=42 fir_lms_delay_line.174 var=39 ptr_fir_lms_coeffs.175 var=40 ptr_fir_lms_coeffs_ptr_start.176 var=49 ptr_fir_lms_delay_line.177 var=37 ptr_fir_lms_delay_line_ptr_start.178 var=47 __vola.179 var=29) F_Z14sig_init_delayP16SingleSignalPathi (__link.158 cSensorSignal.153 delay_c.154 _ZL2mu.135 __extDM.136 __extDM_BufferPtr.137 __extDM_BufferPtrDMB.138 __extDM_SingleSignalPath.139 __extDM___PDMint32_.140 __extDM_int32_.141 __extDM_int64_.142 __extDM_void.143 __extPM.144 __extPM_void.145 fir_lms_coeffs.146 fir_lms_delay_line.147 ptr_fir_lms_coeffs.148 ptr_fir_lms_coeffs_ptr_start.149 ptr_fir_lms_delay_line.150 ptr_fir_lms_delay_line_ptr_start.151 __vola.152) <166>; + (__tmp.159 var=106 stl=RA off=0 _ZL2mu.162 var=35 __extDM.163 var=32 __extDM_BufferPtr.164 var=41 __extDM_BufferPtrDMB.165 var=38 __extDM_SingleSignalPath.166 var=43 __extDM___PDMint32_.167 var=48 __extDM_int32_.168 var=36 __extDM_int64_.169 var=44 __extDM_void.170 var=45 __extPM.171 var=33 __extPM_void.172 var=46 delay_line.173 var=39 filter_coefficients.174 var=42 pointer_delay_line.175 var=37 pointer_delay_line_ptr_start.176 var=47 pointer_filter_coefficients.177 var=40 pointer_filter_coefficients_ptr_start.178 var=49 __vola.179 var=29) F_Z14sig_init_delayP16SingleSignalPathi (__link.158 c_sensor_signal_t.153 delay_c.154 _ZL2mu.135 __extDM.136 __extDM_BufferPtr.137 __extDM_BufferPtrDMB.138 __extDM_SingleSignalPath.139 __extDM___PDMint32_.140 __extDM_int32_.141 __extDM_int64_.142 __extDM_void.143 __extPM.144 __extPM_void.145 delay_line.146 filter_coefficients.147 pointer_delay_line.148 pointer_delay_line_ptr_start.149 pointer_filter_coefficients.150 pointer_filter_coefficients_ptr_start.151 __vola.152) <166>; } #6 off=3 #7 off=4 (_Z15sig_init_weightP16SingleSignalPathdi.185 var=109) const () <174>; (__link.187 var=111) dmaddr__call_dmaddr_ (_Z15sig_init_weightP16SingleSignalPathdi.185) <176>; call { - (cSensorSignal.180 var=63 stl=A off=0) assign (cSensorSignal.65) <169>; + (c_sensor_signal_t.180 var=63 stl=A off=0) assign (c_sensor_signal_t.65) <169>; (weight_c.181 var=69 stl=AX off=0) assign (weight_c.83) <170>; (__ct.184 var=108 stl=RA off=0) assign (__ct_31.128) <173>; (__link.188 var=111 stl=LR off=0) assign (__link.187) <177>; - (_ZL2mu.189 var=35 __extDM.190 var=32 __extDM_BufferPtr.191 var=41 __extDM_BufferPtrDMB.192 var=38 __extDM_SingleSignalPath.193 var=43 __extDM___PDMint32_.194 var=48 __extDM_int32_.195 var=36 __extDM_int64_.196 var=44 __extDM_void.197 var=45 __extPM.198 var=33 __extPM_void.199 var=46 fir_lms_coeffs.200 var=42 fir_lms_delay_line.201 var=39 ptr_fir_lms_coeffs.202 var=40 ptr_fir_lms_coeffs_ptr_start.203 var=49 ptr_fir_lms_delay_line.204 var=37 ptr_fir_lms_delay_line_ptr_start.205 var=47 __vola.206 var=29) F_Z15sig_init_weightP16SingleSignalPathdi (__link.188 cSensorSignal.180 weight_c.181 __ct.184 _ZL2mu.162 __extDM.163 __extDM_BufferPtr.164 __extDM_BufferPtrDMB.165 __extDM_SingleSignalPath.166 __extDM___PDMint32_.167 __extDM_int32_.168 __extDM_int64_.169 __extDM_void.170 __extPM.171 __extPM_void.172 fir_lms_coeffs.173 fir_lms_delay_line.174 ptr_fir_lms_coeffs.175 ptr_fir_lms_coeffs_ptr_start.176 ptr_fir_lms_delay_line.177 ptr_fir_lms_delay_line_ptr_start.178 __vola.179) <178>; + (_ZL2mu.189 var=35 __extDM.190 var=32 __extDM_BufferPtr.191 var=41 __extDM_BufferPtrDMB.192 var=38 __extDM_SingleSignalPath.193 var=43 __extDM___PDMint32_.194 var=48 __extDM_int32_.195 var=36 __extDM_int64_.196 var=44 __extDM_void.197 var=45 __extPM.198 var=33 __extPM_void.199 var=46 delay_line.200 var=39 filter_coefficients.201 var=42 pointer_delay_line.202 var=37 pointer_delay_line_ptr_start.203 var=47 pointer_filter_coefficients.204 var=40 pointer_filter_coefficients_ptr_start.205 var=49 __vola.206 var=29) F_Z15sig_init_weightP16SingleSignalPathdi (__link.188 c_sensor_signal_t.180 weight_c.181 __ct.184 _ZL2mu.162 __extDM.163 __extDM_BufferPtr.164 __extDM_BufferPtrDMB.165 __extDM_SingleSignalPath.166 __extDM___PDMint32_.167 __extDM_int32_.168 __extDM_int64_.169 __extDM_void.170 __extPM.171 __extPM_void.172 delay_line.173 filter_coefficients.174 pointer_delay_line.175 pointer_delay_line_ptr_start.176 pointer_filter_coefficients.177 pointer_filter_coefficients_ptr_start.178 __vola.179) <178>; } #8 off=5 #370 off=6 (__fch___extDM_int64_.211 var=115) load (__M_LDMA.12 b_acc.74 __extDM_int64_.196) <183>; @@ -291,7 +291,7 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi { (__rt.899 var=217) __Pvoid__pl___Pvoid_int18_ (__rt.877 __ct_8.937) <897>; (__rt.921 var=217) __Pvoid__pl___Pvoid_int18_ (__rt.899 __ct_8.937) <925>; call { - (accSensorSignal.207 var=64 stl=A off=0) assign (accSensorSignal.68) <179>; + (acc_sensor_signal_t.207 var=64 stl=A off=0) assign (acc_sensor_signal_t.68) <179>; (__fch___extDM_int64_.212 var=115 stl=AX off=0) assign (__fch___extDM_int64_.211) <184>; (__fch___extDM_int64_.217 var=119 stl=AX off=1) assign (__fch___extDM_int64_.216) <189>; (__fch___extDM_int64_.222 var=123 stl=BX off=0) assign (__fch___extDM_int64_.221) <194>; @@ -299,24 +299,24 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi { (__fch___extDM_int64_.232 var=131 stl=__spill_LDMA off=0) assign (__fch___extDM_int64_.231) <204>; (__ct.235 var=133 stl=RA off=0) assign (__ct_31.128) <207>; (__link.239 var=136 stl=LR off=0) assign (__link.238) <211>; - (_ZL2mu.240 var=35 __extDM.241 var=32 __extDM_BufferPtr.242 var=41 __extDM_BufferPtrDMB.243 var=38 __extDM_SingleSignalPath.244 var=43 __extDM___PDMint32_.245 var=48 __extDM_int32_.246 var=36 __extDM_int64_.247 var=44 __extDM_void.248 var=45 __extPM.249 var=33 __extPM_void.250 var=46 fir_lms_coeffs.251 var=42 fir_lms_delay_line.252 var=39 ptr_fir_lms_coeffs.253 var=40 ptr_fir_lms_coeffs_ptr_start.254 var=49 ptr_fir_lms_delay_line.255 var=37 ptr_fir_lms_delay_line_ptr_start.256 var=47 __vola.257 var=29) F_Z21sig_init_preemph_coefP16SingleSignalPathdddddi (__link.239 accSensorSignal.207 __fch___extDM_int64_.212 __fch___extDM_int64_.217 __fch___extDM_int64_.222 __fch___extDM_int64_.227 __fch___extDM_int64_.232 __ct.235 _ZL2mu.189 __extDM.190 __extDM_BufferPtr.191 __extDM_BufferPtrDMB.192 __extDM_SingleSignalPath.193 __extDM___PDMint32_.194 __extDM_int32_.195 __extDM_int64_.196 __extDM_void.197 __extPM.198 __extPM_void.199 fir_lms_coeffs.200 fir_lms_delay_line.201 ptr_fir_lms_coeffs.202 ptr_fir_lms_coeffs_ptr_start.203 ptr_fir_lms_delay_line.204 ptr_fir_lms_delay_line_ptr_start.205 __vola.206) <212>; + (_ZL2mu.240 var=35 __extDM.241 var=32 __extDM_BufferPtr.242 var=41 __extDM_BufferPtrDMB.243 var=38 __extDM_SingleSignalPath.244 var=43 __extDM___PDMint32_.245 var=48 __extDM_int32_.246 var=36 __extDM_int64_.247 var=44 __extDM_void.248 var=45 __extPM.249 var=33 __extPM_void.250 var=46 delay_line.251 var=39 filter_coefficients.252 var=42 pointer_delay_line.253 var=37 pointer_delay_line_ptr_start.254 var=47 pointer_filter_coefficients.255 var=40 pointer_filter_coefficients_ptr_start.256 var=49 __vola.257 var=29) F_Z21sig_init_preemph_coefP16SingleSignalPathdddddi (__link.239 acc_sensor_signal_t.207 __fch___extDM_int64_.212 __fch___extDM_int64_.217 __fch___extDM_int64_.222 __fch___extDM_int64_.227 __fch___extDM_int64_.232 __ct.235 _ZL2mu.189 __extDM.190 __extDM_BufferPtr.191 __extDM_BufferPtrDMB.192 __extDM_SingleSignalPath.193 __extDM___PDMint32_.194 __extDM_int32_.195 __extDM_int64_.196 __extDM_void.197 __extPM.198 __extPM_void.199 delay_line.200 filter_coefficients.201 pointer_delay_line.202 pointer_delay_line_ptr_start.203 pointer_filter_coefficients.204 pointer_filter_coefficients_ptr_start.205 __vola.206) <212>; } #10 off=7 #11 off=8 (__link.262 var=139) dmaddr__call_dmaddr_ (_Z14sig_init_delayP16SingleSignalPathi.155) <217>; call { - (accSensorSignal.258 var=64 stl=A off=0) assign (accSensorSignal.68) <213>; + (acc_sensor_signal_t.258 var=64 stl=A off=0) assign (acc_sensor_signal_t.68) <213>; (delay_acc.259 var=68 stl=RA off=1) assign (delay_acc.80) <214>; (__link.263 var=139 stl=LR off=0) assign (__link.262) <218>; - (__tmp.264 var=140 stl=RA off=0 _ZL2mu.267 var=35 __extDM.268 var=32 __extDM_BufferPtr.269 var=41 __extDM_BufferPtrDMB.270 var=38 __extDM_SingleSignalPath.271 var=43 __extDM___PDMint32_.272 var=48 __extDM_int32_.273 var=36 __extDM_int64_.274 var=44 __extDM_void.275 var=45 __extPM.276 var=33 __extPM_void.277 var=46 fir_lms_coeffs.278 var=42 fir_lms_delay_line.279 var=39 ptr_fir_lms_coeffs.280 var=40 ptr_fir_lms_coeffs_ptr_start.281 var=49 ptr_fir_lms_delay_line.282 var=37 ptr_fir_lms_delay_line_ptr_start.283 var=47 __vola.284 var=29) F_Z14sig_init_delayP16SingleSignalPathi (__link.263 accSensorSignal.258 delay_acc.259 _ZL2mu.240 __extDM.241 __extDM_BufferPtr.242 __extDM_BufferPtrDMB.243 __extDM_SingleSignalPath.244 __extDM___PDMint32_.245 __extDM_int32_.246 __extDM_int64_.247 __extDM_void.248 __extPM.249 __extPM_void.250 fir_lms_coeffs.251 fir_lms_delay_line.252 ptr_fir_lms_coeffs.253 ptr_fir_lms_coeffs_ptr_start.254 ptr_fir_lms_delay_line.255 ptr_fir_lms_delay_line_ptr_start.256 __vola.257) <219>; + (__tmp.264 var=140 stl=RA off=0 _ZL2mu.267 var=35 __extDM.268 var=32 __extDM_BufferPtr.269 var=41 __extDM_BufferPtrDMB.270 var=38 __extDM_SingleSignalPath.271 var=43 __extDM___PDMint32_.272 var=48 __extDM_int32_.273 var=36 __extDM_int64_.274 var=44 __extDM_void.275 var=45 __extPM.276 var=33 __extPM_void.277 var=46 delay_line.278 var=39 filter_coefficients.279 var=42 pointer_delay_line.280 var=37 pointer_delay_line_ptr_start.281 var=47 pointer_filter_coefficients.282 var=40 pointer_filter_coefficients_ptr_start.283 var=49 __vola.284 var=29) F_Z14sig_init_delayP16SingleSignalPathi (__link.263 acc_sensor_signal_t.258 delay_acc.259 _ZL2mu.240 __extDM.241 __extDM_BufferPtr.242 __extDM_BufferPtrDMB.243 __extDM_SingleSignalPath.244 __extDM___PDMint32_.245 __extDM_int32_.246 __extDM_int64_.247 __extDM_void.248 __extPM.249 __extPM_void.250 delay_line.251 filter_coefficients.252 pointer_delay_line.253 pointer_delay_line_ptr_start.254 pointer_filter_coefficients.255 pointer_filter_coefficients_ptr_start.256 __vola.257) <219>; } #12 off=9 #13 off=10 (__link.292 var=145) dmaddr__call_dmaddr_ (_Z15sig_init_weightP16SingleSignalPathdi.185) <229>; call { - (accSensorSignal.285 var=64 stl=A off=0) assign (accSensorSignal.68) <222>; + (acc_sensor_signal_t.285 var=64 stl=A off=0) assign (acc_sensor_signal_t.68) <222>; (weight_acc.286 var=70 stl=AX off=0) assign (weight_acc.86) <223>; (__ct.289 var=142 stl=RA off=0) assign (__ct_31.128) <226>; (__link.293 var=145 stl=LR off=0) assign (__link.292) <230>; - (_ZL2mu.294 var=35 __extDM.295 var=32 __extDM_BufferPtr.296 var=41 __extDM_BufferPtrDMB.297 var=38 __extDM_SingleSignalPath.298 var=43 __extDM___PDMint32_.299 var=48 __extDM_int32_.300 var=36 __extDM_int64_.301 var=44 __extDM_void.302 var=45 __extPM.303 var=33 __extPM_void.304 var=46 fir_lms_coeffs.305 var=42 fir_lms_delay_line.306 var=39 ptr_fir_lms_coeffs.307 var=40 ptr_fir_lms_coeffs_ptr_start.308 var=49 ptr_fir_lms_delay_line.309 var=37 ptr_fir_lms_delay_line_ptr_start.310 var=47 __vola.311 var=29) F_Z15sig_init_weightP16SingleSignalPathdi (__link.293 accSensorSignal.285 weight_acc.286 __ct.289 _ZL2mu.267 __extDM.268 __extDM_BufferPtr.269 __extDM_BufferPtrDMB.270 __extDM_SingleSignalPath.271 __extDM___PDMint32_.272 __extDM_int32_.273 __extDM_int64_.274 __extDM_void.275 __extPM.276 __extPM_void.277 fir_lms_coeffs.278 fir_lms_delay_line.279 ptr_fir_lms_coeffs.280 ptr_fir_lms_coeffs_ptr_start.281 ptr_fir_lms_delay_line.282 ptr_fir_lms_delay_line_ptr_start.283 __vola.284) <231>; + (_ZL2mu.294 var=35 __extDM.295 var=32 __extDM_BufferPtr.296 var=41 __extDM_BufferPtrDMB.297 var=38 __extDM_SingleSignalPath.298 var=43 __extDM___PDMint32_.299 var=48 __extDM_int32_.300 var=36 __extDM_int64_.301 var=44 __extDM_void.302 var=45 __extPM.303 var=33 __extPM_void.304 var=46 delay_line.305 var=39 filter_coefficients.306 var=42 pointer_delay_line.307 var=37 pointer_delay_line_ptr_start.308 var=47 pointer_filter_coefficients.309 var=40 pointer_filter_coefficients_ptr_start.310 var=49 __vola.311 var=29) F_Z15sig_init_weightP16SingleSignalPathdi (__link.293 acc_sensor_signal_t.285 weight_acc.286 __ct.289 _ZL2mu.267 __extDM.268 __extDM_BufferPtr.269 __extDM_BufferPtrDMB.270 __extDM_SingleSignalPath.271 __extDM___PDMint32_.272 __extDM_int32_.273 __extDM_int64_.274 __extDM_void.275 __extPM.276 __extPM_void.277 delay_line.278 filter_coefficients.279 pointer_delay_line.280 pointer_delay_line_ptr_start.281 pointer_filter_coefficients.282 pointer_filter_coefficients_ptr_start.283 __vola.284) <231>; } #14 off=11 #474 off=12 (__ct_4746794007244308480.312 var=146) const () <232>; @@ -340,36 +340,36 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi { } #481 off=15 #471 off=16 (__ptr_mu.49 var=52) const () <73>; - (__ptr_ptr_fir_lms_delay_line.51 var=54) const () <75>; - (__ptr_fir_lms_delay_line.53 var=56) const () <77>; + (__ptr_pointer_delay_line.51 var=54) const () <75>; + (__ptr_delay_line.53 var=56) const () <77>; (__M_WDMA.316 var=11 _ZL2mu.317 var=35) store (__tmp.968 __ptr_mu.49 _ZL2mu.294) <236>; (__ct_64.321 var=150) const () <240>; - (_Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii.324 var=152) const () <243>; - (__link.326 var=154) dmaddr__call_dmaddr_ (_Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii.324) <245>; + (_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii.324 var=152) const () <243>; + (__link.326 var=154) dmaddr__call_dmaddr_ (_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii.324) <245>; call { - (__ptr_ptr_fir_lms_delay_line.318 var=53 stl=A off=4) assign (__ptr_ptr_fir_lms_delay_line.51) <237>; - (__ptr_fir_lms_delay_line.319 var=55 stl=A off=5) assign (__ptr_fir_lms_delay_line.53) <238>; - (lms_fir_num_coeffs.320 var=72 stl=RA off=1) assign (lms_fir_num_coeffs.92) <239>; + (__ptr_pointer_delay_line.318 var=53 stl=A off=4) assign (__ptr_pointer_delay_line.51) <237>; + (__ptr_delay_line.319 var=55 stl=A off=5) assign (__ptr_delay_line.53) <238>; + (number_coefficients.320 var=72 stl=RA off=1) assign (number_coefficients.92) <239>; (__ct.323 var=151 stl=RB off=0) assign (__ct_64.321) <242>; (__link.327 var=154 stl=LR off=0) assign (__link.326) <246>; - (__tmp.328 var=155 stl=RA off=0 _ZL2mu.331 var=35 __extDM.332 var=32 __extDM_BufferPtr.333 var=41 __extDM_BufferPtrDMB.334 var=38 __extDM_SingleSignalPath.335 var=43 __extDM___PDMint32_.336 var=48 __extDM_int32_.337 var=36 __extDM_int64_.338 var=44 __extDM_void.339 var=45 __extPM.340 var=33 __extPM_void.341 var=46 fir_lms_coeffs.342 var=42 fir_lms_delay_line.343 var=39 ptr_fir_lms_coeffs.344 var=40 ptr_fir_lms_coeffs_ptr_start.345 var=49 ptr_fir_lms_delay_line.346 var=37 ptr_fir_lms_delay_line_ptr_start.347 var=47 __vola.348 var=29) F_Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii (__link.327 __ptr_ptr_fir_lms_delay_line.318 __ptr_fir_lms_delay_line.319 lms_fir_num_coeffs.320 __ct.323 _ZL2mu.317 __extDM.295 __extDM_BufferPtr.296 __extDM_BufferPtrDMB.297 __extDM_SingleSignalPath.298 __extDM___PDMint32_.299 __extDM_int32_.300 __extDM_int64_.301 __extDM_void.302 __extPM.303 __extPM_void.304 fir_lms_coeffs.305 fir_lms_delay_line.306 ptr_fir_lms_coeffs.307 ptr_fir_lms_coeffs_ptr_start.308 ptr_fir_lms_delay_line.309 ptr_fir_lms_delay_line_ptr_start.310 __vola.311) <247>; + (__tmp.328 var=155 stl=RA off=0 _ZL2mu.331 var=35 __extDM.332 var=32 __extDM_BufferPtr.333 var=41 __extDM_BufferPtrDMB.334 var=38 __extDM_SingleSignalPath.335 var=43 __extDM___PDMint32_.336 var=48 __extDM_int32_.337 var=36 __extDM_int64_.338 var=44 __extDM_void.339 var=45 __extPM.340 var=33 __extPM_void.341 var=46 delay_line.342 var=39 filter_coefficients.343 var=42 pointer_delay_line.344 var=37 pointer_delay_line_ptr_start.345 var=47 pointer_filter_coefficients.346 var=40 pointer_filter_coefficients_ptr_start.347 var=49 __vola.348 var=29) F_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii (__link.327 __ptr_pointer_delay_line.318 __ptr_delay_line.319 number_coefficients.320 __ct.323 _ZL2mu.317 __extDM.295 __extDM_BufferPtr.296 __extDM_BufferPtrDMB.297 __extDM_SingleSignalPath.298 __extDM___PDMint32_.299 __extDM_int32_.300 __extDM_int64_.301 __extDM_void.302 __extPM.303 __extPM_void.304 delay_line.305 filter_coefficients.306 pointer_delay_line.307 pointer_delay_line_ptr_start.308 pointer_filter_coefficients.309 pointer_filter_coefficients_ptr_start.310 __vola.311) <247>; } #16 off=17 #17 off=18 - (__ptr_ptr_fir_lms_coeffs.55 var=58) const () <79>; - (__ptr_fir_lms_coeffs.57 var=60) const () <81>; - (_Z15sig_init_bufferP9BufferPtrPiii.355 var=158) const () <256>; - (__link.357 var=160) dmaddr__call_dmaddr_ (_Z15sig_init_bufferP9BufferPtrPiii.355) <258>; + (__ptr_pointer_filter_coefficients.55 var=58) const () <79>; + (__ptr_filter_coefficients.57 var=60) const () <81>; + (_Z17initialize_bufferP9BufferPtrPiii.355 var=158) const () <256>; + (__link.357 var=160) dmaddr__call_dmaddr_ (_Z17initialize_bufferP9BufferPtrPiii.355) <258>; call { - (__ptr_ptr_fir_lms_coeffs.349 var=57 stl=A off=0) assign (__ptr_ptr_fir_lms_coeffs.55) <250>; - (__ptr_fir_lms_coeffs.350 var=59 stl=A off=1) assign (__ptr_fir_lms_coeffs.57) <251>; - (lms_fir_num_coeffs.351 var=72 stl=RA off=1) assign (lms_fir_num_coeffs.92) <252>; + (__ptr_pointer_filter_coefficients.349 var=57 stl=A off=0) assign (__ptr_pointer_filter_coefficients.55) <250>; + (__ptr_filter_coefficients.350 var=59 stl=A off=1) assign (__ptr_filter_coefficients.57) <251>; + (number_coefficients.351 var=72 stl=RA off=1) assign (number_coefficients.92) <252>; (__ct.354 var=157 stl=RB off=0) assign (__ct_64.321) <255>; (__link.358 var=160 stl=LR off=0) assign (__link.357) <259>; - (__tmp.359 var=161 stl=RA off=0 _ZL2mu.362 var=35 __extDM.363 var=32 __extDM_BufferPtr.364 var=41 __extDM_BufferPtrDMB.365 var=38 __extDM_SingleSignalPath.366 var=43 __extDM___PDMint32_.367 var=48 __extDM_int32_.368 var=36 __extDM_int64_.369 var=44 __extDM_void.370 var=45 __extPM.371 var=33 __extPM_void.372 var=46 fir_lms_coeffs.373 var=42 fir_lms_delay_line.374 var=39 ptr_fir_lms_coeffs.375 var=40 ptr_fir_lms_coeffs_ptr_start.376 var=49 ptr_fir_lms_delay_line.377 var=37 ptr_fir_lms_delay_line_ptr_start.378 var=47 __vola.379 var=29) F_Z15sig_init_bufferP9BufferPtrPiii (__link.358 __ptr_ptr_fir_lms_coeffs.349 __ptr_fir_lms_coeffs.350 lms_fir_num_coeffs.351 __ct.354 _ZL2mu.331 __extDM.332 __extDM_BufferPtr.333 __extDM_BufferPtrDMB.334 __extDM_SingleSignalPath.335 __extDM___PDMint32_.336 __extDM_int32_.337 __extDM_int64_.338 __extDM_void.339 __extPM.340 __extPM_void.341 fir_lms_coeffs.342 fir_lms_delay_line.343 ptr_fir_lms_coeffs.344 ptr_fir_lms_coeffs_ptr_start.345 ptr_fir_lms_delay_line.346 ptr_fir_lms_delay_line_ptr_start.347 __vola.348) <260>; + (__tmp.359 var=161 stl=RA off=0 _ZL2mu.362 var=35 __extDM.363 var=32 __extDM_BufferPtr.364 var=41 __extDM_BufferPtrDMB.365 var=38 __extDM_SingleSignalPath.366 var=43 __extDM___PDMint32_.367 var=48 __extDM_int32_.368 var=36 __extDM_int64_.369 var=44 __extDM_void.370 var=45 __extPM.371 var=33 __extPM_void.372 var=46 delay_line.373 var=39 filter_coefficients.374 var=42 pointer_delay_line.375 var=37 pointer_delay_line_ptr_start.376 var=47 pointer_filter_coefficients.377 var=40 pointer_filter_coefficients_ptr_start.378 var=49 __vola.379 var=29) F_Z17initialize_bufferP9BufferPtrPiii (__link.358 __ptr_pointer_filter_coefficients.349 __ptr_filter_coefficients.350 number_coefficients.351 __ct.354 _ZL2mu.331 __extDM.332 __extDM_BufferPtr.333 __extDM_BufferPtrDMB.334 __extDM_SingleSignalPath.335 __extDM___PDMint32_.336 __extDM_int32_.337 __extDM_int64_.338 __extDM_void.339 __extPM.340 __extPM_void.341 delay_line.342 filter_coefficients.343 pointer_delay_line.344 pointer_delay_line_ptr_start.345 pointer_filter_coefficients.346 pointer_filter_coefficients_ptr_start.347 __vola.348) <260>; } #18 off=19 #466 off=20 (__ct_0.103 var=78) const () <127>; - (__tmp.947 var=262) uint3__cmp_int72__int72_ (lms_fir_num_coeffs.92 __ct_0.103) <989>; + (__tmp.947 var=262) uint3__cmp_int72__int72_ (number_coefficients.92 __ct_0.103) <989>; (__tmp.975 var=164) bool_nplus_uint3_ (__tmp.947) <1098>; (__trgt.978 var=286) const () <1126>; () void_jump_bool_int10_ (__tmp.975 __trgt.978) <1127>; @@ -386,11 +386,11 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi { } #27 off=24 { #34 off=21 - (__fch_ptr_fir_lms_delay_line_ptr_start.467 var=170) load (__M_WDMB.10 __ptr_ptr_fir_lms_delay_line__a4.664 ptr_fir_lms_delay_line_ptr_start.378) <352>; - (__fch_ptr_fir_lms_coeffs_ptr_start.482 var=180) load (__M_WDMA.9 __ptr_ptr_fir_lms_coeffs__a4.665 ptr_fir_lms_coeffs_ptr_start.376) <363>; - (__cv.649 var=205) uint16__uint16____sint (lms_fir_num_coeffs.92) <558>; - (__ptr_ptr_fir_lms_delay_line__a4.664 var=213) const () <574>; - (__ptr_ptr_fir_lms_coeffs__a4.665 var=214) const () <576>; + (__fch_pointer_delay_line_ptr_start.467 var=170) load (__M_WDMB.10 __ptr_pointer_delay_line__a4.664 pointer_delay_line_ptr_start.376) <352>; + (__fch_pointer_filter_coefficients_ptr_start.482 var=180) load (__M_WDMA.9 __ptr_pointer_filter_coefficients__a4.665 pointer_filter_coefficients_ptr_start.378) <363>; + (__cv.649 var=205) uint16__uint16____sint (number_coefficients.92) <558>; + (__ptr_pointer_delay_line__a4.664 var=213) const () <574>; + (__ptr_pointer_filter_coefficients__a4.665 var=214) const () <576>; (__ct_4.936 var=250) const () <969>; (__trgt.981 var=288) const () <1132>; () void_doloop_uint16__uint16_ (__cv.649 __trgt.981) <1133>; @@ -399,14 +399,14 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi { { (_ZL2mu.429 var=35) entry (_ZL2mu.508 _ZL2mu.362) <314>; (__extDM_int32_.430 var=36) entry (__extDM_int32_.510 __extDM_int32_.368) <315>; - (fir_lms_delay_line.433 var=39) entry (fir_lms_delay_line.516 fir_lms_delay_line.374) <318>; - (fir_lms_coeffs.436 var=42) entry (fir_lms_coeffs.522 fir_lms_coeffs.373) <321>; - (__iv1_i.635 var=201) entry (__iv1_i.636 __fch_ptr_fir_lms_delay_line_ptr_start.467) <545>; - (__iv2_i.640 var=202) entry (__iv2_i.641 __fch_ptr_fir_lms_coeffs_ptr_start.482) <549>; + (delay_line.433 var=39) entry (delay_line.516 delay_line.373) <318>; + (filter_coefficients.436 var=42) entry (filter_coefficients.522 filter_coefficients.374) <321>; + (__iv1_i.635 var=201) entry (__iv1_i.636 __fch_pointer_delay_line_ptr_start.467) <545>; + (__iv2_i.640 var=202) entry (__iv2_i.641 __fch_pointer_filter_coefficients_ptr_start.482) <549>; } #24 { - (__M_WDMB.472 var=12 _ZL2mu.473 var=35 __extDM_int32_.474 var=36 fir_lms_coeffs.475 var=42 fir_lms_delay_line.476 var=39) store (__ct_0.103 __iv1_i.635 _ZL2mu.429 __extDM_int32_.430 fir_lms_coeffs.436 fir_lms_delay_line.433) <357>; - (__M_WDMA.487 var=11 _ZL2mu.488 var=35 __extDM_int32_.489 var=36 fir_lms_coeffs.490 var=42 fir_lms_delay_line.491 var=39) store (__ct_0.103 __iv2_i.640 _ZL2mu.473 __extDM_int32_.474 fir_lms_coeffs.475 fir_lms_delay_line.476) <368>; + (__M_WDMB.472 var=12 _ZL2mu.473 var=35 __extDM_int32_.474 var=36 delay_line.475 var=39 filter_coefficients.476 var=42) store (__ct_0.103 __iv1_i.635 _ZL2mu.429 __extDM_int32_.430 delay_line.433 filter_coefficients.436) <357>; + (__M_WDMA.487 var=11 _ZL2mu.488 var=35 __extDM_int32_.489 var=36 delay_line.490 var=39 filter_coefficients.491 var=42) store (__ct_0.103 __iv2_i.640 _ZL2mu.473 __extDM_int32_.474 delay_line.475 filter_coefficients.476) <368>; (__rt.723 var=217) __Pvoid__pl___Pvoid_int18_ (__iv1_i.635 __ct_4.936) <673>; (__rt.745 var=217) __Pvoid__pl___Pvoid_int18_ (__iv2_i.640 __ct_4.936) <701>; } #256 off=22 @@ -414,8 +414,8 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi { () for_count (__vcnt.982) <373>; (_ZL2mu.508 var=35 _ZL2mu.509 var=35) exit (_ZL2mu.488) <380>; (__extDM_int32_.510 var=36 __extDM_int32_.511 var=36) exit (__extDM_int32_.489) <381>; - (fir_lms_delay_line.516 var=39 fir_lms_delay_line.517 var=39) exit (fir_lms_delay_line.491) <384>; - (fir_lms_coeffs.522 var=42 fir_lms_coeffs.523 var=42) exit (fir_lms_coeffs.490) <387>; + (delay_line.516 var=39 delay_line.517 var=39) exit (delay_line.490) <384>; + (filter_coefficients.522 var=42 filter_coefficients.523 var=42) exit (filter_coefficients.491) <387>; (__iv1_i.636 var=201 __iv1_i.637 var=201) exit (__rt.723) <546>; (__iv2_i.641 var=202 __iv2_i.642 var=202) exit (__rt.745) <550>; } #26 @@ -424,8 +424,8 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi { { (_ZL2mu.574 var=35) merge (_ZL2mu.362 _ZL2mu.509) <413>; (__extDM_int32_.575 var=36) merge (__extDM_int32_.368 __extDM_int32_.511) <414>; - (fir_lms_delay_line.576 var=39) merge (fir_lms_delay_line.374 fir_lms_delay_line.517) <415>; - (fir_lms_coeffs.577 var=42) merge (fir_lms_coeffs.373 fir_lms_coeffs.523) <416>; + (delay_line.576 var=39) merge (delay_line.373 delay_line.517) <415>; + (filter_coefficients.577 var=42) merge (filter_coefficients.374 filter_coefficients.523) <416>; } #28 } #20 #30 off=25 nxt=-2 @@ -438,180 +438,180 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi { () sink (__sp.585) <430>; () sink (_ZL2mu.574) <431>; () sink (__extDM_int32_.575) <432>; - () sink (ptr_fir_lms_delay_line.377) <433>; + () sink (pointer_delay_line.375) <433>; () sink (__extDM_BufferPtrDMB.365) <434>; - () sink (fir_lms_delay_line.576) <435>; - () sink (ptr_fir_lms_coeffs.375) <436>; + () sink (delay_line.576) <435>; + () sink (pointer_filter_coefficients.377) <436>; () sink (__extDM_BufferPtr.364) <437>; - () sink (fir_lms_coeffs.577) <438>; + () sink (filter_coefficients.577) <438>; () sink (__extDM_SingleSignalPath.366) <439>; () sink (__extDM_int64_.369) <440>; () sink (__extDM_void.370) <441>; () sink (__extPM_void.372) <442>; - () sink (ptr_fir_lms_delay_line_ptr_start.378) <443>; + () sink (pointer_delay_line_ptr_start.376) <443>; () sink (__extDM___PDMint32_.367) <444>; - () sink (ptr_fir_lms_coeffs_ptr_start.376) <445>; + () sink (pointer_filter_coefficients_ptr_start.378) <445>; () sink (__ct_0.59) <446>; (__rt.701 var=217) __Pvoid__pl___Pvoid_int18_ (__rd___sp.580 __ct_0s0.935) <645>; (__ct_0s0.935 var=249) const () <967>; } #0 0 : 'signal_processing\\signal_path.c'; ---------- -0 : (0,303:0,0); -4 : (0,318:4,2); -5 : (0,319:34,3); -6 : (0,319:4,3); -7 : (0,320:45,4); -8 : (0,320:4,4); -10 : (0,323:4,5); -11 : (0,324:36,6); -12 : (0,324:4,6); -13 : (0,325:49,7); -14 : (0,325:4,7); -16 : (0,331:4,10); -17 : (0,332:77,11); -18 : (0,332:4,11); -20 : (0,335:4,13); -22 : (0,335:4,14); -23 : (0,335:4,14); -27 : (0,335:4,22); -30 : (0,339:0,25); -256 : (0,335:49,14); -276 : (0,318:4,2); -370 : (0,323:4,5); -466 : (0,335:4,13); -471 : (0,331:4,10); -474 : (0,329:16,9); -475 : (0,329:16,9); -480 : (0,329:7,9); -481 : (0,329:7,9); +0 : (0,306:0,0); +4 : (0,321:4,2); +5 : (0,322:38,3); +6 : (0,322:4,3); +7 : (0,323:49,4); +8 : (0,323:4,4); +10 : (0,326:4,5); +11 : (0,327:40,6); +12 : (0,327:4,6); +13 : (0,328:53,7); +14 : (0,328:4,7); +16 : (0,334:4,10); +17 : (0,335:94,11); +18 : (0,335:4,11); +20 : (0,338:4,13); +22 : (0,338:4,14); +23 : (0,338:4,14); +27 : (0,338:4,22); +30 : (0,342:0,25); +256 : (0,338:50,14); +276 : (0,321:4,2); +370 : (0,326:4,5); +466 : (0,338:4,13); +471 : (0,334:4,10); +474 : (0,332:16,9); +475 : (0,332:16,9); +480 : (0,332:7,9); +481 : (0,332:7,9); ---------- -77 : (0,331:49,0); -81 : (0,332:41,0); -118 : (0,303:5,0); -122 : (0,303:5,0); -126 : (0,318:26,0); -127 : (0,318:45,0); -130 : (0,318:44,2); -131 : (0,318:44,0); -135 : (0,318:52,2); -136 : (0,318:52,0); -140 : (0,318:60,2); -141 : (0,318:60,0); -145 : (0,318:68,2); -146 : (0,318:68,0); -150 : (0,318:76,2); -151 : (0,318:76,0); -152 : (0,318:81,0); -154 : (0,318:81,0); -157 : (0,318:4,2); -158 : (0,318:4,0); -159 : (0,318:4,2); -160 : (0,319:19,0); -161 : (0,319:34,0); -164 : (0,319:4,3); -165 : (0,319:4,0); -166 : (0,319:4,3); -169 : (0,320:20,0); -170 : (0,320:35,0); -173 : (0,320:45,0); -176 : (0,320:4,4); -177 : (0,320:4,0); -178 : (0,320:4,4); -179 : (0,323:26,0); -183 : (0,323:48,5); -184 : (0,323:48,0); -188 : (0,323:58,5); -189 : (0,323:58,0); -193 : (0,323:68,5); -194 : (0,323:68,0); -198 : (0,323:78,5); -199 : (0,323:78,0); -203 : (0,323:88,5); -204 : (0,323:88,0); -207 : (0,323:93,0); -210 : (0,323:4,5); -211 : (0,323:4,0); -212 : (0,323:4,5); -213 : (0,324:19,0); -214 : (0,324:36,0); -217 : (0,324:4,6); -218 : (0,324:4,0); -219 : (0,324:4,6); -222 : (0,325:20,0); -223 : (0,325:37,0); -226 : (0,325:49,0); -229 : (0,325:4,7); -230 : (0,325:4,0); -231 : (0,325:4,7); -232 : (0,329:16,0); -236 : (0,329:4,9); -237 : (0,331:24,0); -238 : (0,331:49,0); -239 : (0,331:69,0); -240 : (0,331:89,0); -242 : (0,331:89,0); -245 : (0,331:4,10); -246 : (0,331:4,0); -247 : (0,331:4,10); -250 : (0,332:20,0); -251 : (0,332:41,0); -252 : (0,332:57,0); -255 : (0,332:77,0); -258 : (0,332:4,11); -259 : (0,332:4,0); -260 : (0,332:4,11); -306 : (0,335:4,13); -314 : (0,335:4,14); -315 : (0,335:4,14); -318 : (0,335:4,14); -321 : (0,335:4,14); -352 : (0,336:30,14); -357 : (0,336:40,14); -363 : (0,337:26,15); -368 : (0,337:36,15); -373 : (0,335:4,20); -380 : (0,335:4,20); -381 : (0,335:4,20); -384 : (0,335:4,20); -387 : (0,335:4,20); -413 : (0,335:4,24); -414 : (0,335:4,24); -415 : (0,335:4,24); -416 : (0,335:4,24); -419 : (0,339:0,0); -423 : (0,339:0,25); -424 : (0,339:0,25); -574 : (0,336:30,0); -576 : (0,337:26,0); -617 : (0,303:5,0); -645 : (0,339:0,0); -729 : (0,318:52,0); -757 : (0,318:60,0); -785 : (0,318:68,0); -813 : (0,318:76,0); -841 : (0,323:58,0); -869 : (0,323:68,0); -897 : (0,323:78,0); -925 : (0,323:88,0); -965 : (0,303:5,0); -967 : (0,339:0,0); -971 : (0,318:52,0); -989 : (0,335:4,13); -1022 : (0,329:16,0); -1023 : (0,329:16,9); -1024 : (0,329:16,9); -1025 : (0,329:16,9); -1026 : (0,329:16,9); -1027 : (0,329:16,9); -1028 : (0,329:16,9); -1034 : (0,329:7,0); -1035 : (0,329:7,9); -1036 : (0,329:7,9); -1037 : (0,329:7,9); -1038 : (0,329:7,9); -1039 : (0,329:7,9); -1098 : (0,335:4,13); -1127 : (0,335:4,13); -1133 : (0,335:4,20); +77 : (0,334:47,0); +81 : (0,335:52,0); +118 : (0,306:5,0); +122 : (0,306:5,0); +126 : (0,321:26,0); +127 : (0,321:49,0); +130 : (0,321:48,2); +131 : (0,321:48,0); +135 : (0,321:56,2); +136 : (0,321:56,0); +140 : (0,321:64,2); +141 : (0,321:64,0); +145 : (0,321:72,2); +146 : (0,321:72,0); +150 : (0,321:80,2); +151 : (0,321:80,0); +152 : (0,321:85,0); +154 : (0,321:85,0); +157 : (0,321:4,2); +158 : (0,321:4,0); +159 : (0,321:4,2); +160 : (0,322:19,0); +161 : (0,322:38,0); +164 : (0,322:4,3); +165 : (0,322:4,0); +166 : (0,322:4,3); +169 : (0,323:20,0); +170 : (0,323:39,0); +173 : (0,323:49,0); +176 : (0,323:4,4); +177 : (0,323:4,0); +178 : (0,323:4,4); +179 : (0,326:26,0); +183 : (0,326:52,5); +184 : (0,326:52,0); +188 : (0,326:62,5); +189 : (0,326:62,0); +193 : (0,326:72,5); +194 : (0,326:72,0); +198 : (0,326:82,5); +199 : (0,326:82,0); +203 : (0,326:92,5); +204 : (0,326:92,0); +207 : (0,326:97,0); +210 : (0,326:4,5); +211 : (0,326:4,0); +212 : (0,326:4,5); +213 : (0,327:19,0); +214 : (0,327:40,0); +217 : (0,327:4,6); +218 : (0,327:4,0); +219 : (0,327:4,6); +222 : (0,328:20,0); +223 : (0,328:41,0); +226 : (0,328:53,0); +229 : (0,328:4,7); +230 : (0,328:4,0); +231 : (0,328:4,7); +232 : (0,332:16,0); +236 : (0,332:4,9); +237 : (0,334:26,0); +238 : (0,334:47,0); +239 : (0,334:59,0); +240 : (0,334:80,0); +242 : (0,334:80,0); +245 : (0,334:4,10); +246 : (0,334:4,0); +247 : (0,334:4,10); +250 : (0,335:22,0); +251 : (0,335:52,0); +252 : (0,335:73,0); +255 : (0,335:94,0); +258 : (0,335:4,11); +259 : (0,335:4,0); +260 : (0,335:4,11); +306 : (0,338:4,13); +314 : (0,338:4,14); +315 : (0,338:4,14); +318 : (0,338:4,14); +321 : (0,338:4,14); +352 : (0,339:26,14); +357 : (0,339:36,14); +363 : (0,340:35,15); +368 : (0,340:45,15); +373 : (0,338:4,20); +380 : (0,338:4,20); +381 : (0,338:4,20); +384 : (0,338:4,20); +387 : (0,338:4,20); +413 : (0,338:4,24); +414 : (0,338:4,24); +415 : (0,338:4,24); +416 : (0,338:4,24); +419 : (0,342:0,0); +423 : (0,342:0,25); +424 : (0,342:0,25); +574 : (0,339:26,0); +576 : (0,340:35,0); +617 : (0,306:5,0); +645 : (0,342:0,0); +729 : (0,321:56,0); +757 : (0,321:64,0); +785 : (0,321:72,0); +813 : (0,321:80,0); +841 : (0,326:62,0); +869 : (0,326:72,0); +897 : (0,326:82,0); +925 : (0,326:92,0); +965 : (0,306:5,0); +967 : (0,342:0,0); +971 : (0,321:56,0); +989 : (0,338:4,13); +1022 : (0,332:16,0); +1023 : (0,332:16,9); +1024 : (0,332:16,9); +1025 : (0,332:16,9); +1026 : (0,332:16,9); +1027 : (0,332:16,9); +1028 : (0,332:16,9); +1034 : (0,332:7,0); +1035 : (0,332:7,9); +1036 : (0,332:7,9); +1037 : (0,332:7,9); +1038 : (0,332:7,9); +1039 : (0,332:7,9); +1098 : (0,338:4,13); +1127 : (0,338:4,13); +1133 : (0,338:4,20); diff --git a/simulation/Release/chesswork/signal_path-a30375.# b/simulation/Release/chesswork/signal_path-a30375.# index c1c3b10..a541092 100644 --- a/simulation/Release/chesswork/signal_path-a30375.# +++ b/simulation/Release/chesswork/signal_path-a30375.# @@ -1,10 +1,9 @@ 6bd14b3bc305504dd7bb9269fe30bf59aca75a76 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 42695db990e5aaff0b9f36d25938c80e96ce47cc -cd3d7a324e5803ca379119c6ac3a521de85c2d58 +7978c4fde2e165ab8cea94bf2437aaae6d84077c da39a3ee5e6b4b0d3255bfef95601890afd80709 -02bb82ee2ad0a49c939022d10fb51d620f2409d2 -194 -0 +24bfe3d58bd85ead61551a3ec54bade6a984b1b6 +201 0 0 diff --git a/simulation/Release/chesswork/signal_path-a30375.o b/simulation/Release/chesswork/signal_path-a30375.o index 7b4320335bfd056612d6bda7c7d482d5757617bf..b0bb1c7d3b99879047ab5911d483fe7c5195d204 100644 GIT binary patch delta 207 zcmZos`=UBQfw5(yq8W>jp;=~La#3n-YF_&dIU@>WsT4y9%f?{b8S+C!og4!NI`LK6xU)@Z>cD0*w8W_X?=9%5pL= zWP-*10L9uS^9ri7%5yO=ya9{(2nsN9a|4-TlS>2z7`Z363aT^mOoH0*vz~uN6>d)#YSh$OMbM0g6qV{1+&u&&9y-1}tVHD8MAm4P=T; (__M_WDMA.108 var=11 __extDM_SingleSignalPath_delay_buffer_buffer_len.109 var=38 __extDM_int32_.110 var=39) store (x.53 __fch___extDM_SingleSignalPath_delay_buffer_ptr_current.99 __extDM_SingleSignalPath_delay_buffer_buffer_len.36 __extDM_int32_.37) <133>; (__ct_1.115 var=82) const () <138>; - (_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri.118 var=84) const () <141>; - (__link.120 var=86) dmaddr__call_dmaddr_ (_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri.118) <143>; + (_Z16increment_bufferP9BufferPtri.118 var=84) const () <141>; + (__link.120 var=86) dmaddr__call_dmaddr_ (_Z16increment_bufferP9BufferPtri.118) <143>; (__rt.239 var=100) __Pvoid__pl___Pvoid_int18_ (__rt.217 __ct_8.300) <315>; (__rt.283 var=100) __Pvoid__mi___Pvoid_int18_ (__rt.239 __ct_8.300) <371>; (__ct_8.300 var=128) const () <407>; @@ -124,7 +124,7 @@ F_Z29sig_delay_buffer_load_and_getP16SingleSignalPathi { (__tmp.114 var=81 stl=A off=0) assign (__rt.283) <137>; (__ct.117 var=83 stl=RA off=0) assign (__ct_1.115) <140>; (__link.121 var=86 stl=LR off=0) assign (__link.120) <144>; - (__extDM.122 var=32 __extDM_BufferPtr.123 var=37 __extDM_SingleSignalPath.124 var=35 __extDM_SingleSignalPath_delay_buffer.125 var=36 __extDM_SingleSignalPath_delay_buffer_buffer_len.126 var=38 __extDM_SingleSignalPath_delay_buffer_ptr_current.127 var=40 __extDM___PDMint32_.128 var=41 __extDM_int32_.129 var=39 __extDM_void.130 var=42 __extPM.131 var=33 __extPM_void.132 var=43 __vola.133 var=29) F_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri (__link.121 __tmp.114 __ct.117 __extDM.30 __extDM_BufferPtr.35 __extDM_SingleSignalPath.33 __extDM_SingleSignalPath_delay_buffer.34 __extDM_SingleSignalPath_delay_buffer_buffer_len.109 __extDM_SingleSignalPath_delay_buffer_ptr_current.38 __extDM___PDMint32_.39 __extDM_int32_.110 __extDM_void.40 __extPM.31 __extPM_void.41 __vola.27) <145>; + (__extDM.122 var=32 __extDM_BufferPtr.123 var=37 __extDM_SingleSignalPath.124 var=35 __extDM_SingleSignalPath_delay_buffer.125 var=36 __extDM_SingleSignalPath_delay_buffer_buffer_len.126 var=38 __extDM_SingleSignalPath_delay_buffer_ptr_current.127 var=40 __extDM___PDMint32_.128 var=41 __extDM_int32_.129 var=39 __extDM_void.130 var=42 __extPM.131 var=33 __extPM_void.132 var=43 __vola.133 var=29) F_Z16increment_bufferP9BufferPtri (__link.121 __tmp.114 __ct.117 __extDM.30 __extDM_BufferPtr.35 __extDM_SingleSignalPath.33 __extDM_SingleSignalPath_delay_buffer.34 __extDM_SingleSignalPath_delay_buffer_buffer_len.109 __extDM_SingleSignalPath_delay_buffer_ptr_current.38 __extDM___PDMint32_.39 __extDM_int32_.110 __extDM_void.40 __extPM.31 __extPM_void.41 __vola.27) <145>; } #9 off=2 #231 off=3 (__trgt.316 var=146) const () <460>; @@ -171,56 +171,56 @@ F_Z29sig_delay_buffer_load_and_getP16SingleSignalPathi { } #0 0 : 'signal_processing\\signal_path.c'; ---------- -0 : (0,194:0,0); -4 : (0,195:4,1); -6 : (0,195:46,2); -7 : (0,196:8,5); -9 : (0,200:4,8); -12 : (0,201:4,13); -157 : (0,200:4,8); -228 : (0,195:40,1); +0 : (0,201:0,0); +4 : (0,202:4,1); +6 : (0,202:46,2); +7 : (0,203:8,5); +9 : (0,207:4,8); +12 : (0,208:4,13); +157 : (0,207:4,8); +228 : (0,202:40,1); ---------- -79 : (0,194:4,0); -83 : (0,194:4,0); -89 : (0,195:28,0); -92 : (0,195:28,1); -116 : (0,195:4,1); -124 : (0,198:35,6); -125 : (0,198:14,6); -133 : (0,199:4,7); -137 : (0,200:44,0); -138 : (0,200:60,0); -140 : (0,200:60,0); -143 : (0,200:4,8); -144 : (0,200:4,0); -145 : (0,200:4,8); -146 : (0,195:4,12); -147 : (0,195:4,12); -148 : (0,195:4,12); -149 : (0,195:4,12); -150 : (0,195:4,12); -151 : (0,195:4,12); -152 : (0,195:4,12); -153 : (0,195:4,12); -154 : (0,195:4,12); -155 : (0,195:4,12); -156 : (0,195:4,12); -157 : (0,195:4,12); -158 : (0,195:4,12); -160 : (0,201:4,0); -164 : (0,201:4,13); -165 : (0,201:4,13); -166 : (0,201:4,0); -259 : (0,194:4,0); -287 : (0,195:14,1); -315 : (0,198:35,6); -343 : (0,201:4,0); -371 : (0,195:14,0); -399 : (0,194:4,0); -401 : (0,195:14,0); -407 : (0,198:35,0); -411 : (0,201:4,0); -416 : (0,195:40,1); -417 : (0,195:40,1); -458 : (0,195:4,1); +79 : (0,201:4,0); +83 : (0,201:4,0); +89 : (0,202:28,0); +92 : (0,202:28,1); +116 : (0,202:4,1); +124 : (0,205:35,6); +125 : (0,205:14,6); +133 : (0,206:4,7); +137 : (0,207:28,0); +138 : (0,207:44,0); +140 : (0,207:44,0); +143 : (0,207:4,8); +144 : (0,207:4,0); +145 : (0,207:4,8); +146 : (0,202:4,12); +147 : (0,202:4,12); +148 : (0,202:4,12); +149 : (0,202:4,12); +150 : (0,202:4,12); +151 : (0,202:4,12); +152 : (0,202:4,12); +153 : (0,202:4,12); +154 : (0,202:4,12); +155 : (0,202:4,12); +156 : (0,202:4,12); +157 : (0,202:4,12); +158 : (0,202:4,12); +160 : (0,208:4,0); +164 : (0,208:4,13); +165 : (0,208:4,13); +166 : (0,208:4,0); +259 : (0,201:4,0); +287 : (0,202:14,1); +315 : (0,205:35,6); +343 : (0,208:4,0); +371 : (0,202:14,0); +399 : (0,201:4,0); +401 : (0,202:14,0); +407 : (0,205:35,0); +411 : (0,208:4,0); +416 : (0,202:40,1); +417 : (0,202:40,1); +458 : (0,202:4,1); diff --git a/simulation/Release/chesswork/signal_path-a3616e.# b/simulation/Release/chesswork/signal_path-a3616e.# new file mode 100644 index 0000000..d085e3c --- /dev/null +++ b/simulation/Release/chesswork/signal_path-a3616e.# @@ -0,0 +1,9 @@ +6bd14b3bc305504dd7bb9269fe30bf59aca75a76 +842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 +42695db990e5aaff0b9f36d25938c80e96ce47cc +9ad889ee1ba444664feee64735d6aa7318237ea3 +da39a3ee5e6b4b0d3255bfef95601890afd80709 +9c90b929ae300e2da5551831867a2244339af76d +126 +0 +0 diff --git a/simulation/Release/chesswork/signal_path-a3616e.o b/simulation/Release/chesswork/signal_path-a3616e.o new file mode 100644 index 0000000000000000000000000000000000000000..98d1e08954fe16f8a25f2c71848658c068f85300 GIT binary patch literal 4036 zcmd^BO>7%Q6rQ!cer}zbH0f_jirb{n7S~-n{)t1=CQka3wr)+`Kia@%ZLbpx|H->) zn+p}C5>i_WQmZ(IUwOZA(HN7|%D`wIet&}v!i>XW{6Eo83;&>(zFO8*B zh!m5FOk#XY@2X1IRx|QAv9XN?iggD{Z8T1N!yC==IW{siicj};wQMg<%;qLzE?~L` z$@U;~7hTYK3^d*q2$5+wl+R73oTL#1#+<-J0prBo$aF81?S*hn-7~LYtVCBVM5cS8 zY%hedx@YQosoAh>Ji6}fk)Czxl`bsGU4nG2vm#x$TGd)@-BcaVx~V#@byIa*YpKkl zF{#nUl(|wiYsQLh)tYwa=5zGUi_yoPK7RpyTd;XK$H#Jl>*JWpZgknes=}r?UKU`> zUACXy>#{eohh6q&_DI+=-!Eu8^J^H`kC^n|5eq(y*Z{*-sbBSb!n1+>;lTb#VCoFQ zfrWrad%Wph6m{RiW91187z?PsM>b1iuPE%V&=wp};iAavpxrFtEm&I@ES5TSQG9z~tmr~15iJ&K}UJ?amuL*Xd*Zbr?>?15`f6#_bT%NVZ|)TR@2K2XvNEIfzaD8I8A5;S(4;hAQ*_ik46H zKgGcdOxdbiz3hno#@-D3@GoO4ccfD6@w>lt;yhCAlFw!JBkr3cDcd>ufYkJf@#P?KWv2o7=#&^g_Cd!PQw|PgR_u>gP=hKjzAQSLJHC_4jG6+9L694 zhu|{I!<(=G2HXT4F2Gw*fJ^WO+<@014;SGIT!m|JeH(5BJufNrN(GXE9G0?ns#Xu$ zygYiH@9WIO{1wY=Tl1|Y{8^~YYnpz^Y&ETUEv3&E@_M0KU#{_wGftE$n>ll`P>6&J zD~)E$TCu`&jZ!3BZMDMJkHocjGODG*ku`l}JYgD%idKx3M&d~=rNx>1lfLoKk7d+b zH4{IBZ5um$m1xM{YF5jue-i)4+Rx#$=eGx=_kS<8js8jDRK^ZqTMI{bf!J%h3FLmG z%4Vq(KfH8Zuuar47NKr)=iQBwu2RPse_>Il13W>1;2$Sl@TnH!Q@op`3yw}Y;&cTK zk>0tq`TZ@fJVICbKGH=@{=$ejyBv7Wn(@-1dxT$ef%K*Fe5qIN^Osa*Rh%ck&(~&vN*snsM<4KpY84 z5aVeVua3NnE)JQOT)Z!l_aix6LPyQHzK{RqIn|Np+*acK;hZSq-f_kI5Rc`0>wDnh z{e-+jB8GGL2n{+)Qnug&r{_g$!AHY|?9Z?{dApH!A2H&|XGy#-T)a<^w}2S&Wa-5F z8k;lTGvv|hL_G1f@O6Ce;%%qND8$2(xDfO^wyTMORtI5>c$80`C&J186Pw}S4I^)q WoDQLQ_y@$w4&F3^^eQ@q?0*2dwcsHD literal 0 HcmV?d00001 diff --git a/simulation/Release/chesswork/signal_path-a3616e.sfg b/simulation/Release/chesswork/signal_path-a3616e.sfg new file mode 100644 index 0000000..630a1e2 --- /dev/null +++ b/simulation/Release/chesswork/signal_path-a3616e.sfg @@ -0,0 +1,118 @@ + +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026 +// Copyright 2014-2025 Synopsys, Inc. All rights reserved. +// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 + + +/*** +!! void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int) +F_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi : user_defined, called { + fnm : "write_buffer_dmb" 'void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int)'; + arg : ( dmaddr_:i dmaddr_:i int32_:i ); + loc : ( LR[0] A[4] RA[0] ); + vac : ( srIM[0] ); + frm : ( ); +} +**** +***/ + +[ + 0 : _Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi typ=uint20_ bnd=e stl=PM tref=void_____PDMBBufferPtrDMB___sint__ + 12 : __M_WDMB typ=int32_ bnd=d stl=WDMB + 26 : __R_SP typ=dmaddr_ bnd=d stl=SP + 34 : __sp typ=dmaddr_ bnd=b stl=SP + 36 : __extDM_BufferPtrDMB_ptr_current typ=int8_ bnd=b stl=DM + 38 : __extDM_BufferPtrDMB_ptr_start typ=int8_ bnd=b stl=DM + 39 : __extDM_BufferPtrDMB_buffer_len typ=int8_ bnd=b stl=DM + 40 : __extDM_int32_ typ=int8_ bnd=b stl=DM + 41 : __rd___sp typ=dmaddr_ bnd=m + 42 : __ct_0 typ=uint1_ val=0f bnd=m + 43 : __la typ=dmaddr_ bnd=p tref=dmaddr___ + 44 : buffer typ=dmaddr_ bnd=p tref=__PDMBBufferPtrDMB__ + 45 : sample typ=int32_ bnd=p tref=__sint__ + 52 : __fch___extDM_BufferPtrDMB_ptr_current typ=dmaddr_ bnd=m + 62 : __fch___extDM_BufferPtrDMB_ptr_start typ=dmaddr_ bnd=m + 66 : __fch___extDM_BufferPtrDMB_buffer_len typ=int32_ bnd=m + 70 : __tmp typ=dmaddr_ bnd=m + 89 : __ct_4 typ=int18_ val=4f bnd=m + 94 : __ct_2 typ=int32_ val=2f bnd=m + 97 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__ + 122 : __ct_0S0 typ=int18_ val=0S0 bnd=m + 123 : __ct_8 typ=int18_ val=8f bnd=m + 126 : __ct_0s0 typ=int18_ val=0s0 bnd=m + 131 : __ct_2 typ=uint2_ val=2f bnd=m + 135 : __tmp typ=int18_ bnd=m +] +F_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi { + (__M_WDMB.10 var=12) st_def () <20>; + (__R_SP.24 var=26) st_def () <48>; + (__sp.32 var=34) source () <56>; + (__extDM_BufferPtrDMB_ptr_current.34 var=36) source () <58>; + (__extDM_BufferPtrDMB_ptr_start.36 var=38) source () <60>; + (__extDM_BufferPtrDMB_buffer_len.37 var=39) source () <61>; + (__extDM_int32_.38 var=40) source () <62>; + (__ct_0.40 var=42) const () <64>; + (__la.42 var=43 stl=LR off=0) inp () <66>; + (__la.43 var=43) deassign (__la.42) <67>; + (buffer.45 var=44 stl=A off=4) inp () <69>; + (buffer.46 var=44) deassign (buffer.45) <70>; + (sample.48 var=45 stl=RA off=0) inp () <72>; + (sample.49 var=45) deassign (sample.48) <73>; + (__rd___sp.51 var=41) rd_res_reg (__R_SP.24 __sp.32) <75>; + (__R_SP.55 var=26 __sp.56 var=34) wr_res_reg (__rt.140 __sp.32) <79>; + (__fch___extDM_BufferPtrDMB_ptr_current.60 var=52) load (__M_WDMB.10 __rt.162 __extDM_BufferPtrDMB_ptr_current.34) <84>; + (__M_WDMB.61 var=12 __extDM_BufferPtrDMB_buffer_len.62 var=39 __extDM_int32_.63 var=40) store (sample.49 __fch___extDM_BufferPtrDMB_ptr_current.60 __extDM_BufferPtrDMB_buffer_len.37 __extDM_int32_.38) <85>; + (__fch___extDM_BufferPtrDMB_ptr_start.73 var=62) load (__M_WDMB.10 __rt.206 __extDM_BufferPtrDMB_ptr_start.36) <95>; + (__fch___extDM_BufferPtrDMB_buffer_len.77 var=66) load (__M_WDMB.10 __rt.228 __extDM_BufferPtrDMB_buffer_len.62) <99>; + (__M_WDMB.85 var=12 __extDM_BufferPtrDMB_ptr_current.86 var=36) store (__tmp.116 __rt.250 __extDM_BufferPtrDMB_ptr_current.34) <107>; + (__rd___sp.87 var=41) rd_res_reg (__R_SP.24 __sp.56) <108>; + (__R_SP.91 var=26 __sp.92 var=34) wr_res_reg (__rt.184 __sp.56) <112>; + () void_ret_dmaddr_ (__la.43) <113>; + () sink (__sp.92) <119>; + () sink (__extDM_BufferPtrDMB_ptr_current.86) <121>; + () sink (__extDM_BufferPtrDMB_buffer_len.62) <124>; + () sink (__extDM_int32_.63) <125>; + () sink (__ct_0.40) <126>; + (__tmp.116 var=70) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch___extDM_BufferPtrDMB_ptr_current.60 __ct_4.120 __fch___extDM_BufferPtrDMB_ptr_start.73 __tmp.272) <159>; + (__ct_4.120 var=89) const () <173>; + (__ct_2.126 var=94) const () <181>; + (__rt.140 var=97) __Pvoid__pl___Pvoid_int18_ (__rd___sp.51 __ct_0S0.263) <208>; + (__rt.162 var=97) __Pvoid__pl___Pvoid_int18_ (buffer.46 __ct_8.264) <236>; + (__rt.184 var=97) __Pvoid__pl___Pvoid_int18_ (__rd___sp.87 __ct_0s0.267) <264>; + (__rt.206 var=97) __Pvoid__mi___Pvoid_int18_ (__rt.162 __ct_4.120) <292>; + (__rt.228 var=97) __Pvoid__mi___Pvoid_int18_ (__rt.206 __ct_4.120) <320>; + (__rt.250 var=97) __Pvoid__pl___Pvoid_int18_ (__rt.228 __ct_8.264) <348>; + (__ct_0S0.263 var=122) const () <375>; + (__ct_8.264 var=123) const () <377>; + (__ct_0s0.267 var=126) const () <383>; + (__ct_2.271 var=131) const () <390>; + (__tmp.272 var=135) int72__shift_int72__int72__uint2_ (__fch___extDM_BufferPtrDMB_buffer_len.77 __ct_2.126 __ct_2.271) <391>; +} #5 off=0 nxt=-2 +0 : 'signal_processing\\signal_path.c'; +---------- +5 : (0,126:0,3); +---------- +75 : (0,123:5,0); +79 : (0,123:5,0); +84 : (0,124:11,1); +85 : (0,124:4,1); +95 : (0,125:67,2); +99 : (0,125:86,2); +107 : (0,125:10,2); +108 : (0,126:0,0); +112 : (0,126:0,3); +113 : (0,126:0,3); +159 : (0,125:26,2); +173 : (0,125:26,0); +181 : (0,125:86,0); +208 : (0,123:5,0); +236 : (0,124:11,1); +264 : (0,126:0,0); +292 : (0,125:67,0); +348 : (0,124:11,0); +375 : (0,123:5,0); +377 : (0,124:11,0); +383 : (0,126:0,0); +390 : (0,125:86,0); +391 : (0,125:86,2); + diff --git a/simulation/Release/chesswork/signal_path-a56564.# b/simulation/Release/chesswork/signal_path-a56564.# new file mode 100644 index 0000000..f26cba2 --- /dev/null +++ b/simulation/Release/chesswork/signal_path-a56564.# @@ -0,0 +1,10 @@ +6bd14b3bc305504dd7bb9269fe30bf59aca75a76 +842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 +42695db990e5aaff0b9f36d25938c80e96ce47cc +db34611342e1538c3b1bd0fe59ff9cc094c92226 +da39a3ee5e6b4b0d3255bfef95601890afd80709 +a925e1abfca6baaae77c5b7c516b24566d18dad0 +89 +0 +2 +2 diff --git a/simulation/Release/chesswork/signal_path-a56564.o b/simulation/Release/chesswork/signal_path-a56564.o new file mode 100644 index 0000000000000000000000000000000000000000..abb6d60cae7040c738f2fb6631e20337c8f7ae27 GIT binary patch literal 5672 zcmeHKU2Ggz6~41OyJzinHt|pE&_LP738cj_yX*b2lP3O&-PB3knz%{ZU^14@c=IsLPFvJ@xVh7l|V=!#0y2DAn~K}oxAt0 zXV?3}N)azyY36?CyWgC1@0mOI-g#m9(qo2U2wfQMSwh?yX|-fU65xaw=hms_cGLHK zy9lJ~-Kw;G=cX^F%1&`-%c{6FM`O3PS=ZPu7Cq;Nwkq|KhMS&UZ9n1JwJoQqn-E9C z#!j&YUAqakzuREjb1HU6>;Tc~K!A{O1GWktU~~`sl3#UN!}I*69HvvR$hx%cG@BgV zuGQ+k?Ys3F^P=f))$EGZu>I|+lCZ92(r(T5UAyAma;)Oc=BDFW|MsZ=RDQ!Gs9X47Rmn@$(=nSwKu$xhE&9V50}qXYxVO z1c>P%acUiYGTqF=erj<)g+6sY`80fGJA8pz*iS9)r{JseNy{qLYfT@^Tz7hOOONsD zCJd^32)e09k1VU%a4VIbp;|3HL$#WEhH5qKg>s7anG`3cEJ4|+*t=G^f1ngxv<{W7Mue5;3 zgBwA75x$d*+!+(e6*HNSUH^UTx)V*J?LJ&6u@kq##&^x+u<`2c$lKBI>+}4`>+@em zn<)yo8;1C2;s7cDSq!~ZdG!)@Z@0G9y6KuSt zj3SKak700B)e$+>=%*mfNbKjRh6a9(`#TVcfjNtl~IV}(2k&A zW?ZyDBqG9zmC+EMie@Fu#2+1+8=5qjqGO=q@w3QEY!p7@00Rf4YzA=fplqH#z`kYS zA&11BRb>XbTsLQkr}k4C)C?+O~VdP@Dp;bX==qz2N zOY{I8p~Lhcx}U~rjP9eOG(kyvh#sVm(ue6IB*>r;g~_A{MTzJb9jA}c$LSIJ1f8PO zG)MEaK#O#UhG~RG=^QQ5GCfA;>2X@23$#inC`FTWlBVdBl&1pC&@81XL(`O{hv_NW zpwG~Cvgy-g(G&C>tT5lR4SjG+`|(yS;x+9ri$s(L?)NYr!u1FvHac~8Cu7F zp-%t!kMMlUE|*2cscre&qH5pNe+FQ1`tf|+usr!9_&=bZXHCQR@Z$hK5|ws5&w*M! zWLaxB>Ms8x^saUK|NlZ-zhnRN7lLgFOA;5}FCIjFFa8^4fCb$5Lhxh0Z%TijvE0yv zkSiyS2JB~zc|Inf$i-Ok*O=hr3(9kR!$!&a3S-3Le(fsEo8ij}^IrHhg^Q@a%~{FEUnndr4vDf5BM2yI(SH%?3HV-(kEwCUjlA$znFx z_nWxd3E-E+4g7Ms<|`J!oCM9YC+&ze@8cn@mB~VC+5RsIyHoE)K9$A&D3hva$o&rL zuA(6>-=tQyYR-kqfh24aVjf!NRG#F#JOZ12YZu=_zxk-Di}vvl2-fNH4s@?*BT%0N z4(c4_BNil-cD74bMNYpI@S`DrK*7iV3f*1Z7^rzt1$DQPsNV+KHMF{P+nAueN)==< z&#apW66&FwsDp98g30;W9u9AJ>HY@Yau40t!SOWH)C*A96Gs3u|O592?GBe!Vc)t&^@XJs^++Z(3JzaDs;&% I9a1I!1HC*zlmGw# literal 0 HcmV?d00001 diff --git a/simulation/Release/chesswork/signal_path-a56564.sfg b/simulation/Release/chesswork/signal_path-a56564.sfg new file mode 100644 index 0000000..5460947 --- /dev/null +++ b/simulation/Release/chesswork/signal_path-a56564.sfg @@ -0,0 +1,216 @@ + +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026 +// Copyright 2014-2025 Synopsys, Inc. All rights reserved. +// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 + + +/*** +!! int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int) +F_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii : user_defined, called { + fnm : "initialize_buffer_dmb" 'int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)'; + arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i ); + loc : ( LR[0] RA[0] A[4] A[5] RA[1] RB[0] ); + vac : ( srIM[0] ); + frm : ( ); +} +**** +***/ + +[ + 0 : _Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii typ=uint20_ bnd=e stl=PM tref=__sint_____PDMBBufferPtrDMB___PDMB__sint___sint___sint__ + 12 : __M_WDMB typ=int32_ bnd=d stl=WDMB + 26 : __R_SP typ=dmaddr_ bnd=d stl=SP + 34 : __sp typ=dmaddr_ bnd=b stl=SP + 36 : __extDM_int32_ typ=int8_ bnd=b stl=DM + 37 : __extDM_BufferPtrDMB_buffer_len typ=int8_ bnd=b stl=DM + 38 : __extDM_BufferPtrDMB_ptr_start typ=int8_ bnd=b stl=DM + 40 : __extDM_BufferPtrDMB_ptr_current typ=int8_ bnd=b stl=DM + 41 : __rd___sp typ=dmaddr_ bnd=m + 42 : __ct_0 typ=uint1_ val=0f bnd=m + 43 : __la typ=dmaddr_ bnd=p tref=dmaddr___ + 44 : __rt typ=int32_ bnd=p tref=__sint__ + 45 : buffer typ=dmaddr_ bnd=p tref=__PDMBBufferPtrDMB__ + 46 : buffer_start_add typ=dmaddr_ bnd=p tref=__PDMB__sint__ + 47 : length typ=int32_ bnd=p tref=__sint__ + 48 : max_buffer_len typ=int32_ bnd=p tref=__sint__ + 54 : __ct_0 typ=int32_ val=0f bnd=m + 65 : __tmp typ=bool bnd=m + 72 : __ct_1 typ=int32_ val=1f bnd=m + 76 : __tmp typ=bool bnd=m + 92 : __iv1_i typ=dmaddr_ bnd=m + 95 : __cv typ=uint16_ bnd=m + 103 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__ + 127 : __ct_0S0 typ=int18_ val=0S0 bnd=m + 128 : __ct_0s0 typ=int18_ val=0s0 bnd=m + 129 : __ct_4 typ=int18_ val=4f bnd=m + 133 : __tmp typ=uint3_ bnd=m + 138 : __tmp typ=uint3_ bnd=m + 148 : __either typ=bool bnd=m + 149 : __trgt typ=int10_ val=0j bnd=m + 150 : __trgt typ=int10_ val=0j bnd=m + 151 : __trgt typ=int10_ val=0j bnd=m + 152 : __trgt typ=int10_ val=0j bnd=m + 153 : __trgt typ=uint16_ val=0j bnd=m + 154 : __vcnt typ=uint16_ bnd=m +] +F_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii { + #239 off=0 + (__R_SP.24 var=26) st_def () <48>; + (__sp.32 var=34) source () <56>; + (__extDM_int32_.34 var=36) source () <58>; + (__extDM_BufferPtrDMB_buffer_len.35 var=37) source () <59>; + (__extDM_BufferPtrDMB_ptr_start.36 var=38) source () <60>; + (__extDM_BufferPtrDMB_ptr_current.38 var=40) source () <62>; + (__ct_0.40 var=42) const () <64>; + (__la.42 var=43 stl=LR off=0) inp () <66>; + (__la.43 var=43) deassign (__la.42) <67>; + (buffer.46 var=45 stl=A off=4) inp () <70>; + (buffer.47 var=45) deassign (buffer.46) <71>; + (buffer_start_add.49 var=46 stl=A off=5) inp () <73>; + (buffer_start_add.50 var=46) deassign (buffer_start_add.49) <74>; + (length.52 var=47 stl=RA off=1) inp () <76>; + (length.53 var=47) deassign (length.52) <77>; + (max_buffer_len.55 var=48 stl=RB off=0) inp () <79>; + (max_buffer_len.56 var=48) deassign (max_buffer_len.55) <80>; + (__rd___sp.58 var=41) rd_res_reg (__R_SP.24 __sp.32) <82>; + (__R_SP.62 var=26 __sp.63 var=34) wr_res_reg (__rt.274 __sp.32) <86>; + (__ct_0.66 var=54) const () <90>; + (__M_WDMB.69 var=12 __extDM_BufferPtrDMB_buffer_len.70 var=37) store (length.53 buffer.47 __extDM_BufferPtrDMB_buffer_len.35) <93>; + (__M_WDMB.74 var=12 __extDM_BufferPtrDMB_ptr_start.75 var=38) store (buffer_start_add.50 __rt.340 __extDM_BufferPtrDMB_ptr_start.36) <97>; + (__M_WDMB.79 var=12 __extDM_BufferPtrDMB_ptr_current.80 var=40) store (buffer_start_add.50 __rt.362 __extDM_BufferPtrDMB_ptr_current.38) <101>; + (__rt.274 var=103) __Pvoid__pl___Pvoid_int18_ (__rd___sp.58 __ct_0S0.375) <320>; + (__rt.340 var=103) __Pvoid__pl___Pvoid_int18_ (buffer.47 __ct_4.377) <404>; + (__rt.362 var=103) __Pvoid__pl___Pvoid_int18_ (__rt.340 __ct_4.377) <432>; + (__ct_0S0.375 var=127) const () <457>; + (__ct_4.377 var=129) const () <461>; + (__tmp.380 var=133) uint3__cmp_int72__int72_ (length.53 __ct_0.66) <466>; + (__tmp.393 var=65) bool_nplus_uint3_ (__tmp.380) <500>; + (__trgt.396 var=149) const () <511>; + () void_jump_bool_int10_ (__tmp.393 __trgt.396) <512>; + (__either.397 var=148) undefined () <513>; + if { + { + () if_expr (__either.397) <126>; + () chess_frequent_else () <127>; + () chess_rear_then () <514>; + } #5 + { + (__trgt.398 var=150) const () <515>; + () void_jump_int10_ (__trgt.398) <516>; + } #11 off=4 + { + #30 off=1 + (__cv.254 var=95) uint16__uint16____sint (length.53) <288>; + (__trgt.402 var=153) const () <522>; + () void_doloop_uint16__uint16_ (__cv.254 __trgt.402) <523>; + (__vcnt.403 var=154) undefined () <524>; + for { + { + (__extDM_int32_.112 var=36) entry (__extDM_int32_.152 __extDM_int32_.34) <135>; + (__extDM_BufferPtrDMB_buffer_len.113 var=37) entry (__extDM_BufferPtrDMB_buffer_len.154 __extDM_BufferPtrDMB_buffer_len.70) <136>; + (__iv1_i.245 var=92) entry (__iv1_i.246 buffer_start_add.50) <279>; + } #8 + { + (__M_WDMB.131 var=12 __extDM_BufferPtrDMB_buffer_len.132 var=37 __extDM_int32_.133 var=36) store (__ct_0.66 __iv1_i.245 __extDM_BufferPtrDMB_buffer_len.113 __extDM_int32_.112) <154>; + (__rt.318 var=103) __Pvoid__pl___Pvoid_int18_ (__iv1_i.245 __ct_4.377) <376>; + } #173 off=2 + { + () for_count (__vcnt.403) <159>; + (__extDM_int32_.152 var=36 __extDM_int32_.153 var=36) exit (__extDM_int32_.133) <167>; + (__extDM_BufferPtrDMB_buffer_len.154 var=37 __extDM_BufferPtrDMB_buffer_len.155 var=37) exit (__extDM_BufferPtrDMB_buffer_len.132) <168>; + (__iv1_i.246 var=92 __iv1_i.247 var=92) exit (__rt.318) <280>; + } #10 + } #7 rng=[1,65535] + } #6 + { + (__extDM_int32_.178 var=36) merge (__extDM_int32_.34 __extDM_int32_.153) <180>; + (__extDM_BufferPtrDMB_buffer_len.179 var=37) merge (__extDM_BufferPtrDMB_buffer_len.70 __extDM_BufferPtrDMB_buffer_len.155) <181>; + } #12 + } #4 + #242 off=5 + (__tmp.385 var=138) uint3__cmp_int72__int72_ (length.53 max_buffer_len.56) <474>; + (__tmp.386 var=76) bool_neg_uint3_ (__tmp.385) <475>; + (__trgt.399 var=151) const () <517>; + () void_jump_bool_int10_ (__tmp.386 __trgt.399) <518>; + (__either.400 var=148) undefined () <519>; + if { + { + () if_expr (__either.400) <205>; + } #15 + { + } #16 off=7 + { + (__ct_1.134 var=72) const () <155>; + (__trgt.401 var=152) const () <520>; + () void_jump_int10_ (__trgt.401) <521>; + } #17 off=6 + { + (__rt.207 var=44) merge (__ct_0.66 __ct_1.134) <210>; + } #18 + } #14 + #20 off=8 nxt=-2 + (__rd___sp.208 var=41) rd_res_reg (__R_SP.24 __sp.63) <211>; + (__R_SP.212 var=26 __sp.213 var=34) wr_res_reg (__rt.296 __sp.63) <215>; + () void_ret_dmaddr_ (__la.43) <216>; + (__rt.214 var=44 stl=RA off=0) assign (__rt.207) <217>; + () out (__rt.214) <218>; + () sink (__sp.213) <224>; + () sink (__extDM_int32_.178) <226>; + () sink (__extDM_BufferPtrDMB_buffer_len.179) <227>; + () sink (__extDM_BufferPtrDMB_ptr_start.75) <228>; + () sink (__extDM_BufferPtrDMB_ptr_current.80) <230>; + () sink (__ct_0.40) <231>; + (__rt.296 var=103) __Pvoid__pl___Pvoid_int18_ (__rd___sp.208 __ct_0s0.376) <348>; + (__ct_0s0.376 var=128) const () <459>; +} #0 +0 : 'signal_processing\\signal_path.c'; +---------- +0 : (0,91:0,0); +4 : (0,96:4,5); +6 : (0,96:4,6); +7 : (0,96:4,6); +11 : (0,96:4,13); +14 : (0,99:4,16); +16 : (0,103:8,17); +17 : (0,100:8,21); +20 : (0,99:4,26); +173 : (0,96:37,6); +239 : (0,96:4,5); +242 : (0,99:14,16); +---------- +82 : (0,91:4,0); +86 : (0,91:4,0); +90 : (0,92:10,0); +93 : (0,92:10,1); +97 : (0,93:10,2); +101 : (0,94:10,3); +126 : (0,96:4,5); +135 : (0,96:4,6); +136 : (0,96:4,6); +154 : (0,97:24,6); +155 : (0,96:33,0); +159 : (0,96:4,11); +167 : (0,96:4,11); +168 : (0,96:4,11); +180 : (0,96:4,15); +181 : (0,96:4,15); +205 : (0,99:4,16); +210 : (0,99:4,25); +211 : (0,99:4,0); +215 : (0,99:4,26); +216 : (0,99:4,26); +217 : (0,99:4,0); +320 : (0,91:4,0); +348 : (0,99:4,0); +404 : (0,93:10,0); +432 : (0,94:10,0); +457 : (0,91:4,0); +459 : (0,99:4,0); +466 : (0,96:4,5); +474 : (0,99:14,16); +475 : (0,99:14,16); +500 : (0,96:4,5); +512 : (0,96:4,5); +518 : (0,99:4,16); +523 : (0,96:4,11); + diff --git a/simulation/Release/chesswork/signal_path-a72ab8.# b/simulation/Release/chesswork/signal_path-a72ab8.# new file mode 100644 index 0000000..485e902 --- /dev/null +++ b/simulation/Release/chesswork/signal_path-a72ab8.# @@ -0,0 +1,9 @@ +6bd14b3bc305504dd7bb9269fe30bf59aca75a76 +842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 +42695db990e5aaff0b9f36d25938c80e96ce47cc +4ae39dce1da2ebfb1f2b8ba55158d5ffbb9d548f +da39a3ee5e6b4b0d3255bfef95601890afd80709 +23cbc7be8e1dc06aa405bc4ab73f8bfda05b525e +346 +0 +0 diff --git a/simulation/Release/chesswork/signal_path-a72ab8.o b/simulation/Release/chesswork/signal_path-a72ab8.o new file mode 100644 index 0000000000000000000000000000000000000000..7abf91ce37e5640c81890c3a1c05cd7db23b4dce GIT binary patch literal 8404 zcmeHMZEPGz8J@kny;=KgC$W<_Y18)n5t^p%R3BwFsf|jf#+{DIg&sA&^>8Q3L@ARe~awKm2HE%k$38 z-p#FzgwFiz$TRyq&-?B>A3Jk9vwrZ%@!K>_V_qWEV2s^-jcZAfAdnQ!r!RkuB48OVw+__XGE?S`0tq5)d6hYLha9O#ccr9=W&a&n9wC32N$5y38 zS7sL%%ej(S%{fc40yFPT6>_CQHj$nymKRIboUmqLoQs>;(}~f-l4aYb?Nn;HMa!I; zoj7C9B~AR9rd6KD{VfMLl1LOx+bY|YnmL@@T%_S#;r|vZS&vk$S(|HCN@>=ngJl+q zCC93nh`F-7Qp(|xY^rr*l@+JD;<#gfJh{BWOmqH1uD0N=0*}b4?@^kA9u^bSBkpAM zn4E|nEtQJ46E~BYOe&ck%M_ByvGiy@HInBZW*nHD;MjlhlmY zYZP&YTaA-wj+05W8VIx18!GD9NUL#%o8ye8TMd+I4wM*eHPA?Npq3kyZjLkDa-h-X zK*?0AJP4^qN6vqxKRlW%H|w!YXJlRM`)wN%RwF436W zB2de7JJFcj6e!(#Ak6NTUwf=tDVFJXd>)&ROYU#2C&^#DxV*|AYmB7LD& zbSyK!vamq+E$26UF(;A}!XfL_@R}~N>?|8NJcw<;h2p%kbZ~0+P{JpSuTv)0DKjU0 z(s2aJGzEe(?w7K&htjIk0EA&xI5>wmNxw3_UYb}hp-s(q-i27HrdUwM*Gm)YCB$mJ z(=-c}vh852;~yT+vO#}66FTMZf@j*GMW$(2i>1Si5wIzA$FqSDt6mn^zpy?cw7lc@BttHwU6%zGy;%mkK`fX zAPch_nz+F-l9O+cwXvxt&e_Q(-p9${t4z5e|WoUq5=1y}oj6b4`g})0v zsqmv51nFPM-7Lf&mYg)|*ONZ}9ffzp-gYjfU)7^6q3jO4_@=RXKD-KfFuaEHm{Lv) zJRLplDkj>vL~u56ATF$-sMm*0aOL zLw(^W%t!S#EwC@7uQ7e~ksJZOQU4=h z5|P%BJ^Vc3HWWy4WQ`hybUl_yh>Zei8hg8|6BhuHG;f1ls}yj)!_m)wFcgk@fV_hb zhJ(KkX!?QRE=^BG^<+<2*Mo}zNTb2snjQ*v1cI906SN_P^&P3;$H~^4(nG1Rz9$jW zLpyN|-cROOcPtu30ZmGTdWQAhZtx3mfw8;0p2PZeaTq>95gTFXo}F$$eITxfwufUB zvs3!TqtWgtVnoAwW;m=Lis@{JzB~8;HGp7`fK(+L2xu6W7sXIfXG7ZU==4Xal}k$hcPMdWX2spkK(3~akoSU>zW4)Y80!hBp{7Ky8{@|w>*H$ z(`5P-nF7xNwm(jgGi{p|?7F&ZBGMDt+qJb9?lB1Eu3I~{Y2DgG$0C=H^*(&8cRwt_ z2%NjA;s|qruCrj*OiuvDa7w^r8=z~8@Eh)&>0xZkP7#WpCKB4h0_=%dKPFB|wY!R|>Fo2f zEdGw-GUCUoyT-B}_1rY^!mF!Pk;d+@bVA$}8& z@dG@~M|p;i@dQuuVV>eQ@H_cgejh)_bNoZx>6O->(~n;VMGT`E_q_9Z(yQ!Wfei`8oM?wgYF z4o=r7{9hxP@H1^R*J2mVa=z%8$o5ik!D0BcW-V8j@MX*?p3gbfJjV;*pC z6*uBcbrD}KFCn{UF!x}^nn+pN?A&tIW*4mD;*#T5fbcG5rj$jiywLb|Rd!hYD8}Te ztz?y1)v4i2Y7X5aR9LCiaKb}>v*#;CG^T#F?Ijur#7U&h^$y;=d4DFoKa(~$ljwcp z?r~@XM0?gveAmF;;w{k#NN?_S3z^>RIQY^cp{+(^p*-yx+__IX9&bTV;3+ElsBlkA zY^#fD$3>fJxU&S|4k{QEuR-7_@E8fev{$=@u)KGIu)OyuVHyCW+o`zDjVWGRQ4*N@ zR>c3AsIEK-h*`j;A~Egi?w6Q0b(G16_H<84OhfW4VcCXnNS(HIR}pTf0=p0@uxF?z z>5sjRIGRx#5ZXOZ;3CYjFHzFz_=Yq{h19A4j9x`ZbgE?A-M&l`mhr_nz=z_WARRuG z=(Xm>p+0;5I5#l1!}X{Bd-}%|U5tZ_|2XM8U4I%E&;Mz{G7gQA*Z%Jj#ukj)^Am~b z@)8xYUt&v4hccvBsMziL|ADX=RK~6lzS`AaC%lIW#{N!)e5Su4+(!jtFH_;pWNc0t z`y0n@5!WH)=czG7;zW=Ip;4?`XzyRQkOy_2ZV|(Pf-ssd4ibd-A=8!eeg(&Xz3L7t zI?Y|re@5}iD*8!@arvJT)e}@aX};_rQ6>-4v{e0OV0fp^^J-jas>vY~;%&Gw3xTvg z=|qQ9a z^B}(`y#Z02Kk18i2J3|8h(CP+g4*Bb;CGMT3H)owP1Rtn(fCtayk|-L`#!%8_`NCp zu&hKPzh5A$@%|0JB{YQMdDDyhXpO6W^H|HY{K-%Le2R9^I#>PfmusH; + (__M_WDMA.9 var=11) st_def () <18>; + (__M_WDMB.10 var=12) st_def () <20>; + (__M_LDMA.12 var=14) st_def () <24>; + (__R_SP.24 var=26) st_def () <48>; + (__vola.27 var=29) source () <51>; + (__extDM.30 var=32) source () <54>; + (__extPM.31 var=33) source () <55>; + (__sp.32 var=34) source () <56>; + (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32.33 var=35) source () <57>; + (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32.34 var=36) source () <58>; + (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.35 var=37) source () <59>; + (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.36 var=38) source () <60>; + (pointer_delay_line.37 var=39) source () <61>; + (__extDM_BufferPtrDMB.38 var=40) source () <62>; + (pointer_filter_coefficients.39 var=41) source () <63>; + (__extDM_BufferPtr.40 var=42) source () <64>; + (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator.41 var=43) source () <65>; + (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.42 var=44) source () <66>; + (_ZL2mu.43 var=45) source () <67>; + (__extDM_int32_.44 var=46) source () <68>; + (__extDM_int16_.45 var=47) source () <69>; + (__extDM_void.46 var=48) source () <70>; + (__extPM_void.47 var=49) source () <71>; + (pointer_delay_line_ptr_current.48 var=50) source () <72>; + (__extDM___PDMint32_.49 var=51) source () <73>; + (pointer_delay_line_ptr_start.50 var=52) source () <74>; + (pointer_filter_coefficients_ptr_current.51 var=53) source () <75>; + (pointer_delay_line_buffer_len.52 var=54) source () <76>; + (pointer_filter_coefficients_buffer_len.53 var=55) source () <77>; + (pointer_filter_coefficients_ptr_start.54 var=56) source () <78>; + (__extDM_int64_.55 var=57) source () <79>; + (__ptr_c_sensor_32.57 var=60) const () <81>; + (__ptr_acc_sensor_32.59 var=62) const () <83>; + (__ptr_c_sensor_pre.61 var=64) const () <85>; + (__ptr_acc_sensor_pre.63 var=66) const () <87>; + (__ptr_pointer_delay_line.65 var=68) const () <89>; + (__ct_0.75 var=77) const () <99>; + (__la.77 var=78 stl=LR off=0) inp () <101>; + (__la.78 var=78) deassign (__la.77) <102>; + (c_sensor_signal_t.80 var=79 stl=A off=0) inp () <104>; + (acc_sensor_signal_t.83 var=80 stl=A off=1) inp () <107>; + (c_sensor_input.86 var=81 stl=A off=4) inp () <110>; + (c_sensor_input.87 var=81) deassign (c_sensor_input.86) <111>; + (acc_sensor_input.89 var=82 stl=A off=5) inp () <113>; + (acc_sensor_input.90 var=82) deassign (acc_sensor_input.89) <114>; + (output_port.92 var=83 stl=__spill_WDMA off=0) inp () <116>; + (output_port.93 var=83) deassign (output_port.92) <117>; + (__rd___sp.95 var=58) rd_res_reg (__R_SP.24 __sp.32) <119>; + (__R_SP.99 var=26 __sp.100 var=34) wr_res_reg (__rt.2216 __sp.32) <123>; + (__fch___extDM_int16_.243 var=140 __extDM_int16_.244 var=47 __vola.245 var=29) load (__M_SDMB.6 c_sensor_input.87 __extDM_int16_.45 __vola.27) <267>; + (__ct_16.247 var=142) const () <269>; + (__M_WDMA.255 var=11 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32.256 var=35) store (__tmp.2412 __ptr_c_sensor_32.57 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32.33) <277>; + (__fch___extDM_int16_.262 var=155 __extDM_int16_.263 var=47 __vola.264 var=29) load (__M_SDMB.6 acc_sensor_input.90 __extDM_int16_.244 __vola.245) <283>; + (__M_WDMA.274 var=11 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32.275 var=36) store (__tmp.2417 __ptr_acc_sensor_32.59 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32.34) <293>; + (__M_WDMA.560 var=11 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.561 var=37) store (__tmp.2412 __ptr_c_sensor_pre.61 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.35) <491>; + (__M_WDMA.573 var=11 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.574 var=38) store (__tmp.2417 __ptr_acc_sensor_pre.63 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.36) <503>; + (_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi.763 var=205) const () <605>; + (__link.765 var=207) dmaddr__call_dmaddr_ (_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi.763) <607>; + (__rt.2216 var=480) __Pvoid__pl___Pvoid_int18_ (__rd___sp.95 __ct_0S0.2405) <1902>; + (__ct_0S0.2405 var=508) const () <2169>; + (__ct_2.2411 var=515) const () <2180>; + (__tmp.2412 var=144) int72__shift_int72__int72__uint2_ (__fch___extDM_int16_.243 __ct_16.247 __ct_2.2411) <2181>; + (__tmp.2417 var=159) int72__shift_int72__int72__uint2_ (__fch___extDM_int16_.262 __ct_16.247 __ct_2.2411) <2189>; + call { + (__ptr_pointer_delay_line.757 var=67 stl=A off=4) assign (__ptr_pointer_delay_line.65) <599>; + (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.762 var=204 stl=RA off=0) assign (__tmp.2417) <604>; + (__link.766 var=207 stl=LR off=0) assign (__link.765) <608>; + (_ZL2mu.767 var=45 __extDM.768 var=32 __extDM_BufferPtr.769 var=42 __extDM_BufferPtrDMB.770 var=40 __extDM___PDMint32_.771 var=51 __extDM_int16_.772 var=47 __extDM_int32_.773 var=46 __extDM_int64_.774 var=57 __extDM_void.775 var=48 __extPM.776 var=33 __extPM_void.777 var=49 pointer_delay_line.778 var=39 pointer_delay_line_buffer_len.779 var=54 pointer_delay_line_ptr_current.780 var=50 pointer_delay_line_ptr_start.781 var=52 pointer_filter_coefficients.782 var=41 pointer_filter_coefficients_buffer_len.783 var=55 pointer_filter_coefficients_ptr_current.784 var=53 pointer_filter_coefficients_ptr_start.785 var=56 __vola.786 var=29) F_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi (__link.766 __ptr_pointer_delay_line.757 __fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.762 _ZL2mu.43 __extDM.30 __extDM_BufferPtr.40 __extDM_BufferPtrDMB.38 __extDM___PDMint32_.49 __extDM_int16_.263 __extDM_int32_.44 __extDM_int64_.55 __extDM_void.46 __extPM.31 __extPM_void.47 pointer_delay_line.37 pointer_delay_line_buffer_len.52 pointer_delay_line_ptr_current.48 pointer_delay_line_ptr_start.50 pointer_filter_coefficients.39 pointer_filter_coefficients_buffer_len.53 pointer_filter_coefficients_ptr_current.51 pointer_filter_coefficients_ptr_start.54 __vola.264) <609>; + } #14 off=1 + #615 off=2 + (__ptr_pointer_filter_coefficients.67 var=70) const () <91>; + (__ct_2.239 var=136) const () <263>; + (__ct_0.758 var=201) const () <600>; + (__fch_pointer_delay_line_ptr_current.796 var=211) load (__M_WDMB.10 __rt.2326 pointer_delay_line_ptr_current.780) <619>; + (__fch_pointer_delay_line_ptr_start.801 var=215) load (__M_WDMB.10 __rt.2348 pointer_delay_line_ptr_start.781) <624>; + (__fch_pointer_filter_coefficients_ptr_current.806 var=219) load (__M_WDMA.9 __ptr_pointer_filter_coefficients__a8.2202 pointer_filter_coefficients_ptr_current.784) <629>; + (__fch_pointer_delay_line_buffer_len.811 var=223) load (__M_WDMB.10 __rt.2370 pointer_delay_line_buffer_len.779) <634>; + (__fch_pointer_filter_coefficients_buffer_len.816 var=227) load (__M_WDMA.9 __ptr_pointer_filter_coefficients.67 pointer_filter_coefficients_buffer_len.783) <639>; + (__ct_m4.2073 var=423) const () <1735>; + (__ct_m1.2134 var=449) const () <1787>; + (__vcnt.2135 var=448) __sint__pl___sint___sint (__fch_pointer_filter_coefficients_buffer_len.816 __ct_m1.2134) <1789>; + (__ct_1.2137 var=450) const () <1791>; + (__vcnt.2138 var=448) __sint__pl___sint___sint (__vcnt.2433 __ct_1.2137) <1793>; + (__cv.2139 var=451) uint16__uint16____sint (__vcnt.2138) <1794>; + (__ptr_pointer_filter_coefficients__a8.2202 var=477) const () <1858>; + (__rt.2326 var=480) __Pvoid__pl___Pvoid_int18_ (__ptr_pointer_delay_line.65 __ct_8.2408) <2042>; + (__rt.2348 var=480) __Pvoid__mi___Pvoid_int18_ (__rt.2326 __ct_4.2407) <2070>; + (__rt.2370 var=480) __Pvoid__mi___Pvoid_int18_ (__rt.2348 __ct_4.2407) <2098>; + (__rt.2392 var=480) __Pvoid__pl___Pvoid_int18_ (__ptr_pointer_filter_coefficients.67 __ct_4.2407) <2126>; + (__ct_4.2407 var=510) const () <2173>; + (__ct_8.2408 var=511) const () <2175>; + (__tmp.2422 var=532) int72__shift_int72__int72__uint2_ (__fch_pointer_delay_line_buffer_len.811 __ct_2.239 __ct_2.2411) <2197>; + (__ct_1.2426 var=522) const () <2204>; + (__tmp.2432 var=527) int72__shift_int72__int72__uint2_ (__vcnt.2135 __ct_1.2137 __ct_1.2426) <2213>; + (__vcnt.2433 var=448) int32__extract_high_int72_ (__tmp.2432) <2214>; + (__trgt.2441 var=540) const () <2305>; + () void_doloop_uint16__uint16_ (__cv.2139 __trgt.2441) <2306>; + (__vcnt.2442 var=541) undefined () <2307>; + for { + { + (__inl_p_x0.880 var=96) entry (__inl_p_x0.1045 __fch_pointer_delay_line_ptr_current.796) <703>; + (__inl_p_h.882 var=98) entry (__inl_p_h.1049 __fch_pointer_filter_coefficients_ptr_current.806) <705>; + (__inl_acc1_A.885 var=101) entry (__inl_acc1_A.1055 __ct_0.758) <708>; + (__inl_acc1_B.886 var=102) entry (__inl_acc1_B.1057 __ct_0.758) <709>; + } #17 + { + (__fchtmp.921 var=236) load (__M_WDMB.10 __inl_p_x0.880 _ZL2mu.767 __extDM_int32_.773 pointer_delay_line_buffer_len.779 pointer_filter_coefficients_buffer_len.783) <744>; + (__fchtmp.922 var=237) load (__M_WDMA.9 __inl_p_h.882 _ZL2mu.767 __extDM_int32_.773 pointer_delay_line_buffer_len.779 pointer_filter_coefficients_buffer_len.783) <745>; + (__fchtmp.932 var=247) load (__M_WDMB.10 __inl_p_x0.2012 _ZL2mu.767 __extDM_int32_.773 pointer_delay_line_buffer_len.779 pointer_filter_coefficients_buffer_len.783) <755>; + (__fchtmp.933 var=248) load (__M_WDMA.9 __rt.2260 _ZL2mu.767 __extDM_int32_.773 pointer_delay_line_buffer_len.779 pointer_filter_coefficients_buffer_len.783) <756>; + (__inl_acc1_A.944 var=101) accum_t__pl_accum_t_accum_t (__inl_acc1_A.885 __tmp.2025) <767>; + (__inl_acc1_B.946 var=102) accum_t__pl_accum_t_accum_t (__inl_acc1_B.886 __tmp.2030) <769>; + (__inl_p_x0.2012 var=96) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x0.880 __ct_m4.2073 __fch_pointer_delay_line_ptr_start.801 __tmp.2422) <1621>; + (__inl_p_x0.2020 var=96) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x0.2012 __ct_m4.2073 __fch_pointer_delay_line_ptr_start.801 __tmp.2422) <1632>; + (__tmp.2025 var=258) int72__multss_int32__int32__uint1_ (__fchtmp.921 __fchtmp.922 __ct_0.75) <1640>; + (__tmp.2030 var=260) int72__multss_int32__int32__uint1_ (__fchtmp.932 __fchtmp.933 __ct_0.75) <1648>; + (__rt.2260 var=480) __Pvoid__pl___Pvoid_int18_ (__inl_p_h.882 __ct_4.2407) <1958>; + (__rt.2282 var=480) __Pvoid__pl___Pvoid_int18_ (__rt.2260 __ct_4.2407) <1986>; + } #403 off=3 + { + () for_count (__vcnt.2442) <774>; + (__inl_p_x0.1045 var=96 __inl_p_x0.1046 var=96) exit (__inl_p_x0.2020) <822>; + (__inl_p_h.1049 var=98 __inl_p_h.1050 var=98) exit (__rt.2282) <824>; + (__inl_acc1_A.1055 var=101 __inl_acc1_A.1056 var=101) exit (__inl_acc1_A.944) <827>; + (__inl_acc1_B.1057 var=102 __inl_acc1_B.1058 var=102) exit (__inl_acc1_B.946) <828>; + } #19 + } #16 rng=[1,65535] + #99 off=4 + (__ptr_filter_accumulator.69 var=72) const () <93>; + (__ptr_output_32.71 var=74) const () <95>; + (__ptr_mu.73 var=76) const () <97>; + (__inl_acc1_C.1127 var=110) accum_t__pl_accum_t_accum_t (__inl_acc1_A.1056 __inl_acc1_B.1058) <863>; + (__tmpb0_F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_.1128 var=91) __sint_rnd_saturate_accum_t (__inl_acc1_C.1127) <864>; + (__M_WDMB.1132 var=12 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator.1133 var=43) store (__tmpb0_F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_.1128 __ptr_filter_accumulator.69 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator.41) <868>; + (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.1137 var=274) load (__M_WDMA.9 __ptr_c_sensor_pre.61 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.561) <872>; + (__tmp.1142 var=279) __sint__mi___sint___sint (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.1137 __tmpb0_F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_.1128) <877>; + (__M_WDMB.1146 var=12 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1147 var=44) store (__tmp.1142 __ptr_output_32.71 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.42) <881>; + (__fch_pointer_filter_coefficients_ptr_start.1163 var=290) load (__M_WDMA.9 __rt.2392 pointer_filter_coefficients_ptr_start.785) <897>; + (__fch__ZL2mu.1211 var=327) load (__M_WDMA.9 __ptr_mu.73 _ZL2mu.767) <945>; + (__inl_prod.1213 var=124) __sint_rnd_saturate_accum_t (__inl_acc_C.2043) <947>; + (__inl_p_x1.2038 var=119) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch_pointer_delay_line_ptr_current.796 __ct_m4.2073 __fch_pointer_delay_line_ptr_start.801 __tmp.2422) <1659>; + (__inl_acc_C.2043 var=123) int72__multss_int32__int32__uint1_ (__fch__ZL2mu.1211 __tmp.1142 __ct_0.75) <1667>; + (__ct_m8.2074 var=424) const () <1737>; + (__trgt.2443 var=542) const () <2308>; + () void_doloop_uint16__uint16_ (__cv.2139 __trgt.2443) <2309>; + (__vcnt.2444 var=543) undefined () <2310>; + for { + { + (_ZL2mu.1233 var=45) entry (_ZL2mu.1378 _ZL2mu.767) <967>; + (__extDM_int32_.1234 var=46) entry (__extDM_int32_.1380 __extDM_int32_.773) <968>; + (pointer_delay_line_buffer_len.1242 var=54) entry (pointer_delay_line_buffer_len.1396 pointer_delay_line_buffer_len.779) <976>; + (pointer_filter_coefficients_buffer_len.1243 var=55) entry (pointer_filter_coefficients_buffer_len.1398 pointer_filter_coefficients_buffer_len.783) <977>; + (__extDM_int64_.1245 var=57) entry (__extDM_int64_.1402 __extDM_int64_.774) <979>; + (__inl_p_h0.1287 var=117) entry (__inl_p_h0.1486 __fch_pointer_filter_coefficients_ptr_start.1163) <1021>; + (__inl_p_x0.1288 var=118) entry (__inl_p_x0.1488 __fch_pointer_delay_line_ptr_current.796) <1022>; + (__inl_p_x1.1289 var=119) entry (__inl_p_x1.1490 __inl_p_x1.2038) <1023>; + } #22 + { + (__fchtmp.1305 var=332) load (__M_LDMA.12 __inl_p_h0.1287 _ZL2mu.1233 __extDM_int32_.1234 __extDM_int64_.1245 pointer_delay_line_buffer_len.1242 pointer_filter_coefficients_buffer_len.1243) <1039>; + (__inl_h0.1307 var=126 __inl_h1.1308 var=127) void_lldecompose___ulonglong___sint___sint (__fchtmp.1305) <1041>; + (__fchtmp.1311 var=338) load (__M_WDMB.10 __inl_p_x0.1288 _ZL2mu.1233 __extDM_int32_.1234 pointer_delay_line_buffer_len.1242 pointer_filter_coefficients_buffer_len.1243) <1044>; + (__inl_acc_A.1313 var=128) accum_t__pl_accum_t_accum_t (__inl_h0.1307 __tmp.2048) <1046>; + (__fchtmp.1314 var=341) load (__M_WDMB.10 __inl_p_x1.1289 _ZL2mu.1233 __extDM_int32_.1234 pointer_delay_line_buffer_len.1242 pointer_filter_coefficients_buffer_len.1243) <1047>; + (__inl_acc_B.1316 var=129) accum_t__pl_accum_t_accum_t (__inl_h1.1308 __tmp.2053) <1049>; + (__tmp.1329 var=356) __sint_rnd_saturate_accum_t (__inl_acc_A.1313) <1062>; + (__tmp.1330 var=357) __sint_rnd_saturate_accum_t (__inl_acc_B.1316) <1063>; + (__tmp.1331 var=358) __ulonglong_llcompose___sint___sint (__tmp.1329 __tmp.1330) <1064>; + (__M_LDMA.1333 var=14 _ZL2mu.1334 var=45 __extDM_int32_.1335 var=46 __extDM_int64_.1336 var=57 pointer_delay_line_buffer_len.1337 var=54 pointer_filter_coefficients_buffer_len.1338 var=55) store (__tmp.1331 __inl_p_h0.1287 _ZL2mu.1233 __extDM_int32_.1234 __extDM_int64_.1245 pointer_delay_line_buffer_len.1242 pointer_filter_coefficients_buffer_len.1243) <1066>; + (__tmp.2048 var=339) int72__multss_int32__int32__uint1_ (__inl_prod.1213 __fchtmp.1311 __ct_0.75) <1675>; + (__tmp.2053 var=342) int72__multss_int32__int32__uint1_ (__inl_prod.1213 __fchtmp.1314 __ct_0.75) <1683>; + (__inl_p_x0.2061 var=118) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x0.1288 __ct_m8.2074 __fch_pointer_delay_line_ptr_start.801 __tmp.2422) <1694>; + (__inl_p_x1.2069 var=119) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x1.1289 __ct_m8.2074 __fch_pointer_delay_line_ptr_start.801 __tmp.2422) <1705>; + (__rt.2304 var=480) __Pvoid__pl___Pvoid_int18_ (__inl_p_h0.1287 __ct_8.2408) <2014>; + } #473 off=5 + { + () for_count (__vcnt.2444) <1074>; + (_ZL2mu.1378 var=45 _ZL2mu.1379 var=45) exit (_ZL2mu.1334) <1091>; + (__extDM_int32_.1380 var=46 __extDM_int32_.1381 var=46) exit (__extDM_int32_.1335) <1092>; + (pointer_delay_line_buffer_len.1396 var=54 pointer_delay_line_buffer_len.1397 var=54) exit (pointer_delay_line_buffer_len.1337) <1100>; + (pointer_filter_coefficients_buffer_len.1398 var=55 pointer_filter_coefficients_buffer_len.1399 var=55) exit (pointer_filter_coefficients_buffer_len.1338) <1101>; + (__extDM_int64_.1402 var=57 __extDM_int64_.1403 var=57) exit (__extDM_int64_.1336) <1103>; + (__inl_p_h0.1486 var=117 __inl_p_h0.1487 var=117) exit (__rt.2304) <1145>; + (__inl_p_x0.1488 var=118 __inl_p_x0.1489 var=118) exit (__inl_p_x0.2061) <1146>; + (__inl_p_x1.1490 var=119 __inl_p_x1.1491 var=119) exit (__inl_p_x1.2069) <1147>; + } #24 + } #21 rng=[1,65535] + #36 off=6 nxt=-2 + (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1709 var=377) load (__M_WDMB.10 __ptr_output_32.71 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1147) <1352>; + (__tmp.1714 var=382) __sint_rnd_saturate_accum_t (__tmp.2427) <1357>; + (__tmp.1715 var=383) __sshort___sshort___sint (__tmp.1714) <1358>; + (__M_SDMB.1721 var=8 __extDM_int16_.1722 var=47 __vola.1723 var=29) store (__tmp.1715 output_port.93 __extDM_int16_.772 __vola.786) <1364>; + (__rd___sp.1910 var=58) rd_res_reg (__R_SP.24 __sp.100) <1464>; + (__R_SP.1914 var=26 __sp.1915 var=34) wr_res_reg (__rt.2238 __sp.100) <1468>; + () void_ret_dmaddr_ (__la.78) <1469>; + () sink (__vola.1723) <1470>; + () sink (__extDM.768) <1473>; + () sink (__extPM.776) <1474>; + () sink (__sp.1915) <1475>; + () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32.256) <1476>; + () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32.275) <1477>; + () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.561) <1478>; + () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.574) <1479>; + () sink (pointer_delay_line.778) <1480>; + () sink (__extDM_BufferPtrDMB.770) <1481>; + () sink (pointer_filter_coefficients.782) <1482>; + () sink (__extDM_BufferPtr.769) <1483>; + () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator.1133) <1484>; + () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1147) <1485>; + () sink (_ZL2mu.1379) <1486>; + () sink (__extDM_int32_.1381) <1487>; + () sink (__extDM_int16_.1722) <1488>; + () sink (__extDM_void.775) <1489>; + () sink (__extPM_void.777) <1490>; + () sink (pointer_delay_line_ptr_current.780) <1491>; + () sink (__extDM___PDMint32_.771) <1492>; + () sink (pointer_delay_line_ptr_start.781) <1493>; + () sink (pointer_filter_coefficients_ptr_current.784) <1494>; + () sink (pointer_delay_line_buffer_len.1397) <1495>; + () sink (pointer_filter_coefficients_buffer_len.1399) <1496>; + () sink (pointer_filter_coefficients_ptr_start.785) <1497>; + () sink (__extDM_int64_.1403) <1498>; + () sink (__ct_0.75) <1499>; + (__rt.2238 var=480) __Pvoid__pl___Pvoid_int18_ (__rd___sp.1910 __ct_0s0.2406) <1930>; + (__ct_0s0.2406 var=509) const () <2171>; + (__tmp.2427 var=381) int72__shift_int72__int72__uint2_ (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1709 __ct_16.247 __ct_1.2426) <2205>; +} #0 +0 : 'signal_processing\\signal_path.c'; +---------- +0 : (0,346:0,0); +14 : (0,383:4,23); +16 : (0,386:28,40); +21 : (0,390:4,82); +36 : (0,398:0,110); +99 : (0,390:4,80); +403 : (0,386:28,53); +473 : (0,390:4,0); +593 : (0,383:4,23); +615 : (0,386:28,40); +---------- +85 : (0,388:19,0); +87 : (0,383:42,0); +89 : (0,386:28,0); +91 : (0,386:28,0); +93 : (0,386:4,0); +95 : (0,388:4,0); +119 : (0,346:5,0); +123 : (0,346:5,0); +263 : (0,370:47,0); +267 : (0,370:47,8); +269 : (0,370:55,0); +277 : (0,370:19,8); +283 : (0,371:50,9); +293 : (0,371:21,9); +491 : (0,376:21,16); +503 : (0,377:23,17); +599 : (0,383:21,0); +600 : (0,383:57,0); +604 : (0,383:56,0); +607 : (0,383:4,23); +608 : (0,383:4,0); +609 : (0,383:4,23); +619 : (0,386:28,30); +624 : (0,386:28,31); +629 : (0,386:28,32); +634 : (0,386:28,33); +639 : (0,386:28,34); +703 : (0,386:28,40); +705 : (0,386:28,40); +708 : (0,386:28,40); +709 : (0,386:28,40); +744 : (0,386:28,40); +745 : (0,386:28,41); +755 : (0,386:28,46); +756 : (0,386:28,47); +767 : (0,386:28,52); +769 : (0,386:28,53); +774 : (0,386:28,56); +822 : (0,386:28,56); +824 : (0,386:28,56); +827 : (0,386:28,56); +828 : (0,386:28,56); +863 : (0,386:28,57); +864 : (0,386:28,58); +868 : (0,386:22,61); +872 : (0,388:31,62); +877 : (0,388:35,62); +881 : (0,388:13,62); +897 : (0,390:4,70); +945 : (0,390:4,79); +947 : (0,390:4,80); +967 : (0,390:4,82); +968 : (0,390:4,82); +976 : (0,390:4,82); +977 : (0,390:4,82); +979 : (0,390:4,82); +1021 : (0,390:4,82); +1022 : (0,390:4,82); +1023 : (0,390:4,82); +1039 : (0,390:4,82); +1041 : (0,390:4,82); +1044 : (0,390:4,85); +1046 : (0,390:4,85); +1047 : (0,390:4,86); +1049 : (0,390:4,86); +1062 : (0,390:4,89); +1063 : (0,390:4,89); +1064 : (0,390:4,89); +1066 : (0,390:4,89); +1074 : (0,390:4,93); +1091 : (0,390:4,93); +1092 : (0,390:4,93); +1100 : (0,390:4,93); +1101 : (0,390:4,93); +1103 : (0,390:4,93); +1145 : (0,390:4,93); +1146 : (0,390:4,93); +1147 : (0,390:4,93); +1352 : (0,395:56,100); +1357 : (0,395:25,100); +1358 : (0,395:23,100); +1364 : (0,395:19,100); +1464 : (0,398:0,0); +1468 : (0,398:0,110); +1469 : (0,398:0,110); +1621 : (0,386:28,45); +1632 : (0,386:28,51); +1640 : (0,386:28,52); +1648 : (0,386:28,53); +1659 : (0,390:4,77); +1667 : (0,390:4,79); +1675 : (0,390:4,85); +1683 : (0,390:4,86); +1694 : (0,390:4,87); +1705 : (0,390:4,88); +1735 : (0,386:28,0); +1737 : (0,390:4,0); +1858 : (0,386:28,0); +1902 : (0,346:5,0); +1930 : (0,398:0,0); +1958 : (0,386:28,0); +1986 : (0,386:28,0); +2014 : (0,390:4,0); +2042 : (0,386:28,0); +2070 : (0,386:28,0); +2098 : (0,386:28,0); +2126 : (0,390:4,0); +2169 : (0,346:5,0); +2171 : (0,398:0,0); +2173 : (0,386:28,0); +2175 : (0,390:4,0); +2180 : (0,370:52,0); +2181 : (0,370:52,8); +2189 : (0,371:55,9); +2197 : (0,386:28,45); +2204 : (0,395:61,0); +2205 : (0,395:61,100); +2306 : (0,386:28,56); +2309 : (0,390:4,93); + diff --git a/simulation/Release/chesswork/signal_path-d6dbe4.# b/simulation/Release/chesswork/signal_path-d6dbe4.# index 3195c2a..b50fb24 100644 --- a/simulation/Release/chesswork/signal_path-d6dbe4.# +++ b/simulation/Release/chesswork/signal_path-d6dbe4.# @@ -8,3 +8,11 @@ da39a3ee5e6b4b0d3255bfef95601890afd80709 0 0 0 +0 +0 +0 +0 +0 +2 +7 +7 diff --git a/simulation/Release/chesswork/signal_path-d6dbe4.sfg b/simulation/Release/chesswork/signal_path-d6dbe4.sfg index 1234ef1..f63421f 100644 --- a/simulation/Release/chesswork/signal_path-d6dbe4.sfg +++ b/simulation/Release/chesswork/signal_path-d6dbe4.sfg @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 @@ -171,75 +171,75 @@ F_Z15sig_calc_biquadP16SingleSignalPathi { } #0 0 : 'signal_processing\\signal_path.c'; ---------- -0 : (0,173:0,0); -4 : (0,174:4,1); -6 : (0,174:40,2); -10 : (0,188:4,16); -553 : (0,174:34,1); -591 : (0,187:15,11); +0 : (0,180:0,0); +4 : (0,181:4,1); +6 : (0,181:40,2); +10 : (0,195:4,16); +553 : (0,181:34,1); +591 : (0,194:15,11); ---------- -76 : (0,173:4,0); -80 : (0,173:4,0); -87 : (0,174:14,1); -88 : (0,174:37,0); -109 : (0,174:4,1); -117 : (0,178:39,6); -125 : (0,178:68,6); -132 : (0,178:90,6); -134 : (0,178:44,6); -141 : (0,179:30,6); -148 : (0,179:52,6); -150 : (0,178:95,6); -157 : (0,179:81,6); -164 : (0,179:103,6); -166 : (0,179:57,6); -173 : (0,180:30,6); -180 : (0,180:51,6); -182 : (0,179:108,6); -184 : (0,181:32,0); -187 : (0,181:12,7); -201 : (0,184:15,8); -208 : (0,185:15,9); -222 : (0,186:15,10); -229 : (0,187:15,11); -230 : (0,174:4,15); -231 : (0,174:4,15); -232 : (0,174:4,15); -235 : (0,188:4,0); -239 : (0,188:4,16); -240 : (0,188:4,16); -241 : (0,188:4,0); -293 : (0,178:8,6); -301 : (0,178:46,6); -309 : (0,179:8,6); -317 : (0,179:59,6); -325 : (0,180:8,6); -391 : (0,173:4,0); -419 : (0,174:14,1); -447 : (0,178:28,6); -475 : (0,188:4,0); -503 : (0,178:63,0); -531 : (0,178:90,0); -559 : (0,179:30,0); -587 : (0,179:52,0); -615 : (0,179:76,0); -643 : (0,179:103,0); -671 : (0,180:30,0); -699 : (0,180:51,0); -727 : (0,179:30,0); -755 : (0,178:63,0); -783 : (0,180:30,0); -811 : (0,179:76,0); -840 : (0,173:4,0); -842 : (0,174:14,0); -848 : (0,178:28,0); -854 : (0,188:4,0); -856 : (0,178:63,0); -860 : (0,178:90,0); -864 : (0,178:63,0); -869 : (0,174:34,1); -870 : (0,174:34,1); -877 : (0,181:29,0); -878 : (0,181:29,7); -928 : (0,174:4,1); +76 : (0,180:4,0); +80 : (0,180:4,0); +87 : (0,181:14,1); +88 : (0,181:37,0); +109 : (0,181:4,1); +117 : (0,185:39,6); +125 : (0,185:68,6); +132 : (0,185:90,6); +134 : (0,185:44,6); +141 : (0,186:30,6); +148 : (0,186:52,6); +150 : (0,185:95,6); +157 : (0,186:81,6); +164 : (0,186:103,6); +166 : (0,186:57,6); +173 : (0,187:30,6); +180 : (0,187:51,6); +182 : (0,186:108,6); +184 : (0,188:32,0); +187 : (0,188:12,7); +201 : (0,191:15,8); +208 : (0,192:15,9); +222 : (0,193:15,10); +229 : (0,194:15,11); +230 : (0,181:4,15); +231 : (0,181:4,15); +232 : (0,181:4,15); +235 : (0,195:4,0); +239 : (0,195:4,16); +240 : (0,195:4,16); +241 : (0,195:4,0); +293 : (0,185:8,6); +301 : (0,185:46,6); +309 : (0,186:8,6); +317 : (0,186:59,6); +325 : (0,187:8,6); +391 : (0,180:4,0); +419 : (0,181:14,1); +447 : (0,185:28,6); +475 : (0,195:4,0); +503 : (0,185:63,0); +531 : (0,185:90,0); +559 : (0,186:30,0); +587 : (0,186:52,0); +615 : (0,186:76,0); +643 : (0,186:103,0); +671 : (0,187:30,0); +699 : (0,187:51,0); +727 : (0,186:30,0); +755 : (0,185:63,0); +783 : (0,187:30,0); +811 : (0,186:76,0); +840 : (0,180:4,0); +842 : (0,181:14,0); +848 : (0,185:28,0); +854 : (0,195:4,0); +856 : (0,185:63,0); +860 : (0,185:90,0); +864 : (0,185:63,0); +869 : (0,181:34,1); +870 : (0,181:34,1); +877 : (0,188:29,0); +878 : (0,188:29,7); +928 : (0,181:4,1); diff --git a/simulation/Release/chesswork/signal_path-d74ce2.# b/simulation/Release/chesswork/signal_path-d74ce2.# index 5c876d3..cea5909 100644 --- a/simulation/Release/chesswork/signal_path-d74ce2.# +++ b/simulation/Release/chesswork/signal_path-d74ce2.# @@ -8,3 +8,11 @@ da39a3ee5e6b4b0d3255bfef95601890afd80709 0 0 0 +0 +0 +0 +0 +0 +2 +7 +7 diff --git a/simulation/Release/chesswork/signal_path-d74ce2.sfg b/simulation/Release/chesswork/signal_path-d74ce2.sfg index 9bb9b92..59eaab1 100644 --- a/simulation/Release/chesswork/signal_path-d74ce2.sfg +++ b/simulation/Release/chesswork/signal_path-d74ce2.sfg @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 @@ -263,107 +263,107 @@ F_Z15sig_init_weightP16SingleSignalPathdi { } #0 0 : 'signal_processing\\signal_path.c'; ---------- -0 : (0,157:0,0); -4 : (0,159:4,1); -6 : (0,159:22,2); -10 : (0,169:0,22); -181 : (0,167:14,18); -248 : (0,165:20,13); -269 : (0,159:15,1); -272 : (0,159:15,1); -273 : (0,159:15,1); -282 : (0,165:20,13); -285 : (0,165:25,10); -286 : (0,165:25,10); -296 : (0,167:14,18); -299 : (0,165:40,16); -300 : (0,165:40,16); -305 : (0,165:40,16); -306 : (0,165:40,16); -311 : (0,166:32,17); -312 : (0,166:32,17); -317 : (0,166:32,17); -318 : (0,166:32,17); -323 : (0,166:23,17); -324 : (0,166:23,17); +0 : (0,164:0,0); +4 : (0,166:4,1); +6 : (0,166:22,2); +10 : (0,176:0,22); +181 : (0,174:14,18); +248 : (0,172:20,13); +269 : (0,166:15,1); +272 : (0,166:15,1); +273 : (0,166:15,1); +282 : (0,172:20,13); +285 : (0,172:25,10); +286 : (0,172:25,10); +296 : (0,174:14,18); +299 : (0,172:40,16); +300 : (0,172:40,16); +305 : (0,172:40,16); +306 : (0,172:40,16); +311 : (0,173:32,17); +312 : (0,173:32,17); +317 : (0,173:32,17); +318 : (0,173:32,17); +323 : (0,173:23,17); +324 : (0,173:23,17); ---------- -77 : (0,157:5,0); -81 : (0,157:5,0); -87 : (0,159:18,0); -109 : (0,159:4,1); -110 : (0,160:33,0); -115 : (0,160:14,2); -116 : (0,164:33,0); -121 : (0,164:14,5); -127 : (0,165:20,0); -140 : (0,166:14,17); -144 : (0,167:14,18); -145 : (0,159:4,21); -146 : (0,159:4,21); -147 : (0,159:4,21); -152 : (0,169:0,0); -156 : (0,169:0,22); -157 : (0,169:0,22); -249 : (0,157:5,0); -286 : (0,160:14,2); -314 : (0,169:0,0); -342 : (0,166:14,0); -370 : (0,167:14,0); -398 : (0,157:5,0); -400 : (0,160:14,0); -406 : (0,169:0,0); -408 : (0,166:14,0); -440 : (0,165:20,0); -441 : (0,165:20,13); -442 : (0,165:20,13); -443 : (0,165:20,13); -444 : (0,165:20,13); -445 : (0,165:20,13); -446 : (0,165:20,13); -485 : (0,159:15,0); -486 : (0,159:15,1); -487 : (0,159:15,1); -488 : (0,159:15,1); -489 : (0,159:15,1); -490 : (0,159:15,1); -491 : (0,159:15,1); -498 : (0,159:15,1); -518 : (0,159:15,1); -521 : (0,165:25,0); -522 : (0,165:25,10); -523 : (0,165:25,10); -524 : (0,165:25,10); -525 : (0,165:25,10); -526 : (0,165:25,10); -533 : (0,165:40,0); -534 : (0,165:40,16); -535 : (0,165:40,16); -536 : (0,165:40,16); -537 : (0,165:40,16); -538 : (0,165:40,16); -539 : (0,165:40,16); -545 : (0,165:40,0); -546 : (0,165:40,16); -547 : (0,165:40,16); -548 : (0,165:40,16); -549 : (0,165:40,16); -550 : (0,165:40,16); -557 : (0,166:32,17); -558 : (0,166:32,17); -559 : (0,166:32,17); -560 : (0,166:32,17); -561 : (0,166:32,17); -568 : (0,166:32,0); -569 : (0,166:32,17); -570 : (0,166:32,17); -571 : (0,166:32,17); -572 : (0,166:32,17); -573 : (0,166:32,17); -574 : (0,166:32,17); -581 : (0,166:23,17); -582 : (0,166:23,17); -583 : (0,166:23,17); -584 : (0,166:23,17); -585 : (0,166:23,17); -647 : (0,159:4,1); +77 : (0,164:5,0); +81 : (0,164:5,0); +87 : (0,166:18,0); +109 : (0,166:4,1); +110 : (0,167:33,0); +115 : (0,167:14,2); +116 : (0,171:33,0); +121 : (0,171:14,5); +127 : (0,172:20,0); +140 : (0,173:14,17); +144 : (0,174:14,18); +145 : (0,166:4,21); +146 : (0,166:4,21); +147 : (0,166:4,21); +152 : (0,176:0,0); +156 : (0,176:0,22); +157 : (0,176:0,22); +249 : (0,164:5,0); +286 : (0,167:14,2); +314 : (0,176:0,0); +342 : (0,173:14,0); +370 : (0,174:14,0); +398 : (0,164:5,0); +400 : (0,167:14,0); +406 : (0,176:0,0); +408 : (0,173:14,0); +440 : (0,172:20,0); +441 : (0,172:20,13); +442 : (0,172:20,13); +443 : (0,172:20,13); +444 : (0,172:20,13); +445 : (0,172:20,13); +446 : (0,172:20,13); +485 : (0,166:15,0); +486 : (0,166:15,1); +487 : (0,166:15,1); +488 : (0,166:15,1); +489 : (0,166:15,1); +490 : (0,166:15,1); +491 : (0,166:15,1); +498 : (0,166:15,1); +518 : (0,166:15,1); +521 : (0,172:25,0); +522 : (0,172:25,10); +523 : (0,172:25,10); +524 : (0,172:25,10); +525 : (0,172:25,10); +526 : (0,172:25,10); +533 : (0,172:40,0); +534 : (0,172:40,16); +535 : (0,172:40,16); +536 : (0,172:40,16); +537 : (0,172:40,16); +538 : (0,172:40,16); +539 : (0,172:40,16); +545 : (0,172:40,0); +546 : (0,172:40,16); +547 : (0,172:40,16); +548 : (0,172:40,16); +549 : (0,172:40,16); +550 : (0,172:40,16); +557 : (0,173:32,17); +558 : (0,173:32,17); +559 : (0,173:32,17); +560 : (0,173:32,17); +561 : (0,173:32,17); +568 : (0,173:32,0); +569 : (0,173:32,17); +570 : (0,173:32,17); +571 : (0,173:32,17); +572 : (0,173:32,17); +573 : (0,173:32,17); +574 : (0,173:32,17); +581 : (0,173:23,17); +582 : (0,173:23,17); +583 : (0,173:23,17); +584 : (0,173:23,17); +585 : (0,173:23,17); +647 : (0,166:4,1); diff --git a/simulation/Release/chesswork/signal_path-e110bc.# b/simulation/Release/chesswork/signal_path-e110bc.# index bbde9fb..71ac1aa 100644 --- a/simulation/Release/chesswork/signal_path-e110bc.# +++ b/simulation/Release/chesswork/signal_path-e110bc.# @@ -8,3 +8,9 @@ db8ac96f746c20d8257c01deb0158ddbdd492022 0 0 0 +0 +0 +0 +0 +0 +2 diff --git a/simulation/Release/chesswork/signal_path-e110bc.sfg b/simulation/Release/chesswork/signal_path-e110bc.sfg index b16e3e3..c45c0a9 100644 --- a/simulation/Release/chesswork/signal_path-e110bc.sfg +++ b/simulation/Release/chesswork/signal_path-e110bc.sfg @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 15:57:59 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 @@ -90,29 +90,29 @@ F_Z33sig_cirular_buffer_ptr_put_sampleP9BufferPtri { } #5 off=0 nxt=-2 0 : 'signal_processing\\signal_path.c'; ---------- -5 : (0,114:0,3); +5 : (0,116:0,3); ---------- -75 : (0,111:5,0); -79 : (0,111:5,0); -84 : (0,112:11,1); -85 : (0,112:4,1); -95 : (0,113:67,2); -99 : (0,113:86,2); -107 : (0,113:10,2); -108 : (0,114:0,0); -112 : (0,114:0,3); -113 : (0,114:0,3); -159 : (0,113:26,2); -173 : (0,113:26,0); -181 : (0,113:86,0); -208 : (0,111:5,0); -236 : (0,112:11,1); -264 : (0,114:0,0); -292 : (0,113:67,0); -348 : (0,112:11,0); -375 : (0,111:5,0); -377 : (0,112:11,0); -383 : (0,114:0,0); -390 : (0,113:86,0); -391 : (0,113:86,2); +75 : (0,113:5,0); +79 : (0,113:5,0); +84 : (0,114:11,1); +85 : (0,114:4,1); +95 : (0,115:67,2); +99 : (0,115:86,2); +107 : (0,115:10,2); +108 : (0,116:0,0); +112 : (0,116:0,3); +113 : (0,116:0,3); +159 : (0,115:26,2); +173 : (0,115:26,0); +181 : (0,115:86,0); +208 : (0,113:5,0); +236 : (0,114:11,1); +264 : (0,116:0,0); +292 : (0,115:67,0); +348 : (0,114:11,0); +375 : (0,113:5,0); +377 : (0,114:11,0); +383 : (0,116:0,0); +390 : (0,115:86,0); +391 : (0,115:86,2); diff --git a/simulation/Release/chesswork/signal_path-e7968f.# b/simulation/Release/chesswork/signal_path-e7968f.# index c0eb37e..9ce96aa 100644 --- a/simulation/Release/chesswork/signal_path-e7968f.# +++ b/simulation/Release/chesswork/signal_path-e7968f.# @@ -8,3 +8,6 @@ a930397de8fa3f7e26f75e262973f1cd15f811d0 0 0 0 +0 +0 +0 diff --git a/simulation/Release/chesswork/signal_path-e7968f.sfg b/simulation/Release/chesswork/signal_path-e7968f.sfg index 113a1b8..03fc28f 100644 --- a/simulation/Release/chesswork/signal_path-e7968f.sfg +++ b/simulation/Release/chesswork/signal_path-e7968f.sfg @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 13:04:23 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 diff --git a/simulation/Release/chesswork/signal_path-f431c2.# b/simulation/Release/chesswork/signal_path-f431c2.# new file mode 100644 index 0000000..91fa8c5 --- /dev/null +++ b/simulation/Release/chesswork/signal_path-f431c2.# @@ -0,0 +1,9 @@ +6bd14b3bc305504dd7bb9269fe30bf59aca75a76 +842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 +42695db990e5aaff0b9f36d25938c80e96ce47cc +74aa2476c54d9347f6ea99207e69dca964d6754c +da39a3ee5e6b4b0d3255bfef95601890afd80709 +90f6ccde6c4767f2999dfe5439f8fe1395fc6f5e +115 +0 +0 diff --git a/simulation/Release/chesswork/signal_path-f431c2.o b/simulation/Release/chesswork/signal_path-f431c2.o new file mode 100644 index 0000000000000000000000000000000000000000..7a15fad990c7b798f561c0adfdd1bf9a194cbaa2 GIT binary patch literal 3968 zcmd^BO>7%Q6rQ!cer}wGG%0OJp*SRkG);}|IL;4Eo4Dyu+PXCf{UHf#*Y-MD;jAt1 zrfnpos8x|rPnEcE-~bXr;>fjU4yfW#5ULOYi3?{$xfO}>-gqV%Z-P{M|UcT&?dCWW+3i?R0Bh9}KpsPwZvHlC=P&XVOy7v_;_ZMEPaZ^MPQw^k#&ZdJ^t z+zQYrKmmAO#TLmGL{{Jxy%no5J*!&b(=0Aqu1i@>$EkXzXICA%CdZp^-lKT`@3$Jyyfxf+(gm`Ol?83TacLxKIj|< z8f^-M$dn(-=O!{LsTYAE6&RnxI4M6ewH3;4g|MdPCof~HbWR%q|*=D}dg_H76LAti7$S~ZRU8!uFs^Qr-Rl~Jys)lPbl~ph&60|TSu9U2b zxn{VPs@J&NlwQ61LhO$x&!KN8wjk$(*ipd^aZG1tn`~h7!lpPu7GdQkJIvfBdk4GO zWVf)p!j}1dL|e_@gMkBxNxv-$9zd*vVO9D!?EyBacg?auPb4rHnQYO!=Cxb>J8s31 z61w`i_N^9~GEt}0AvS`&rm?@;cH)2v7fqi3dbNo6ob4?6Z#GWUsS*}k*AE3BF)iE? z)=y(&ooKHI0-8QfNL*it>D@7Xp+oPE$GN+Oy8{|#tYQFKOYF5jvG1h7ff-Rp;0`LE zV&irj(MWb<;|oAY=sr42sPtpgzeD3aRQLmo9YK|aAEFh~!@uAV1g7oMf^GZSveC}y zfwuO&m@bZh({`+Nm)4=(JQKZrX72#P!6+ku9%aF{na%)WdYY@L=#kcAt%Djt;XZ_- z(W6mHg+iGF>~4-5q7&HgHrRw8(^y_YU!(E_C4@_)X~U7>)*OQgI0|Rs9CX7z=z#Ro2!Re^0O*4Q@G86p18@k&;SD$jlQ0EYXop?U z0iAFhrr`vfgi~-DX5b9updS)22!|mKuR{h#U=+q62`LzYG#rGtU=iMdt6;(c7;qlm zg*ljow_zUMggjh;i*N}p!m6%v!aoyO_ur({p)a&R$uq@Q*J(C{=d+^ohB-!PwlIQ?0pcZfwRW4#w_^qpZ*x~V^A%CrE zmp1+n{y#IOBgpRwMrVCLwx|9pLM~$mux&n12VE>F9do&?sIqD5#NR621#Aa(j15xP z(m0q&(sk+>5coCg-H)lCq%^Lkci1o zgTT9pCh#pa#M6I7*A`(Y?bt{sDvi|WlcMThVEqxq zo?fUjF=_r#8vAYng-DgIMU{6R9bc({;CJFECcqKA^cc;MFfmC!lYMAYY`)SsKESsy zfTI){qXz+51Nj~!?*mCv#>1$qymbsLKhg?~jrn+wkjHm~N<#gVkCy|+F8DZP&iZ(t zAn#Xl_=I+vTHpKs@|sqVr!Fh;ep4S5ac}tInYjBVg-;zm^zlAJ-a(Zh^pA0*oh0Qx z^5}h0Ex6=d$o>+W%6o{s+lUcQzDwfW^YP|!16@Uocyj8*yN^wccMo}VnusS33$Np6 zAMbnGkSN5%61Y&j-?3dvchnjPW5lC;az7DH_G4_O!utt%edJVx;^E&7D=ECckw+&{ H6|(;UUJcDw literal 0 HcmV?d00001 diff --git a/simulation/Release/chesswork/signal_path-f431c2.sfg b/simulation/Release/chesswork/signal_path-f431c2.sfg new file mode 100644 index 0000000..8110707 --- /dev/null +++ b/simulation/Release/chesswork/signal_path-f431c2.sfg @@ -0,0 +1,115 @@ + +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026 +// Copyright 2014-2025 Synopsys, Inc. All rights reserved. +// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 + + +/*** +!! void increment_buffert_DMB(BufferPtrDMB *, int) +F_Z21increment_buffert_DMBP12BufferPtrDMBi : user_defined, called { + fnm : "increment_buffert_DMB" 'void increment_buffert_DMB(BufferPtrDMB *, int)'; + arg : ( dmaddr_:i dmaddr_:i int32_:i ); + loc : ( LR[0] A[0] RA[0] ); + vac : ( srIM[0] ); + frm : ( ); +} +**** +***/ + +[ + 0 : _Z21increment_buffert_DMBP12BufferPtrDMBi typ=uint20_ bnd=e stl=PM tref=void_____PBufferPtrDMB___sint__ + 11 : __M_WDMA typ=int32_ bnd=d stl=WDMA + 26 : __R_SP typ=dmaddr_ bnd=d stl=SP + 34 : __sp typ=dmaddr_ bnd=b stl=SP + 36 : __extDM_BufferPtrDMB_ptr_current typ=int8_ bnd=b stl=DM + 38 : __extDM_BufferPtrDMB_ptr_start typ=int8_ bnd=b stl=DM + 39 : __extDM_BufferPtrDMB_buffer_len typ=int8_ bnd=b stl=DM + 41 : __rd___sp typ=dmaddr_ bnd=m + 42 : __ct_0 typ=uint1_ val=0f bnd=m + 43 : __la typ=dmaddr_ bnd=p tref=dmaddr___ + 44 : buffer typ=dmaddr_ bnd=p tref=__PBufferPtrDMB__ + 45 : i_incr typ=int32_ bnd=p tref=__sint__ + 52 : __fch___extDM_BufferPtrDMB_ptr_current typ=dmaddr_ bnd=m + 59 : __fch___extDM_BufferPtrDMB_ptr_start typ=dmaddr_ bnd=m + 63 : __fch___extDM_BufferPtrDMB_buffer_len typ=int32_ bnd=m + 67 : __tmp typ=dmaddr_ bnd=m + 90 : __ct_2 typ=int32_ val=2f bnd=m + 93 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__ + 118 : __ct_0S0 typ=int18_ val=0S0 bnd=m + 119 : __ct_8 typ=int18_ val=8f bnd=m + 122 : __ct_0s0 typ=int18_ val=0s0 bnd=m + 124 : __ct_4 typ=int18_ val=4f bnd=m + 128 : __ct_2 typ=uint2_ val=2f bnd=m + 133 : __tmp typ=int18_ bnd=m + 134 : __tmp typ=int18_ bnd=m +] +F_Z21increment_buffert_DMBP12BufferPtrDMBi { + (__M_WDMA.9 var=11) st_def () <18>; + (__R_SP.24 var=26) st_def () <48>; + (__sp.32 var=34) source () <56>; + (__extDM_BufferPtrDMB_ptr_current.34 var=36) source () <58>; + (__extDM_BufferPtrDMB_ptr_start.36 var=38) source () <60>; + (__extDM_BufferPtrDMB_buffer_len.37 var=39) source () <61>; + (__ct_0.40 var=42) const () <64>; + (__la.42 var=43 stl=LR off=0) inp () <66>; + (__la.43 var=43) deassign (__la.42) <67>; + (buffer.45 var=44 stl=A off=0) inp () <69>; + (buffer.46 var=44) deassign (buffer.45) <70>; + (i_incr.48 var=45 stl=RA off=0) inp () <72>; + (i_incr.49 var=45) deassign (i_incr.48) <73>; + (__rd___sp.51 var=41) rd_res_reg (__R_SP.24 __sp.32) <75>; + (__R_SP.55 var=26 __sp.56 var=34) wr_res_reg (__rt.133 __sp.32) <79>; + (__fch___extDM_BufferPtrDMB_ptr_current.60 var=52) load (__M_WDMA.9 __rt.155 __extDM_BufferPtrDMB_ptr_current.34) <84>; + (__fch___extDM_BufferPtrDMB_ptr_start.67 var=59) load (__M_WDMA.9 __rt.199 __extDM_BufferPtrDMB_ptr_start.36) <91>; + (__fch___extDM_BufferPtrDMB_buffer_len.71 var=63) load (__M_WDMA.9 __rt.221 __extDM_BufferPtrDMB_buffer_len.37) <95>; + (__M_WDMA.79 var=11 __extDM_BufferPtrDMB_ptr_current.80 var=36) store (__tmp.110 __rt.243 __extDM_BufferPtrDMB_ptr_current.34) <103>; + (__rd___sp.81 var=41) rd_res_reg (__R_SP.24 __sp.56) <104>; + (__R_SP.85 var=26 __sp.86 var=34) wr_res_reg (__rt.177 __sp.56) <108>; + () void_ret_dmaddr_ (__la.43) <109>; + () sink (__sp.86) <115>; + () sink (__extDM_BufferPtrDMB_ptr_current.80) <117>; + () sink (__ct_0.40) <122>; + (__tmp.110 var=67) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch___extDM_BufferPtrDMB_ptr_current.60 __tmp.266 __fch___extDM_BufferPtrDMB_ptr_start.67 __tmp.271) <155>; + (__ct_2.119 var=90) const () <175>; + (__rt.133 var=93) __Pvoid__pl___Pvoid_int18_ (__rd___sp.51 __ct_0S0.256) <201>; + (__rt.155 var=93) __Pvoid__pl___Pvoid_int18_ (buffer.46 __ct_8.257) <229>; + (__rt.177 var=93) __Pvoid__pl___Pvoid_int18_ (__rd___sp.81 __ct_0s0.260) <257>; + (__rt.199 var=93) __Pvoid__mi___Pvoid_int18_ (__rt.155 __ct_4.262) <285>; + (__rt.221 var=93) __Pvoid__mi___Pvoid_int18_ (__rt.199 __ct_4.262) <313>; + (__rt.243 var=93) __Pvoid__pl___Pvoid_int18_ (__rt.221 __ct_8.257) <341>; + (__ct_0S0.256 var=118) const () <367>; + (__ct_8.257 var=119) const () <369>; + (__ct_0s0.260 var=122) const () <375>; + (__ct_4.262 var=124) const () <379>; + (__ct_2.265 var=128) const () <384>; + (__tmp.266 var=133) int72__shift_int72__int72__uint2_ (i_incr.49 __ct_2.119 __ct_2.265) <385>; + (__tmp.271 var=134) int72__shift_int72__int72__uint2_ (__fch___extDM_BufferPtrDMB_buffer_len.71 __ct_2.119 __ct_2.265) <393>; +} #5 off=0 nxt=-2 +0 : 'signal_processing\\signal_path.c'; +---------- +5 : (0,115:0,2); +---------- +75 : (0,113:5,0); +79 : (0,113:5,0); +84 : (0,114:43,1); +91 : (0,114:72,1); +95 : (0,114:91,1); +103 : (0,114:10,1); +104 : (0,115:0,0); +108 : (0,115:0,2); +109 : (0,115:0,2); +155 : (0,114:26,1); +175 : (0,114:58,0); +201 : (0,113:5,0); +229 : (0,114:43,1); +257 : (0,115:0,0); +285 : (0,114:72,0); +341 : (0,114:43,0); +367 : (0,113:5,0); +369 : (0,114:43,0); +375 : (0,115:0,0); +379 : (0,114:72,0); +384 : (0,114:58,0); +385 : (0,114:58,1); +393 : (0,114:91,1); + diff --git a/simulation/Release/chesswork/signal_path-f55921.# b/simulation/Release/chesswork/signal_path-f55921.# index 3e0736b..c8615b0 100644 --- a/simulation/Release/chesswork/signal_path-f55921.# +++ b/simulation/Release/chesswork/signal_path-f55921.# @@ -8,3 +8,8 @@ ed333c6a3e8d1aafe83fb852bbcd140ff4272cff 0 0 0 +0 +0 +0 +0 +0 diff --git a/simulation/Release/chesswork/signal_path-f55921.sfg b/simulation/Release/chesswork/signal_path-f55921.sfg index 018db68..8308f68 100644 --- a/simulation/Release/chesswork/signal_path-f55921.sfg +++ b/simulation/Release/chesswork/signal_path-f55921.sfg @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 14:00:48 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 diff --git a/simulation/Release/chesswork/signal_path-f66b97.# b/simulation/Release/chesswork/signal_path-f66b97.# new file mode 100644 index 0000000..b5e8ed4 --- /dev/null +++ b/simulation/Release/chesswork/signal_path-f66b97.# @@ -0,0 +1,10 @@ +6bd14b3bc305504dd7bb9269fe30bf59aca75a76 +842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 +42695db990e5aaff0b9f36d25938c80e96ce47cc +54cd4f4a31c0481faad4e87ee8bfbce6c4418650 +da39a3ee5e6b4b0d3255bfef95601890afd80709 +a930397de8fa3f7e26f75e262973f1cd15f811d0 +119 +0 +0 +2 diff --git a/simulation/Release/chesswork/signal_path-f66b97.o b/simulation/Release/chesswork/signal_path-f66b97.o new file mode 100644 index 0000000000000000000000000000000000000000..0580055dda398a93011f35676d99e83dff7d8093 GIT binary patch literal 4036 zcmd^BO>7%Q6rQ!cer}zbH0f_jirb{nmegHuZ0CojO`P;6ZQX{tf3$(k+FmCX&f4;B z+U7zk!I$-?|t*$ zy!qR`d-D7#MNyb6B&}+UUGDHK8J0xhAlpIKl(XQtE!QleB>Uw>uDjM9m!&FJX=&c5 z*KAA5HM`o7vRNv%tXop6H_B41w#>zq5iQf6w;XB0I8tmbm2Bj#m{50@o20j_y4e=n z2Y3_k0X(ix7r}jqoPk?*7cDP6t5N4^mKQ9?p{S;9H(b-LHEhC}Q=7NVy3sVeir^D^;=?%c@j|b0cO} z&sB8YDvzWyMq5^fwi1#1Ne^z+QM%nxZliwm4KFmCDX_lre%#&LwTiniI#n1;2Y`t+ zNPZ16eK7!?M@PeLju4p$LNkT2oS)Q(z@Q%(EutSih)k@7@@pZSQ~Stk=quCa3z3Pn zP<}0hzS>6`M!8`-E*{M7P znPVC)Ooa>HRdwnO*L(SVt^Z++u&2*oK-(6qVa|!Lg5X9trm`DtIi+l|I*uYH?RUh44`>rEkBXgcB~trcS0dWo!qBJ!goW8qFy~3O{zV~6t`|hETn`KjM+dJw3^r| z&#>(!*P)`AN$3LV zqvw5JCr4+mI9AJmYJz)rF6MZ&uTeMXTeYU#y>xfx!9~* z_!(@u*x*&7Zst~_R$2Lz_&?@;4)>nF9*pk)UaTAalft2l9l*Nkj@|;X*7Op{^+u6R zQ6qkM>A7H=s9|h?n$6zbO_Qur!x+D?DANHRB|z|xlPvg@3-QU{O_Bx2AQ^Fbf_g~y z9&P@9izkoJ6@G+d;geq&;b)f*Uo&TXbm$%7&z#_o`}p6IEb{%1WN(#t_|NHOBMeI? zR+5QIJyrVd_~j=!{}^Kbq0rPs)_hb3+a3Z%ks@Z%#=C%qZ~OxVzZ-jz0Y`dqc_~H0 zM3y|2J*bm!`czW+4SDp5ltud3hk%>|*>>T8_a({KA3@pAdxSj4XP4qgfY$}$NJxU{ zPX~C5$h#Qeka{V=`x1FSk|9v&sQKsj@xScTBJ%vpO1wY)1BKr^0e>Ijv0QI{4+6ZO zkatM<@OK}fLPtrKEx6&dUo;oo8eT~M46C2F8+rE;Bc9w#;(Za|eS*9>#E2(TC*Ids z{r;XIkFFE(#BJg8_&&hfPJ^)!4^!fWpx?1x&2%+AgfZe#Jb9i7C;cz1rjOT)ynZtJ U3i-o7AXf45CJ>~n=r5%I1A&<1egFUf literal 0 HcmV?d00001 diff --git a/simulation/Release/chesswork/signal_path-f66b97.sfg b/simulation/Release/chesswork/signal_path-f66b97.sfg new file mode 100644 index 0000000..24a7b21 --- /dev/null +++ b/simulation/Release/chesswork/signal_path-f66b97.sfg @@ -0,0 +1,118 @@ + +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 15:57:59 2026 +// Copyright 2014-2025 Synopsys, Inc. All rights reserved. +// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 + + +/*** +!! void write_delay_line(BufferPtrDMB chess_storage(DMB) *, int) +F_Z16write_delay_linePU17chess_storage_DMB12BufferPtrDMBi : user_defined, called { + fnm : "write_delay_line" 'void write_delay_line(BufferPtrDMB chess_storage(DMB) *, int)'; + arg : ( dmaddr_:i dmaddr_:i int32_:i ); + loc : ( LR[0] A[4] RA[0] ); + vac : ( srIM[0] ); + frm : ( ); +} +**** +***/ + +[ + 0 : _Z16write_delay_linePU17chess_storage_DMB12BufferPtrDMBi typ=uint20_ bnd=e stl=PM tref=void_____PDMBBufferPtrDMB___sint__ + 12 : __M_WDMB typ=int32_ bnd=d stl=WDMB + 26 : __R_SP typ=dmaddr_ bnd=d stl=SP + 34 : __sp typ=dmaddr_ bnd=b stl=SP + 36 : __extDM_BufferPtrDMB_ptr_current typ=int8_ bnd=b stl=DM + 38 : __extDM_BufferPtrDMB_ptr_start typ=int8_ bnd=b stl=DM + 39 : __extDM_BufferPtrDMB_buffer_len typ=int8_ bnd=b stl=DM + 40 : __extDM_int32_ typ=int8_ bnd=b stl=DM + 41 : __rd___sp typ=dmaddr_ bnd=m + 42 : __ct_0 typ=uint1_ val=0f bnd=m + 43 : __la typ=dmaddr_ bnd=p tref=dmaddr___ + 44 : buffer typ=dmaddr_ bnd=p tref=__PDMBBufferPtrDMB__ + 45 : sample typ=int32_ bnd=p tref=__sint__ + 52 : __fch___extDM_BufferPtrDMB_ptr_current typ=dmaddr_ bnd=m + 62 : __fch___extDM_BufferPtrDMB_ptr_start typ=dmaddr_ bnd=m + 66 : __fch___extDM_BufferPtrDMB_buffer_len typ=int32_ bnd=m + 70 : __tmp typ=dmaddr_ bnd=m + 89 : __ct_4 typ=int18_ val=4f bnd=m + 94 : __ct_2 typ=int32_ val=2f bnd=m + 97 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__ + 122 : __ct_0S0 typ=int18_ val=0S0 bnd=m + 123 : __ct_8 typ=int18_ val=8f bnd=m + 126 : __ct_0s0 typ=int18_ val=0s0 bnd=m + 131 : __ct_2 typ=uint2_ val=2f bnd=m + 135 : __tmp typ=int18_ bnd=m +] +F_Z16write_delay_linePU17chess_storage_DMB12BufferPtrDMBi { + (__M_WDMB.10 var=12) st_def () <20>; + (__R_SP.24 var=26) st_def () <48>; + (__sp.32 var=34) source () <56>; + (__extDM_BufferPtrDMB_ptr_current.34 var=36) source () <58>; + (__extDM_BufferPtrDMB_ptr_start.36 var=38) source () <60>; + (__extDM_BufferPtrDMB_buffer_len.37 var=39) source () <61>; + (__extDM_int32_.38 var=40) source () <62>; + (__ct_0.40 var=42) const () <64>; + (__la.42 var=43 stl=LR off=0) inp () <66>; + (__la.43 var=43) deassign (__la.42) <67>; + (buffer.45 var=44 stl=A off=4) inp () <69>; + (buffer.46 var=44) deassign (buffer.45) <70>; + (sample.48 var=45 stl=RA off=0) inp () <72>; + (sample.49 var=45) deassign (sample.48) <73>; + (__rd___sp.51 var=41) rd_res_reg (__R_SP.24 __sp.32) <75>; + (__R_SP.55 var=26 __sp.56 var=34) wr_res_reg (__rt.140 __sp.32) <79>; + (__fch___extDM_BufferPtrDMB_ptr_current.60 var=52) load (__M_WDMB.10 __rt.162 __extDM_BufferPtrDMB_ptr_current.34) <84>; + (__M_WDMB.61 var=12 __extDM_BufferPtrDMB_buffer_len.62 var=39 __extDM_int32_.63 var=40) store (sample.49 __fch___extDM_BufferPtrDMB_ptr_current.60 __extDM_BufferPtrDMB_buffer_len.37 __extDM_int32_.38) <85>; + (__fch___extDM_BufferPtrDMB_ptr_start.73 var=62) load (__M_WDMB.10 __rt.206 __extDM_BufferPtrDMB_ptr_start.36) <95>; + (__fch___extDM_BufferPtrDMB_buffer_len.77 var=66) load (__M_WDMB.10 __rt.228 __extDM_BufferPtrDMB_buffer_len.62) <99>; + (__M_WDMB.85 var=12 __extDM_BufferPtrDMB_ptr_current.86 var=36) store (__tmp.116 __rt.250 __extDM_BufferPtrDMB_ptr_current.34) <107>; + (__rd___sp.87 var=41) rd_res_reg (__R_SP.24 __sp.56) <108>; + (__R_SP.91 var=26 __sp.92 var=34) wr_res_reg (__rt.184 __sp.56) <112>; + () void_ret_dmaddr_ (__la.43) <113>; + () sink (__sp.92) <119>; + () sink (__extDM_BufferPtrDMB_ptr_current.86) <121>; + () sink (__extDM_BufferPtrDMB_buffer_len.62) <124>; + () sink (__extDM_int32_.63) <125>; + () sink (__ct_0.40) <126>; + (__tmp.116 var=70) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch___extDM_BufferPtrDMB_ptr_current.60 __ct_4.120 __fch___extDM_BufferPtrDMB_ptr_start.73 __tmp.272) <159>; + (__ct_4.120 var=89) const () <173>; + (__ct_2.126 var=94) const () <181>; + (__rt.140 var=97) __Pvoid__pl___Pvoid_int18_ (__rd___sp.51 __ct_0S0.263) <208>; + (__rt.162 var=97) __Pvoid__pl___Pvoid_int18_ (buffer.46 __ct_8.264) <236>; + (__rt.184 var=97) __Pvoid__pl___Pvoid_int18_ (__rd___sp.87 __ct_0s0.267) <264>; + (__rt.206 var=97) __Pvoid__mi___Pvoid_int18_ (__rt.162 __ct_4.120) <292>; + (__rt.228 var=97) __Pvoid__mi___Pvoid_int18_ (__rt.206 __ct_4.120) <320>; + (__rt.250 var=97) __Pvoid__pl___Pvoid_int18_ (__rt.228 __ct_8.264) <348>; + (__ct_0S0.263 var=122) const () <375>; + (__ct_8.264 var=123) const () <377>; + (__ct_0s0.267 var=126) const () <383>; + (__ct_2.271 var=131) const () <390>; + (__tmp.272 var=135) int72__shift_int72__int72__uint2_ (__fch___extDM_BufferPtrDMB_buffer_len.77 __ct_2.126 __ct_2.271) <391>; +} #5 off=0 nxt=-2 +0 : 'signal_processing\\signal_path.c'; +---------- +5 : (0,121:0,3); +---------- +75 : (0,118:5,0); +79 : (0,118:5,0); +84 : (0,119:11,1); +85 : (0,119:4,1); +95 : (0,120:67,2); +99 : (0,120:86,2); +107 : (0,120:10,2); +108 : (0,121:0,0); +112 : (0,121:0,3); +113 : (0,121:0,3); +159 : (0,120:26,2); +173 : (0,120:26,0); +181 : (0,120:86,0); +208 : (0,118:5,0); +236 : (0,119:11,1); +264 : (0,121:0,0); +292 : (0,120:67,0); +348 : (0,119:11,0); +375 : (0,118:5,0); +377 : (0,119:11,0); +383 : (0,121:0,0); +390 : (0,120:86,0); +391 : (0,120:86,2); + diff --git a/simulation/Release/chesswork/signal_path-f8ba01.# b/simulation/Release/chesswork/signal_path-f8ba01.# index b7542f2..e57cff5 100644 --- a/simulation/Release/chesswork/signal_path-f8ba01.# +++ b/simulation/Release/chesswork/signal_path-f8ba01.# @@ -8,3 +8,11 @@ da39a3ee5e6b4b0d3255bfef95601890afd80709 0 0 0 +0 +0 +0 +0 +0 +2 +7 +7 diff --git a/simulation/Release/chesswork/signal_path-f8ba01.sfg b/simulation/Release/chesswork/signal_path-f8ba01.sfg index a2c504f..42f78c5 100644 --- a/simulation/Release/chesswork/signal_path-f8ba01.sfg +++ b/simulation/Release/chesswork/signal_path-f8ba01.sfg @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 @@ -491,246 +491,246 @@ F_Z21sig_init_preemph_coefP16SingleSignalPathdddddi { } #0 0 : 'signal_processing\\signal_path.c'; ---------- -0 : (0,133:0,0); -4 : (0,135:17,1); -7 : (0,135:17,3); -10 : (0,135:29,5); -13 : (0,135:29,7); -16 : (0,135:41,9); -19 : (0,135:41,11); -22 : (0,135:53,13); -25 : (0,135:53,15); -28 : (0,135:4,17); -30 : (0,135:66,18); -34 : (0,149:0,42); -247 : (0,147:25,38); -383 : (0,135:23,2); -388 : (0,135:35,6); -393 : (0,135:47,10); -398 : (0,135:59,14); -434 : (0,141:20,30); -479 : (0,135:11,1); -482 : (0,135:11,1); -483 : (0,135:11,1); -488 : (0,135:23,2); -491 : (0,135:23,2); -492 : (0,135:23,2); -497 : (0,135:35,6); -500 : (0,135:35,6); -501 : (0,135:35,6); -506 : (0,135:47,10); -509 : (0,135:47,10); -510 : (0,135:47,10); -515 : (0,135:59,14); -518 : (0,135:59,14); -519 : (0,135:59,14); -542 : (0,141:20,30); -545 : (0,141:25,27); -546 : (0,141:25,27); -570 : (0,147:25,38); -573 : (0,141:39,33); -574 : (0,141:39,33); -579 : (0,141:39,33); -580 : (0,141:39,33); -585 : (0,143:34,34); -586 : (0,143:34,34); -591 : (0,143:34,34); -592 : (0,143:34,34); -597 : (0,143:29,34); -598 : (0,143:29,34); -603 : (0,144:34,35); -604 : (0,144:34,35); -609 : (0,144:29,35); -610 : (0,144:29,35); -615 : (0,145:34,36); -616 : (0,145:34,36); -621 : (0,145:29,36); -622 : (0,145:29,36); -627 : (0,146:34,37); -628 : (0,146:34,37); -633 : (0,146:29,37); -634 : (0,146:29,37); -639 : (0,147:34,38); -640 : (0,147:34,38); -645 : (0,147:29,38); -646 : (0,147:29,38); +0 : (0,140:0,0); +4 : (0,142:17,1); +7 : (0,142:17,3); +10 : (0,142:29,5); +13 : (0,142:29,7); +16 : (0,142:41,9); +19 : (0,142:41,11); +22 : (0,142:53,13); +25 : (0,142:53,15); +28 : (0,142:4,17); +30 : (0,142:66,18); +34 : (0,156:0,42); +247 : (0,154:25,38); +383 : (0,142:23,2); +388 : (0,142:35,6); +393 : (0,142:47,10); +398 : (0,142:59,14); +434 : (0,148:20,30); +479 : (0,142:11,1); +482 : (0,142:11,1); +483 : (0,142:11,1); +488 : (0,142:23,2); +491 : (0,142:23,2); +492 : (0,142:23,2); +497 : (0,142:35,6); +500 : (0,142:35,6); +501 : (0,142:35,6); +506 : (0,142:47,10); +509 : (0,142:47,10); +510 : (0,142:47,10); +515 : (0,142:59,14); +518 : (0,142:59,14); +519 : (0,142:59,14); +542 : (0,148:20,30); +545 : (0,148:25,27); +546 : (0,148:25,27); +570 : (0,154:25,38); +573 : (0,148:39,33); +574 : (0,148:39,33); +579 : (0,148:39,33); +580 : (0,148:39,33); +585 : (0,150:34,34); +586 : (0,150:34,34); +591 : (0,150:34,34); +592 : (0,150:34,34); +597 : (0,150:29,34); +598 : (0,150:29,34); +603 : (0,151:34,35); +604 : (0,151:34,35); +609 : (0,151:29,35); +610 : (0,151:29,35); +615 : (0,152:34,36); +616 : (0,152:34,36); +621 : (0,152:29,36); +622 : (0,152:29,36); +627 : (0,153:34,37); +628 : (0,153:34,37); +633 : (0,153:29,37); +634 : (0,153:29,37); +639 : (0,154:34,38); +640 : (0,154:34,38); +645 : (0,154:29,38); +646 : (0,154:29,38); ---------- -89 : (0,133:5,0); -93 : (0,133:5,0); -99 : (0,135:14,0); -125 : (0,135:17,1); -126 : (0,135:26,0); -155 : (0,135:29,5); -185 : (0,135:41,9); -215 : (0,135:53,13); -221 : (0,135:53,16); -245 : (0,135:4,17); -246 : (0,136:36,0); -251 : (0,136:14,18); -252 : (0,139:36,0); -257 : (0,139:14,21); -261 : (0,140:14,22); -267 : (0,141:20,0); -283 : (0,143:25,34); -293 : (0,144:25,35); -303 : (0,145:25,36); -313 : (0,146:25,37); -323 : (0,147:25,38); -324 : (0,135:4,41); -325 : (0,135:4,41); -326 : (0,135:4,41); -331 : (0,149:0,0); -335 : (0,149:0,42); -336 : (0,149:0,42); -447 : (0,133:5,0); -520 : (0,136:14,18); -548 : (0,149:0,0); -576 : (0,140:14,0); -604 : (0,143:14,0); -632 : (0,144:25,0); -660 : (0,145:25,0); -688 : (0,146:25,0); -716 : (0,147:25,0); -747 : (0,133:5,0); -749 : (0,136:14,0); -755 : (0,149:0,0); -757 : (0,140:14,0); -761 : (0,143:14,0); -763 : (0,144:25,0); -830 : (0,141:20,0); -831 : (0,141:20,30); -832 : (0,141:20,30); -833 : (0,141:20,30); -834 : (0,141:20,30); -835 : (0,141:20,30); -836 : (0,141:20,30); -927 : (0,135:11,0); -928 : (0,135:11,1); -929 : (0,135:11,1); -930 : (0,135:11,1); -931 : (0,135:11,1); -932 : (0,135:11,1); -933 : (0,135:11,1); -941 : (0,135:23,2); -942 : (0,135:23,2); -943 : (0,135:23,2); -944 : (0,135:23,2); -945 : (0,135:23,2); -946 : (0,135:23,2); -954 : (0,135:35,6); -955 : (0,135:35,6); -956 : (0,135:35,6); -957 : (0,135:35,6); -958 : (0,135:35,6); -959 : (0,135:35,6); -967 : (0,135:47,10); -968 : (0,135:47,10); -969 : (0,135:47,10); -970 : (0,135:47,10); -971 : (0,135:47,10); -972 : (0,135:47,10); -980 : (0,135:59,14); -981 : (0,135:59,14); -982 : (0,135:59,14); -983 : (0,135:59,14); -984 : (0,135:59,14); -985 : (0,135:59,14); -992 : (0,135:11,1); -1000 : (0,135:23,2); -1008 : (0,135:35,6); -1016 : (0,135:47,10); -1024 : (0,135:59,14); -1051 : (0,135:59,14); -1054 : (0,141:25,0); -1055 : (0,141:25,27); -1056 : (0,141:25,27); -1057 : (0,141:25,27); -1058 : (0,141:25,27); -1059 : (0,141:25,27); -1066 : (0,141:39,0); -1067 : (0,141:39,33); -1068 : (0,141:39,33); -1069 : (0,141:39,33); -1070 : (0,141:39,33); -1071 : (0,141:39,33); -1072 : (0,141:39,33); -1078 : (0,141:39,0); -1079 : (0,141:39,33); -1080 : (0,141:39,33); -1081 : (0,141:39,33); -1082 : (0,141:39,33); -1083 : (0,141:39,33); -1090 : (0,143:34,34); -1091 : (0,143:34,34); -1092 : (0,143:34,34); -1093 : (0,143:34,34); -1094 : (0,143:34,34); -1101 : (0,143:34,0); -1102 : (0,143:34,34); -1103 : (0,143:34,34); -1104 : (0,143:34,34); -1105 : (0,143:34,34); -1106 : (0,143:34,34); -1107 : (0,143:34,34); -1114 : (0,143:29,34); -1115 : (0,143:29,34); -1116 : (0,143:29,34); -1117 : (0,143:29,34); -1118 : (0,143:29,34); -1126 : (0,144:34,35); -1127 : (0,144:34,35); -1128 : (0,144:34,35); -1129 : (0,144:34,35); -1130 : (0,144:34,35); -1131 : (0,144:34,35); -1138 : (0,144:29,35); -1139 : (0,144:29,35); -1140 : (0,144:29,35); -1141 : (0,144:29,35); -1142 : (0,144:29,35); -1150 : (0,145:34,36); -1151 : (0,145:34,36); -1152 : (0,145:34,36); -1153 : (0,145:34,36); -1154 : (0,145:34,36); -1155 : (0,145:34,36); -1162 : (0,145:29,36); -1163 : (0,145:29,36); -1164 : (0,145:29,36); -1165 : (0,145:29,36); -1166 : (0,145:29,36); -1174 : (0,146:34,37); -1175 : (0,146:34,37); -1176 : (0,146:34,37); -1177 : (0,146:34,37); -1178 : (0,146:34,37); -1179 : (0,146:34,37); -1186 : (0,146:29,37); -1187 : (0,146:29,37); -1188 : (0,146:29,37); -1189 : (0,146:29,37); -1190 : (0,146:29,37); -1198 : (0,147:34,38); -1199 : (0,147:34,38); -1200 : (0,147:34,38); -1201 : (0,147:34,38); -1202 : (0,147:34,38); -1203 : (0,147:34,38); -1210 : (0,147:29,38); -1211 : (0,147:29,38); -1212 : (0,147:29,38); -1213 : (0,147:29,38); -1214 : (0,147:29,38); -1262 : (0,135:11,1); -1263 : (0,135:23,2); -1264 : (0,135:17,4); -1265 : (0,135:35,6); -1266 : (0,135:29,8); -1267 : (0,135:47,10); -1268 : (0,135:41,12); -1292 : (0,135:17,1); -1296 : (0,135:29,5); -1300 : (0,135:41,9); -1304 : (0,135:53,13); -1308 : (0,135:4,17); +89 : (0,140:5,0); +93 : (0,140:5,0); +99 : (0,142:14,0); +125 : (0,142:17,1); +126 : (0,142:26,0); +155 : (0,142:29,5); +185 : (0,142:41,9); +215 : (0,142:53,13); +221 : (0,142:53,16); +245 : (0,142:4,17); +246 : (0,143:36,0); +251 : (0,143:14,18); +252 : (0,146:36,0); +257 : (0,146:14,21); +261 : (0,147:14,22); +267 : (0,148:20,0); +283 : (0,150:25,34); +293 : (0,151:25,35); +303 : (0,152:25,36); +313 : (0,153:25,37); +323 : (0,154:25,38); +324 : (0,142:4,41); +325 : (0,142:4,41); +326 : (0,142:4,41); +331 : (0,156:0,0); +335 : (0,156:0,42); +336 : (0,156:0,42); +447 : (0,140:5,0); +520 : (0,143:14,18); +548 : (0,156:0,0); +576 : (0,147:14,0); +604 : (0,150:14,0); +632 : (0,151:25,0); +660 : (0,152:25,0); +688 : (0,153:25,0); +716 : (0,154:25,0); +747 : (0,140:5,0); +749 : (0,143:14,0); +755 : (0,156:0,0); +757 : (0,147:14,0); +761 : (0,150:14,0); +763 : (0,151:25,0); +830 : (0,148:20,0); +831 : (0,148:20,30); +832 : (0,148:20,30); +833 : (0,148:20,30); +834 : (0,148:20,30); +835 : (0,148:20,30); +836 : (0,148:20,30); +927 : (0,142:11,0); +928 : (0,142:11,1); +929 : (0,142:11,1); +930 : (0,142:11,1); +931 : (0,142:11,1); +932 : (0,142:11,1); +933 : (0,142:11,1); +941 : (0,142:23,2); +942 : (0,142:23,2); +943 : (0,142:23,2); +944 : (0,142:23,2); +945 : (0,142:23,2); +946 : (0,142:23,2); +954 : (0,142:35,6); +955 : (0,142:35,6); +956 : (0,142:35,6); +957 : (0,142:35,6); +958 : (0,142:35,6); +959 : (0,142:35,6); +967 : (0,142:47,10); +968 : (0,142:47,10); +969 : (0,142:47,10); +970 : (0,142:47,10); +971 : (0,142:47,10); +972 : (0,142:47,10); +980 : (0,142:59,14); +981 : (0,142:59,14); +982 : (0,142:59,14); +983 : (0,142:59,14); +984 : (0,142:59,14); +985 : (0,142:59,14); +992 : (0,142:11,1); +1000 : (0,142:23,2); +1008 : (0,142:35,6); +1016 : (0,142:47,10); +1024 : (0,142:59,14); +1051 : (0,142:59,14); +1054 : (0,148:25,0); +1055 : (0,148:25,27); +1056 : (0,148:25,27); +1057 : (0,148:25,27); +1058 : (0,148:25,27); +1059 : (0,148:25,27); +1066 : (0,148:39,0); +1067 : (0,148:39,33); +1068 : (0,148:39,33); +1069 : (0,148:39,33); +1070 : (0,148:39,33); +1071 : (0,148:39,33); +1072 : (0,148:39,33); +1078 : (0,148:39,0); +1079 : (0,148:39,33); +1080 : (0,148:39,33); +1081 : (0,148:39,33); +1082 : (0,148:39,33); +1083 : (0,148:39,33); +1090 : (0,150:34,34); +1091 : (0,150:34,34); +1092 : (0,150:34,34); +1093 : (0,150:34,34); +1094 : (0,150:34,34); +1101 : (0,150:34,0); +1102 : (0,150:34,34); +1103 : (0,150:34,34); +1104 : (0,150:34,34); +1105 : (0,150:34,34); +1106 : (0,150:34,34); +1107 : (0,150:34,34); +1114 : (0,150:29,34); +1115 : (0,150:29,34); +1116 : (0,150:29,34); +1117 : (0,150:29,34); +1118 : (0,150:29,34); +1126 : (0,151:34,35); +1127 : (0,151:34,35); +1128 : (0,151:34,35); +1129 : (0,151:34,35); +1130 : (0,151:34,35); +1131 : (0,151:34,35); +1138 : (0,151:29,35); +1139 : (0,151:29,35); +1140 : (0,151:29,35); +1141 : (0,151:29,35); +1142 : (0,151:29,35); +1150 : (0,152:34,36); +1151 : (0,152:34,36); +1152 : (0,152:34,36); +1153 : (0,152:34,36); +1154 : (0,152:34,36); +1155 : (0,152:34,36); +1162 : (0,152:29,36); +1163 : (0,152:29,36); +1164 : (0,152:29,36); +1165 : (0,152:29,36); +1166 : (0,152:29,36); +1174 : (0,153:34,37); +1175 : (0,153:34,37); +1176 : (0,153:34,37); +1177 : (0,153:34,37); +1178 : (0,153:34,37); +1179 : (0,153:34,37); +1186 : (0,153:29,37); +1187 : (0,153:29,37); +1188 : (0,153:29,37); +1189 : (0,153:29,37); +1190 : (0,153:29,37); +1198 : (0,154:34,38); +1199 : (0,154:34,38); +1200 : (0,154:34,38); +1201 : (0,154:34,38); +1202 : (0,154:34,38); +1203 : (0,154:34,38); +1210 : (0,154:29,38); +1211 : (0,154:29,38); +1212 : (0,154:29,38); +1213 : (0,154:29,38); +1214 : (0,154:29,38); +1262 : (0,142:11,1); +1263 : (0,142:23,2); +1264 : (0,142:17,4); +1265 : (0,142:35,6); +1266 : (0,142:29,8); +1267 : (0,142:47,10); +1268 : (0,142:41,12); +1292 : (0,142:17,1); +1296 : (0,142:29,5); +1300 : (0,142:41,9); +1304 : (0,142:53,13); +1308 : (0,142:4,17); diff --git a/simulation/Release/chesswork/signal_path-fcd1fd.# b/simulation/Release/chesswork/signal_path-fcd1fd.# index 06eb12d..ecbffa3 100644 --- a/simulation/Release/chesswork/signal_path-fcd1fd.# +++ b/simulation/Release/chesswork/signal_path-fcd1fd.# @@ -8,3 +8,9 @@ da39a3ee5e6b4b0d3255bfef95601890afd80709 0 0 0 +0 +0 +0 +0 +0 +2 diff --git a/simulation/Release/chesswork/signal_path-fcd1fd.sfg b/simulation/Release/chesswork/signal_path-fcd1fd.sfg index 2ad5734..fae5c50 100644 --- a/simulation/Release/chesswork/signal_path-fcd1fd.sfg +++ b/simulation/Release/chesswork/signal_path-fcd1fd.sfg @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 15:57:59 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 @@ -87,29 +87,29 @@ F_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri { } #5 off=0 nxt=-2 0 : 'signal_processing\\signal_path.c'; ---------- -5 : (0,105:0,2); +5 : (0,107:0,2); ---------- -75 : (0,103:5,0); -79 : (0,103:5,0); -84 : (0,104:43,1); -91 : (0,104:72,1); -95 : (0,104:91,1); -103 : (0,104:10,1); -104 : (0,105:0,0); -108 : (0,105:0,2); -109 : (0,105:0,2); -155 : (0,104:26,1); -175 : (0,104:58,0); -201 : (0,103:5,0); -229 : (0,104:43,1); -257 : (0,105:0,0); -285 : (0,104:72,0); -341 : (0,104:43,0); -367 : (0,103:5,0); -369 : (0,104:43,0); -375 : (0,105:0,0); -379 : (0,104:72,0); -384 : (0,104:58,0); -385 : (0,104:58,1); -393 : (0,104:91,1); +75 : (0,105:5,0); +79 : (0,105:5,0); +84 : (0,106:43,1); +91 : (0,106:72,1); +95 : (0,106:91,1); +103 : (0,106:10,1); +104 : (0,107:0,0); +108 : (0,107:0,2); +109 : (0,107:0,2); +155 : (0,106:26,1); +175 : (0,106:58,0); +201 : (0,105:5,0); +229 : (0,106:43,1); +257 : (0,107:0,0); +285 : (0,106:72,0); +341 : (0,106:43,0); +367 : (0,105:5,0); +369 : (0,106:43,0); +375 : (0,107:0,0); +379 : (0,106:72,0); +384 : (0,106:58,0); +385 : (0,106:58,1); +393 : (0,106:91,1); diff --git a/simulation/Release/chesswork/signal_path.ctt b/simulation/Release/chesswork/signal_path.ctt index 3a325c5..26787ce 100644 --- a/simulation/Release/chesswork/signal_path.ctt +++ b/simulation/Release/chesswork/signal_path.ctt @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 diff --git a/simulation/Release/chesswork/signal_path.dti b/simulation/Release/chesswork/signal_path.dti index 048dbb6..de38232 100644 --- a/simulation/Release/chesswork/signal_path.dti +++ b/simulation/Release/chesswork/signal_path.dti @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 @@ -195,14 +195,14 @@ __PPMvoid__ : _basic() __PPMvoid; __A1__sint_DMA : _array(DMA,4,4) [1] $__sint_DMA; __A1DMB__sint_DMB : _array(DMB,4,4) [1] $__sint_DMB; - __P__sint__ : _pointer() $__Pvoid__ $__sint_DMA; - __PDMB__sint_DMA : _pointer(DMA,4,4) $__Pvoid_DMA $__sint_DMB; - __PDMB__sint__ : _pointer() $__Pvoid__ $__sint_DMB; __PBufferPtr__ : _pointer() $__Pvoid__ $BufferPtr_DMA; + __P__sint__ : _pointer() $__Pvoid__ $__sint_DMA; __sint_____PBufferPtr___P__sint___sint___sint__ : _function() $__sint__ $__PBufferPtr__ $__P__sint__ $__sint__ $__sint__; __PDMBBufferPtrDMB__ : _pointer() $__Pvoid__ $BufferPtrDMB_DMB; + __PDMB__sint__ : _pointer() $__Pvoid__ $__sint_DMB; __sint_____PDMBBufferPtrDMB___PDMB__sint___sint___sint__ : _function() $__sint__ $__PDMBBufferPtrDMB__ $__PDMB__sint__ $__sint__ $__sint__; void_____PBufferPtr___sint__ : _function() _void $__PBufferPtr__ $__sint__; + __PDMB__sint_DMA : _pointer(DMA,4,4) $__Pvoid_DMA $__sint_DMB; BufferPtrDMB_DMA : _struct(DMA,12,4) BufferPtrDMB { buffer_len $__sint_DMA @0; ptr_start $__PDMB__sint_DMA @4; @@ -240,16 +240,9 @@ __sint_____PSingleSignalPath___sint___3 : _function() $__sint__ $__PSingleSignal __fdouble_DMA : _basic(DMA,8,8) __fdouble; __P__fdouble__ : _pointer() $__Pvoid__ $__fdouble_DMA; void_____PSingleSignalPath___PSingleSignalPath___P__fdouble___P__fdouble___sint___sint___fdouble___fdouble___fdouble___sint__ : _function() _void $__PSingleSignalPath__ $__PSingleSignalPath__ $__P__fdouble__ $__P__fdouble__ $__sint__ $__sint__ $__fdouble__ $__fdouble__ $__fdouble__ $__sint__; - OutputMode__ : _enum() OutputMode $__sint__ { - OUTPUT_MODE_C_SENSOR = 0; - OUTPUT_MODE_ACC_SENSOR = 1; - OUTPUT_MODE_FIR_LMS = 2; - OUTPUT_MODE_FIR = 3; - OUTPUT_MODE_FIR_LMS_LEAKY = 4; - } __sshort_DMB : _basic(DMB,2,2) __sshort; int16_t_DMB : _typedef(DMB,2,2) int16_t $__sshort_DMB; __PDMB__sshort__ : _pointer() $__Pvoid__ $int16_t_DMB; -void_____PSingleSignalPath___PSingleSignalPath_OutputMode___PDMB__sshort___PDMB__sshort___PDMB__sshort__ : _function() _void $__PSingleSignalPath__ $__PSingleSignalPath__ $OutputMode__ $__PDMB__sshort__ $__PDMB__sshort__ $__PDMB__sshort__; +void_____PSingleSignalPath___PSingleSignalPath___PDMB__sshort___PDMB__sshort___PDMB__sshort__ : _function() _void $__PSingleSignalPath__ $__PSingleSignalPath__ $__PDMB__sshort__ $__PDMB__sshort__ $__PDMB__sshort__; uint32_t__ : _typedef() uint32_t $__uint__; void__ : _basic() void; diff --git a/simulation/Release/chesswork/signal_path.fnm b/simulation/Release/chesswork/signal_path.fnm index f946e48..ae5bd85 100644 --- a/simulation/Release/chesswork/signal_path.fnm +++ b/simulation/Release/chesswork/signal_path.fnm @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 @@ -8,45 +8,45 @@ "C:\\Users\\phangl\\00_Repos\\06_DSP_Simulation\\simulation\\signal_processing\\signal_path.c" "C:\\Users\\phangl\\00_Repos\\06_DSP_Simulation\\simulation" -"signal_path-154f66.sfg" - : _Z15sig_init_bufferP9BufferPtrPiii - : "sig_init_buffer" global "signal_processing\\signal_path.c" 71 Ofile +"signal_path-59265a.sfg" + : _Z17initialize_bufferP9BufferPtrPiii + : "initialize_buffer" global "signal_processing\\signal_path.c" 74 Ofile ( ) -"signal_path-f55921.sfg" - : _Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii - : "sig_init_buffer_DMB" global "signal_processing\\signal_path.c" 87 Ofile +"signal_path-a56564.sfg" + : _Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii + : "initialize_buffer_dmb" global "signal_processing\\signal_path.c" 91 Ofile ( ) -"signal_path-fcd1fd.sfg" - : _Z32sig_cirular_buffer_ptr_incrementP9BufferPtri - : "sig_cirular_buffer_ptr_increment" global "signal_processing\\signal_path.c" 103 Ofile +"signal_path-750458.sfg" + : _Z16increment_bufferP9BufferPtri + : "increment_buffer" global "signal_processing\\signal_path.c" 108 Ofile ( ) -"signal_path-352f49.sfg" - : _Z36sig_cirular_buffer_ptr_increment_DMBP12BufferPtrDMBi - : "sig_cirular_buffer_ptr_increment_DMB" global "signal_processing\\signal_path.c" 107 Ofile +"signal_path-f431c2.sfg" + : _Z21increment_buffert_DMBP12BufferPtrDMBi + : "increment_buffert_DMB" global "signal_processing\\signal_path.c" 113 Ofile ( ) -"signal_path-e110bc.sfg" - : _Z33sig_cirular_buffer_ptr_put_sampleP9BufferPtri - : "sig_cirular_buffer_ptr_put_sample" global "signal_processing\\signal_path.c" 111 Ofile +"signal_path-4df6b6.sfg" + : _Z12write_bufferP9BufferPtri + : "write_buffer" global "signal_processing\\signal_path.c" 117 Ofile ( ) -"signal_path-e7968f.sfg" - : _Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi - : "sig_cirular_buffer_ptr_put_sample_DMB" global "signal_processing\\signal_path.c" 116 Ofile +"signal_path-a3616e.sfg" + : _Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi + : "write_buffer_dmb" global "signal_processing\\signal_path.c" 123 Ofile ( ) "signal_path-f8ba01.sfg" : _Z21sig_init_preemph_coefP16SingleSignalPathdddddi - : "sig_init_preemph_coef" global "signal_processing\\signal_path.c" 133 Ofile + : "sig_init_preemph_coef" global "signal_processing\\signal_path.c" 140 Ofile ( ff_pow _Z10float64_eqyy @@ -58,14 +58,14 @@ "signal_path-6fcf7f.sfg" : _Z14sig_init_delayP16SingleSignalPathi - : "sig_init_delay" global "signal_processing\\signal_path.c" 152 Ofile + : "sig_init_delay" global "signal_processing\\signal_path.c" 159 Ofile ( - _Z15sig_init_bufferP9BufferPtrPiii + _Z17initialize_bufferP9BufferPtrPiii ) "signal_path-d74ce2.sfg" : _Z15sig_init_weightP16SingleSignalPathdi - : "sig_init_weight" global "signal_processing\\signal_path.c" 157 Ofile + : "sig_init_weight" global "signal_processing\\signal_path.c" 164 Ofile ( ff_pow _Z10float64_eqyy @@ -77,41 +77,41 @@ "signal_path-d6dbe4.sfg" : _Z15sig_calc_biquadP16SingleSignalPathi - : "sig_calc_biquad" global "signal_processing\\signal_path.c" 173 Ofile + : "sig_calc_biquad" global "signal_processing\\signal_path.c" 180 Ofile ( ) "signal_path-a30375.sfg" : _Z29sig_delay_buffer_load_and_getP16SingleSignalPathi - : "sig_delay_buffer_load_and_get" global "signal_processing\\signal_path.c" 194 Ofile + : "sig_delay_buffer_load_and_get" global "signal_processing\\signal_path.c" 201 Ofile ( - _Z32sig_cirular_buffer_ptr_incrementP9BufferPtri + _Z16increment_bufferP9BufferPtri ) "signal_path-530a42.sfg" : _Z15sig_calc_weightP16SingleSignalPathi - : "sig_calc_weight" global "signal_processing\\signal_path.c" 204 Ofile + : "sig_calc_weight" global "signal_processing\\signal_path.c" 211 Ofile ( ) "signal_path-9c02ae.sfg" : _Z4initP16SingleSignalPathS0_PdS1_iidddi - : "init" global "signal_processing\\signal_path.c" 303 Ofile + : "init" global "signal_processing\\signal_path.c" 306 Ofile ( _Z21sig_init_preemph_coefP16SingleSignalPathdddddi _Z14sig_init_delayP16SingleSignalPathi _Z15sig_init_weightP16SingleSignalPathdi - _Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii - _Z15sig_init_bufferP9BufferPtrPiii + _Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii + _Z17initialize_bufferP9BufferPtrPiii _Z11float64_mulyy _Z30float64_to_int32_round_to_zeroy ) -"signal_path-101f20.sfg" - : _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ - : "calc" global "signal_processing\\signal_path.c" 343 Ofile +"signal_path-a72ab8.sfg" + : _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ + : "calc" global "signal_processing\\signal_path.c" 346 Ofile ( - _Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi + _Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi ) "" diff --git a/simulation/Release/chesswork/signal_path.gvt b/simulation/Release/chesswork/signal_path.gvt index 5444cd3..15d0644 100644 --- a/simulation/Release/chesswork/signal_path.gvt +++ b/simulation/Release/chesswork/signal_path.gvt @@ -1,30 +1,24 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 [ 1 : _imsk_var_ typ=uint15_ bnd=e sz=1 algn=1 stl=IMSK tref=uint15__IMSK 2 : _irq_stat_var_ typ=uint15_ bnd=e sz=1 algn=1 stl=irq_stat tref=uint15__irq_stat - 3 : ptr_fir_lms_coeffs typ=int8_ bnd=e sz=12 algn=4 stl=DMA tref=BufferPtr_DMA - 4 : ptr_fir_lms_delay_line typ=int8_ bnd=e sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB - 5 : fir_lms_delay_line typ=int8_ bnd=e sz=256 algn=4 stl=DMB tref=__A64DMB__sint_DMB 6 : _ZL7counter typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__sint_DMA 7 : _ZL2mu typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__sint_DMA 8 : _ZL4leak typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__sint_DMA - 9 : fir_lms_delay_line typ=int8_ bnd=g sz=256 algn=4 stl=DMB tref=__A64DMB__sint_DMB - 10 : fir_lms_coeffs typ=int8_ bnd=g sz=256 algn=8 stl=DMA tref=__A64__sint_DMA - 11 : ptr_fir_lms_delay_line typ=int8_ bnd=g sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB - 12 : ptr_fir_lms_coeffs typ=int8_ bnd=g sz=12 algn=4 stl=DMA tref=BufferPtr_DMA - 13 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA - 14 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA - 15 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA - 16 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA - 17 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt typ=int8_ bnd=f sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB - 18 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB - 19 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13p_c_block_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__P__sint_DMA - 20 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E16p_acc_block_filt typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__P__sint_DMA - 21 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E8p_out_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__PDMB__sint_DMA + 9 : delay_line typ=int8_ bnd=g sz=256 algn=4 stl=DMB tref=__A64DMB__sint_DMB + 10 : filter_coefficients typ=int8_ bnd=g sz=256 algn=8 stl=DMA tref=__A64__sint_DMA + 11 : pointer_delay_line typ=int8_ bnd=g sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB + 12 : pointer_filter_coefficients typ=int8_ bnd=g sz=12 algn=4 stl=DMA tref=BufferPtr_DMA + 13 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA + 14 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA + 15 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA + 16 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA + 17 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator typ=int8_ bnd=f sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB + 18 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB ] __signal_path_sttc { } #0 diff --git a/simulation/Release/chesswork/signal_path.gvt.# b/simulation/Release/chesswork/signal_path.gvt.# index 6006dec..057a905 100644 --- a/simulation/Release/chesswork/signal_path.gvt.# +++ b/simulation/Release/chesswork/signal_path.gvt.# @@ -1,7 +1,7 @@ b94f5e81f66808a8f4f9315bd020e05811fb8d4a 842f4b2e587ac9c93f0ed2be9e41223a9cf4fa79 42695db990e5aaff0b9f36d25938c80e96ce47cc -45bd86c9978f9b853a202e23dfb09e034eb8b898 +49385fd808e0da9ad176cb538c83ecdbdf700e73 da39a3ee5e6b4b0d3255bfef95601890afd80709 da39a3ee5e6b4b0d3255bfef95601890afd80709 0 diff --git a/simulation/Release/chesswork/signal_path.gvt.o b/simulation/Release/chesswork/signal_path.gvt.o index 2e9073c18759f9de84f9480d7068c5c7b89d9a0d..030a1bcc1aa1500ba0f51cc6529009b1afb280e6 100644 GIT binary patch literal 6076 zcmeHLO>7%Q6duQpS3zw>dL&=$S|)!bBmoCNVZN;9CkT4e&U7fUFs3$#HF0tpJIBW!aM}j+2?5 zo6HngWT>)t9b$5^yfQ>m-&QbuFS zi9>s|TElX6n{a-)L0!Sr)z<({6g1V;O1aUpVJ(_^*&ABI$Z}RG9m(y{mUPEa9Jgkx zi@GvBS3K&J^9ufEayd!*L>xhp6a&VURVVwthSwvRSgrbK!MN3 za>G=yqHRUDx7Kj$4cA}$JAH|YqFW10Q5H_AcGW)$Lg4#fh_n#}_I9Zd{2eJIz8e>? z$5(uR{IRu~UacCMpNSJ5qax9SDvYk&@g`;XG2pf6^@9h7a7s=Y3+~eR^xQ;_ z1r?L)G{tqA*%w+=hu~-|;0T(@R#j?=NZ`Dk$R~6T*5L0mEG59J3 zd_gn0UR7MLg0J96MbT=O_z!$7SM1S&|(O$la_OkW{B9YlQ)1_~af3zc{*w;DYR)3J@sFThZnf(@m{N%gXg$A)OF%b3jU_(gD8ahF28?zPA^siU z&mpezt6jgsluG=D)|)$V4QL9h5KG+T2(IFta1|j!ybtgZ*jt0ot@e;ThDQW<7ur!& z!(&1dT+%mSI=`{`7npwE*qo0uHi;VUyoa8chjAXP4^gj$gpps3{t46H8=6^UOC;L2 zy|0+;Pd?g*?J~roeaYm$B%ZGTX!XtZ=aWyT_NUH17wN!a#Uhc}{$ytcgw7poXYwh4 zI5AszUH$NzgfY?U8OH#-H+jxSdT09?>+u{V$q{R2SawZAdW6hrKA3Y&jn5x(blaJ) zFCjrR=d)SmMZI2g=Ch;9bh)II4KD>SY8D0x$fgd?l*_~E@`_cfJ1b6l*3yR4M!lYX z>B)RHzdMs1O%Jc(!Lfp_7OL4wP8-bc&W>i0gei!{Wm2}+%>4YUkCH#0_=ybAA0pkv zVK;EGQLXBB$+eLHvWh1trf#viYa=&QZP!Cu!?tn1BaG6?nz0ae%{LwWcQ0XaHFLdo zGtfXTE2Vwy`fbTzh4_TB+q_g(+L98eRtsGl2BF8D4a=?eN1V%X1p6e)xFP?YG;OX{#;@W!T4*XE{1IVfS5z)b_zGc4dQrZY z@KwT;(4+hz;Uuj=x2I+U65d6)$JdWY*wfHQ0g5+$ua9XtQdl<%bu)Uh4WOq`w(<1@ zyq!YP$s-DocaV}70V#o#c}HLv=1V2G)YHn-6NvIAVylBoI{voUW?=dxq!kiA|3d6T zkVWBdoIM5w#US&9jkp5mfn|R;;BP<#FYzWqc>c!=4BSTjK~!ltBY$D#a0qW)UI0Gm zl@?weulpRg$(_~0`+{!^nL~KxHhFK~ChvXl#2N!Kns+MXnJ={XySWALmj<+yPaw7%Q6duQR;>1b%lL9Smk!cF8pcvb6(`J)YLXsFc!RnW3tuM<P(@;FcAaZUvIxLdwwA0>Yu2(&TTKIrdVbE4 z)0Pz-n;ecNSu~^Cs=%&#gw%pDz@ny}SF30lJzbhn^0|VJ<_^vkvPFT_blTL93MpUI z1k9T1T)Bm*7G`uym=K?UMk!qYuWW*B&l@DWaY%hj3O4{r;q)uXymLt-BCs`kPIsn- zS-F{lnpX_fo{efuIkb0&RxA~4-6WitD^Zoq>*`^ELrG1|Yg6(5RIV_S*Hcc@DYQ(* zlz41k$u>&%WHF;p9f@B3Dt(E@1)D&yO>mp6%t1Dnw;L93f3ajYbo_mW(v*kQZzxTgf&oJ*PeLPJ z14Ypb8Kx+iW2%{THx?oA-9(7=S_|yF^FnanZz1t_JDW3={G6p^u!GIJeuYXa>e;Nt z4BJ$MN@B@s&Qu!m!ZYl;{2FoU-bXiM_c@l!*t3IUlS6ST`I=q1mYQ9;rkY*3rb<_OS{;hf#AF=c{*G7f z@~?b={c(E*Hw94pSb(iZO<2gAs_a4bAmlZY{RHq@N&X3VgCs}MVMLNoLGHxm`fp`F z1Fw|iXp7u`ki7yqRBj(+*CBUGa-SapFL1+-bD8}6SvxyjC5PErE)&-ePajsv9qiL8 zxr<${lDpYeF4KW%6>DX`RLO1ZFOp%S7|Gs&Kq!7!4zP_B7%!`wdgI00$Aw1JL<$65 z$r*jCi=B~oxcD5ODKLF);BFy)%d@z*oWm^;^j|=A3D?~)(0EbWa5)jj7yMtq^i_TH zH!yu$*W7Xyra&<85_$DSf@~LSy$01O65Za)eI*tG6oR1L1npuCT704HZXTW+JSI%KVQ$3}>!L(4{d;nAO9IiU8KZEIVU2_MGn1`_r zi()IT-)n@CSn!{K>DBt?YcTzai>3pARM2aAUF>XUY#*-L=Jtm6#r0TMzt(VGMOS#sR?g6^`@1u8AJTIvht~a>UAqaI>i4)QrRRboH@( zba48BrJL5YF^e1`KOKuH`*oveO~?9`vDB23%FUJXs+}tq&`>}&x@SC<+7?O87m9{8 zZ$%~w+O|l}Fd|Psl!zs^M`QhwZ57-*kkr*=HkOWSy@~Cy{uqwC3SzODln|7Y12-|C z{D9{MB1v$Y)Hq)V6+c^yl(JdfoU%=%1}yCeN?tEGrxVLoP1`|Q$uxC@peR#Ei@8j_ zvrF08fAhpcYRZYUD%q)=O`DneG$XT+v!LeWF4ZYfWu_XM$i%%FQu$2ZkfZLnNR*nC z-gwfcrX@S^8hMm>11o7zW2UTwIi&2R ze8QsR8s#8m1&oZv>E`-jgA$%1%+t?jBwQrS)65qn{4U`;=*HLwbmRC6;XCQZ*!Ohf zcm*Bl?;-_KdSOgTS_CgGEWDN8~*BjNW6BPpVCQNouAQ{sX0orJFwMtVZ!hJ?d3 z2go+4tdZ~ogn3fjC*cXgP71)-ehJSKrc4^;h=kuD+~ug*SqVED{++}b#!8n%Q=Gw# zhCGX!Y^+o-5@mGLkQ9cHc>gm@xM;{EC2jr0FI5>HGe)h%c%`;&S6jdl36*6Q)_1;Q!hZwq(_ SldBD`V&pFZL0$^92LAyxOzDOI diff --git a/simulation/Release/chesswork/signal_path.ini b/simulation/Release/chesswork/signal_path.ini index 8c1e90e..79d11a6 100644 --- a/simulation/Release/chesswork/signal_path.ini +++ b/simulation/Release/chesswork/signal_path.ini @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 @@ -7,15 +7,9 @@ _ZL7counter/6 $ counter _ZL2mu/7 $ mu _ZL4leak/8 $ leak _ZL4leak/8 : #1d #ac #ff #7f -_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre/13 $ c_block_pre _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ -_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre/14 $ acc_block_pre _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ -_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32/15 $ cSensor_32 _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ -_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32/16 $ accSensor_32 _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ -_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt/17 $ acc_block_filt _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ -_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32/18 $ out_32 _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ -_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13p_c_block_pre/19 $ p_c_block_pre _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ -_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13p_c_block_pre/19 : (dmaddr_:int32_:0)_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre #00 #00 #00 #00 -_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E16p_acc_block_filt/20 $ p_acc_block_filt _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ -_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E16p_acc_block_filt/20 : (dmaddr_:int32_:0)_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre #00 #00 #00 #00 -_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E8p_out_32/21 $ p_out_32 _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ -_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E8p_out_32/21 : (dmaddr_:int32_:0)_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 #00 #00 #00 #00 +_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32/13 $ c_sensor_32 _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ +_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32/14 $ acc_sensor_32 _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ +_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre/15 $ c_sensor_pre _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ +_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre/16 $ acc_sensor_pre _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ +_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator/17 $ filter_accumulator _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ +_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32/18 $ output_32 _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ diff --git a/simulation/Release/chesswork/signal_path.lib b/simulation/Release/chesswork/signal_path.lib index 74ff8d3..fc4bcd3 100644 --- a/simulation/Release/chesswork/signal_path.lib +++ b/simulation/Release/chesswork/signal_path.lib @@ -1,5 +1,5 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 @@ -75,19 +75,19 @@ F_Z4initP16SingleSignalPathS0_PdS1_iidddi : user_defined, called { llv : 0 1 0 0 0 ; } -// void calc(SingleSignalPath *, SingleSignalPath *, OutputMode, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *) -F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ : user_defined, called { - fnm : "calc" 'void calc(SingleSignalPath *, SingleSignalPath *, OutputMode, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)'; - arg : ( dmaddr_:i dmaddr_:i dmaddr_:i int32_:i dmaddr_:i dmaddr_:i dmaddr_:i ); - loc : ( LR[0] A[0] A[1] RA[0] A[4] A[5] __spill_WDMA[0] ); +// void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *) +F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ : user_defined, called { + fnm : "calc" 'void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)'; + arg : ( dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i ); + loc : ( LR[0] A[0] A[1] A[4] A[5] __spill_WDMA[0] ); vac : ( srIM[0] ); frm : ( ); llv : 0 1 0 0 0 ; } -// int sig_init_buffer(BufferPtr *, int *, int, int) -F_Z15sig_init_bufferP9BufferPtrPiii : user_defined, called { - fnm : "sig_init_buffer" 'int sig_init_buffer(BufferPtr *, int *, int, int)'; +// int initialize_buffer(BufferPtr *, int *, int, int) +F_Z17initialize_bufferP9BufferPtrPiii : user_defined, called { + fnm : "initialize_buffer" 'int initialize_buffer(BufferPtr *, int *, int, int)'; arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i ); loc : ( LR[0] RA[0] A[0] A[1] RA[1] RB[0] ); vac : ( srIM[0] ); @@ -95,9 +95,9 @@ F_Z15sig_init_bufferP9BufferPtrPiii : user_defined, called { llv : 0 1 0 0 0 ; } -// int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int) -F_Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii : user_defined, called { - fnm : "sig_init_buffer_DMB" 'int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)'; +// int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int) +F_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii : user_defined, called { + fnm : "initialize_buffer_dmb" 'int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)'; arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i ); loc : ( LR[0] RA[0] A[4] A[5] RA[1] RB[0] ); vac : ( srIM[0] ); @@ -105,9 +105,9 @@ F_Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMB llv : 0 1 0 0 0 ; } -// void sig_cirular_buffer_ptr_increment(BufferPtr *, int) -F_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri : user_defined, called { - fnm : "sig_cirular_buffer_ptr_increment" 'void sig_cirular_buffer_ptr_increment(BufferPtr *, int)'; +// void increment_buffer(BufferPtr *, int) +F_Z16increment_bufferP9BufferPtri : user_defined, called { + fnm : "increment_buffer" 'void increment_buffer(BufferPtr *, int)'; arg : ( dmaddr_:i dmaddr_:i int32_:i ); loc : ( LR[0] A[0] RA[0] ); vac : ( srIM[0] ); @@ -115,9 +115,9 @@ F_Z32sig_cirular_buffer_ptr_incrementP9BufferPtri : user_defined, called { llv : 0 0 0 0 0 ; } -// void sig_cirular_buffer_ptr_increment_DMB(BufferPtrDMB *, int) -F_Z36sig_cirular_buffer_ptr_increment_DMBP12BufferPtrDMBi : user_defined, called { - fnm : "sig_cirular_buffer_ptr_increment_DMB" 'void sig_cirular_buffer_ptr_increment_DMB(BufferPtrDMB *, int)'; +// void increment_buffert_DMB(BufferPtrDMB *, int) +F_Z21increment_buffert_DMBP12BufferPtrDMBi : user_defined, called { + fnm : "increment_buffert_DMB" 'void increment_buffert_DMB(BufferPtrDMB *, int)'; arg : ( dmaddr_:i dmaddr_:i int32_:i ); loc : ( LR[0] A[0] RA[0] ); vac : ( srIM[0] ); @@ -125,9 +125,9 @@ F_Z36sig_cirular_buffer_ptr_increment_DMBP12BufferPtrDMBi : user_defined, called llv : 0 0 0 0 0 ; } -// void sig_cirular_buffer_ptr_put_sample(BufferPtr *, int) -F_Z33sig_cirular_buffer_ptr_put_sampleP9BufferPtri : user_defined, called { - fnm : "sig_cirular_buffer_ptr_put_sample" 'void sig_cirular_buffer_ptr_put_sample(BufferPtr *, int)'; +// void write_buffer(BufferPtr *, int) +F_Z12write_bufferP9BufferPtri : user_defined, called { + fnm : "write_buffer" 'void write_buffer(BufferPtr *, int)'; arg : ( dmaddr_:i dmaddr_:i int32_:i ); loc : ( LR[0] A[0] RA[0] ); vac : ( srIM[0] ); @@ -135,9 +135,9 @@ F_Z33sig_cirular_buffer_ptr_put_sampleP9BufferPtri : user_defined, called { llv : 0 0 0 0 0 ; } -// void sig_cirular_buffer_ptr_put_sample_DMB(BufferPtrDMB chess_storage(DMB) *, int) -F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi : user_defined, called { - fnm : "sig_cirular_buffer_ptr_put_sample_DMB" 'void sig_cirular_buffer_ptr_put_sample_DMB(BufferPtrDMB chess_storage(DMB) *, int)'; +// void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int) +F_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi : user_defined, called { + fnm : "write_buffer_dmb" 'void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int)'; arg : ( dmaddr_:i dmaddr_:i int32_:i ); loc : ( LR[0] A[4] RA[0] ); vac : ( srIM[0] ); diff --git a/simulation/Release/chesswork/signal_path.objlist b/simulation/Release/chesswork/signal_path.objlist index c5dda29..205c98a 100644 --- a/simulation/Release/chesswork/signal_path.objlist +++ b/simulation/Release/chesswork/signal_path.objlist @@ -1,15 +1,15 @@ -"signal_path-154f66.o" 0 -"signal_path-f55921.o" 0 -"signal_path-fcd1fd.o" 0 -"signal_path-352f49.o" 0 -"signal_path-e110bc.o" 0 -"signal_path-e7968f.o" 0 -"signal_path-f8ba01.o" 0 -"signal_path-6fcf7f.o" 0 -"signal_path-d74ce2.o" 0 -"signal_path-d6dbe4.o" 0 +"signal_path-59265a.o" 1 +"signal_path-a56564.o" 2 +"signal_path-750458.o" 0 +"signal_path-f431c2.o" 0 +"signal_path-4df6b6.o" 0 +"signal_path-a3616e.o" 0 +"signal_path-f8ba01.o" 7 +"signal_path-6fcf7f.o" 5 +"signal_path-d74ce2.o" 7 +"signal_path-d6dbe4.o" 7 "signal_path-a30375.o" 0 -"signal_path-530a42.o" 0 -"signal_path-9c02ae.o" -2 -"signal_path-101f20.o" 0 +"signal_path-530a42.o" 7 +"signal_path-9c02ae.o" 5 +"signal_path-a72ab8.o" 0 "signal_path.gvt.o" 0 diff --git a/simulation/Release/chesswork/signal_path.tof b/simulation/Release/chesswork/signal_path.tof index 395eb6f..d169071 100644 --- a/simulation/Release/chesswork/signal_path.tof +++ b/simulation/Release/chesswork/signal_path.tof @@ -1,25 +1,25 @@ -// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026 +// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:17 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 // per defined called function, table of invoked intrinsic functions (excluding built-in operators): -// int sig_init_buffer(BufferPtr *, int *, int, int) +// int initialize_buffer(BufferPtr *, int *, int, int) -// int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int) +// int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int) -// void sig_cirular_buffer_ptr_increment(BufferPtr *, int) +// void increment_buffer(BufferPtr *, int) void *cyclic_add(void *, int, void *, int) -// void sig_cirular_buffer_ptr_increment_DMB(BufferPtrDMB *, int) +// void increment_buffert_DMB(BufferPtrDMB *, int) void *cyclic_add(void *, int, void *, int) -// void sig_cirular_buffer_ptr_put_sample(BufferPtr *, int) +// void write_buffer(BufferPtr *, int) void *cyclic_add(void *, int, void *, int) -// void sig_cirular_buffer_ptr_put_sample_DMB(BufferPtrDMB chess_storage(DMB) *, int) +// void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int) void *cyclic_add(void *, int, void *, int) // void sig_init_preemph_coef(SingleSignalPath *, double, double, double, double, double, int) @@ -42,7 +42,7 @@ int rnd_saturate(accum_t) // void init(SingleSignalPath *, SingleSignalPath *, double *, double *, int, int, double, double, double, int) -// void calc(SingleSignalPath *, SingleSignalPath *, OutputMode, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *) +// void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *) accum_t to_accum(int) void *cyclic_add(void *, int, void *, int) accum_t fract_mult(int, int) diff --git a/simulation/Release/main.# b/simulation/Release/main.# index 6584979..016fe96 100644 --- a/simulation/Release/main.# +++ b/simulation/Release/main.# @@ -1,2 +1,2 @@ -e4fc83ed9ae93d97a22c1d8f29c6c29bca7cf2bc +1969daa2796df302809897d9d6fdf79d4f513044 16eb5e4638293780f809bd1de8ff96feb0151a27 diff --git a/simulation/Release/main.o b/simulation/Release/main.o index a6fde927090f474a2fdb481fb0456f9b2c3d1846..afadb7a589d19ff7fec97a79001354c5ca195940 100644 GIT binary patch literal 14008 zcmeHOdvILUc|UjW-aV_8WXY0WU;}Gxz}RBFyIQRzgCCM?u#JUwQ|=tag>% z^^<@l+vQ#A21rOt6DE&lrcEIeXv0iXVloVnI%!EuCd`DkPQwfg!_-hnDAV!K-*?Wr zyJxSYPS=0*j}B*a?)iPc?>pZ)_uTL9J?Gw|V_SAyZx{x15}}&J*i=+%Vk`)-iY+B= zs61Y-lq!iNkW(I+5OT6y4s9MD2*p@P!og6Kg-XSAqLL7b2n$s*hbvVsRVtcEmvj3IiM(AAbblf>yCR$`OdhD%lf{xWbjy+Afl8gh45G*JkSkO&B|9wI zbCD52#;U%AspQIuiOGBh9jJ0~NeOkgZDY*S$)3J!e|KD?!r^QDB#Mx#)%Cz?tnG%6N}c1L@|vgfkJXeJr%Pxhk4Qqj&Q^Y-RpyU(_58fiOB zCpin>XX89);UjT7%4AhLQ%H-J8@*2d_XFXM1h+gR5M~hWp|sP75~Zx2&*#dOn4L|g zd-}W6*>EJ2jwZs1Ogh$^=?%vdkyKw_BASRrB9UaKFC_*pl%g@$9dt(;_JFISdx-Zo z>;adt&O=|r9uS>%9vXHKt9KA?*g;RdgJ{DJa8u}~5b19GTK2kK^fcUyKDUc_!!G*W zE*cMrh$||ijrStr3d=}$Dc%>Wa|*#v?T9 ziqQTG7*AJ(_BVc6qqPW4R4S#O3-C}2Q1TGJfJ<5nPvPMLE=Mgm$wLIQoJJq%-CAtY zEZuposHwRl(j3{rVgl_5a>0E)1 zn3;;H8?7XdOeb;jE{!xk@RT9&gIhSbdF_< zlbHg`W{O#sEvFI%nxe*1iF|5~s(UbJAJ3G_nCKQuiTxQgKX^-dG-~6IWhYCR7sFF3 zUo2-BmPN>eq8u4U!B%WqiB-X&T)Hy8Zu9W^h>IAQ!3@q|w(WFLJK(6V&JmaaH#IW6 zKCTqg-x>ShLJQiC%o^r^n)t?(7A^95#LCN(&df-g}slT54+lZ&(fa#314 z>PuEH``}Z*Qk_C+FfY3dC1FSIQ+l#9n8mgVc}g4&)V~dgbdEj;+|H(OB>N9OJ&H1j zM!iDzvOh$*Qj@<0d6gzV54lT|e+s!B*@H~&{}LsoFtWjX>|KSW-p9^Erj_^_rEiC? zJAva$UIF=0V8=cV`Ekgm(r<(O1hDL{kL`s_iO!FX70Ax{5_%Xi_0Q3N8}b8?$sc2! zeNWXViQp?P`K(L+&?Wn*qbiZ=BA49dk~g~KT`oB(G0%$lEpf?;&r|JAPLtn-e1|4q)5O?bO`e3D(&T3$U#rQ#g}hOddjpJZ(&QtM zE1LX6$doY5=yQPmq)u*OZz!2!(`2petvb1xeNZRQW1rT^ZERjMd6)MFV{I%{C%3Y7 zN+z56$eUd94N6`j^nPY5`D^G<2kyU&X5RsuM_lq_F8Ql2`6-wDE0_Emm&`(I%ejdI z`9vjGEZFp*U7IS>yPw1Mj8{{k3SRHwRok333dLMGqh4_d7CA2$;Qg)c?lOCTpxIFxKQ7Yib^A;$uxM zV@>`sTzaE*%r}L)LGs|8Pe*@;HR5H{2L->}w+~vT@D$+XlJOtkHw!s^b{6vZSyb~M z56X&WFxdRk&;8R+Y2vi+I82uNPb30E)3EeUC6u3i;8|ekDgTsej>6TcOSQbqtylfb zvG<<{`X4a@%-gi-<^Z$&k4!fW-t0di>#7d;-a>C;{;9393IB1`6Y}hI(mK@+>$HbW$G!WW@=U$&-S{X@2ac=hosB>HDW&%|-nHQA8-9KC z{PU(go{27@8A*>XE6 zZWPvwZluN+by}BpSpKlJ$h@1H1La@nv#x|>pdX$?wIXkj6@GaR+*Dwo;w7=p#e-fj)uSYbF%(v!)3^)1X>`1AzA-i^v0kglU7EGeph@ zz6RCz=Tuu~pz>JFucH`5wEAdD>u=}u_sX(qej-C&E43&uq&g|-@1yGqD zau-+z*oFKjvp7Nz2cWunZgm!_19Ph%fa;04)!&8cS!C+S%#*NQfXc9Z1Gpu_e$Lji zz{_A>N8Sp`T_JK_SbAV-u)y1}`Ykfeis!Ig1IyJcfFoOk{N&u0aoF^*z}2woMSgi! z%fNQ1ZbSYbnl$0a!vdd&)e+=2bI#6rVTsH9Fs%L2SCohcV>E zkba1Jp%qxD=gk0BRTWfiVB7XQ{5}Z}YV@dj+uzo6oy7gPp1YE`SHS&wt?m)x{;r<; zI&nV(_g6K$SBQJ9o;yd}KY`QwvIl)?d!wE^MBG2ubI%a>Z}r^I>3poWL7Ln;hr;jm zeG^?+wTW(f>k}|u%c51F*J8$e!<@Ht-e7ZQ^A+>j7vpa11kp@4S1U8;ZR_mAq|vJ& zSZgKN=H?AxeTK2Ev$>gO!F)Npym>8vU(^O@Y7=(dt=lk!ff$4WoJE_jYuVUxV!Po% zf0`GG2JmweLX(Ag8(ZcZ9me$b=9AkOAK$)s^_rBI_h?9?zxJThGmk@IkJ!GxUO<;Fztr3H%*^{)PTI8_KLJT=+46#5Jt`&59 zUQ+AVES?o5U8xxpV=uwUr$}DJvtji3ds>DWU(Yx28~F}?F<;7;@Qe5&zL+oI3;E@I z1rPG&{8D}yU&b%tj2qm;P449u_i@fw@+LaHm6o16^Zc1<)K?FohB!LAx!(HF}kV%cyql3Ee%3CF`x z=6?0c{xGHkpvYEc;7p6dBC2+oVR3!7O`EYLsfiy%VLjIfV>n z*_TqI$e^}M1q12YZ6QBe$fHeHu6js@Su(=XVV0)PdUYx#%E+_rEWV2*ac5!3a50?X zv!8&^egdjDsR$n#FQ5Gc=)Vg8uYUsQZ5tMCNT)HiPGK=6Kavvj`^YsNE!1Z`wP`7@ zepBe(LhY$Yt8yshqlwn3w))Yg#ftMpq}4_3w~3ZJ$``HA6ogmtp^NP#gqILBr<1*6 zmuR?~FuG6aIt@<{hC50JHB2A1#8(;=k8Aj^31f{z=|>v=1z~(xp!6>q{)n)8;eTGk zozzDxXeceyaFlS1pxLz=P7xOCO~&#X{sY2d`N`OqHT(m@ZPL$a4gZ>OyX4>1uoxTq zx`5O~GYD;SjNm{i$aE4Z?$hW`9O_owWZ8!fGAzjK)7lcu3km zukmLHtN#20Vf3HUziRw%6i-9(p~io#cv{tSiZA6yyv&0iTG=nv_{#``r`7#hjqg_c zE8vGT{szUL1AnW=-=TO~>3?41i;Ab!{xOX|p?F&H(F9|FAUlCUJ=LoBQen?o^e@a-{n{-0Tp6(6DekoyPPw)Q4E&vp(2}k5O^bl6@ z)~{@+7*IBVYztvEo)jx$#{h~k!rjtOns5vmXB`xF!l>&L&ckP z*no_5mheW|?rTKsq=S6r&D6Ud5yOfn{BAS7gJA66QBvIh2THu{bCe@kt~N=X%(UX?6>6BZxT&8K^}4q-R({vkSp)1e~6zAO8)Zh!5ug literal 14648 zcmeHNZFF44d7k~aJ1eau>%&+E46LyY#un?{)#}T}mL*wW*%p#53H6*0zA?E-mO-^%YNl!`AmXkv$NlQqYKpP;0q$w$+ZCXx&hI2|z;=0ds z@7&$lE4iogkM<99cJ4gyGw-}Jcjmo!XXeg5gS)Qxcs#-hL={Ph*AjM4LWBXm!+79lrl$4BBHp|biP zYzNL9n#e=1oCUdbY=*Mc0=;gHup6KeR=t|6D%TjN1*H`4(dw;2sc5B{=_#h-U^17F zObhe2U9ry8bfIu)rj$vW#oU2>a*Av`UdUuKg-kw`G4s>8Vn)l0MRWO?LnU)&x=^w# zxaHXNp;DE?Jfg#~kjs}c1v6@yagi~LOq6X|sy0_l9-NuVpaEsB)25JpTY~p?crbBr zI-Rl9+f5Ur(49}nXlJ4`+pbaF$@X|A71eE_U`ITaN@`k( zSiC*n6}9igt}&jOi1ti$bqbR$GR;grEzH8SIW;k5ZW}hcP1DYZ^8Od#yG?Y#0(`8~ zj91ybph5h_obwr#+pG#xm)6GMdb! z6J43EXlF8(>h4a)lZjX?Hj(L0S)&k1aTIg|?Xg8$z$Cc?Ma(8r{l_` zY7%I|_c%?&lroXa=Srio&aqtnz*J_;nv;(vOOs6uJkWHZxQ zku9c@c}`;!spM2@;i9qVh&3x8#%ddnJE@AF`h0Y4`k4k{+o+q?IwOAJ5#{C z8dg(N)5VOyA`7u!rF~*_7*MR*x*BVXBe`^Ga^tq)%`q3zH;?I`#|(|Qs9iABU1bPN zpPL#T-rT7xtpd@m6C1~1C+=qY=2QLiDYU7&}idkH# z|K7Q~kcLsI-;({}L8PlS`HPU(YVy;N+cf$6kQ))bh^+rdNEvK<0r3l46dRCwgcQF) zN^I*(u>`hakk_mHD zLU#H?h#K)F$ZWrp{~Y9xL8g7O-&5r&5x(h?&$;AgHdF;>t#QfSE_tU*zSAZDj!T}i z{KsALpF-Bh` zO0E+ttK=nOLzUbpwrDav@6IZ@LHw4ISxXb*j7vV^lJ8dXa!bEPJgnqDz{AxHe|kjI zZ-&mdT=I8Z@{2C{RhN8O9gL_zduv=WD7tfGLos*o&{VRNo6ej3``(b6<}TDx)4hKd zDPgA(yME^_pl_&I%JWt2U9WN#Y78Ta|nytHQg%SMZTuuM( z;3>PT-GE@=S(pe0-ohmjoZW6$6g;WgL;FrsjWdnF{_s|`O0QS(Te`gibE-F-CY9|N z&w9mNr+@!r-r0Bky`REO!7#$V^nUMe7~bwZvGmCses=tHZy0XvDr{O6LPok{nW?N@e!(X9};=iEbcZqMY^pc63st;Ba(`o4R- z9?wc+g-XLJU2Uh(jYkjyDBb9*LkYso<%{9JF%S+!!r^cPb=KX+jGdPDvYo7aS&MOb zvk{CM%Y1jUI#9uj0>)L4JZMO8m6hSKGgbwRwZ4y78Oy?Uxj@8d8x9zC*G0lcz3(tv zkCwDXjJl<`a(6IlFaP>Td zC+qk5ba`Lom7o#XXW)-W{)mL{T7~?+%?bs5BS23fv(7iJxUeq|^bEMwzJfw+zQaH- zfJ^vJ1HBAX@;?Yf%d^7&sDh`3|49Y!6aKF%_;DeO7l8dnfci_r60TywAfU&FTLG7d z;7ib}^S!Q03g6FxeuYAQ-#ZEgMa{1PeIDAX^{&qUZ0$N^^_@4{ zxC2>UBa}tbkJ5o5T!M`f#cT86jv?*=j7^U_@HlYq}4KC*xz zwD1SWdh`6*A0SKOj?Pp1Qe>?=fA$t+4I;83^KYVV6j^?DWBu(wqJ9QfPyI)6_0~Uv ztFQhET>YZryh zWkEyMZTO)HclkqTeGPGLLCuC2koA2;t2MkF?ZJib;8sX}`12BAE1Qd|YEaH9gR%}( zn_h<9xA4@fJ7w{vA60WL{+9P+_%LnvNh5?L=nwoGny?lt4Zkoh0^>J~6;>iV zO&(vvr49X|me87pM*Kf{TR?>Po~ReThM|^jOjrF1f;Coy4TU)A4tP96Eul~ZP_7hL zhBz?~TBQMMmRNf2^+V{w+606=jKxFO)%Dh$+Trn{J)vb*1$b@wS!IZt^=rYcK>3CU zxO_uzU6ZHTGq)pjdPnQY9j)tHsk9`7RyX4=8$-edO{~B%-{x`tXRVR-h&||!a$x6p ztOc5j8Y|0|26{rA879XP4yMeYb2_$j?R-N#G#rkeb<{Oc*9t)E+oGbT%Wl1QU3!k} z)_dQj=g7Jqn-i>5>k@Il9n@C$W?^?}trCwIb#k3jG+3p zk>m0*!*x zPzl!Yij)}GxNmPUQz-76nZ%)xseRF?xhFF-UECM#G`Ee7nq%b^<-W?|QVeV#92;v3 zj~&ZT&lHap!$bL0TR1l}6TbD@cr@M-iFStDDtJ|QB7>t1(TP}URlFnG8I23~#<8$Z zTVRuTDkF}X`H5V~L@Z9`vL!K7$Yc)AOq$75DR(%DQy^l(RGe^tX%)2!7KM2f#~6+w zrg3iOm^pDMi-RJfO27iy%HyGoqBxSt9hfZH6~MeL3RBTlrg6$7UlRS6$x)n~v5lKk z*yx@q6|h^K#E}!C)S&_nr(j3j96dapOAGfJ+&Y;t|76Sg54D{Cz>8TdPV%G+T86K5 zOsmee=%*OeGQE5-rux8wYN}J-I=iy)(U)ks5?cvh$8g4D-uakvb(WT;<327k|D;ST z;o{0CXLdP9*AMM6cMXqKse*IM z)G>Dr_U#-O>bQ>U7>JolO(qK%=7mr2R1Wn}VS)2J6^aTAobIVmb`|r^`c#hps4Cni ze=3K8sIb5}pbABW%Bdg>sp|lX{Q=0nnmk-pzDz{LL`sdd?9`KLV~}2_(IZOXdk|i{{LP`+2Zev=X(~vx@;ja;6UCHnb4ZlK+r6a>nHT*uY z`m%FY!!7Jctmhb3XgE$>XVGGlhL021+x#gFKSA7J^Iy^ME5z3F9_`WaIbv(IkK15> zD0~euKLa7eHN2gepI;DmYq&s+H7COf4S$Y!sYQz~X!xtd*V_DF5XbFB&ojhBLU8xu zIfc24@z)A-H{(TORrUwOs_bjT1BeJeA>L-&{26hKtPnpZR{H-+JV;iEe<$8->;ICt zo2(H3sqw!dzTTp3A5r=(^cU5hR${cD;cAUvuXuLRCXMe^JU2^5G=5C++%QRL`~k&t z)8vT8pHMtEPClmbzpHp|o;<4YpI1CLP@dBGKT|w6QJ&ZM?<$@fDL>Zue^5L(Q>?Ee zH=rT}>?#Ut|DGv>TCY)ETx0jM-a;Cyz&S3wZq@7@%IrcJJ#}1+2I&C`kyCOcD_uk z^q(SD`Wzca|GUIW|A)j%|Hs5i{~coGx4$G-`saw1zK=Jg^!aQ!`j-+beSVq|?T85L zh!b`{bPy}Q?NK^R`jif!7$jExNngS4rxnJDJ8e5@;x3!#=OpSdp$|FF(FtM~@tQRmd_5ogEt9qv13#dx3gcjn8X%2H0tHLF12V{BezEr#Skv8b7D;r!@Yw#^0;) z_W_5Q_rDJu7ry76z%H|#T@lP@;D5EQ_X%X&Rc~cgU0NXVKh_D@@D+aoZy`6LNc6Vg zXJdAuWAp1v;ZROx;Mv6t&XDVR&32Y`b?V}KL%$c=b8Jx2!F-WY&nfpT^d6yt3QiMt zLM9FkzG#Ajiw zs1wL%xC>FIL-;qU<5TGhbO~Lr^$HAkU1i1$^Vp70sh zi@$tjb-y^eUk7l;mfYLWTgA7BEAY=mx3{DX6GxX0#UHx#)$qh zyYyB;k39AG{4h}70==6P&2$?pY=9oBF8eo0`WL@gj%#{2*lSNU9v&@{inbL64-}k+IJ?)wE zf1dN4=WNe8_uO-D&fT==xT6DsfH01zND1-%KdYFehyctMF~+tGuNfX08p&jVOt@jK zq_e}rEen^m*5=njZE3n)#oIaU zTy`kmpV5W#348L{^{dnUeFJ&aU*f)j-a&&i+3ZmM97FXF<_zo|%B(G<7|IN+&JUX? zG_Zl|)@KJGSBL^VvSA%*Sz0@9i=hf&F=W0LtuwbcrUWB7Hn!~7p^;%3<_G&_m|K${ z9%k;Dfq}u1%t+th0Qq9LZ}mW?KfNw9vZiHFq*or-mK$6@Fp?i4j;~$MAlaYKyc=L; zGMDMkb;nwl^$o1<&o7fnyODBPG~K;C)+X~v504BEWmf0Y3zyD6Wq4UUjsJ^cv0QpM zKQKHvlupFoo~A@5_b<~GFKAjflz)50N?OHw+sfK|`})xZY3N+Pc71;aE&8@f*D<($ zWZn7^)%JcnF`dp2^q?5Aw!VSBk-kiS-}(7;c71PeeyF=+z6wW%y8HV2v}C&H+{{pK zy1&0~cqE#Rr?S1#T&gV>&-TQlZTW1XBO8zP_9U`By}h|aDi@8VlF39z+P27CIx5n( zo>-e-MKO;ezj|Q4c7Zzl>PeL9i6#6hN|q{0`PGvu)f4mGWvvB8nURs9R=?$GD^U|m z`qk53s>gTxbinrGu`#xv?pd2HJNd=pg+YO-u&l_=#!6ehts|AqrDD0BL^KzT=92B% zwnVBU){{xbV%gSsTfRL$p0VOn(U`H~Q_q;O;#1GqvEozFn6cth&)BizQ;~P9_*64y ztoYP3W~}(s!?6-;?HkAq<=5s1M#f$y%3mX59hp>Xw7s{tBhlX5nvLaqqdkdyYe%Lx z*`909;u6u@(VmIscX5qKqRg_kLgiE6C(rKZ5JLKA;iFmHPHJj

UeBbm!4lD(ODYeziUmdPZO+16OJZI@N|smN3H*0fJOvg)mN)yH|E zDBmpEL@e9U)`107zCGL8(c2Nrw6$g1JCd-3wpMVmDYR63VwcV0Q_+}a@u>&RGBlX( z&-P<1q}$VJjuR~S(!8vuv2M<q|$uCVaa}+S91fThCi9f$jBQ zG@WS6^|toJ60ONxqPMlZC()LScl2fwv3Ne&mTPa1wPo_X?XA0dHN=nNch!+ z-m&ZEyF_EI*D=2(@?5an{Oa*suv5OPR=i-#`qAuf0;bi-Ri$g9{Y~PJN#Nf%wyrLz7=^a zyxsRy8S|KUd&+m2JT~sT>*5|0@9(Jz@>qB*>R*+|#1sB&=P_~L zVPx&rX!eivViqHDDvmD9xIRgFO$c}6aLHOvGJJyGI?w~?!QbP8~1;8NqTHN z7WHl9DUXrIV!lUS%46j*|F=LXkD15(+f>S9=drl|wkjGrpI^j%uMSd0JEx+Ae?>(z zr=p~PMMW#8qLhC{F!GhLWMSu~2M^*ml-aT=znK;7Y0pO!(NwNC+mTEqVjYRLd_I=! zNaRz=-dLWSjmh44Y!};`skBc$9s^GL)dTDGY(vFTg%&wC-?w_rNSP+t$qv>yld65I zaSE5)t!i&=%l9VYy{VqwRJ=8Vz2$tqHJ*y4u!R*(McX^@s2&}YdGn1#?4S5lz|?tH?WZ_|;RKHsn4GMybyxDoz_pQM+G7#c4w+@~fvfYe+r5TiSbNjQK5) z=fa2`7@ti&W~a)xB9C1se0N&RW7v2j!f)j~mhFGcdQCg&yGS0}#;&K|%6W_%dyIZH zdCVKvX}_Ah2JYVoJQj{+yU#LtH>&UgjbBY36UQ4Xel>YaJn3Ik(Zso+!CKpIkznF0 z)n%3MxTUjwXRpunl(~GDU(v)f(cadMo}SiLJoQQCT6?m&jy60J>TQd*N0af^-qzM! zGN0*r^Q$Tz-1t=F=^DH%r#2VQkU)M zXphIU*^X3Ct|Ol4?a1xo8Du=|Q;)~|Fsu7i{c)o5 zt)^&wdcN~n92%cB-R<;lrM$UywB{4J4%{uYW$=PdPbL;m^|VGi+S=Q2>y}BRV!gPv z!~1G)KHcF0;!}~w-dg?Y@tB+M@_5ZH=C?pzbBp>_R5Uj^0jK=xfxUU|ag%&iqs)bo z?|}C#i>3Seif?JG9H+2;vsk@vZg1~L)7iFMt~cJEh$h-#a;==vay>n{cr2exq}r3o zcrP{$G99~kAE?8(B9EzI7u{!xJhs-6@TO3S@mnO1ZDYCTSCiMc z{cG}=H*UrJmdRt^*dg+($z$Mn#Oqg+$HK9h?^lz@#M}KU^4_uHl>whc^1fPu`zybi zJSOhD=i(jY))qRscUH{mhxHve7cvG8{P?c}j= zygugFoIECuS1NpJ^1f2h?tA=tU#V#KZ3WgV6})rC+dh6P2NU=Ghp^^vD19r~{g~!2hrs?6dDc6=3*@;N;2kZW1@c@AaBt{S zk>^r?w^4m6@>~gU%i~j#_ihz0e)`qqvFtYgW%8JIoBzR9G;Ur~@FxX+D_1mbsmQl& z$BM>HMOZZXEs$m1t%=+UVPl5^z!2u zpA1qRfuW+USJW)6b`JlqVD-F49vY$#YT#e2_4eiZ@VBnRV%=aL575w$b)=YKl@s^B zn&2M(E)QeiQ>K6UU#&CeH~sToo$EOM0G6tD`X{0?A3uLYDYvb81dac{GfZQic*}nw zD0+L->juwdxud;!lsAIE>B*nHVS}s)%mVMajtr)COdq*1BR0G~E9DY}gpgE8hHxZH z4-=lB9~zXp3aM~Bh|)fem+_e0IP3)*{v|Cp-nY%zUgMMfzt>9g1-)H7;YT%mJeOtV zcQqu&^~7zg>5lg)3NDf3eBx4Wj>q&l~+XJpNx z3zr@d6QzuKV>t82a2B87VI2oW?Inu9ndfD7FFm5w7Mcl0!e$)040_^T&b+a#`D0lq zQ)$Xmp(|OU3!HglS@XxTpi8FAXER4csiH>$H5!Ne2S>!e3#xz zZ#x16=5vxEK)7OeEZ2Us{TJex4zNyBpU#&PDbTRz|@e$C)^b^FB zp7?`cti|@3AcknXaH`t%;!e=ShJF?FdqAuD)`=uDv*-&!Uu@C$fwtu*qVbFMtrIIi zZ?)ua1dT2#=zk7$(xMaSEEdt^eiqC=G$D%(68bh*>{uR)}7CjG*H`}5w1$}`!lIo$aPp@`p8&em zqCWz9mPJ1e`XGxwWKSXRztCRif{0l3H$lTh3h_0#K%j~RdO2vAV1fPw=zfcS4)mZ! zr}h?Nokfp=-e}R^13hZd&C`THkqi3Mpl4e2Euasv=$AmZS@fYWj-vfc6umT-Li|K= znZNBqu2ntI6pLsJ3yxpuk52iJf-CgeNe<6&kbT2v@L%(=$Mt> znQo7d2C)=$v3?EW!=R&<{BJ-P%iAChz+mSTZ1Nuj%_-5)cY#h=ba1AMGx5iQ-rtJ< z56}l#^lv~1EqXSLt2lo&h#}AzLWTV928}EWbme|_|22qi(3lbm@gD_Uw9f|d3}{R_ zh4>Z}4pVG_J`eQ47X2;IMSE-zH7GoqNXs{gc2>rsM?LWmf-bgalW4$X5wPS>1IzYe-MKAXicxY)2trao7JF4|MG_$6qXh>711gBM+1pa(&tNelE>K_f|l zu1MPJhi0)9G~3$f`!HxuiH6<*x;S2%#X%{%znaA`=&&V!H|XN{Xci7GKA6G_`c42{ zwC84VEod}BA^s`Q%-iIDFedNf{M0PggD%eJ&Ej4VMf+R0Q1HHha ze+PPrMMpb?IM$-i2Yre~e+Tp=i>^D=zWz3g6`)VE;%@|fszpB!`UHzk9VWzy1$wGj z5861k8Ezu_B~Z(L8HqG@wbBR zvglVpFSh8;dG_^as(3$W4DmwxM?o*J=)GtxaB2?NSIjP4(%)}oEdQNSTPJxEF zWHi7MIzdZ^1Pz!uPG&qXl7Oxht3lHq6de*-kM8I)Q zY{X1`S_xevwwBPfVp|D4LHu0Pyk<7w%DB%WYQuE~Wo*Qq^NE@!uMvKQhwk&xn>_SY z9{S53`hHDQcO$OcFM8sej%Lp4n%)43<28LFc#SCWxtgX7b!_y|S9s`8dgwbn^e;X1 z3!3hg`kTb$W0;egV;eCu9;<2cn18>fRewwt*JzqH(SViF!UKWqc4jIgh~hc|&UMeP2;35iGz2cc#Mxe1aYJVabI%Q( zI#oobTJ>9ZRlX$E?DDCc2POtZr!(~=5uEM@=eV8K&eWBGEwih(aM=-Bb#vhR0e4;o z_^nF1N?{jU)a`VG(VNTbj4X6#MBEw3T1u`emHduyGpnGX`rd6-!PDH)SKQIAs*2OA zLMyAB74GI$m5g*Nci^|dxpJb|JiX>y*H*i16R~-RigmV&s^CN!yDb#?Gi1E6p+fAo zGO-nf*zPj1l`3|6XhxU2d7C@xI@`lRu^rW^4uM?dE?y#wA%fe2#nOfvoNiGwDvBJ@ zsKnH-(;Wyn4Jc($eJ=R!;`7Iuo(p3MZ0V}`=62_SRY9@JdEi8>%R`-` zqN2*_#z3wPE$9>#)y@M^SGb{tz%IIl{CVWN;?mHf?IO6?nHUk`Q8(Ddku>Tm8%O>a zuhkXXFf5Q!@ZLX%BHd#2oN5fj?YJgRuMTy(UDa;aVt4c*)v-0(r?{gJqNpf-%?;@J zOR7gF%Ep`ScA3&{UnM!6$V+rqVIQt))YW<2J6aW9QB`?bm9x^_`igroOm&I7`9XI} z&fW5)yLDB?m7VS*6WvD|+(#PSA0?{9>AE?$ZxoLt+^rEsx))a!u(N$*AUx6CGQ)Ww zBDQP;DavVZk$lTGoqY5A3z*3(CssMi%G3xp{ka_#?W!Eb?=1PdpDxTdE5zn1$%)9{ z={Dcp?82aGw*RzpJM1tbC%>e`DB(o0^((G8AFUxKs-7PW9rd)k^($b&ZGYp9H-0m( zYE{zNvnj9!zm4b=SgtO^c8DygEdF*$+$D1tT4q#WeMWwW12o84Z9mLv%yE^=`L(;+ zS@zGsmKJAHJov_wPItoHJY5#@7-xGRI6H({${BrsXyH#Bf!|JGY7^B?rz^T|cD}a* z_9Ho6&bp5Vo*$LCI4gBE^@Uq2^svA;&bU#(W-RPJ`FycxJ~g{{vfc6Q0B`Hhm-yO8-=$c2x=_b zd57ZjG7)H3dOi;02+2){KtTLY-2_~r0i+AyFZtz{l!gX#_|y`_Ekdig zZBwNqDt`Gd&~*JK=irJLps2CZ>4Fzcpf@r5L&<4zPLDWyMx4_dojqGxWOTKRHYNEG zN^)?;U;Hb$913bGUQr76Y;qQ;Le$9ia28B=LdXwobjsXHmZV%6-Y-?W`gT-o-GuhM zEPxJhkblj^l`Sn!UDITg>_WCh1DJKwohc|vMWC{!5s_0sUBI|$jZ$(ZBtromHB&_$ zsG{cDQFB#PN<|%3j6!Z9mD^#6o6_R!(d5*j6#{{#%9hHRl`3uzn8T!&NQ-ko3tXi$ zBZ}fIai&4MCF0Cza`uqjgNV76EzY#aTV^{mrb``ciy7064&+osKPSZmv@=J5)9(`xZ@D&*n{3Mk-M`U4C3L zBdFzUR26wgP??rS2aQrUSEiosh#4r+MJ&-=H)nISbK#zvmO_&ax*{H$H7{*0t5~@#YoC%5Pb1P3nTNWmZ z+hsTWSn5Dq?i+C$X=-wg*%uo2p9%Y-ibhq_8ad;b0(@Gg{vzilr_qU4)CX$vlPZ@WeZk0uuCTyVIwh=r5T|d zfgJs?OiTfowH1q~Dd9|M1br?vAhNNs;L+kyL~wey)G$r6QiytR+J}L+I1{v7G!kiy zKnEK*QRy7f;)ux@8tgMz`(zYVb|117GqGR_1UBJDgjaa{2EG9NBX|)EbN_*$3n1iF zoPgj|cwSTW^(zcmL7CWV6*)xp?mT)eqK0-F9lQWhAt$tj$^sEb93?8Zfc1WoDz`#j z@z+8uf)V>5#BMJm7JDsx1EOl(+wd#(x?cr)6`~>c+Zwr|>S4f&AO$KP2YkGYs`zW+ z=MYuvzKma)xBCXrF=&O5TZOd*5mfQzg^Bu%9R z7DWA>Aohir%vik!A%b^<8FIqkMo{bi0Kb1jTH*c-=yjlw`;keZ{x%T2G1nEXW*Gbun5gL25Y)Q&<97$r3inZ<-vfo*Cp1Du{{V=J z{s}=vkaAUjlkn?=Zxpz}a5F19u^s_mR4G=Jj}Q)rFI1^+9^#jyOx@ttcY!#gSil}8 z3@!yTk$7LsQCoA^*4dIy{Pj`Oc=ZcOz8YP0_eOG z!FS*prGEG*;}`HnolheEHK=(J-157Qq)JGx#zB=zJBygekU8J`On$ zzNqtP#GeQ?M}S+u6vT?6&J(51lfXndPeV` zkgEQ((0l@BM_sAUqOvfc+rd2o+^-{tx;sI1f#7JV`=FtzL{zo8ADQ5T$@*XSYUC-&Q@t0s;Dct7~{FZmf?%y>Exi0SB$aCF2fu0Ad zb!TZ_#O(n38+fzaBQ%=h&I1Y}*Q9#_&;+27rZa%3WmGhsrQyY*X@iEBh^A2uFGJdE zfJ06-?CQ^>Tyso#WDnW{pDCn9h3`+LAW z0bJh0)?Ef-C5Z2l_>h(lL$Ll6Al4KU=gGUdly@~1Hhu<7Sj5*5{Ehe3?tL1C+{ZL> z-9G@mj@VlFFPax|!+WA-k;5#vMx!}yJ$ zAuS>c42z(=wg^IP5ro94(pV{-3YW0*@fIoG=fE31BmMdQdM0iVIN@dWhMdMa1n7c&5u6VZ;U26}$URIW*If#<8L_qQshSsY`++V4 zZGR<)hd&PQ8WozoFiHwQ)U8EQ3f%+Y`auxOK;Rir!oyS8Gy?ZaX_kg<>$h!MLFm(%v`UgNfT$JY!7Qr8YiLU+$ z0(A9n5#*VJ`;tZ>H!w}{T(=3RAF;LWG|h{+aiDX-o8`7@G{-#@XbX5rw+rZlKqF1d zfv6c>ozoCqJ)|MJdV_|Sp->+LMpsi_cQv8zYC_%B*Fdh;{kTpk+|K}g5z!&{OB$i8 z?**&~Fjdw45sByyTq zN8&7<=6VqI8$mpdG}z<@j3inK)8xS3GS8Igs9tNxkFjdtB67s$H;8s94RP{m0xf7AW z{{Y0`yAARUxF{#fy*~cj)PwXkN+M!C>VsOdlAW&<8Js0NY#mmB5oux z3B)?Ye3`^dO>p4WB{lI&5cQoPE`XTsyw|`Jjf=oUN1cM;H9jG5vl@lmA&p%3VxSOG z*1DH#Uc|i#s2;po?x!`HS+zpQO{|38QSc1 zV00Aabw?5Ejv~|@#aD@I-Fp0zDcn7QmLR*3J4+*UR1~lxK!K`u2?qg#oq$27c`<@j zNKthnqk^jegQpROMW7*2QMXs!{FK*&9Y$VAvzRU1jUt0C82*bFXiP0 z78xD*S>m-k9o&~{{jAw^^k$9j2M+s?I&vrH$CRlMBG8h@FjHdUr_TEMl0bzaH9E_E^x^LfFDP z8D(Q;a>$LDqsvU?}-h3ruPb418hv=?P`!&QxDTx zq%lX^3^g8eX*06kl3Au!(vNa_@(NpZeoIY&%*XVGX>U7^@|`Qq!dpi@!IY+!Oxo-kxG-4X&LJRw9~S@)kfO8 zbRM%vQxm(*Y-|^o?N@RUkmaLviHVLWHPcNhmZ0RqI!+Y?w|+Tdb)I8JFUmKD$HsXJBf3nkWv@+R z)|dhLmvp8Ag{HPzZ|8bc3s{C*(Ec4L#M_*2ghU9B!c%UlcBu#-5k4|}Z1}kFp5eX1 zQ^R|No5NGWlfsk3Gr}{&k?{2JKH+`CdxximMK}-+hAYCMuoJEfhr_eN`-S%p9}qq$ zd~o>C@L}Pj!kyuH;rZc-;f8QyxGB6KyfC~de02Dja94P7cu9C^cy>4%o)bPK+!CG} zZVk7E+ru5s# za{X3?-nsRQplY4ib)$P9yu1+1Yl_ZqNSz$q?55^p(s?J%rF<|Prv3U!gh0>+r_1N4l7B-~L2%hAo7Bz|aZt5M=pAppYT0C2# zTLv%dyQs;Q|BwRs!3&-8eq?7f9&?t&zg7CZp7gv7*!j15=ouaw@5hzM zd-H#nC%$A4V9ejUoMAYbku@zjvEa}%mJjELhR;~HCNr?Q|BPrfeNuki;P4sI*7U+< z-RWh0I4v_X(lEV&g(1=92^+Q8A1scWZK4-A6r`%zk z1x0UNOSy98(!=?I;lZIaKjX6UU-e~)OzvN%H&Lpqpm*I6&J}+<1&)`fvT}Lbnv))7 zy4}HDFD-SDhV?d@y4+_e2G@_QTR-x4d$FUah97F|%k=l1pV!}(MVZHO{JlQ!&$%of@+U* zVi;%5OV3Vc-@Wa<9Bl2r8E$N;c!Kvu;bu*TU>5jz%?2uo(ZcUnp_RB^n8&l>J zr}(gGPfwp1&Sg*!b+HrKsK~}dHZC$Tk%_A~d_5eW0nimiZI|JXLG91hh`s@ibfxFK z^Z>+Vk~Mw3xQOV|WpX2Z=VV6mJtAvLEDTUdWkTe0UXMs`fLGTqZO0|VfR1D93=8$K z-?YpC>J=%{nk`FZRI3YP!5GY>uDhF;w`XvDR`z>|-51(i7L=AVp5wrEMXa{f zQ;*57pw`rCyeHC^bgE8V+7!}kclYK_dlRD~2QxllVO=L!H=OYkG192;3Np#91ad;R_D3qI%RlS zJdOY3?BGI|%LRjN1B#*7`s)UFUz^Z*!^3OX5V-q~wOaG18IgL}tSg+)v3tJ)I~Tk6 zD?CGUQEc~q#h519y?L`bIWD% z$}BIvn^3#=D@q@_6sPCnx_!*xha`xSHW0;+n)mS?*C2VTWcyL|G4(szR__cA~jZylSD zfm-4xS?qGjc={0*?7RNh>Ha9xzvc03eMpwz&2JfUQiuWJBZiJjIgz`DYJO&6Mw`jTmGIK zti;PtCAp}TXW3jH!}$o~-thi4UOjpn+o>20B2qG5_5nxl-fk(v#{mmZGx-dB1_nlf zA?W!9HG;!U%8{8~Ytns*fAc;1^y!gJPi5}vYV*gPstvw2XO zVe_;z&E{EWhRp-ZG@Hkj88*+Y8uQ?c=UQo59<)^`qdY{cxZ}+e!L%6912Zaltd(Z- z2rI+pc}Qb&;(1A0mIpW$bK*f$#hiGojTYlMQ${5ZJko3)^)p60j{?&1Je#Pforfuz z)e8?wG75RLk50gYeGHqY?Pxa7nHiH0&!N%rJQ$~#4-W(}`S6q;qmaj!jM2j5O|%xC zw^G!?qfLr!!INdQ7>|-EM(~grlL3$27?S~y<lHqQ!9;~W!k|InCm1v-JQap6_{|o$81XcPzf3$!;q|a% zv7f?s5g(xNE5rvX{54pz;34h|_=7P=C;!?{WBHd})C+eee>5H@rY^V(`J?d-#JncL zeU?8OKS1m%{*Npyt5l`4pZ^v)&jDbW<(dLJV7{YqRh%#IQ%YV~Jr#RM$=XGCbVL8uO3L&a~t+ zmV7U<{wuVzi1Ai7^$cnZD26Tm2I9%&3ULuJ-Ylj3rNqd0HiBz4J`DJi8Xph*MUAt- z-y+uKzfbee0V~RW#<_cRNn#u(NBted(0>hrBQ(AR_-IRhi6wsmG0p*^TSkn_1of=Y znEW#=ewH{wE|y!w)0O-PG4kayY_rA>17EK3Q@|h7_!Z#)BG%>qyynxK_Mn~4gom3( zJWJ`HLCki8%>Ekl%+7;}wftP-SxWwJEyEK$kF#XDHJ_(=t|dMI9`0;nbPCww94*5$ zJmp6+kT1{j++@jbwdAkV@;updnjf)pFg(b zAGhS6(J~wpFIzHy*LAZ?KODz`J;yt z>%5NCe4asiyv09B^LY;GYOF!T+3;}hCLU5{UPp|4`8m50jd?2PMV9<#Oa5{#!}B>m zZpqxJ`8=cZix&SYn$L4Oe@uKXJlx~N8&nyd&@%jEtQ{Kjw9aQV=Bb^}66>@t5bLym zAwC}-jz>U>%}VG05MMzqUeqVPNb&1=t2m|GKUcxST||7fD#I3HQ))VWr{EWOwJC*no@Nj!;%&{|_cpE(2e#AGZyb{FF&m$#y6rj<0jOO!L z$sXdH;NjK~->lNE)iV5~;@KMWaLMy6`HhzRR^m@m3;xKF_|r+LGk5fQtR)f zjOKIgDF5;fft+3&mHcM%v8JVa4}bLf_8MZnPP>*^uQPA4__tbouK$euc49OP%l|O3 z*7IXxoMub@Q^cD8JL0_+pKCqWy~W65)kXx5My5TgSbaJ^{wS6F91-t`W_8^4At$-YaSOzmR{3l9#8!YknoxD@G63f`zpr zaa753U1<1+SbVMp4SybSOv%fW;pc*eTW-m7{b$xQYlvHwJlBH6bQco0DL&VQ@*Bno zuC(MoMy%IGpU^U_-lvH>;NkwulINOC94gu3USbR&%0EP`_54uFkpENS!{On6PK<+R z$lpPHBs|n@FX&LJ2(lV4kj<`$7b8Tw$r!}VhS;ULs;RcA8 zDESSJc!NAllAj5^X~iP0wH%ll=t37x!OMjMhpLYdX%;>>O0HHt6q zkGHD|2pxz6`%Kw z=DzZW#6ybDdq~57%Hs3B(eUN{ua@V1qZo#Vt0vZb`F)48C0pGKYrZ_VL*I)OkzCAa#G91-=ZLlbFK8L+ze~#iio1zNl|1i7jsAy;H!J=xh_}GQ{hD~I z;y+8Q^}nEHsQ+ax11SDZe6f<}{jJeoL#*{T6Tb%@ZcpO(D*640wf+OO4E4u|-vA#(L6dvvlV&p~re4IlWx_gPW9^S*7d;CXo8l_|r8ee?Q_6E57_H#($EF z+Po&wT;If5zf-FTm^-@bQ}2 zE8xC>;nxt~tn%f(z2Wm29QOy9FYogWKTiB9#XnSIaKw?spH_VC7s#(+Avnq6b6>#d z$rFD@$@dc@FS>QaS`YUK%>D9K;@gz`rNp0yhm-q7w<|vP5hz1<6Y&=mpL+^M{!Wcq zuWu255gzV7;x8%r9}$0!Tq4CQ~NWypV$SnGe5SeNGoVqG5YFNizf;R4n8`Lfbq zORV)zB!&$2Pa*yaJltNycPjo2Vx*j_aMZ& zUat`A_W7rlp&q%v2N^oKzo+H7za#FGY_TWt{i>XD?@sGEP|HwHRLd|$l34eb+|zr2 zT-=I~|De)y60z2E3Nd7;=S(dFC^E#l{kg9s9wHZOA>!{T`Ax)HkKEsb4E20K%K(bY ziNCM-+>;VNAQxMZ#6ML0TZy%v+qDe!+(rB_Jlx&Hk0|-?5dVl=6rK1{#eaktI_Z8w z{A0y`f>@829mIOP{F!(=JlxB~KT-1kLk!!XdxKcpZDlR+Pszo4iTE)kFF%6vxMYiI z7N7fNW4IAni_iTv@r;u1A^xq>Gf4cT;ty*X>bXG6 zFlG}m@*bDyF&;kQUPw;h!2ubL>+|s9fKrs zi{i^?N&0<*NtNIw75`OY{qBJX1Futj`7B1ihp>bEa}-}*e`l$D<@NVU#h1?@^!o|& z8N^2v|JrJV2PpaLh;LN<^Jv5Ry@d;j|4Z@Lu$}Zf4E@AESA15{ymv8)ShwLUV%=`C zO1iBUl5g6FShq;%*nsdD zgpCN7AZ$Xo6yYR<-3TWmT!ye2;VB4dW~U*Xitr4CEJro`ZR{EnEWmB>vSfuA7PAmT zU8lm!G$dA%fR|e5kf1hZ5hVdHi3KD~4Dwbn%#@BbBBrsj^@!;WW)Tc#xu}RdI;JHy zX^Bl*VtS@!XwovIV_IUiIAw_0>cp%v9c74(46%_RkB&0LMuwr0VMs?AVk1LrWZ1)W zlp$vMNf5J4EDtf$GLD$mVED8EBhTJ9e0GqL-`kSe$C8OyGIC%42h&AkWPQ zBYz>Vk>5xRPx(=J%AhHvV@My=o|y6UoFVAQBjy+(LCo36$Z%{>Klz+Rj0|TGBV%ld zGV+3@_3UBE>;-J}7<;3THhH zjSSn+$m|JBMU-J18X4Bh$Q)?#O`A~uV0e@E5KE>7*rc6n$;2#~ge8--WLhnmcFO3o z9csyU0-Jm}#!Z_gzib zX!;RNbB<^HFEvd}|2s_^yM9U2h#Hq;y}6Jyj(xlrCk^cwPgetP%bft3SCN<3u^d)% zaqRI}!GcL%SSw@ym^s1dd?F(soEFrvZ|FGY?J`o%#4+ArUUS&yM&Ay|O=3drjNB2R zy>c=GEyp;zE_f!dBmqZ#w0Yx99Z|g!x#nznxsyF|$3c!ZXq?f(=l$GnZyF7An z$eEibsx|t)q2&zSjfI41Gs+qKsFtfF6K)0MUQtl~n)E*dWo(-f$FEU#&v8&k1{~*( zr{Qh6Y@gy&PR^HF?nRH>0OT$Pk8-@e(ox?(;B9?>vGnmeNk_R58rhb69dax)^>J>e zqa1I}Y`MqIQk$fd!RXlI~h zJ3VrL+lsk~6R^h}>yevw721yl_qY`vxf`%E{s)f?$zI5@4UBvL$FbWr-B88wY>&R@ zup1`d>@JE(wAmxK=eIHM+8JnhzHx8&$C39H`-AHzI#%mOkKFGd$DJ^$jKI@Tj&G&d z`aTW=e*o77%FUn<9Ob_4k?Z{(?pnd4+)N6=QSPT6xv%`bSiV_OO3D2Ja;GF4*J+k` z7aI8%5N7<4@528#sdvZ^fCe6}xVY}U+KuPbGjWyk%EiDbSMJR>ao8+bqq)ALt7Fn7u zC?EnVBJO~osEDYDJQ0bAQe+WO9*R6);o(!n1(k=(6ZwC?v)nWHB(d#z<@0~?I_=!~ z{(keD-)z5`GiT1poGpu&pBM^-gmFY3CB&N7ao-ae2!-%ve$9R_v{WH;qg3}kyZ zfuTVe=K6YM z*s(D;ILO?yy}f-y*`e;fUh>6Y_lDkVPo_URw6VTVWY#Wk>ge0tJCqwBPHx)FAl;M8 zo(Hft-I49-XiGG%>h9gplUpT|wjt%JcqS2Fxp}C6^U#XE&RpA?M3c-fGdR>Yklm2W zELySP^ublB4E`@pBswzfsMC3w{(;=S)0)b5yd`?$9jkJ^gM9;;RC3=HHi^Q%1!~h? z8+3K|4DGY>Huh~E+NbqT^=ICa&T8z>yhTmW+@Hxe!oC;=nM|&?6CIRjzzEEA_jV6u z+BbJ~10bwt|^sHH#T=BGxq52$izj)){|%oswm-86jTpJlwF{fpn6h;dJ?IiiqeIO z8iML+DAbb(++~ejzls)B*qgN zZ=^IQ)5+#^BHh@KZfR*rH>c96&aRfOu4K9)o=)cyEsfdEu8wT;ZbwQ$MWaSaKs}>I zNU;kkrGhPsF4y-4@XKW$&u30J+QeaJD@KUnf{>x zTsArea+`9!L)JxO>?=lNI^NLL+}^~?M0-mr*#ygPX>Lzrdgvx$br##Bcto=&B+sfI*LS7SEa z)X~+_5l`h34avscHcLQ7qnah49@#9Zahe6I^2}g%Q-4oxw`S7bm~4u7q&u49sg9PG z=6F1p?nrfZq;k22=EihmS3^40l56Q`-)(yYROD-q#!NsxvOSu1+a7y(#Tnanx*C!V z&FOf1S2EX`%O<-T8-SX+nw#Uf#*S=zvNMs2CsR!=yKSq0ibl0nKs{)yfxb*ndkoXuKZ0w_4uy*4S}oXUHRqhQ6jJ+@7gaFB?C8+ckx$>(m~q@SAV7GWl#f9lT6F>uv~MCZBaT1}~G(z7xropjMFZS$Jb$MLr8}4m?#Rd?w!9 z5V%Y}8xP!dNuP_mEIbhpuF7ZPso=HqnRwu_lJpsPA`!fH zJ`+y|ubt1t6UpEgai5Jh1TIv{XXJs4l=9hlL*Pk;`{MRRs;N2XRFLu+Io8erS8^$z zjVI!P7X>MwktY(t>*q7`mf(f*S$RwFGWo2$G4TAG@)>z^;4-CsMxG9An`yt52cDwR zJ}XZJFO$#8(}ArZ?Xz<1Qv@6@X`hj&f|to>Y%~1b1F&&SLB&F6{UkK z@~oVS8iFf=k*`gp^E)@4cv<42F}7^R-pq=3Hs|80IJSV>Tha|FK3>e_66uyyt|8r( z$aOTuQ|Yc`VmBLqd>#}?kI#Vld@7J0Sg&s{%X+?gL9Tnl#-TBqWSkwWJxr?ht@coO ztlg^S#-?0XD%sW0i5xZDZFnXwUhK8+(jFHTldN z*Xf{|{01J}2z(ZfWqZIf`8TTY9!^kAJ`=}_FF`f=OgtT2lV{>w&|s|{v`8><{dyE% zJIu6qzjJf8bBxRP*ejZ3Hs00P(%ISAh^Iac9gUss9W70GB-GUuZ;q#vja`k69qC-Q z^B-ST@!%$)B45{}gX-~hOd_ZruUq651Fs|nte9`+!83_~iu@B#;HLJ?JGeavSRzb2 zYm@S|B)NJvuUho9KKn}t)#JCn=Aepv_J<9IfHm{%j}uj3HJ^=2&%|$ZtN}K^6IottAmukqT zMZOh1uF(M%`4;rJumx1)ThAv0H@5$d6%YCY7Rmo^MQ}wv)5a5&phfc8HkNxqHTjJ@ zxF(-@<5nzanSAz*9ipI`dS|p!&2R8tpbz{phV3GVU zRp22^P))wIN#JRB)Jqk?HTlfDF}Nn5eK!UkDgJjVngU;YQ$7Q43f^@-3vUkIPCg6A z>tjL9$!Fqtr6Qmv|0@;Efyb}^m5S!TR$#qS!8>QX?Gv=80(wqpYXw=FnV1ayBmZrv_1@c{3@IWMBiF^yEzyzCM@G|*KyD9i!^NgDpC;V+f(8_tnEfoc} z?SyCCRD{)6&=OhJ&4W+O+q?R-6GQUY5rgHKB!*Duj~GgyJ%Ya*TexyX+tTHWGiy#+ zx*DW9PDMpq@48u9?HvBM;I8h0OwXo4lpe27se@q*i+=;xH7NLpw}xd&*=#MjZx$u_ z#{%OY5 z`ui?G%0#>ij~IvWw??^lUUU%|jorONcn5c=FQa3+$xRrs!OiVbE|pIRNtI*(r}uO+ z;k$AJeNtCG)uzooO8XwXB*^S`b27>3cC%89`}7L$+R4`1Gui)tZ6qtdoA(aTNCBP} zBh_AytUY=zIJ!gj^jQzCzkB#xXuR2P&n848m7gE?_AiZTmV0fz|G*ZhZ{JUxmTixD zrVn!+H7fUHEbohhhsNu{F|S|ya+<}lb3*wAGHhERM*qjbaf+D-HaW9(7S1=jpu2Nu zyWS#2whYqW)Cf|0TrN3VjOq@Oc?G;6_V z7RpqZ@*U8XF3<(e{L!ohqgl`;Q|8*U$Hl3lQv$V68SLpB5^oh$2N8O|_A!MK@%uL` zbyNglNJPW|2#F0nqafZ9M}l^(_^rU@7X1_8i56Xt3~Md=a$NwWzgYYXw3lD8s1Mt; zBi;?#%g+%nfcElpM5+kNwWI1SpsNrnwktlX;|={gUwkt%XF3x<47$XkcY>Z^(N&HR z_@9?Q6GW*+-vYYWqF)AGVbKXhvdv9?7lHQ5TOyuf;(UCGm>MmNZwKv_w?up%v{&8| z@dwaec}v7GXgsgHC1N{hue>GVG0**cv#CD zx)P1K!-_u>v@QQ>&|ZBj#4Dh;Tk;JUTpqR$4s)uL|)?X_ox_&w-0EB+Wv7Hcf} za?qZ=SBNJ-XRP=ss2o`N`nH4i?7c#K0d%(&|2pV{ExNT%%{QjKt^_@3#s3KO9E(19 zvJe+rbT{avMSm4Ebs2qs1Kn)VC!+CBvFPhSue9jrKzCX6?5RSWZ_)jr*ID#8K(||T zWSS7iS@bEO&#>qlLDyUKi=Z1VdM+*ivn=|2&_`JG2xuh9*RS+IAz~K28Z=BWAOA_v zXu>@GOVBXsJe@p9h#rf+6m*|O?*!d%(KYD2%PjgF(8Ct}InZd5y#7Cco@vp?z}Szn z=pCS&Ec$WKp8ZS|e*sOW`g5X~A1jQ%5;QIm`S_=Z9)>66glRD}7aB zGiW+P-w!%%(Zv{yw){%a2`m0a&>@T71=_1$l{g%gk6ZBrpuO@|iEn`B6mIelqw_Jv z=IN6`r!4wIpebwQe+K$ci=H!Eh{G&;0Cd=*?*r}4A63FZVhqW=zLlU+g*^Qc&?sV_ z{twWYa`N<1$jr0PDscg5Okw%>Z-e&c^D0q>!F;3@zXr5tk5%H6pxGs=el_Az&~%2b z!DML1uLB*i;%^1*^+%2PHE3SqO!@{CmL_HB%Rpm_$kPvl_UyMtOhjS5_Nf&ov+#NO zTJb^9Ui;RHpZeryp|QR4)rua_Ui;OGuYvZ)YpwV@=weI%Vi=RxKDFX~puP5-B)$Qf zPSt0U2xD@w<4*?d>6;`z2%54+{->bJEPB>FyS*lfO`yH;I7xgBG@UDdCyQ4>pAD?^ z)ro^??Aoy(W^3BSZvwp*d_&&@dYwhT3EI}T1cU7?EB^hUz4ojVKLNeQil2dtf!E)4 z;yln^f7Xe+L3{mKC*A;!DL-GHlQ7sY<>l%3gD$b?=Rl*$^6|4US$OtTCwf7{2QNRKh%lkpizW;{0*SXEqWJdwzX-m!*Q{|l$xgpL3`t&PTUXL>#sUdjL9`> z$*%u`?b&mkII`KE@9M;6&@787&$mE(^HZI0TkQF~PMikXv%fm= zG0@Ac^gjo^z@q0JEyO~Lz6kU(i~bJilP!9}F+!Yf(eD6VYtc7@KEtA40ez-LHykU( zJ1lw&=#>_|6ZENhdWxt$4up1W$8H}z;-l-1H`1!zdwul7K6>&Ah4Ke$TDA8S(FNLT z|0&{5(02L$1lsHWDdL1yyS=A~D?nEv3#0ET&|d#c5mV>e>yIg-9rP4S{tKWvC7blG zf%fcsiZ~vf36sdjUjcfFML!LCsYM^S(7ql`5joJDVvPPfLF0d({u2o}H3!5*WRXqJ z5H*?(fn9_v*C7S;bTPMpo+XYhpl6Gv7LD0UbQjPw#b(ggLpSyF%D5Hu91w!UBVXqNXbAN{P4mXkd*gQNT^PX5}FKHo=Q;iK=+^y`qV zhUNazif8#tc`?$C^g$L){orIbaQJ2bJ5MMI#o=jTK{u*eXbzYoUv0mJ12%kt25;^5uWab=en(> z&Xl#GZF5StaTyX>e{1NmkUKvMytk6BQn-W`<+i%v_^o5>j4g6!#M~LkT1u`jlzd3I z+4ay+`oK*k;WORg*WKYIB}HeIMAnu#XSiF}7c-4e*Z!C4$CSvO@ z73++MlJGiVc~H^wGvamPFpDCRH2-q&{~`C4#&_Dp-{CemO!~mUJ|ZS zGGoU^#){o$(iVBKB~aVCQ|l}?{B5zak$K>|OW(z|9=<2C{-*HodSK~Z#gafewt2Yd zrs7smmCne*aB-;gfhXPJ^WEW{C1HPOxm#mJu~>9Hj4T$JJ`r76G+fR`6EW9xoI8Al zuhGIcg;eomj~BF<;i=q;z4FkC}vanSYl{!1)u5crZfL(M8`SZzl#d{-* zM?`q3GchK_({6YPN7AsXY#jMxyp|T-gkgbFy}WV`t>DP;{cZZHBWmCbr!KQjDd+Me=Po>Ev6l%wr}mo><~2D^nxb^ydgF zx}5_i{Zcdi>* zus}pg#k=otcZ~=v!};SnbrS_f0IgA!Ea`_8v4jx^KX5L5q*y{xPF$++_Yj08ha_hMC$8>R`ca8#f~U?b{}ZEd5d#o z(J!H>y4YC)FKR$15xWjl)N>z#_4 zNhsMRY>O%|E2cY>QIw)kaeXx+Cxg0}aR*gP$(fLhgmlzQ6?M3ZnrBDNQ&9~n>KHEy zxkXfN#~^NUy)(7OsX!})LN&$p#WRal+*FuDZGEiXIjkP8*qISWah5p;LA*ZZ%&2ju z%I-nLyyAN2px9osof*@m4z|UN=|%@~swmowve51(pxVW;YGVSgTvl`=ItY1})kD5H zAMuOJDE$f3s+DUITQSe6lpQJ?lzodPtYq`1iets7oGw2ut1;Aa4yua0W2j7hwSz{f zm?u+Dcf<^o=u(zw9&$m#ilPf>Cs@%zWxfp0URLx)a4Tw@8L?u=t#c};qM0`{*BQw5 zz*)u4Vb#vsYA0ReY^Zh)Qw3U7?HpX=oGO1^Wr<*|t!L`FMHewOiUW~!y_2eODknP` z#dT$>4G^4M>$E5yx)YMAdZ$Mg-EnJ*oyt1rAT`P>>*hJ-dK#E2+Xl)b^GxGDbQx;& zpsK-vsDU00b80XhICD^gnF)-GNG+;QYn%y*>GO)uL|f)3i?7RWcueX*TOJZ~s%dI+ zjyVJx4xI`6qKax&(=s{Zm;&4>Q-6tblT(e#SBA?%PP*DT7AfbVKNq})XY-> zDvE#3!D>oCD@}_RJ9AWr&8l$(X3jaPR(0# z?8bRT)6m>S(WjnUF=Lwpe%I=&t)>iN|8qG3Y>jiQyFFZY%u!u5= zH;Nua)OW{^ehg7hjT;?)4p9*&vW?0@F-M#rieCWhN|GwKd|t^nA}oRtdktcDjUkqJ zBU)68%|mx0ex+Xb03fdHBJOOBTv3t$EDBSgxCQXpF;perh_)fB++B-bnYWt*Iti^1 zar-oas*3@OLKG<84#;(%zwn7SN*NEs#&6LLkh%qalavIGFMrN}MzqPetIz zjxLceQOM>mx(`wh!CxF6OHo-J7JP@o%RF>O>H!R24C5V&jLHK(npDCbs#ppI?}Ydq z#8tF`xC8{A(};>J2rA<8v|^(s+Cfxa0OCD}(RrQ^o(Nw8X2gkZM^Ns*55E~m2=_*y zE})2ei$<;p-w7CTO1_4mC`7rE`z1V@@Vj|#_;JE$*)s@UhW9FZJydfUd>}??zJ7V& zRnJ2e$4VBSu%Wlwr6JOjPuI1m*5_ z{4RlnaIXPc2^4W})Cd*56%ZBu0)irJbD(x#m2f8EeR*#9JA~1Rk0SUryjM{^-Z&OM zUy+J~rU`LBlDC0dISa%?AY=kO%wQNk9L$Iljw681W&~%$OA-0QM(dG1Si5vb@GRgY7U3@bY746e}S6gz^(ikh!IccsZ!@nU_$3-5fnwM zzJ%br@OhnaKJK{?{%ZKq_L9%(AAo$S%0EN%*D9s=T9UWVTyZ&o4i6KD`oeK?rc z3HN9OD$m0ain^rB%k4_s2TeGhv0r4T;3~JJO|=I5Ra00LCZ%WSos?ePkM=S%b{u7w62p8Ad4CIAdt5L+ArIG740(Bu4JI$IGbJqa96TDgOnHtS?&jz{#ytI2B z(0hP}YAyt#W?00#HH1ZcNJCh}$2Fuy+yxAapuDySLTwR*+9JLVxpMd0I;C(Q1G)pz z5%*s;fvUR;*%oHR6}3r+&}XmDRg!irNsFm(yyD%(IT_vBBae0U9*5vO_`0(8M91TR8f zxEE;@aj(?Kbw395GRxxLrg<^<8$hptH_QE&MswWZW6EYOb-Tkf8xc`{bdc&)gv0Bs~^_zY82|H!02kq>#io$ zT}`OF`bEfw@|i+>2eIXD9T4SW?vX%G0L^meX*AbO0sRELv^yW@ zC7_|2Q-GKP-MvmjboY50qPzKKD+R7bU%VR_-Az(=H=*usLfzf(gIu}$VVzRAw*Zx( zx)JvdjnLiq0v3gss$@jMdcg2bKsQqIwB#IuG~wp}G5B6UfLZqyMnot55y79~^LF6! z?U&{7>*4X=X9szM5EUoP!mBtFg}4?{6)QAx3yHHqJdc>Kk?0072{-GHka(vio+oj! zCVmH^avO*k#B@(qF{A4DfQeqa5y1fT3HMfwBJSN9x$gIXE<$X%`=sW@+@AyO0B@H2 zvPN^=-vC_;UfTU{ppOC#)wr{jX7pN}hUm4~8luBhXgD=2lN1B%Gb z4Nv|Nev2l*gx`n=|D7ynO7u{?-hjp{sRSqrmji|;6Gla-DpXW)K*fTxnzGpy6LF^+ zo+XMZ%F2$%P$^0S_Es#dNtPX3enR>7Wub5cYD1x=HDyjc1f1z&Mj0<9#gz2PMQfnB z43X{x8OcA5fpL1gb!j#)-qc z6p{61sVC1t84pCgrqs#8qL1ikyJ2zN3Q6c6&1>-ULh{c_@?46AJ)-7VLj#~d#YW@(Wj(djAAnRJFl;faN5 zEixoz0#%ybsfiV;vB;48b067WyD!a@LNyi{5}Qo1cdsU1sKz39pH>v6wMb*?Y!QP^ zla9w@6I&{FPnH*EzsF>OakY6(weO)_WuFC&E`%*S&L|r-lS6LQ96iQVzUPzHnB#c- zUP1n{OuA1;VY^OjfboX7Y>&=e=qIWIn1lOncjTjNQ4?Ec|uU6HH-h*_4H>QQcw6q7{x+u2DQz*0LN^bgg2P zDUa@^F)VxBg4yLaIoZ5DY^1^@W3-HQ0UEa~d)r6{7S3Z9X=-A(nT_q@vi%A!0FvVuj#_tyEREMHfd;jGh!-5?vZy7F`jY6OBjbMvsctN9RQwqfOD~XiGE^O-57E zboB7(>gc-Y+0pgUZ1k*XCVEQroan0PY0)#IYon(|+oCI@Yoez|-w{2d7X4J4Zy4Nc z0=o_F3RFeBo$9ws*YWLIzYz{aIPAr|E&K1Lu&mzOwtmA!Z}0l8kGy^B7em!ru{%fi z9(Z{nm|qiLP}Q(Hywz=3fJx`=G?((}Gaa5#zU}6kS*TMvD+bpDulsV!{HlhHJ#NDy z{O2X)ZPlND)AhyEl($`f#!#o{`3M&dyYQ+%7uC2Jn-{Kd8y2!N-%ew5C!T21y&cy9 z9Gkb}fh%1GUXRTYv8bwHUHCM&VR4OE;5NK%`ZI<)-iT*4bgSTHeHYibn2Rn9FHtiQ z??0pfe)xAb|A@xZ)q?oFrQhvK&&z<^~4W^>57fZs=JTk7rKH_4f^~i#KK#t!m4x>c)Y<*`e;fUL-V7EL^g9 z)vCF%RTuU4^$%V&7+c!gF*nxT-yb{UsAN3ZP#uaIZ0_pH4YUmn zELyQZsH0UgJ-J?ar0L*Lc3?=Nj?DuDITRt2X*<8KyK}q)PxH!xY0^c)cZqRy`FWZC z0UV^hb{~B>q~K#5*^aj)k5r-Fj#atd!M=eEKRmRrs$qZs1i8HhIV20zdNu0m?m_?W zt9tmqHqy6wXkWHdqt@4-d22elP;YfJ3BEc^==s2C^ls;%zyY9b4w@k?#)ZfDk#@>GUz$CPcayRw#vNILkho4T^O>yMF#Fa6(sefaJ7fjT6 zuaA5m?8u_2)Y?Y0$3=TWv?oP2A+kv!<1+2tLxZO4F<4jO51D&%tK{D{w_z+bK(aeEWijO9Z2J2z)xi}r`(6>p4Y zN2_n%WZL{f)2VX8{y#iquo~LDDdXKOaHQCyIfGBLbY`;nsLF;M*OWoN_)*x{_L!8t z=o>s1Z_HjqiTC%SURj#9^!FmKJm{=F`v8j2wF(iKdQ?ILIV3IMg?g-H_vg=k&o2^| z|LZ*``^jr@v2xAowl%9WD^@OAoLQJzwfK}(D^Dw6&R;kt`^2TEWtOj4RUitUpQcP^ z`QrH}pUL&i;Kn|*KQ@;Vjn;f^W&q6Fg=g99-wxZq9k!>l!{WsL?J#dx|HFxNabo{= z*dAPO7AN*^hha;{+l$wicyq-cJLKZq+RfX)9kzcvY#_s}L2nnUttG!df*V@BkG6k1 zZ2xwc^~BGt3HNV@sjb)l1Dl(2(`5g4*#CG385|(q=ul_=S$7_BFFOr#esnjNRPj_!lp3Z03dW$-WKbx>W1#L;6 z=8MuPZbLTa0hD#`X06lPy1To@H7L+q@MgmW5vtwG52`<^5;gL6b9b)>v?Y@H8xHIz zcZ);tVtarG_bSyseD?mZ)VSA=)4z*%oA>bXZvw9g7xb)p$T7xFJf7%2i}!4eu(cQ) zL%3V4!aJP7o}@h}Q>s^dWG>?tsaqUBfw}DABcK!Ue(*ke(txohc($fD{0;_3KRMs# z!Dj(&(~>8)<{9!dP@Ra{ya*oQsUvtUsJYqUp_-b_126OPd~t_|Vd^-ZuxXO;WJ}HF zxt4~_!zneJM^hR$&zIC}o-S$FJR(xFM=Ul^3S8xX6N4uSYFQp_m@lI|w$Zy=;~9)v zj3+RfoOo=YX7kWM!{!NeqjKU2by}83=6N~sXg@C}o&~7Ic(R{S$s^`8n}@57($2%z zbUaUk^R)B$IsOa>SfViA8T)gSP^mw2MW&k$EBJc$918-hEXL5;#6VNk2^^9sf#D^)o8G}H6;|{^S#78Lp>%?;v{swGZG%GCs>Rt_VA^%WXWBCWM z)C+eue>5H>rY^Wk_@nX7#PYmb9BgXgoy27-ucs_5t6Hx3@-rbCpF`FJ#ou7zD~MTc zxc6K5v&8yum+rDK&zF^d%!J?v7XCRgMjIVZnl-qR^~Ug_n_}U5Vhk0!CJV11#xS5e z-NHS@uyeZ27QTTPR!;XR3xA0ic18D9V%QOjbuaOs;NiZhG5@CbyO#VTmi!aM{9_on zr-|`mKJ`4SG5J5W_%9ISh-A8-6YEoi|458{=P-hO4txxP2^yaQJWbuvHA1B7ytSryXTIPD-+cdr%_)bgyE0+A%iD$sW-A6oK=^4?O{D&<5_lakc zi<9z*XDRvTiBXqtBH*dH#6Ljry2dX87txl%e;q*$u`d5)&8K;9B|a1$?sDS8l>V!< z49{P_Mq{4C{6S0p!W0bDXcznCCfPYsr7mlD|pI@O0<9ESbACpC>#& zMcmAs(4NFctGu4mGCbdzC;YMfDV={I&XJ2# zD2e+OKg{{5gIr8i#P3x6GU6<`xKt1iD1I&R5^^y_HAZuagNV-{7sG(KSIH-cbvYY| zQ5POAy+~u8EPblRJXrc1jd`y0c^dOr=?gXH__$nS9xD9-jd`Z@EyOyn&uBi+mA=Q~ ze?#+mw)79M_z^?!a6cs8tjhdjVw97gPkmlv_QTID`Ijwu9-T{hp1EAi`CIG6$KfQO z?K;ikAFTO2d-)jRcfrG*K#U6)+jEhY;orV4(U>PNFV~nSF`r7T)2<=bX?Yf{xD+1l z9O4~HX9w{I$c2dz4=er!#9GhA#Hb68ZoW!mp4XBmPj7yK*D+48a6c!;y)*0kD`Mo!PtyKYW1eOFCrkdnEqQs}y8&t7N_n1id^WG2pMZzU5`RkR?;?gyw(+?d^W5KF zjd}j>1;je-#l$-8F!3$$a62?+-LEA6G`T{&kN8%V*T;yF7mo@40BAHd7SVPt}pI_hg(kkRi*z_V(8?dx@$D%;ksvP%tLn1A=YWziFMiy z#9x7jJI~_x6aQ4Q#SrmNR9+VmKd1PYTKubtQ3jsQ`w@+KIPYgP=GnYo)tE=~j%du2 zc^}u92lGCsG0)}wg~mLV_ce`qDsKpP2+WIz@>UV+dQH-N9?U!2;vcU0Je;=;HwWS+ zc(~QX|EcPACNXsKK-#l4=E1aCjd?(A7qL!zF0oGANBjqPxIyASDxDV+zeX;m72@A3 z{#C@ti)Yz>SYsY#d#lDg$@a?{^B~)AY0PtMAJv%0*#4AQm*?L#pGVnF16%wTfArFs z3m)SpDiC3y*P^w=nm@(j&$0M(iK|ulxn4B#ClJ>t{wWs!G-4>`*lf4>T^66~Ncjh_ z2;}rPNy%>|zm7k+PVonrdgPR(*K9YEuh*P%$Z7r^7N2WDv&I`CK1k{L0kM|T zsQ*P`%}3W_P%6G`KF$BD#h153&`DQ81u-Qr@B5~ci)A;a~)~; zt;CwowWHy$CPs%akYDvU6aa3cCC~MuS^Hf~e58`++R^Z@wfI~w8vdt=(a8+t7e0;v zfcv^7FYmeP761F>&r|YTFPgRG&n&*Y|I+e*AV03;<<~wmzZh#5qlfE4vu>P9oKo^! zBO3lu7N6@v!=F!_R`T-8A4$+~Yb<%L1IiM1Yie+L=zpCMlkEKIw^t%|>k zcs@MbOT-Hl{}tke6iD^I$wED4H=f_1}#JRj}mM9A_}q~;_m2k>Z&dulh`Zt8j?^-&ue=9`44u3O&nfxiCJ~Al|I_^1gluG@QJz*L>bX8u`~Pd3kSsz7!Xw#R#>${CEu25C5q4cNpsJ5hQ@5q4&uw;;WiL&QSt-CTL1Z4hVqwb89=d( zcv#6_MSLkd+%?2HU*21at>o(a_ial4i{xwlU)D0ze=jj)=)Ot3UCHyl)ad^K@eaj* zj`(tTxStWfTk&5e*7|>=WvKr(Edwb2O#B`t&wE{?zl>PxuOq$!9&Q@(l}dg#vDSaM zmZAOx@m26}4H}bw95K?;%_kmKdgLdR-b*e_mi(&~pZD0}edJ;+5MQJCL&VpT3;WkH z)W1c`kiVUHSjo#TD(QZ?fqY%Bn~AT3hr5mV{Ysu60Arie-A#{OKB#Kb!a? ziZ8!<^igtg*&zR8iZ8!zguLiZw&dkr$|n?G?xlQE$#+raQ;L7C#%u@f1qjH{U1ssQ zFCcCr7h5pIH!D4#AlCYC)-u%dIV}SyzDSI`$md>w*+clY#^lRA7Om$=i!VPXr1>vd zeC`XF`}98%e^%+|9)aPP5o$1g{pB(y(;^)Y}L&^6LBQLssOP>1$=H7Wb@t2kSdx^gS4|gr`R~4Uo3Y4MyH1XYv z&;11>&u^3wvpxA7Q+y2`?t8@dDE?E#cae*=u9l(vziAor6j~ z_&PjXs1!f4=Dax;t_bbbBMpK_&H+er0XVrQ1Q7}V#E8YRP|6%doz;X&FHAIpXgrdG5K0hsj0th;=(WOswnmsFtCgA8Hvu@vJ4! z{Ti{8Tp?Z|*7bUwSnK(#mZ6?-nUcY;DAt&K?)8XA$i@6m{C!o<*~D7U;aZ0BaV-NV z(!{#IxKAV=B^OIZ;>VPp(}=a6)3prs$o)yk(8>Kt-TvHT5|2x^7$SZ`>DglG*{)@% z=PE736xR^{K*@7|N<2v}rYhp66#oulU7owN4E5Yg{4_k=H;I3!V%QShYsAkg`Tr({ZP3ZRN^Q5rFUt1;`#{WZ$awOM@bwTWLyw&*1OrP9+!{F34i zY8mReSj#YG3o-H{pZjY@{)5CXD?azy4F5A0pZjix|1TO-5BJ~PyL!)e7uVM-zfP5iGNG35HaH4DgI%^uab-V z2;$!>zBD!cPJ%R-N+}}bbMuL;38riY(%-v9R{Z`Vg!;XOA>zXozb%4L zzr(Pa_$bAXI|%jr3~Azo;!i9_sNZdn&%Bxx|8L~$_Z;Li{6WQ+&xvBHoV%jnU8MN( zx~$)Skk{o8Dn7sbXx@dmi}>S;eLW;*)RHii5}wT z6`xf!?|9S_>o%N4tlKS3tlMf4v1uP--6oyHx*djyb=`Lm>-t_#tm}9yvD_?_m)Lw= z9wJ|t|3}2S%n`uzmaEq%`Vg{t2NALfFF@!byci*y=rV+ClC22Y1UnFxBYY1+n$lGW zD-ga9ANR9ju zu#rEX7@qQSQq}e1CWeu}gfg0c88JNNhv6xMDCro|^MXN7%y@dv5Om}bbBvH6=4@nS zI5w!Ce9j_9hBJtfF}6e*&Ll==swHy(u+d}ejq=9ch+~w|Wtd^%Sr(=pntbP2d}D{y z6W21byuhp@vB``05P0h0n4qH!u^f{ih&hf}W@36HZ|csFj%kTY;VDDRxqz5$Lq{26 z=56?tqki(G9E2EhiZn88Ln9*>16qb{Xk=I~BXhXLH*G?lN5ZoZ#7DuKwDrIy?L1&3 zldxn`mQ31`X|!aTDWmltZOOL+8=VUPO}>kOO})Tftc-MFx$cCX|?#K%#>eh$+THAr)tbR=zqCFg~S{`f7G-Y zOMka$@=8uo^0c1`@U@yY*ONmu%{iX&M`)UuzCqK*u3I&Ys6BG5Hy4k_v5)6+!qATK zbS#f8w;nPlBQL*WIjrR33uvqnFv*ioViB@`%$#6!_H@dZ1QDYg`-YBV-Yz5MWdF)o z)rW+<=CI9;zDppd7j}%6ea-MVcw255axw!(!ZD6+2|V*HCILq|+Prb5j%)&3?w)bv zR{P|B4LRDNaYi2(PPV?f+}LvKeR8ei$aVST&K*aN*D5>T>mm06GPE=08vsqVq37U2 zX!nO{zjtdn(|*m6<5)D#q`w*rJKtrHyTu40G;$x%a)y3&oP0my)5oVeYy;y=`a8g| z^X-D%0waXb$bH2pcRS?9>bHA+a!*5U+8FKkEiGsCzuN8D9HR2}_q0#npCR`;1++8i ze+)WemlFg@i=Ka+mbCzpiW4lT#) zFdgMM=Iwm%fgJhNR|`)^nr~y+at}g|b)y`w0d$m$`Q$#jNo|@^j`K7f<&K0L{^#9- zUj5W1&rzVsC->42t`nvLmh3{GTsaI}zSUvL5T5Fj8+s33RNzGIbL)I^cV3V7W5Io{ z+b5U2S#GrWq;LlbIktgu({8~!=TJj=;WnSXmYvv*u@h=hj(z;kyL%tS?)DgRw?N45 zx7VNW`Xi=Ovs!#x#g_Zz571ADpvvi%+(SOO&;L}2UATTwZl)#oBcI$=zr*enc$AxE z$^EBK?zvaJ^3As7{sOtv)7AZ&CAR%u$(eCRz6&1#<4jBLh(F{X(wU_4x?B#qtR;5` ce<6aWAK diff --git a/simulation/Release/signal_path.o.as b/simulation/Release/signal_path.o.as index 6952626..1c44c73 100644 --- a/simulation/Release/signal_path.o.as +++ b/simulation/Release/signal_path.o.as @@ -1,5 +1,5 @@ -// File generated by darts version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:59 2026 +// File generated by darts version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\darts.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -d -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 +Mhex +Ihex -g Release/signal_path.o lpdsp32 @@ -18,279 +18,255 @@ 0x7f .data_segment_name -.bss local 4 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre DMA 4 +.bss local 4 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32 DMA 4 .data_segment_name -.bss local 4 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre DMA 4 +.bss local 4 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32 DMA 4 .data_segment_name -.bss local 4 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32 DMA 4 +.bss local 4 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre DMA 4 .data_segment_name -.bss local 4 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32 DMA 4 +.bss local 4 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre DMA 4 .data_segment_name -.bss local 4 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt DMB 4 +.bss local 4 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator DMB 4 .data_segment_name -.bss local 4 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 DMB 4 +.bss local 4 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32 DMB 4 -.data_segment_name -.data local 4 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13p_c_block_pre DMA -.rela 4 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre 0 - 0x0 - 0x0 - 0x0 - 0x0 - -.data_segment_name -.data local 4 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E16p_acc_block_filt DMA -.rela 4 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre 0 - 0x0 - 0x0 - 0x0 - 0x0 - -.data_segment_name -.data local 4 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E8p_out_32 DMA -.rela 4 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 0 - 0x0 - 0x0 - 0x0 - 0x0 - -.undef local data _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3___end +.undef local data _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2___end .undef local data _ZL2mu -.undef local data _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32 +.undef local data _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32 -.undef local data _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32 +.undef local data _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32 -.undef local data _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre +.undef local data _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre -.undef local data _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre +.undef local data _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre -.undef local data _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt +.undef local data _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator -.undef local data _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 +.undef local data _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32 .undef local data _ZL2mu .data_segment_name -.bss global 4 fir_lms_delay_line DMB 256 +.bss global 4 delay_line DMB 256 .data_segment_name -.bss global 8 fir_lms_coeffs DMA 256 +.bss global 8 filter_coefficients DMA 256 .data_segment_name -.bss global 4 ptr_fir_lms_delay_line DMB 12 +.bss global 4 pointer_delay_line DMB 12 .data_segment_name -.bss global 4 ptr_fir_lms_coeffs DMA 12 +.bss global 4 pointer_filter_coefficients DMA 12 -.undef global data _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ +.undef global data _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ .text_segment_name -.text global 2 _Z15sig_init_bufferP9BufferPtrPiii -.src_ref 0 "signal_path.c" 71 first -.src_ref 0 "signal_path.c" 72 10 -.src_ref 0 "signal_path.c" 77 24 +.text global 2 _Z17initialize_bufferP9BufferPtrPiii +.src_ref 0 "signal_path.c" 74 first +.src_ref 0 "signal_path.c" 75 10 +.src_ref 0 "signal_path.c" 80 24 /* 0x000000 0x39020 */ c0 = 4 -.src_ref 0 "signal_path.c" 72 10 first -.src_ref 0 "signal_path.c" 76 4 first +.src_ref 0 "signal_path.c" 75 10 first +.src_ref 0 "signal_path.c" 79 4 first /* 0x000001 0x59014 */ cmp(ra1,0x0); [a0+c0] = ra1 /* 0x000002 0x00049 */ /* MW */ -.src_ref 0 "signal_path.c" 74 10 first -.src_ref 0 "signal_path.c" 76 4 +.src_ref 0 "signal_path.c" 77 10 first +.src_ref 0 "signal_path.c" 79 4 /* 0x000003 0x42036 */ if (np) jpsdb 0x6; a0[0x4] = a1 /* 0x000004 0x840e1 */ /* MW */ -.src_ref 0 "signal_path.c" 73 10 first +.src_ref 0 "signal_path.c" 76 10 first /* 0x000005 0x84061 */ a0[0x0] = a1 -.src_ref 0 "signal_path.c" 76 4 first +.src_ref 0 "signal_path.c" 79 4 first /* 0x000006 0x62000 */ lp [ra1] 0x1 /* 0x000007 0x00015 */ /* MW */ /* 0x000008 0x00000 */ nop /* 0x000009 0x00000 */ nop -.src_ref 0 "signal_path.c" 77 24 first +.src_ref 0 "signal_path.c" 80 24 first /* 0x00000a 0x8087a */ [a1+c0] = zero -.src_ref 0 "signal_path.c" 79 14 first +.src_ref 0 "signal_path.c" 82 14 first /* 0x00000b 0x301a8 */ cmp(ra1,rb0) -.src_ref 0 "signal_path.c" 79 4 -.src_ref 0 "signal_path.c" 79 14 +.src_ref 0 "signal_path.c" 82 4 +.src_ref 0 "signal_path.c" 82 14 /* 0x00000c 0x42011 */ if (s) jps 0x2; ra0 = zero /* 0x00000d 0x18e88 */ /* MW */ -.src_ref 0 "signal_path.c" 79 4 +.src_ref 0 "signal_path.c" 82 4 /* 0x00000e 0x5c006 */ ra0 = 1; ret /* 0x00000f 0x3a140 */ /* MW */ -.label _Z15sig_init_bufferP9BufferPtrPiii__end last -.src_ref 0 "signal_path.c" 79 4 +.label _Z17initialize_bufferP9BufferPtrPiii__end last +.src_ref 0 "signal_path.c" 82 4 /* 0x000010 0x40000 */ nop; ret /* 0x000011 0x3a140 */ /* MW */ .text_segment_name -.text global 2 _Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii -.src_ref 0 "signal_path.c" 87 first -.src_ref 0 "signal_path.c" 88 10 -.src_ref 0 "signal_path.c" 93 24 +.text global 2 _Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii +.src_ref 0 "signal_path.c" 91 first +.src_ref 0 "signal_path.c" 92 10 +.src_ref 0 "signal_path.c" 97 24 /* 0x000000 0x39020 */ c0 = 4 -.src_ref 0 "signal_path.c" 88 10 first -.src_ref 0 "signal_path.c" 92 4 first +.src_ref 0 "signal_path.c" 92 10 first +.src_ref 0 "signal_path.c" 96 4 first /* 0x000001 0x59014 */ cmp(ra1,0x0); [a4+c0] = ra1 /* 0x000002 0x02049 */ /* MW */ -.src_ref 0 "signal_path.c" 90 10 first -.src_ref 0 "signal_path.c" 92 4 +.src_ref 0 "signal_path.c" 94 10 first +.src_ref 0 "signal_path.c" 96 4 /* 0x000003 0x42036 */ if (np) jpsdb 0x6; a4[0x4] = a5 /* 0x000004 0x860e5 */ /* MW */ -.src_ref 0 "signal_path.c" 89 10 first +.src_ref 0 "signal_path.c" 93 10 first /* 0x000005 0x86065 */ a4[0x0] = a5 -.src_ref 0 "signal_path.c" 92 4 first +.src_ref 0 "signal_path.c" 96 4 first /* 0x000006 0x62000 */ lp [ra1] 0x1 /* 0x000007 0x00015 */ /* MW */ /* 0x000008 0x00000 */ nop /* 0x000009 0x00000 */ nop -.src_ref 0 "signal_path.c" 93 24 first +.src_ref 0 "signal_path.c" 97 24 first /* 0x00000a 0x8287a */ [a5+c0] = zero -.src_ref 0 "signal_path.c" 95 14 first +.src_ref 0 "signal_path.c" 99 14 first /* 0x00000b 0x301a8 */ cmp(ra1,rb0) -.src_ref 0 "signal_path.c" 95 4 -.src_ref 0 "signal_path.c" 95 14 +.src_ref 0 "signal_path.c" 99 4 +.src_ref 0 "signal_path.c" 99 14 /* 0x00000c 0x42011 */ if (s) jps 0x2; ra0 = zero /* 0x00000d 0x18e88 */ /* MW */ -.src_ref 0 "signal_path.c" 95 4 +.src_ref 0 "signal_path.c" 99 4 /* 0x00000e 0x5c006 */ ra0 = 1; ret /* 0x00000f 0x3a140 */ /* MW */ -.label _Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii__end last -.src_ref 0 "signal_path.c" 95 4 +.label _Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii__end last +.src_ref 0 "signal_path.c" 99 4 /* 0x000010 0x40000 */ nop; ret /* 0x000011 0x3a140 */ /* MW */ .text_segment_name -.text global 2 _Z32sig_cirular_buffer_ptr_incrementP9BufferPtri -.src_ref 0 "signal_path.c" 104 43 -.src_ref 0 "signal_path.c" 104 43 first -.src_ref 0 "signal_path.c" 104 72 -.src_ref 0 "signal_path.c" 105 first +.text global 2 _Z16increment_bufferP9BufferPtri +.src_ref 0 "signal_path.c" 109 43 +.src_ref 0 "signal_path.c" 109 43 first +.src_ref 0 "signal_path.c" 109 72 +.src_ref 0 "signal_path.c" 110 first /* 0x000000 0x5c810 */ c0 = 4; a0 = a0 + 0x8 /* 0x000001 0x20040 */ /* MW */ -.src_ref 0 "signal_path.c" 104 43 first -.src_ref 0 "signal_path.c" 104 58 first +.src_ref 0 "signal_path.c" 109 43 first +.src_ref 0 "signal_path.c" 109 58 first /* 0x000002 0x51852 */ ra0 = lsl(ra0,0x2); a1 = [a0-c0] /* 0x000003 0x00221 */ /* MW */ -.src_ref 0 "signal_path.c" 104 72 +.src_ref 0 "signal_path.c" 109 72 /* 0x000004 0x8022c */ lb0 = [a0-c0] -.src_ref 0 "signal_path.c" 104 91 +.src_ref 0 "signal_path.c" 109 91 /* 0x000005 0x8400a */ rb0 = a0[0x0] -.src_ref 0 "signal_path.c" 104 26 -.src_ref 0 "signal_path.c" 104 91 +.src_ref 0 "signal_path.c" 109 26 +.src_ref 0 "signal_path.c" 109 91 /* 0x000006 0x5185a */ ra0 = lsl(rb0,0x2); c0 = ra0 /* 0x000007 0x18228 */ /* MW */ -.src_ref 0 "signal_path.c" 104 26 +.src_ref 0 "signal_path.c" 109 26 /* 0x000008 0x9822e */ lsz0 = ra0 /* 0x000009 0x00000 */ nop -.src_ref 0 "signal_path.c" 104 26 -.src_ref 0 "signal_path.c" 105 first +.src_ref 0 "signal_path.c" 109 26 +.src_ref 0 "signal_path.c" 110 first /* 0x00000a 0x460a4 */ retdb; a1 = a1+%0c0 /* 0x00000b 0x1cc01 */ /* MW */ -.src_ref 0 "signal_path.c" 104 10 first +.src_ref 0 "signal_path.c" 109 10 first /* 0x00000c 0x84161 */ a0[0x8] = a1 -.label _Z32sig_cirular_buffer_ptr_incrementP9BufferPtri__end +.label _Z16increment_bufferP9BufferPtri__end /* 0x00000d 0x00000 */ nop .text_segment_name -.text global 2 _Z36sig_cirular_buffer_ptr_increment_DMBP12BufferPtrDMBi -.src_ref 0 "signal_path.c" 108 43 -.src_ref 0 "signal_path.c" 108 43 first -.src_ref 0 "signal_path.c" 108 72 -.src_ref 0 "signal_path.c" 109 first +.text global 2 _Z21increment_buffert_DMBP12BufferPtrDMBi +.src_ref 0 "signal_path.c" 114 43 +.src_ref 0 "signal_path.c" 114 43 first +.src_ref 0 "signal_path.c" 114 72 +.src_ref 0 "signal_path.c" 115 first /* 0x000000 0x5c810 */ c0 = 4; a0 = a0 + 0x8 /* 0x000001 0x20040 */ /* MW */ -.src_ref 0 "signal_path.c" 108 43 first -.src_ref 0 "signal_path.c" 108 58 first +.src_ref 0 "signal_path.c" 114 43 first +.src_ref 0 "signal_path.c" 114 58 first /* 0x000002 0x51852 */ ra0 = lsl(ra0,0x2); a1 = [a0-c0] /* 0x000003 0x00221 */ /* MW */ -.src_ref 0 "signal_path.c" 108 72 +.src_ref 0 "signal_path.c" 114 72 /* 0x000004 0x8022c */ lb0 = [a0-c0] -.src_ref 0 "signal_path.c" 108 91 +.src_ref 0 "signal_path.c" 114 91 /* 0x000005 0x8400a */ rb0 = a0[0x0] -.src_ref 0 "signal_path.c" 108 26 -.src_ref 0 "signal_path.c" 108 91 +.src_ref 0 "signal_path.c" 114 26 +.src_ref 0 "signal_path.c" 114 91 /* 0x000006 0x5185a */ ra0 = lsl(rb0,0x2); c0 = ra0 /* 0x000007 0x18228 */ /* MW */ -.src_ref 0 "signal_path.c" 108 26 +.src_ref 0 "signal_path.c" 114 26 /* 0x000008 0x9822e */ lsz0 = ra0 /* 0x000009 0x00000 */ nop -.src_ref 0 "signal_path.c" 108 26 -.src_ref 0 "signal_path.c" 109 first +.src_ref 0 "signal_path.c" 114 26 +.src_ref 0 "signal_path.c" 115 first /* 0x00000a 0x460a4 */ retdb; a1 = a1+%0c0 /* 0x00000b 0x1cc01 */ /* MW */ -.src_ref 0 "signal_path.c" 108 10 first +.src_ref 0 "signal_path.c" 114 10 first /* 0x00000c 0x84161 */ a0[0x8] = a1 -.label _Z36sig_cirular_buffer_ptr_increment_DMBP12BufferPtrDMBi__end +.label _Z21increment_buffert_DMBP12BufferPtrDMBi__end /* 0x00000d 0x00000 */ nop .text_segment_name -.text global 2 _Z33sig_cirular_buffer_ptr_put_sampleP9BufferPtri -.src_ref 0 "signal_path.c" 112 11 -.src_ref 0 "signal_path.c" 112 11 first -.src_ref 0 "signal_path.c" 113 26 -.src_ref 0 "signal_path.c" 113 67 -.src_ref 0 "signal_path.c" 114 first +.text global 2 _Z12write_bufferP9BufferPtri +.src_ref 0 "signal_path.c" 118 11 +.src_ref 0 "signal_path.c" 118 11 first +.src_ref 0 "signal_path.c" 119 26 +.src_ref 0 "signal_path.c" 119 67 +.src_ref 0 "signal_path.c" 120 first /* 0x000000 0x5c810 */ c0 = 4; a0 = a0 + 0x8 /* 0x000001 0x20040 */ /* MW */ -.src_ref 0 "signal_path.c" 112 11 first +.src_ref 0 "signal_path.c" 118 11 first /* 0x000002 0x80221 */ a1 = [a0-c0] -.src_ref 0 "signal_path.c" 113 67 first +.src_ref 0 "signal_path.c" 119 67 first /* 0x000003 0x8022c */ lb0 = [a0-c0] -.src_ref 0 "signal_path.c" 112 4 first +.src_ref 0 "signal_path.c" 118 4 first /* 0x000004 0x84848 */ a1[0x0] = ra0 /* 0x000005 0x00000 */ nop -.src_ref 0 "signal_path.c" 113 86 first +.src_ref 0 "signal_path.c" 119 86 first /* 0x000006 0x84008 */ ra0 = a0[0x0] -.src_ref 0 "signal_path.c" 113 86 +.src_ref 0 "signal_path.c" 119 86 /* 0x000007 0x230a4 */ ra0 = lsl(ra0,0x2) -.src_ref 0 "signal_path.c" 113 26 +.src_ref 0 "signal_path.c" 119 26 /* 0x000008 0x9822e */ lsz0 = ra0 /* 0x000009 0x00000 */ nop -.src_ref 0 "signal_path.c" 113 26 -.src_ref 0 "signal_path.c" 114 first +.src_ref 0 "signal_path.c" 119 26 +.src_ref 0 "signal_path.c" 120 first /* 0x00000a 0x460a4 */ retdb; a1 = a1+%0c0 /* 0x00000b 0x1cc01 */ /* MW */ -.src_ref 0 "signal_path.c" 113 10 first +.src_ref 0 "signal_path.c" 119 10 first /* 0x00000c 0x84161 */ a0[0x8] = a1 -.label _Z33sig_cirular_buffer_ptr_put_sampleP9BufferPtri__end +.label _Z12write_bufferP9BufferPtri__end /* 0x00000d 0x00000 */ nop .text_segment_name -.text global 2 _Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi -.src_ref 0 "signal_path.c" 117 11 -.src_ref 0 "signal_path.c" 117 11 first -.src_ref 0 "signal_path.c" 118 26 -.src_ref 0 "signal_path.c" 118 67 -.src_ref 0 "signal_path.c" 119 first +.text global 2 _Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi +.src_ref 0 "signal_path.c" 124 11 +.src_ref 0 "signal_path.c" 124 11 first +.src_ref 0 "signal_path.c" 125 26 +.src_ref 0 "signal_path.c" 125 67 +.src_ref 0 "signal_path.c" 126 first /* 0x000000 0x5c810 */ c0 = 4; a4 = a4 + 0x8 /* 0x000001 0x22044 */ /* MW */ -.src_ref 0 "signal_path.c" 117 11 first +.src_ref 0 "signal_path.c" 124 11 first /* 0x000002 0x82220 */ a0 = [a4-c0] -.src_ref 0 "signal_path.c" 118 67 first +.src_ref 0 "signal_path.c" 125 67 first /* 0x000003 0x8222c */ lb0 = [a4-c0] -.src_ref 0 "signal_path.c" 117 4 first +.src_ref 0 "signal_path.c" 124 4 first /* 0x000004 0x84048 */ a0[0x0] = ra0 /* 0x000005 0x00000 */ nop -.src_ref 0 "signal_path.c" 118 86 first +.src_ref 0 "signal_path.c" 125 86 first /* 0x000006 0x86008 */ ra0 = a4[0x0] -.src_ref 0 "signal_path.c" 118 86 +.src_ref 0 "signal_path.c" 125 86 /* 0x000007 0x230a4 */ ra0 = lsl(ra0,0x2) -.src_ref 0 "signal_path.c" 118 26 +.src_ref 0 "signal_path.c" 125 26 /* 0x000008 0x9822e */ lsz0 = ra0 /* 0x000009 0x00000 */ nop -.src_ref 0 "signal_path.c" 118 26 -.src_ref 0 "signal_path.c" 119 first +.src_ref 0 "signal_path.c" 125 26 +.src_ref 0 "signal_path.c" 126 first /* 0x00000a 0x460a4 */ retdb; a0 = a0+%0c0 /* 0x00000b 0x1c400 */ /* MW */ -.src_ref 0 "signal_path.c" 118 10 first +.src_ref 0 "signal_path.c" 125 10 first /* 0x00000c 0x86160 */ a4[0x8] = a0 -.label _Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi__end +.label _Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi__end /* 0x00000d 0x00000 */ nop .data_segment_name @@ -316,8 +292,8 @@ .text_segment_name .text global 2 _Z21sig_init_preemph_coefP16SingleSignalPathdddddi -.src_ref 0 "signal_path.c" 133 first -.src_ref 0 "signal_path.c" 133 5 +.src_ref 0 "signal_path.c" 140 first +.src_ref 0 "signal_path.c" 140 5 /* 0x000000 0xabfa0 */ sp+= -0x30 /* 0x000001 0x90259 */ sp[0x10] = ahl1 /* 0x000002 0x880f6 */ sp[0x4] = lr @@ -326,228 +302,228 @@ /* 0x000005 0x9045a */ sp[0x20] = bhl0 /* 0x000006 0x90558 */ sp[0x28] = ahl0 /* 0x000007 0x88160 */ sp[0x8] = a0 -.src_ref 0 "signal_path.c" 135 11 first +.src_ref 0 "signal_path.c" 142 11 first /* 0x000008 0x66000 */ calldb _Z10float64_eqyy /* 0x000009 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 135 11 +.src_ref 0 "signal_path.c" 142 11 /* 0x00000a 0x6e000 */ axl1 = [_ro_lbl_DM_8___Z21sig_init_preemph_coefP16SingleSignalPathdddddi_0_0] /* 0x00000b 0x00011 */ /* MW */ -.src_ref 0 "signal_path.c" 135 11 -.src_ref 0 "signal_path.c" 136 14 -.src_ref 0 "signal_path.c" 139 14 +.src_ref 0 "signal_path.c" 142 11 +.src_ref 0 "signal_path.c" 143 14 +.src_ref 0 "signal_path.c" 146 14 /* 0x00000c 0x59010 */ cmp(ra0,0x0); a1 = sp[0x8] /* 0x00000d 0x08121 */ /* MW */ -.src_ref 0 "signal_path.c" 135 11 -.src_ref 0 "signal_path.c" 135 17 +.src_ref 0 "signal_path.c" 142 11 +.src_ref 0 "signal_path.c" 142 17 /* 0x00000e 0xbc298 */ if (z) jpsdb 0x29 -.src_ref 0 "signal_path.c" 136 14 first +.src_ref 0 "signal_path.c" 143 14 first /* 0x00000f 0xa0840 */ a0 = a1 + 0x8 /* 0x000010 0x40000 */ nop; sp[0xc] = a0 /* 0x000011 0x081e0 */ /* MW */ -.src_ref 0 "signal_path.c" 135 23 first +.src_ref 0 "signal_path.c" 142 23 first /* 0x000012 0x66000 */ calldb _Z10float64_eqyy /* 0x000013 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 135 23 -.src_ref 0 "signal_path.c" 135 23 +.src_ref 0 "signal_path.c" 142 23 +.src_ref 0 "signal_path.c" 142 23 /* 0x000014 0x5c000 */ ax1 = 0; axl0 = sp[0x10] /* 0x000015 0x90210 */ /* MW */ -.src_ref 0 "signal_path.c" 135 23 -.src_ref 0 "signal_path.c" 140 14 +.src_ref 0 "signal_path.c" 142 23 +.src_ref 0 "signal_path.c" 147 14 /* 0x000016 0x59010 */ cmp(ra0,0x0); a0 = sp[0xc] /* 0x000017 0x081a0 */ /* MW */ -.src_ref 0 "signal_path.c" 135 23 -.src_ref 0 "signal_path.c" 135 29 -.src_ref 0 "signal_path.c" 136 14 -.src_ref 0 "signal_path.c" 139 14 +.src_ref 0 "signal_path.c" 142 23 +.src_ref 0 "signal_path.c" 142 29 +.src_ref 0 "signal_path.c" 143 14 +.src_ref 0 "signal_path.c" 146 14 /* 0x000018 0x420f0 */ if (z) jps 0x1e; a1 = sp[0x8] /* 0x000019 0x08121 */ /* MW */ /* 0x00001a 0x40000 */ nop; sp[0xc] = a0 /* 0x00001b 0x081e0 */ /* MW */ -.src_ref 0 "signal_path.c" 135 35 +.src_ref 0 "signal_path.c" 142 35 /* 0x00001c 0x66000 */ calldb _Z10float64_eqyy /* 0x00001d 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 135 35 -.src_ref 0 "signal_path.c" 135 35 +.src_ref 0 "signal_path.c" 142 35 +.src_ref 0 "signal_path.c" 142 35 /* 0x00001e 0x5c000 */ ax1 = 0; axl0 = sp[0x20] /* 0x00001f 0x90410 */ /* MW */ -.src_ref 0 "signal_path.c" 135 35 -.src_ref 0 "signal_path.c" 140 14 +.src_ref 0 "signal_path.c" 142 35 +.src_ref 0 "signal_path.c" 147 14 /* 0x000020 0x59010 */ cmp(ra0,0x0); a0 = sp[0xc] /* 0x000021 0x081a0 */ /* MW */ -.src_ref 0 "signal_path.c" 135 35 -.src_ref 0 "signal_path.c" 135 41 -.src_ref 0 "signal_path.c" 136 14 -.src_ref 0 "signal_path.c" 139 14 +.src_ref 0 "signal_path.c" 142 35 +.src_ref 0 "signal_path.c" 142 41 +.src_ref 0 "signal_path.c" 143 14 +.src_ref 0 "signal_path.c" 146 14 /* 0x000022 0x420a0 */ if (z) jps 0x14; a1 = sp[0x8] /* 0x000023 0x08121 */ /* MW */ /* 0x000024 0x40000 */ nop; sp[0xc] = a0 /* 0x000025 0x081e0 */ /* MW */ -.src_ref 0 "signal_path.c" 135 47 +.src_ref 0 "signal_path.c" 142 47 /* 0x000026 0x66000 */ calldb _Z10float64_eqyy /* 0x000027 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 135 47 -.src_ref 0 "signal_path.c" 135 47 +.src_ref 0 "signal_path.c" 142 47 +.src_ref 0 "signal_path.c" 142 47 /* 0x000028 0x5c000 */ ax1 = 0; axl0 = sp[0x18] /* 0x000029 0x90310 */ /* MW */ -.src_ref 0 "signal_path.c" 135 47 -.src_ref 0 "signal_path.c" 140 14 +.src_ref 0 "signal_path.c" 142 47 +.src_ref 0 "signal_path.c" 147 14 /* 0x00002a 0x59010 */ cmp(ra0,0x0); a0 = sp[0xc] /* 0x00002b 0x081a0 */ /* MW */ -.src_ref 0 "signal_path.c" 135 47 -.src_ref 0 "signal_path.c" 135 53 -.src_ref 0 "signal_path.c" 136 14 -.src_ref 0 "signal_path.c" 139 14 +.src_ref 0 "signal_path.c" 142 47 +.src_ref 0 "signal_path.c" 142 53 +.src_ref 0 "signal_path.c" 143 14 +.src_ref 0 "signal_path.c" 146 14 /* 0x00002c 0x42050 */ if (z) jps 0xa; a1 = sp[0x8] /* 0x00002d 0x08121 */ /* MW */ /* 0x00002e 0x40000 */ nop; sp[0xc] = a0 /* 0x00002f 0x081e0 */ /* MW */ -.src_ref 0 "signal_path.c" 135 59 +.src_ref 0 "signal_path.c" 142 59 /* 0x000030 0x66000 */ calldb _Z10float64_eqyy /* 0x000031 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 135 59 -.src_ref 0 "signal_path.c" 135 59 +.src_ref 0 "signal_path.c" 142 59 +.src_ref 0 "signal_path.c" 142 59 /* 0x000032 0x5c000 */ ax1 = 0; axl0 = sp[0x30] /* 0x000033 0x90610 */ /* MW */ -.src_ref 0 "signal_path.c" 135 59 -.src_ref 0 "signal_path.c" 136 14 -.src_ref 0 "signal_path.c" 139 14 +.src_ref 0 "signal_path.c" 142 59 +.src_ref 0 "signal_path.c" 143 14 +.src_ref 0 "signal_path.c" 146 14 /* 0x000034 0x59010 */ cmp(ra0,0x0); a1 = sp[0x8] /* 0x000035 0x08121 */ /* MW */ -.src_ref 0 "signal_path.c" 135 4 -.src_ref 0 "signal_path.c" 135 59 -.src_ref 0 "signal_path.c" 140 14 +.src_ref 0 "signal_path.c" 142 4 +.src_ref 0 "signal_path.c" 142 59 +.src_ref 0 "signal_path.c" 147 14 /* 0x000036 0x42248 */ if (nz) jps 0x49; a0 = sp[0xc] /* 0x000037 0x881a0 */ /* MW */ -.src_ref 0 "signal_path.c" 140 14 -.src_ref 0 "signal_path.c" 141 25 +.src_ref 0 "signal_path.c" 147 14 +.src_ref 0 "signal_path.c" 148 25 /* 0x000038 0x88008 */ ra0 = sp[0x0] -.src_ref 0 "signal_path.c" 139 14 -.src_ref 0 "signal_path.c" 140 14 +.src_ref 0 "signal_path.c" 146 14 +.src_ref 0 "signal_path.c" 147 14 /* 0x000039 0x5c007 */ rb0 = 1; a0 = a0 + 0x18 /* 0x00003a 0x200c0 */ /* MW */ -.src_ref 0 "signal_path.c" 140 14 first +.src_ref 0 "signal_path.c" 147 14 first /* 0x00003b 0x84048 */ a0[0x0] = ra0 -.src_ref 0 "signal_path.c" 143 14 +.src_ref 0 "signal_path.c" 150 14 /* 0x00003c 0xa04a0 */ a0 = a0 - 0x14 /* 0x00003d 0x88060 */ sp[0x0] = a0 -.src_ref 0 "signal_path.c" 139 14 first +.src_ref 0 "signal_path.c" 146 14 first /* 0x00003e 0x8494a */ a1[0x8] = rb0 -.src_ref 0 "signal_path.c" 141 25 first +.src_ref 0 "signal_path.c" 148 25 first /* 0x00003f 0x66000 */ call _Z16int32_to_float64i /* 0x000040 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 141 20 +.src_ref 0 "signal_path.c" 148 20 /* 0x000041 0x2a002 */ bx0 = ax0 + 0x0 -.src_ref 0 "signal_path.c" 141 20 +.src_ref 0 "signal_path.c" 148 20 /* 0x000042 0x66000 */ calldb ff_pow /* 0x000043 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 141 20 +.src_ref 0 "signal_path.c" 148 20 /* 0x000044 0x6e000 */ axl1 = [(_ro_lbl_DM_8___Z21sig_init_preemph_coefP16SingleSignalPathdddddi_8_1 + 0)] /* 0x000045 0x00411 */ /* MW */ -.src_ref 0 "signal_path.c" 141 39 +.src_ref 0 "signal_path.c" 148 39 /* 0x000046 0x55000 */ ax1 = ax0 + 0x0; nop /* 0x000047 0xb8000 */ /* MW */ -.src_ref 0 "signal_path.c" 141 39 +.src_ref 0 "signal_path.c" 148 39 /* 0x000048 0x66000 */ calldb _Z11float64_subyy /* 0x000049 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 141 39 +.src_ref 0 "signal_path.c" 148 39 /* 0x00004a 0x6e000 */ bxl0 = [_ro_lbl_DM_8___Z21sig_init_preemph_coefP16SingleSignalPathdddddi_0_0] /* 0x00004b 0x00012 */ /* MW */ -.src_ref 0 "signal_path.c" 141 39 +.src_ref 0 "signal_path.c" 148 39 /* 0x00004c 0x66000 */ call _Z30float64_to_int32_round_to_zeroy /* 0x00004d 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 143 34 first +.src_ref 0 "signal_path.c" 150 34 first /* 0x00004e 0x66000 */ call _Z16int32_to_float64i /* 0x00004f 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 143 34 -.src_ref 0 "signal_path.c" 143 34 +.src_ref 0 "signal_path.c" 150 34 +.src_ref 0 "signal_path.c" 150 34 /* 0x000050 0x55001 */ bx0 = ax0 + 0x0; axl1 = sp[0x28] /* 0x000051 0x10511 */ /* MW */ /* 0x000052 0x40000 */ nop; sp[0x8] = bhl0 /* 0x000053 0x1015a */ /* MW */ -.src_ref 0 "signal_path.c" 143 34 +.src_ref 0 "signal_path.c" 150 34 /* 0x000054 0x66000 */ call _Z11float64_mulyy /* 0x000055 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 143 29 +.src_ref 0 "signal_path.c" 150 29 /* 0x000056 0x66000 */ call _Z30float64_to_int32_round_to_zeroy /* 0x000057 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 143 25 +.src_ref 0 "signal_path.c" 150 25 /* 0x000058 0x88020 */ a0 = sp[0x0] -.src_ref 0 "signal_path.c" 143 25 -.src_ref 0 "signal_path.c" 144 34 +.src_ref 0 "signal_path.c" 150 25 +.src_ref 0 "signal_path.c" 151 34 /* 0x000059 0x5c810 */ c0 = 4; bxl0 = sp[0x8] /* 0x00005a 0x10112 */ /* MW */ -.src_ref 0 "signal_path.c" 143 25 +.src_ref 0 "signal_path.c" 150 25 /* 0x00005b 0x80048 */ [a0+c0] = ra0 /* 0x00005c 0x88060 */ sp[0x0] = a0 -.src_ref 0 "signal_path.c" 144 34 first +.src_ref 0 "signal_path.c" 151 34 first /* 0x00005d 0x66000 */ calldb _Z11float64_mulyy /* 0x00005e 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 144 34 +.src_ref 0 "signal_path.c" 151 34 /* 0x00005f 0x90211 */ axl1 = sp[0x10] -.src_ref 0 "signal_path.c" 144 29 +.src_ref 0 "signal_path.c" 151 29 /* 0x000060 0x66000 */ call _Z30float64_to_int32_round_to_zeroy /* 0x000061 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 144 25 +.src_ref 0 "signal_path.c" 151 25 /* 0x000062 0x88020 */ a0 = sp[0x0] -.src_ref 0 "signal_path.c" 144 25 -.src_ref 0 "signal_path.c" 145 34 +.src_ref 0 "signal_path.c" 151 25 +.src_ref 0 "signal_path.c" 152 34 /* 0x000063 0x5c810 */ c0 = 4; bxl0 = sp[0x8] /* 0x000064 0x10112 */ /* MW */ -.src_ref 0 "signal_path.c" 144 25 +.src_ref 0 "signal_path.c" 151 25 /* 0x000065 0x80048 */ [a0+c0] = ra0 /* 0x000066 0x88060 */ sp[0x0] = a0 -.src_ref 0 "signal_path.c" 145 34 first +.src_ref 0 "signal_path.c" 152 34 first /* 0x000067 0x66000 */ calldb _Z11float64_mulyy /* 0x000068 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 145 34 +.src_ref 0 "signal_path.c" 152 34 /* 0x000069 0x90411 */ axl1 = sp[0x20] -.src_ref 0 "signal_path.c" 145 29 +.src_ref 0 "signal_path.c" 152 29 /* 0x00006a 0x66000 */ call _Z30float64_to_int32_round_to_zeroy /* 0x00006b 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 145 25 +.src_ref 0 "signal_path.c" 152 25 /* 0x00006c 0x88020 */ a0 = sp[0x0] -.src_ref 0 "signal_path.c" 145 25 -.src_ref 0 "signal_path.c" 146 34 +.src_ref 0 "signal_path.c" 152 25 +.src_ref 0 "signal_path.c" 153 34 /* 0x00006d 0x5c810 */ c0 = 4; bxl0 = sp[0x8] /* 0x00006e 0x10112 */ /* MW */ -.src_ref 0 "signal_path.c" 145 25 +.src_ref 0 "signal_path.c" 152 25 /* 0x00006f 0x80048 */ [a0+c0] = ra0 /* 0x000070 0x88260 */ sp[0x10] = a0 -.src_ref 0 "signal_path.c" 146 34 first +.src_ref 0 "signal_path.c" 153 34 first /* 0x000071 0x66000 */ calldb _Z11float64_mulyy /* 0x000072 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 146 34 +.src_ref 0 "signal_path.c" 153 34 /* 0x000073 0x90311 */ axl1 = sp[0x18] -.src_ref 0 "signal_path.c" 146 29 +.src_ref 0 "signal_path.c" 153 29 /* 0x000074 0x66000 */ call _Z30float64_to_int32_round_to_zeroy /* 0x000075 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 146 25 +.src_ref 0 "signal_path.c" 153 25 /* 0x000076 0x88020 */ a0 = sp[0x0] -.src_ref 0 "signal_path.c" 147 34 +.src_ref 0 "signal_path.c" 154 34 /* 0x000077 0x90112 */ bxl0 = sp[0x8] -.src_ref 0 "signal_path.c" 146 25 +.src_ref 0 "signal_path.c" 153 25 /* 0x000078 0x840c8 */ a0[0x4] = ra0 -.src_ref 0 "signal_path.c" 147 34 first +.src_ref 0 "signal_path.c" 154 34 first /* 0x000079 0x66000 */ calldb _Z11float64_mulyy /* 0x00007a 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 147 34 +.src_ref 0 "signal_path.c" 154 34 /* 0x00007b 0x90611 */ axl1 = sp[0x30] -.src_ref 0 "signal_path.c" 147 29 +.src_ref 0 "signal_path.c" 154 29 /* 0x00007c 0x66000 */ call _Z30float64_to_int32_round_to_zeroy /* 0x00007d 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 147 25 +.src_ref 0 "signal_path.c" 154 25 /* 0x00007e 0x88220 */ a0 = sp[0x10] /* 0x00007f 0xbc02f */ jpsdb 0x2 -.src_ref 0 "signal_path.c" 147 25 +.src_ref 0 "signal_path.c" 154 25 /* 0x000080 0x840c8 */ a0[0x4] = ra0 -.src_ref 0 "signal_path.c" 136 14 first +.src_ref 0 "signal_path.c" 143 14 first /* 0x000081 0x8497a */ a1[0x8] = zero /* 0x000082 0x00000 */ nop -.src_ref 0 "signal_path.c" 149 +.src_ref 0 "signal_path.c" 156 /* 0x000083 0x880b6 */ lr = sp[0x4] .label _Z21sig_init_preemph_coefP16SingleSignalPathdddddi__end last -.src_ref 0 "signal_path.c" 149 first -.src_ref 0 "signal_path.c" 149 first +.src_ref 0 "signal_path.c" 156 first +.src_ref 0 "signal_path.c" 156 first /* 0x000084 0x460a0 */ ret; sp+= 0x30 /* 0x000085 0x28060 */ /* MW */ @@ -565,20 +541,20 @@ .text_segment_name .text global 2 _Z14sig_init_delayP16SingleSignalPathi -.src_ref 0 "signal_path.c" 152 first -.src_ref 0 "signal_path.c" 153 34 first +.src_ref 0 "signal_path.c" 159 first +.src_ref 0 "signal_path.c" 160 36 first /* 0x000000 0x40000 */ nop; a0 = a0 + 0x74 /* 0x000001 0x203a0 */ /* MW */ -.src_ref 0 "signal_path.c" 153 11 first - /* 0x000002 0x64000 */ jpdb _Z15sig_init_bufferP9BufferPtrPiii +.src_ref 0 "signal_path.c" 160 11 first + /* 0x000002 0x64000 */ jpdb _Z17initialize_bufferP9BufferPtrPiii /* 0x000003 0x0000f */ /* MW */ .label _Z14sig_init_delayP16SingleSignalPathi__end last -.src_ref 0 "signal_path.c" 153 11 -.src_ref 0 "signal_path.c" 153 56 +.src_ref 0 "signal_path.c" 160 11 +.src_ref 0 "signal_path.c" 160 58 /* 0x000004 0x5c043 */ rb0 = 16; a1 = a0 - 0x40 /* 0x000005 0x20601 */ /* MW */ -.undef global text _Z15sig_init_bufferP9BufferPtrPiii +.undef global text _Z17initialize_bufferP9BufferPtrPiii .data_segment_name .rodata.constmem global 8 _ro_data_DM_8___Z15sig_init_weightP16SingleSignalPathdi__2 DM @@ -603,95 +579,95 @@ .text_segment_name .text global 2 _Z15sig_init_weightP16SingleSignalPathdi -.src_ref 0 "signal_path.c" 157 first -.src_ref 0 "signal_path.c" 157 5 +.src_ref 0 "signal_path.c" 164 first +.src_ref 0 "signal_path.c" 164 5 /* 0x000000 0xabfd0 */ sp+= -0x18 /* 0x000001 0x88076 */ sp[0x0] = lr /* 0x000002 0x880c8 */ sp[0x4] = ra0 /* 0x000003 0x90258 */ sp[0x10] = ahl0 /* 0x000004 0x88160 */ sp[0x8] = a0 -.src_ref 0 "signal_path.c" 159 15 first +.src_ref 0 "signal_path.c" 166 15 first /* 0x000005 0x66000 */ calldb _Z10float64_eqyy /* 0x000006 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 159 15 +.src_ref 0 "signal_path.c" 166 15 /* 0x000007 0x6e000 */ axl1 = [_ro_lbl_DM_8___Z15sig_init_weightP16SingleSignalPathdi_0_0] /* 0x000008 0x00011 */ /* MW */ -.src_ref 0 "signal_path.c" 160 14 +.src_ref 0 "signal_path.c" 167 14 /* 0x000009 0x88120 */ a0 = sp[0x8] -.src_ref 0 "signal_path.c" 159 15 +.src_ref 0 "signal_path.c" 166 15 /* 0x00000a 0x32020 */ cmp(ra0,0x0) -.src_ref 0 "signal_path.c" 160 14 first +.src_ref 0 "signal_path.c" 167 14 first /* 0x00000b 0x76000 */ a0 = a0 + 0x84 /* 0x00000c 0x00420 */ /* MW */ -.src_ref 0 "signal_path.c" 159 4 first -.src_ref 0 "signal_path.c" 159 15 first +.src_ref 0 "signal_path.c" 166 4 first +.src_ref 0 "signal_path.c" 166 15 first /* 0x00000d 0x42110 */ if (nz) jps 0x22; sp[0x8] = a0 /* 0x00000e 0x88160 */ /* MW */ -.src_ref 0 "signal_path.c" 164 14 +.src_ref 0 "signal_path.c" 171 14 /* 0x00000f 0x3800c */ ra0 = 1 -.src_ref 0 "signal_path.c" 164 14 first +.src_ref 0 "signal_path.c" 171 14 first /* 0x000010 0x84048 */ a0[0x0] = ra0 -.src_ref 0 "signal_path.c" 166 14 +.src_ref 0 "signal_path.c" 173 14 /* 0x000011 0xa0020 */ a0 = a0 + 0x4 /* 0x000012 0x881e0 */ sp[0xc] = a0 -.src_ref 0 "signal_path.c" 165 25 first +.src_ref 0 "signal_path.c" 172 25 first /* 0x000013 0x66000 */ calldb _Z16int32_to_float64i /* 0x000014 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 165 25 +.src_ref 0 "signal_path.c" 172 25 /* 0x000015 0x88088 */ ra0 = sp[0x4] -.src_ref 0 "signal_path.c" 165 20 +.src_ref 0 "signal_path.c" 172 20 /* 0x000016 0x2a002 */ bx0 = ax0 + 0x0 -.src_ref 0 "signal_path.c" 165 20 +.src_ref 0 "signal_path.c" 172 20 /* 0x000017 0x66000 */ calldb ff_pow /* 0x000018 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 165 20 +.src_ref 0 "signal_path.c" 172 20 /* 0x000019 0x6e000 */ axl1 = [(_ro_lbl_DM_8___Z15sig_init_weightP16SingleSignalPathdi_8_1 + 0)] /* 0x00001a 0x00411 */ /* MW */ -.src_ref 0 "signal_path.c" 165 40 +.src_ref 0 "signal_path.c" 172 40 /* 0x00001b 0x2a001 */ ax1 = ax0 + 0x0 -.src_ref 0 "signal_path.c" 165 40 +.src_ref 0 "signal_path.c" 172 40 /* 0x00001c 0x66000 */ calldb _Z11float64_subyy /* 0x00001d 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 165 40 +.src_ref 0 "signal_path.c" 172 40 /* 0x00001e 0x6e000 */ bxl0 = [_ro_lbl_DM_8___Z15sig_init_weightP16SingleSignalPathdi_0_0] /* 0x00001f 0x00012 */ /* MW */ -.src_ref 0 "signal_path.c" 165 40 +.src_ref 0 "signal_path.c" 172 40 /* 0x000020 0x66000 */ call _Z30float64_to_int32_round_to_zeroy /* 0x000021 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 166 32 first +.src_ref 0 "signal_path.c" 173 32 first /* 0x000022 0x66000 */ call _Z16int32_to_float64i /* 0x000023 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 166 32 +.src_ref 0 "signal_path.c" 173 32 /* 0x000024 0x66000 */ calldb _Z11float64_mulyy /* 0x000025 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 166 32 -.src_ref 0 "signal_path.c" 166 32 +.src_ref 0 "signal_path.c" 173 32 +.src_ref 0 "signal_path.c" 173 32 /* 0x000026 0x55001 */ bx0 = ax0 + 0x0; axl1 = sp[0x10] /* 0x000027 0x10211 */ /* MW */ -.src_ref 0 "signal_path.c" 166 23 +.src_ref 0 "signal_path.c" 173 23 /* 0x000028 0x66000 */ call _Z30float64_to_int32_round_to_zeroy /* 0x000029 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 167 14 +.src_ref 0 "signal_path.c" 174 14 /* 0x00002a 0x881a1 */ a1 = sp[0xc] -.src_ref 0 "signal_path.c" 166 14 +.src_ref 0 "signal_path.c" 173 14 /* 0x00002b 0x88120 */ a0 = sp[0x8] -.src_ref 0 "signal_path.c" 167 14 +.src_ref 0 "signal_path.c" 174 14 /* 0x00002c 0x8808a */ rb0 = sp[0x4] -.src_ref 0 "signal_path.c" 169 +.src_ref 0 "signal_path.c" 176 /* 0x00002d 0x88036 */ lr = sp[0x0] -.src_ref 0 "signal_path.c" 166 14 +.src_ref 0 "signal_path.c" 173 14 /* 0x00002e 0x42027 */ jpsdb 0x4; a0[0x4] = ra0 /* 0x00002f 0x840c8 */ /* MW */ -.src_ref 0 "signal_path.c" 167 14 first +.src_ref 0 "signal_path.c" 174 14 first /* 0x000030 0x848ca */ a1[0x4] = rb0 -.src_ref 0 "signal_path.c" 169 +.src_ref 0 "signal_path.c" 176 /* 0x000031 0x88036 */ lr = sp[0x0] -.src_ref 0 "signal_path.c" 160 14 first +.src_ref 0 "signal_path.c" 167 14 first /* 0x000032 0x40000 */ nop; a0[0x0] = zero /* 0x000033 0x0407a */ /* MW */ .label _Z15sig_init_weightP16SingleSignalPathdi__end last -.src_ref 0 "signal_path.c" 169 first -.src_ref 0 "signal_path.c" 169 first +.src_ref 0 "signal_path.c" 176 first +.src_ref 0 "signal_path.c" 176 first /* 0x000034 0x460a0 */ ret; sp+= 0x18 /* 0x000035 0x28030 */ /* MW */ @@ -709,162 +685,162 @@ .text_segment_name .text global 2 _Z15sig_calc_biquadP16SingleSignalPathi -.src_ref 0 "signal_path.c" 173 first -.src_ref 0 "signal_path.c" 174 14 first +.src_ref 0 "signal_path.c" 180 first +.src_ref 0 "signal_path.c" 181 14 first /* 0x000000 0x84108 */ ra0 = a0[0x8] -.src_ref 0 "signal_path.c" 174 34 first -.src_ref 0 "signal_path.c" 178 8 -.src_ref 0 "signal_path.c" 185 15 +.src_ref 0 "signal_path.c" 181 34 first +.src_ref 0 "signal_path.c" 185 8 +.src_ref 0 "signal_path.c" 192 15 /* 0x000001 0x59010 */ cmp(ra0,0x0); ra0 = ra1 /* 0x000002 0x18248 */ /* MW */ -.src_ref 0 "signal_path.c" 174 4 -.src_ref 0 "signal_path.c" 174 34 +.src_ref 0 "signal_path.c" 181 4 +.src_ref 0 "signal_path.c" 181 34 /* 0x000003 0xbc1c0 */ if (z) jps 0x1c -.src_ref 0 "signal_path.c" 178 28 first -.src_ref 0 "signal_path.c" 178 39 -.src_ref 0 "signal_path.c" 178 90 -.src_ref 0 "signal_path.c" 179 52 -.src_ref 0 "signal_path.c" 179 103 +.src_ref 0 "signal_path.c" 185 28 first +.src_ref 0 "signal_path.c" 185 39 +.src_ref 0 "signal_path.c" 185 90 +.src_ref 0 "signal_path.c" 186 52 +.src_ref 0 "signal_path.c" 186 103 /* 0x000004 0x5c860 */ c0 = 24; a0 = a0 + 0xc /* 0x000005 0x20060 */ /* MW */ -.src_ref 0 "signal_path.c" 178 39 -.src_ref 0 "signal_path.c" 178 68 -.src_ref 0 "signal_path.c" 179 30 -.src_ref 0 "signal_path.c" 179 81 -.src_ref 0 "signal_path.c" 180 30 +.src_ref 0 "signal_path.c" 185 39 +.src_ref 0 "signal_path.c" 185 68 +.src_ref 0 "signal_path.c" 186 30 +.src_ref 0 "signal_path.c" 186 81 +.src_ref 0 "signal_path.c" 187 30 /* 0x000006 0x5c851 */ c2 = 20; ra1 = [a0+c0] /* 0x000007 0x00009 */ /* MW */ -.src_ref 0 "signal_path.c" 178 8 -.src_ref 0 "signal_path.c" 178 68 +.src_ref 0 "signal_path.c" 185 8 +.src_ref 0 "signal_path.c" 185 68 /* 0x000008 0x44080 */ ax0 = ra0*ra1; ra1 = [a0-c2] /* 0x000009 0x00309 */ /* MW */ -.src_ref 0 "signal_path.c" 178 90 -.src_ref 0 "signal_path.c" 185 15 +.src_ref 0 "signal_path.c" 185 90 +.src_ref 0 "signal_path.c" 192 15 /* 0x00000a 0x55011 */ bx0 = ra0 + 0x0; rb0 = [a0+c0] /* 0x00000b 0x0000a */ /* MW */ -.src_ref 0 "signal_path.c" 178 44 -.src_ref 0 "signal_path.c" 178 46 -.src_ref 0 "signal_path.c" 179 30 +.src_ref 0 "signal_path.c" 185 44 +.src_ref 0 "signal_path.c" 185 46 +.src_ref 0 "signal_path.c" 186 30 /* 0x00000c 0x44340 */ ax0 = ax0+ra1*rb0; rb0 = [a0-c2] /* 0x00000d 0x0030a */ /* MW */ -.src_ref 0 "signal_path.c" 179 52 -.src_ref 0 "signal_path.c" 180 51 -.src_ref 0 "signal_path.c" 185 15 +.src_ref 0 "signal_path.c" 186 52 +.src_ref 0 "signal_path.c" 187 51 +.src_ref 0 "signal_path.c" 192 15 /* 0x00000e 0x5c830 */ c1 = 12; ra0 = [a0+c0] /* 0x00000f 0x80008 */ /* MW */ -.src_ref 0 "signal_path.c" 178 95 -.src_ref 0 "signal_path.c" 179 8 -.src_ref 0 "signal_path.c" 179 81 +.src_ref 0 "signal_path.c" 185 95 +.src_ref 0 "signal_path.c" 186 8 +.src_ref 0 "signal_path.c" 186 81 /* 0x000010 0x44440 */ ax0 = ax0+rb0*ra0; ra0 = [a0-c2] /* 0x000011 0x00308 */ /* MW */ -.src_ref 0 "signal_path.c" 179 103 -.src_ref 0 "signal_path.c" 184 15 -.src_ref 0 "signal_path.c" 186 15 +.src_ref 0 "signal_path.c" 186 103 +.src_ref 0 "signal_path.c" 191 15 +.src_ref 0 "signal_path.c" 193 15 /* 0x000012 0x5c810 */ c0 = 4; rb0 = [a0+c0] /* 0x000013 0x0000a */ /* MW */ -.src_ref 0 "signal_path.c" 179 57 -.src_ref 0 "signal_path.c" 179 59 -.src_ref 0 "signal_path.c" 180 30 +.src_ref 0 "signal_path.c" 186 57 +.src_ref 0 "signal_path.c" 186 59 +.src_ref 0 "signal_path.c" 187 30 /* 0x000014 0x44140 */ ax0 = ax0+ra0*rb0; rb0 = [a0-c2] /* 0x000015 0x0030a */ /* MW */ -.src_ref 0 "signal_path.c" 180 51 +.src_ref 0 "signal_path.c" 187 51 /* 0x000016 0x8008b */ rb1 = [a0+c1] -.src_ref 0 "signal_path.c" 179 108 -.src_ref 0 "signal_path.c" 180 8 -.src_ref 0 "signal_path.c" 184 15 first +.src_ref 0 "signal_path.c" 186 108 +.src_ref 0 "signal_path.c" 187 8 +.src_ref 0 "signal_path.c" 191 15 first /* 0x000017 0x445c0 */ ax0 = ax0+rb0*rb1; [a0-c0] = ra1 /* 0x000018 0x00249 */ /* MW */ -.src_ref 0 "signal_path.c" 181 29 first -.src_ref 0 "signal_path.c" 185 15 first +.src_ref 0 "signal_path.c" 188 29 first +.src_ref 0 "signal_path.c" 192 15 first /* 0x000019 0x51020 */ ax0 = asl(ax0,0x1); [a0+c1] = bh0 /* 0x00001a 0x000d2 */ /* MW */ -.src_ref 0 "signal_path.c" 186 15 first +.src_ref 0 "signal_path.c" 193 15 first /* 0x00001b 0x80248 */ [a0-c0] = ra0 -.src_ref 0 "signal_path.c" 181 12 first -.src_ref 0 "signal_path.c" 188 4 first +.src_ref 0 "signal_path.c" 188 12 first +.src_ref 0 "signal_path.c" 195 4 first /* 0x00001c 0x460a4 */ retdb; ra0 = axs0 /* 0x00001d 0x18008 */ /* MW */ -.src_ref 0 "signal_path.c" 187 15 first +.src_ref 0 "signal_path.c" 194 15 first /* 0x00001e 0x84048 */ a0[0x0] = ra0 /* 0x00001f 0x00000 */ nop .label _Z15sig_calc_biquadP16SingleSignalPathi__end last -.src_ref 0 "signal_path.c" 188 4 first +.src_ref 0 "signal_path.c" 195 4 first /* 0x000020 0x40000 */ nop; ret /* 0x000021 0x3a140 */ /* MW */ .text_segment_name .text global 2 _Z29sig_delay_buffer_load_and_getP16SingleSignalPathi -.src_ref 0 "signal_path.c" 194 first -.src_ref 0 "signal_path.c" 195 14 first +.src_ref 0 "signal_path.c" 201 first +.src_ref 0 "signal_path.c" 202 14 first /* 0x000000 0xa03a0 */ a0 = a0 + 0x74 -.src_ref 0 "signal_path.c" 195 28 first +.src_ref 0 "signal_path.c" 202 28 first /* 0x000001 0x84008 */ ra0 = a0[0x0] -.src_ref 0 "signal_path.c" 194 4 -.src_ref 0 "signal_path.c" 195 40 +.src_ref 0 "signal_path.c" 201 4 +.src_ref 0 "signal_path.c" 202 40 /* 0x000002 0x59010 */ cmp(ra0,0x0); sp+= -0x8 /* 0x000003 0x2bff0 */ /* MW */ -.src_ref 0 "signal_path.c" 195 4 -.src_ref 0 "signal_path.c" 195 40 +.src_ref 0 "signal_path.c" 202 4 +.src_ref 0 "signal_path.c" 202 40 /* 0x000004 0x42050 */ if (z) jps 0xa; sp[0x0] = lr /* 0x000005 0x08076 */ /* MW */ -.src_ref 0 "signal_path.c" 198 35 first +.src_ref 0 "signal_path.c" 205 35 first /* 0x000006 0xa0040 */ a0 = a0 + 0x8 -.src_ref 0 "signal_path.c" 198 35 -.src_ref 0 "signal_path.c" 200 4 +.src_ref 0 "signal_path.c" 205 35 +.src_ref 0 "signal_path.c" 207 4 /* 0x000007 0x5c006 */ ra0 = 1; a1 = a0[0x0] /* 0x000008 0x04021 */ /* MW */ -.src_ref 0 "signal_path.c" 195 14 +.src_ref 0 "signal_path.c" 202 14 /* 0x000009 0xa0440 */ a0 = a0 - 0x8 -.src_ref 0 "signal_path.c" 198 14 +.src_ref 0 "signal_path.c" 205 14 /* 0x00000a 0x8480a */ rb0 = a1[0x0] -.src_ref 0 "signal_path.c" 199 4 first +.src_ref 0 "signal_path.c" 206 4 first /* 0x00000b 0x84849 */ a1[0x0] = ra1 /* 0x00000c 0x880ca */ sp[0x4] = rb0 -.src_ref 0 "signal_path.c" 200 4 first - /* 0x00000d 0x66000 */ call _Z32sig_cirular_buffer_ptr_incrementP9BufferPtri +.src_ref 0 "signal_path.c" 207 4 first + /* 0x00000d 0x66000 */ call _Z16increment_bufferP9BufferPtri /* 0x00000e 0x00000 */ /* MW */ /* 0x00000f 0xbc017 */ jps 0x1 /* 0x000010 0x880c9 */ sp[0x4] = ra1 /* 0x000011 0x00000 */ nop -.src_ref 0 "signal_path.c" 201 4 +.src_ref 0 "signal_path.c" 208 4 /* 0x000012 0x88036 */ lr = sp[0x0] -.src_ref 0 "signal_path.c" 201 4 first +.src_ref 0 "signal_path.c" 208 4 first /* 0x000013 0xba148 */ retdb /* 0x000014 0x88088 */ ra0 = sp[0x4] .label _Z29sig_delay_buffer_load_and_getP16SingleSignalPathi__end -.src_ref 0 "signal_path.c" 201 4 +.src_ref 0 "signal_path.c" 208 4 /* 0x000015 0xa8010 */ sp+= 0x8 -.undef global text _Z32sig_cirular_buffer_ptr_incrementP9BufferPtri +.undef global text _Z16increment_bufferP9BufferPtri .text_segment_name .text global 2 _Z15sig_calc_weightP16SingleSignalPathi -.src_ref 0 "signal_path.c" 204 first -.src_ref 0 "signal_path.c" 205 14 first +.src_ref 0 "signal_path.c" 211 first +.src_ref 0 "signal_path.c" 212 14 first /* 0x000000 0x76000 */ a1 = a0 + 0x84 /* 0x000001 0x00421 */ /* MW */ -.src_ref 0 "signal_path.c" 205 14 first +.src_ref 0 "signal_path.c" 212 14 first /* 0x000002 0x84808 */ ra0 = a1[0x0] -.src_ref 0 "signal_path.c" 205 31 -.src_ref 0 "signal_path.c" 208 18 +.src_ref 0 "signal_path.c" 212 31 +.src_ref 0 "signal_path.c" 215 18 /* 0x000003 0x59010 */ cmp(ra0,0x0); ra0 = ra1 /* 0x000004 0x18248 */ /* MW */ -.src_ref 0 "signal_path.c" 205 4 -.src_ref 0 "signal_path.c" 205 31 +.src_ref 0 "signal_path.c" 212 4 +.src_ref 0 "signal_path.c" 212 31 /* 0x000005 0xbc060 */ if (z) jps 0x6 -.src_ref 0 "signal_path.c" 208 38 first +.src_ref 0 "signal_path.c" 215 38 first /* 0x000006 0x76000 */ a0 = a0 + 0x88 /* 0x000007 0x00440 */ /* MW */ -.src_ref 0 "signal_path.c" 208 38 -.src_ref 0 "signal_path.c" 210 4 first +.src_ref 0 "signal_path.c" 215 38 +.src_ref 0 "signal_path.c" 217 4 first /* 0x000008 0x460a4 */ retdb; ra1 = a0[0x0] /* 0x000009 0x04009 */ /* MW */ -.src_ref 0 "signal_path.c" 208 18 first +.src_ref 0 "signal_path.c" 215 18 first /* 0x00000a 0x08100 */ ax0 = ra0*ra1 -.src_ref 0 "signal_path.c" 210 11 first +.src_ref 0 "signal_path.c" 217 11 first /* 0x00000b 0x98008 */ ra0 = axs0 .label _Z15sig_calc_weightP16SingleSignalPathi__end last -.src_ref 0 "signal_path.c" 210 4 +.src_ref 0 "signal_path.c" 217 4 /* 0x00000c 0x40000 */ nop; ret /* 0x00000d 0x3a140 */ /* MW */ @@ -882,8 +858,8 @@ .text_segment_name .text global 2 _Z4initP16SingleSignalPathS0_PdS1_iidddi -.src_ref 0 "signal_path.c" 303 first -.src_ref 0 "signal_path.c" 303 5 +.src_ref 0 "signal_path.c" 306 first +.src_ref 0 "signal_path.c" 306 5 /* 0x000000 0xabf80 */ sp+= -0x40 /* 0x000001 0x90758 */ sp[0x38] = ahl0 /* 0x000002 0x90659 */ sp[0x30] = ahl1 @@ -895,163 +871,163 @@ /* 0x000008 0x88263 */ sp[0x10] = a3 /* 0x000009 0x882e1 */ sp[0x14] = a1 /* 0x00000a 0x88360 */ sp[0x18] = a0 -.src_ref 0 "signal_path.c" 318 44 -.src_ref 0 "signal_path.c" 318 52 -.src_ref 0 "signal_path.c" 318 60 +.src_ref 0 "signal_path.c" 321 48 +.src_ref 0 "signal_path.c" 321 56 +.src_ref 0 "signal_path.c" 321 64 /* 0x00000b 0x39040 */ c0 = 8 -.src_ref 0 "signal_path.c" 318 44 first +.src_ref 0 "signal_path.c" 321 48 first /* 0x00000c 0x8d010 */ axl0 = [a2+c0] -.src_ref 0 "signal_path.c" 318 52 +.src_ref 0 "signal_path.c" 321 56 /* 0x00000d 0x8d011 */ axl1 = [a2+c0] -.src_ref 0 "signal_path.c" 318 60 +.src_ref 0 "signal_path.c" 321 64 /* 0x00000e 0x8d012 */ bxl0 = [a2+c0] -.src_ref 0 "signal_path.c" 318 76 +.src_ref 0 "signal_path.c" 321 80 /* 0x00000f 0x8d133 */ bxl1 = a2[0x8] /* 0x000010 0x9005b */ sp[0x0] = bhl1 -.src_ref 0 "signal_path.c" 318 4 +.src_ref 0 "signal_path.c" 321 4 /* 0x000011 0x66000 */ calldb _Z21sig_init_preemph_coefP16SingleSignalPathdddddi /* 0x000012 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 318 4 -.src_ref 0 "signal_path.c" 318 68 +.src_ref 0 "signal_path.c" 321 4 +.src_ref 0 "signal_path.c" 321 72 /* 0x000013 0x5c07e */ ra0 = 31; bxl1 = a2[0x0] /* 0x000014 0x0d033 */ /* MW */ -.src_ref 0 "signal_path.c" 319 4 +.src_ref 0 "signal_path.c" 322 4 /* 0x000015 0x88320 */ a0 = sp[0x18] -.src_ref 0 "signal_path.c" 319 4 first +.src_ref 0 "signal_path.c" 322 4 first /* 0x000016 0x66000 */ calldb _Z14sig_init_delayP16SingleSignalPathi /* 0x000017 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 319 4 +.src_ref 0 "signal_path.c" 322 4 /* 0x000018 0x88409 */ ra1 = sp[0x20] -.src_ref 0 "signal_path.c" 320 4 +.src_ref 0 "signal_path.c" 323 4 /* 0x000019 0x88320 */ a0 = sp[0x18] -.src_ref 0 "signal_path.c" 320 4 first +.src_ref 0 "signal_path.c" 323 4 first /* 0x00001a 0x66000 */ calldb _Z15sig_init_weightP16SingleSignalPathdi /* 0x00001b 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 320 4 -.src_ref 0 "signal_path.c" 320 4 +.src_ref 0 "signal_path.c" 323 4 +.src_ref 0 "signal_path.c" 323 4 /* 0x00001c 0x5c07e */ ra0 = 31; axl0 = sp[0x38] /* 0x00001d 0x10710 */ /* MW */ -.src_ref 0 "signal_path.c" 323 48 +.src_ref 0 "signal_path.c" 326 52 /* 0x00001e 0x88222 */ a2 = sp[0x10] -.src_ref 0 "signal_path.c" 323 4 -.src_ref 0 "signal_path.c" 323 48 -.src_ref 0 "signal_path.c" 323 58 -.src_ref 0 "signal_path.c" 323 68 +.src_ref 0 "signal_path.c" 326 4 +.src_ref 0 "signal_path.c" 326 52 +.src_ref 0 "signal_path.c" 326 62 +.src_ref 0 "signal_path.c" 326 72 /* 0x00001f 0x5c820 */ c0 = 8; a0 = sp[0x14] /* 0x000020 0x082a0 */ /* MW */ -.src_ref 0 "signal_path.c" 323 4 -.src_ref 0 "signal_path.c" 323 48 first +.src_ref 0 "signal_path.c" 326 4 +.src_ref 0 "signal_path.c" 326 52 first /* 0x000021 0x5c07e */ ra0 = 31; axl0 = [a2+c0] /* 0x000022 0x0d010 */ /* MW */ -.src_ref 0 "signal_path.c" 323 58 +.src_ref 0 "signal_path.c" 326 62 /* 0x000023 0x8d011 */ axl1 = [a2+c0] -.src_ref 0 "signal_path.c" 323 68 +.src_ref 0 "signal_path.c" 326 72 /* 0x000024 0x8d012 */ bxl0 = [a2+c0] -.src_ref 0 "signal_path.c" 323 88 +.src_ref 0 "signal_path.c" 326 92 /* 0x000025 0x8d133 */ bxl1 = a2[0x8] /* 0x000026 0x9005b */ sp[0x0] = bhl1 -.src_ref 0 "signal_path.c" 323 4 +.src_ref 0 "signal_path.c" 326 4 /* 0x000027 0x66000 */ calldb _Z21sig_init_preemph_coefP16SingleSignalPathdddddi /* 0x000028 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 323 78 +.src_ref 0 "signal_path.c" 326 82 /* 0x000029 0x8d033 */ bxl1 = a2[0x0] -.src_ref 0 "signal_path.c" 324 4 +.src_ref 0 "signal_path.c" 327 4 /* 0x00002a 0x882a0 */ a0 = sp[0x14] -.src_ref 0 "signal_path.c" 324 4 first +.src_ref 0 "signal_path.c" 327 4 first /* 0x00002b 0x66000 */ calldb _Z14sig_init_delayP16SingleSignalPathi /* 0x00002c 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 324 4 +.src_ref 0 "signal_path.c" 327 4 /* 0x00002d 0x88189 */ ra1 = sp[0xc] -.src_ref 0 "signal_path.c" 325 4 +.src_ref 0 "signal_path.c" 328 4 /* 0x00002e 0x882a0 */ a0 = sp[0x14] -.src_ref 0 "signal_path.c" 325 4 first +.src_ref 0 "signal_path.c" 328 4 first /* 0x00002f 0x66000 */ calldb _Z15sig_init_weightP16SingleSignalPathdi /* 0x000030 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 325 4 -.src_ref 0 "signal_path.c" 325 4 +.src_ref 0 "signal_path.c" 328 4 +.src_ref 0 "signal_path.c" 328 4 /* 0x000031 0x5c07e */ ra0 = 31; axl0 = sp[0x30] /* 0x000032 0x10610 */ /* MW */ -.src_ref 0 "signal_path.c" 329 16 +.src_ref 0 "signal_path.c" 332 16 /* 0x000033 0x90511 */ axl1 = sp[0x28] -.src_ref 0 "signal_path.c" 329 16 first +.src_ref 0 "signal_path.c" 332 16 first /* 0x000034 0x66000 */ calldb _Z11float64_mulyy /* 0x000035 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 329 16 +.src_ref 0 "signal_path.c" 332 16 /* 0x000036 0x6e000 */ bxl0 = [_ro_lbl_DM_8___Z4initP16SingleSignalPathS0_PdS1_iidddi_0_0] /* 0x000037 0x00012 */ /* MW */ -.src_ref 0 "signal_path.c" 329 7 +.src_ref 0 "signal_path.c" 332 7 /* 0x000038 0x66000 */ call _Z30float64_to_int32_round_to_zeroy /* 0x000039 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 329 4 +.src_ref 0 "signal_path.c" 332 4 /* 0x00003a 0x6c000 */ [_ZL2mu] = ra0 /* 0x00003b 0x00048 */ /* MW */ -.src_ref 0 "signal_path.c" 331 4 - /* 0x00003c 0x68000 */ a4 = ptr_fir_lms_delay_line +.src_ref 0 "signal_path.c" 334 4 + /* 0x00003c 0x68000 */ a4 = pointer_delay_line /* 0x00003d 0x00024 */ /* MW */ -.src_ref 0 "signal_path.c" 331 4 - /* 0x00003e 0x68000 */ a5 = fir_lms_delay_line +.src_ref 0 "signal_path.c" 334 4 + /* 0x00003e 0x68000 */ a5 = delay_line /* 0x00003f 0x00025 */ /* MW */ -.src_ref 0 "signal_path.c" 331 4 first - /* 0x000040 0x66000 */ calldb _Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii +.src_ref 0 "signal_path.c" 334 4 first + /* 0x000040 0x66000 */ calldb _Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii /* 0x000041 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 331 4 -.src_ref 0 "signal_path.c" 331 4 +.src_ref 0 "signal_path.c" 334 4 +.src_ref 0 "signal_path.c" 334 4 /* 0x000042 0x5c103 */ rb0 = 64; ra1 = sp[0x8] /* 0x000043 0x08109 */ /* MW */ -.src_ref 0 "signal_path.c" 332 4 - /* 0x000044 0x68000 */ a0 = ptr_fir_lms_coeffs +.src_ref 0 "signal_path.c" 335 4 + /* 0x000044 0x68000 */ a0 = pointer_filter_coefficients /* 0x000045 0x00020 */ /* MW */ -.src_ref 0 "signal_path.c" 332 4 - /* 0x000046 0x68000 */ a1 = fir_lms_coeffs +.src_ref 0 "signal_path.c" 335 4 + /* 0x000046 0x68000 */ a1 = filter_coefficients /* 0x000047 0x00021 */ /* MW */ -.src_ref 0 "signal_path.c" 332 4 first - /* 0x000048 0x66000 */ calldb _Z15sig_init_bufferP9BufferPtrPiii +.src_ref 0 "signal_path.c" 335 4 first + /* 0x000048 0x66000 */ calldb _Z17initialize_bufferP9BufferPtrPiii /* 0x000049 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 332 4 -.src_ref 0 "signal_path.c" 332 4 +.src_ref 0 "signal_path.c" 335 4 +.src_ref 0 "signal_path.c" 335 4 /* 0x00004a 0x5c103 */ rb0 = 64; ra1 = sp[0x8] /* 0x00004b 0x08109 */ /* MW */ -.src_ref 0 "signal_path.c" 335 4 +.src_ref 0 "signal_path.c" 338 4 /* 0x00004c 0x88108 */ ra0 = sp[0x8] -.src_ref 0 "signal_path.c" 335 4 first +.src_ref 0 "signal_path.c" 338 4 first /* 0x00004d 0x32020 */ cmp(ra0,0x0) -.src_ref 0 "signal_path.c" 335 4 +.src_ref 0 "signal_path.c" 338 4 /* 0x00004e 0xbc0d5 */ if (np) jps 0xd -.src_ref 0 "signal_path.c" 336 30 first - /* 0x00004f 0x6c000 */ a0 = [(ptr_fir_lms_delay_line + 4)] +.src_ref 0 "signal_path.c" 339 26 first + /* 0x00004f 0x6c000 */ a0 = [(pointer_delay_line + 4)] /* 0x000050 0x00220 */ /* MW */ -.src_ref 0 "signal_path.c" 335 4 first +.src_ref 0 "signal_path.c" 338 4 first /* 0x000051 0x62000 */ lp [ra0] 0x3 /* 0x000052 0x00034 */ /* MW */ -.src_ref 0 "signal_path.c" 337 26 first - /* 0x000053 0x6c000 */ a2 = [(ptr_fir_lms_coeffs + 4)] +.src_ref 0 "signal_path.c" 340 35 first + /* 0x000053 0x6c000 */ a2 = [(pointer_filter_coefficients + 4)] /* 0x000054 0x00222 */ /* MW */ -.src_ref 0 "signal_path.c" 336 40 -.src_ref 0 "signal_path.c" 337 36 -.src_ref 0 "signal_path.c" 339 +.src_ref 0 "signal_path.c" 339 36 +.src_ref 0 "signal_path.c" 340 45 +.src_ref 0 "signal_path.c" 342 /* 0x000055 0x5c810 */ c0 = 4; lr = sp[0x1c] /* 0x000056 0x083b6 */ /* MW */ -.src_ref 0 "signal_path.c" 336 40 first +.src_ref 0 "signal_path.c" 339 36 first /* 0x000057 0x8007a */ [a0+c0] = zero -.src_ref 0 "signal_path.c" 337 36 first +.src_ref 0 "signal_path.c" 340 45 first /* 0x000058 0x40000 */ nop; [a2+c0] = zero /* 0x000059 0x0107a */ /* MW */ -.src_ref 0 "signal_path.c" 339 first -.src_ref 0 "signal_path.c" 339 first +.src_ref 0 "signal_path.c" 342 first +.src_ref 0 "signal_path.c" 342 first /* 0x00005a 0x460a0 */ ret; sp+= 0x40 /* 0x00005b 0x28080 */ /* MW */ .label _Z4initP16SingleSignalPathS0_PdS1_iidddi__end last -.src_ref 0 "signal_path.c" 339 +.src_ref 0 "signal_path.c" 342 /* 0x00005c 0x43fe3 */ jps -0x4; lr = sp[0x1c] /* 0x00005d 0x883b6 */ /* MW */ -.undef global data ptr_fir_lms_delay_line +.undef global data pointer_delay_line -.undef global data fir_lms_delay_line +.undef global data delay_line -.undef global data ptr_fir_lms_coeffs +.undef global data pointer_filter_coefficients -.undef global data fir_lms_coeffs +.undef global data filter_coefficients .undef global text _Z21sig_init_preemph_coefP16SingleSignalPathdddddi @@ -1059,179 +1035,179 @@ .undef global text _Z15sig_init_weightP16SingleSignalPathdi -.undef global text _Z19sig_init_buffer_DMBPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii +.undef global text _Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii -.undef global text _Z15sig_init_bufferP9BufferPtrPiii +.undef global text _Z17initialize_bufferP9BufferPtrPiii .undef global text _Z11float64_mulyy .undef global text _Z30float64_to_int32_round_to_zeroy .text_segment_name -.text global 2 _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ -.src_ref 0 "signal_path.c" 343 first -.src_ref 0 "signal_path.c" 368 39 first +.text global 2 _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ +.src_ref 0 "signal_path.c" 346 first +.src_ref 0 "signal_path.c" 370 47 first /* 0x000000 0x96034 */ ra0.s = a4[0x0] -.src_ref 0 "signal_path.c" 368 44 first -.src_ref 0 "signal_path.c" 369 42 first +.src_ref 0 "signal_path.c" 370 52 first +.src_ref 0 "signal_path.c" 371 50 first /* 0x000001 0x51a13 */ rb0 = lsl(ra0,0x10); ra0.s = a5[0x0] /* 0x000002 0x16834 */ /* MW */ -.src_ref 0 "signal_path.c" 343 5 -.src_ref 0 "signal_path.c" 369 47 +.src_ref 0 "signal_path.c" 346 5 +.src_ref 0 "signal_path.c" 371 55 /* 0x000003 0x51a12 */ ra0 = lsl(ra0,0x10); sp+= -0x8 /* 0x000004 0x2bff0 */ /* MW */ /* 0x000005 0x88076 */ sp[0x0] = lr -.src_ref 0 "signal_path.c" 381 4 - /* 0x000006 0x68000 */ a4 = ptr_fir_lms_delay_line +.src_ref 0 "signal_path.c" 383 4 + /* 0x000006 0x68000 */ a4 = pointer_delay_line /* 0x000007 0x00024 */ /* MW */ -.src_ref 0 "signal_path.c" 368 18 - /* 0x000008 0x6c000 */ [_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32] = rb0 +.src_ref 0 "signal_path.c" 370 19 + /* 0x000008 0x6c000 */ [_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32] = rb0 /* 0x000009 0x0004a */ /* MW */ -.src_ref 0 "signal_path.c" 374 20 first - /* 0x00000a 0x6c000 */ [_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre] = rb0 +.src_ref 0 "signal_path.c" 376 21 first + /* 0x00000a 0x6c000 */ [_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre] = rb0 /* 0x00000b 0x0004a */ /* MW */ -.src_ref 0 "signal_path.c" 369 20 first - /* 0x00000c 0x6c000 */ [_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32] = ra0 +.src_ref 0 "signal_path.c" 371 21 first + /* 0x00000c 0x6c000 */ [_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32] = ra0 /* 0x00000d 0x00048 */ /* MW */ -.src_ref 0 "signal_path.c" 375 22 first - /* 0x00000e 0x6c000 */ [_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre] = ra0 +.src_ref 0 "signal_path.c" 377 23 first + /* 0x00000e 0x6c000 */ [_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre] = ra0 /* 0x00000f 0x00048 */ /* MW */ -.src_ref 0 "signal_path.c" 381 4 first - /* 0x000010 0x66000 */ call _Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi +.src_ref 0 "signal_path.c" 383 4 first + /* 0x000010 0x66000 */ call _Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi /* 0x000011 0x00000 */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 - /* 0x000012 0x68000 */ a4 = ptr_fir_lms_delay_line +.src_ref 0 "signal_path.c" 386 28 + /* 0x000012 0x68000 */ a4 = pointer_delay_line /* 0x000013 0x00024 */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 388 4 - /* 0x000014 0x68000 */ a2 = ptr_fir_lms_coeffs +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 390 4 + /* 0x000014 0x68000 */ a2 = pointer_filter_coefficients /* 0x000015 0x00022 */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 first - /* 0x000016 0x6c000 */ a0 = [(ptr_fir_lms_coeffs + 8)] +.src_ref 0 "signal_path.c" 386 28 first + /* 0x000016 0x6c000 */ a0 = [(pointer_filter_coefficients + 8)] /* 0x000017 0x00420 */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 384 23 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 386 28 /* 0x000018 0x5c810 */ c0 = 4; a4 = a4 + 0x8 /* 0x000019 0x22044 */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 +.src_ref 0 "signal_path.c" 386 28 /* 0x00001a 0x82225 */ a5 = [a4-c0] -.src_ref 0 "signal_path.c" 384 23 +.src_ref 0 "signal_path.c" 386 28 /* 0x00001b 0x8222c */ lb0 = [a4-c0] -.src_ref 0 "signal_path.c" 384 23 +.src_ref 0 "signal_path.c" 386 28 /* 0x00001c 0x40000 */ nop; ra0 = a4[0x0] /* 0x00001d 0x06008 */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 384 23 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 386 28 /* 0x00001e 0x51852 */ ra0 = lsl(ra0,0x2); rb0 = a2[0x0] /* 0x00001f 0x0500a */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 388 4 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 390 4 /* 0x000020 0x553fa */ ra0 = rb0 + -0x1; lsz0 = ra0 /* 0x000021 0x1822e */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 388 4 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 390 4 /* 0x000022 0x51432 */ ra0 = asr(ra0,0x1); c1 = -0x4 /* 0x000023 0x2ffe1 */ /* MW */ -.src_ref 0 "signal_path.c" 393 14 -.src_ref 0 "signal_path.c" 393 18 +.src_ref 0 "signal_path.c" 395 19 +.src_ref 0 "signal_path.c" 395 23 /* 0x000024 0x55033 */ rb1 = ra0 + 0x1; a1 = sp[0x8] /* 0x000025 0x88121 */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 +.src_ref 0 "signal_path.c" 386 28 /* 0x000026 0x62000 */ lp [rb1] 0x4 /* 0x000027 0x00047 */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 384 23 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 386 28 /* 0x000028 0x5c001 */ bx0 = 0; a4 = a5 + 0x0 /* 0x000029 0x22804 */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 384 23 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 386 28 /* 0x00002a 0x5c000 */ ax0 = 0; ra1 = [a0+c0]; rb0 = [a4+%0c1] /* 0x00002b 0x58089 */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 384 23 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 386 28 /* 0x00002c 0x444d4 */ bx0 = bx0+rb0*ra1; ra0 = [a0+c0]; rb0 = [a4+%0c1] /* 0x00002d 0x50089 */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 384 23 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 386 28 /* 0x00002e 0x44440 */ ax0 = ax0+rb0*ra0; ra1 = [a0+c0]; rb0 = [a4+%0c1] /* 0x00002f 0x58089 */ /* MW */ -.src_ref 0 "signal_path.c" 386 27 first - /* 0x000030 0x6c000 */ rb0 = [_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre] +.src_ref 0 "signal_path.c" 388 31 first + /* 0x000030 0x6c000 */ rb0 = [_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre] /* 0x000031 0x0000a */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 first -.src_ref 0 "signal_path.c" 388 4 first +.src_ref 0 "signal_path.c" 386 28 first +.src_ref 0 "signal_path.c" 390 4 first /* 0x000032 0x54008 */ ax0 = bx0 + ax0; a4 = a2[0x4] /* 0x000033 0x050a4 */ /* MW */ -.src_ref 0 "signal_path.c" 384 23 -.src_ref 0 "signal_path.c" 388 4 +.src_ref 0 "signal_path.c" 386 28 +.src_ref 0 "signal_path.c" 390 4 /* 0x000034 0x5cbe0 */ c0 = -8; ra0 = axs0 /* 0x000035 0x18008 */ /* MW */ -.src_ref 0 "signal_path.c" 384 18 - /* 0x000036 0x6c000 */ [_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt] = ra0 +.src_ref 0 "signal_path.c" 386 22 + /* 0x000036 0x6c000 */ [_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator] = ra0 /* 0x000037 0x00048 */ /* MW */ -.src_ref 0 "signal_path.c" 386 31 first -.src_ref 0 "signal_path.c" 388 4 first +.src_ref 0 "signal_path.c" 388 35 first +.src_ref 0 "signal_path.c" 390 4 first /* 0x000038 0x5709a */ ra0 = rb0 - ra0; a0 = a5+%0c1 /* 0x000039 0x1ec80 */ /* MW */ -.src_ref 0 "signal_path.c" 388 4 +.src_ref 0 "signal_path.c" 390 4 /* 0x00003a 0x6c000 */ rb0 = [_ZL2mu] /* 0x00003b 0x0000a */ /* MW */ -.src_ref 0 "signal_path.c" 388 4 -.src_ref 0 "signal_path.c" 388 4 +.src_ref 0 "signal_path.c" 390 4 +.src_ref 0 "signal_path.c" 390 4 /* 0x00003c 0x44400 */ ax0 = rb0*ra0; c1 = 0x8 /* 0x00003d 0x2c041 */ /* MW */ -.src_ref 0 "signal_path.c" 388 4 +.src_ref 0 "signal_path.c" 390 4 /* 0x00003e 0x62000 */ lp [rb1] 0x7 /* 0x00003f 0x00077 */ /* MW */ -.src_ref 0 "signal_path.c" 386 10 - /* 0x000040 0x6c000 */ [_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32] = ra0 +.src_ref 0 "signal_path.c" 388 13 + /* 0x000040 0x6c000 */ [_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32] = ra0 /* 0x000041 0x00048 */ /* MW */ -.src_ref 0 "signal_path.c" 388 4 +.src_ref 0 "signal_path.c" 390 4 /* 0x000042 0x98009 */ ra1 = axs0 -.src_ref 0 "signal_path.c" 388 4 +.src_ref 0 "signal_path.c" 390 4 /* 0x000043 0x8e025 */ axs1,bxs1 = a4[0x0] -.src_ref 0 "signal_path.c" 388 4 -.src_ref 0 "signal_path.c" 388 4 +.src_ref 0 "signal_path.c" 390 4 +.src_ref 0 "signal_path.c" 390 4 /* 0x000044 0x82c08 */ ra0 = [a5+%0c0] -.src_ref 0 "signal_path.c" 388 4 -.src_ref 0 "signal_path.c" 388 4 -.src_ref 0 "signal_path.c" 388 4 +.src_ref 0 "signal_path.c" 390 4 +.src_ref 0 "signal_path.c" 390 4 +.src_ref 0 "signal_path.c" 390 4 /* 0x000045 0x44242 */ ax0 = ax1+ra1*ra0; rb0 = [a0+%0c0] /* 0x000046 0x0040a */ /* MW */ -.src_ref 0 "signal_path.c" 388 4 +.src_ref 0 "signal_path.c" 390 4 /* 0x000047 0x086ac */ bx0 = bx1+ra1*rb0 -.src_ref 0 "signal_path.c" 388 4 +.src_ref 0 "signal_path.c" 390 4 /* 0x000048 0x8e0c0 */ [a4+c1] = axs0,bxs0 /* 0x000049 0x00000 */ nop -.src_ref 0 "signal_path.c" 393 48 first - /* 0x00004a 0x6c000 */ ra0 = [_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32] +.src_ref 0 "signal_path.c" 395 56 first + /* 0x00004a 0x6c000 */ ra0 = [_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32] /* 0x00004b 0x00008 */ /* MW */ -.src_ref 0 "signal_path.c" 393 53 -.src_ref 0 "signal_path.c" 396 +.src_ref 0 "signal_path.c" 395 61 +.src_ref 0 "signal_path.c" 398 /* 0x00004c 0x51610 */ ax0 = asr(ra0,0x10); lr = sp[0x0] /* 0x00004d 0x08036 */ /* MW */ -.src_ref 0 "signal_path.c" 393 20 -.src_ref 0 "signal_path.c" 396 first +.src_ref 0 "signal_path.c" 395 25 +.src_ref 0 "signal_path.c" 398 first /* 0x00004e 0x460a4 */ retdb; axs0 = axs0 /* 0x00004f 0x18000 */ /* MW */ -.src_ref 0 "signal_path.c" 393 14 first -.src_ref 0 "signal_path.c" 393 18 first +.src_ref 0 "signal_path.c" 395 19 first +.src_ref 0 "signal_path.c" 395 23 first /* 0x000050 0x94870 */ a1[0x0] = axs0.s -.label _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3___end -.src_ref 0 "signal_path.c" 396 first +.label _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2___end +.src_ref 0 "signal_path.c" 398 first /* 0x000051 0xa8010 */ sp+= 0x8 -.undef global data ptr_fir_lms_delay_line +.undef global data pointer_delay_line -.undef global data ptr_fir_lms_coeffs +.undef global data pointer_filter_coefficients -.undef global text _Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi +.undef global text _Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi .dir 0 "C:/Users/phangl/00_Repos/06_DSP_Simulation/simulation/signal_processing" diff --git a/simulation/Release/simulation b/simulation/Release/simulation index 4aa2445319d5790b2ab772b39e4e7696a7bf14c5..0d385f867717c5a56dda90b1f5f8a16648e375ef 100644 GIT binary patch literal 92556 zcmc${31C#!**<>mawc~&VP>)b!JrO^8Wlql0^-U9q6P#Fiwd|Tfdq*Hi4YK%$|Rv0 z&{D*u)-@`&)D@RnYpo883b+)kwN|YSiv7@1#p;JE@_(Ll&rME%F2C>l{r~@gbI$X= z?{nU>pS#SRo5iP&JI%5z5qxZbKq>jgPy_6Uko7)8$&*945qyj!dtL0@RL9={nP#xYz*pybU!;P{S`tX z2n?qGCI|_%fkA!t$*=6>FcUsY5KRBHuhyX$HU?5z9fl4FZ|UGcW-#r{+o{7A*ceRv zA}Pcg9V%dBFzwI6_LUAE3S=#~yQ3;6Ctf9)E*ckidbE0W?B1QAaQ(e%71Yt&`$8VNuAEcSf| zebYJeZ1wqr=51kGb9(PDM^^mhg0CWvOg`oN)??}^`}vZiouT}EFmmsMjqf})=be$` zkNEL~v(Ns+NUQwdU(_^j9a;a*rW?mz^XkY?&pdT(;nkaUJ}-&iGH_vTZ_1wIM<7Vo<=3Mjp67EudzX4&)LP;E# zGTfRqPD=d05l8OHiQJPLN;$FbN4PcZC?(X1@^fTbWIi94>CDV>TdsBNQKNyymMgrs zt_aJi;moPw(A02bYB*zRIBROyo9bfQ>NPc#LXx0|?b(cX-iYQnD-v==9(vGC4EK`Tyku=Cfx>zt;Ny8$ zIM!-6k!>w+m+6pmPZA{}*0~ZYSIviBO?{7Cg$K?hH^%Kmg*Pza4IJzxE9t++vx`@S zTZ@3*npM^Y;nmgvXFlH%wx@cj-RO$2b6(h;7M4@ImKwHe!D`F|>#A(Fw`D+N-L07( zYb7wg%8Hp5w&Tj$;U;#0v#-_dvUVK6>U3GF4qy%W)&cIoN_4N6@?<*07HKpm)8$O? z#*Ae($`f{nO>pf-);5(bt3(8A0h;r7sQTv+k5-!UgsieGnT>i{)->ub=qCLQH4#YH@=26eNY zj!;sFNKB?j+aW9S`7K^*p_keiwtEiEl5DRffu)pz65WJ5AdZ1^Qd#UGk?{OsDlha> z?LE4vJ=^ZESQ)>6mh|W!zmn{wuC}+_gHpWIGA}jUO&rMzS8gUorIS~vIu~a?p9*J8 z;l?7Td2PGBB^a`?Udtx0b%xiv4NK2ik@U92y)D_^mK<;E(6Bg<1w{*G`f9OdC>AWm zKJDI;aDaEfWM#y?)`4hq5QnZ9aDIu;*Fuq#tdlApqdo3P!t@Iy48-!S%P|L6^l*WlJY8V%7 zPkG`B_DS6DlaxF11F!9=a7~#!DA$^WILCf|7sgSSi;SO)W%hrlcvmIy7nQ6@ucYRr zP?Lewf5XYCR`lUm(JZCLllc=xRi>Qujn!Ht^GfZ#+ho;HuVsL$*y%ED*@Z4vs7x(& zE8dU-aT1u`{*ft@o~T+SU+%P09-HG<%BI__ohe#(X1W!^PM0e`m(d!k45z|g=i%O9 z&mA>NxS8UbhrCWug|d3G56+{p*R8TrB3#*&nTk72*EmfT_O>#+qmG@nc9_!|a;%O> zdW&+KXIt^`@?Y9tg(K-)I~BIW9xCA6Qz^xg@Jh$-=SA+RbQUGU%i93#j!1ZU3a!R| znE8B-Opg-i#+0x!(JcvU`7#ftgovbz?T&?xRUFxSFJd>b)k|&0^poi$MB8+)7?>DmaR*l>m~}q%iDeb&b8ll`S+5xOdkp7a{c#kF4Oron$YsP*E-hwVWpR>;`W_d6@Z5OGswDVmVW#x7Ko}$R&l?gt^r$zX=<)JvrM=T#YS` zCmyLcBKKHfCp*0S=CG}n?cvy#Z}Dj|-DbHt(o0*R+;Ce2CqLn~cDMWnt8J6aT8oXy z9sN_Q?Pa(8r`F0ev3H()w%l5|UM9y!L@#I2ddIsplFkV)UutLHW~WllBH?%`JN$s1 zz0&S?yG%BOy&TX0BIy(4v$YYC8D8FMhgZUb<>WexT4mGtu*`A1xNPzqkx5SaX!y}I zSVQ#SB=RHcC&6vlnI?n?XXMzaiO7z9k|J7>93OU|Y^Bd7p0zTiU8TB9WI?{G?;n?0 zX}FT!tLPtDIXGqV--fy^PEBtXI7Ck&r+=AOQripB>i)z zc9g96TSR2p*_%;AnYAjC#;j|%!}r=NmfG#eVu#y2r{yer!gee!r%K4A8yUGvK8s^P zp?$(q=i0CAaLR5E!@tT)&yID!ot?B(`SMxpT9tOH9J?7?U6;)bEj1O{os@8zPP4Z? z97+mt;-}Kvfb$mYmTqFBwLAqN)6(HAZFL%4`E*-E{8A>Lb*vEkCu^x}%8Rg1HbhWX zc%_~Fx}817?sp$1m>oyC<*M8`<|Nw7Gs%{pVRbmxcNkM^?^?TkqRdKR;m}*gQkhy~ zwT)p7XXVI>q_cKI+Jw5+%zc0@LG zsLm;t=`YDCPuV};>m)|t)WTW2#<8B3>Ag;RCHh1Wj>oYhVp-wk*G1NjlRLjc71QR$XPZmbL zU+gR@N3}Sh>0-J)J_fg#=ZLYHquefK7{`4(*T%8$KxDha!>O`NRv;sM%7X`~#lp3t zX72|3`LvoR>t#iaWlxpqZ^Lb2*6OM_7NA|aR3^5Et*J6=BQ_#gQOB*L!V9;JwoBXX z&W~iGGrZ&sP8A%3s`^LP-Q*-ZS@`?Nh7Z&%+UQvMkr$I}Zz7IONmdO)g`JvFa)syE zZe(q-W5s3qdnY|zjZ{eWKj(&nousBkR$SwVUUs&{ttP8nS(n=3U)U?Ecr0t(D4V3S zu2DXl3@_QFN_^R|FgMV{`7F`Nk(0J#DYI5KCqd4HpEEw~^nb-U?R1~XQM2xsS?%`oTa>p{+&m?eih-?Q8L|vT~TJ$h1LtH=5typTUY;`O8Su4x2b|Q%^ z9-FKX4zKdr8f%H;p7v8~$;&veaBwn{ybA|A9^kUCvr}nx=99*ORUH9uxBFqon98Mx zbE_QW%l$8}c3CTYk`v8u-YFq|lj+uK4+qka84u2#o-SEmZ z_tkr>$l8*~+9B+>>(!>QcB|_7O^#KAsmLsAFSWzleE;gGI>IO09r^yggl)mC!DU0- z-)Fiob`K8s@iAy%+DCL+_R6g7jCm+b}WOMQRLo7!JML z3?@szBUgHzBDLEecYpCxe-q9Ig-m_Lqff;wXX6f>AaPM|Ebg8Fo0^;^TTb+M@08v7 zBXumm1jvtUTH!RU)27blcKmj`yq{ezxRv#*#X(Bu4{{FuST4!3obzPUGfsM(ox0Z^ zF-BG$r8YoIv`pk#U$Kas^|jqzE>~4pPIlylJg3E$S*M2EFq6wMXVgjZW_NTLGub^o zY`Ih2QDJN4Xn(56MX8NR^oO?7#hUbTW~Lh)8NEU)ikK`cQBOb z&yCDfm7AEa4p=zqZN*^W79X;3sdgW~sv_x;9N$~xI0UF!SLL)=ws)z$Vw0)>^*$lE zbyEd^nW?5Fv7U+o`xx@BvisToWV72}*XLb()wxi50{wL0B)L^h{u>lI^WTw|k&H8H zFNxjTNw2V1B<*5u$gbLHQD>ZS=~$lu{<}J?3hJ=#v439&l2sknu2nlQ=Gzagwq30=t6woJ1XcN#uFB(z_f64H4Yp;Ul_IrFrl#OvB$K7i zhIPE|v$J`>uB8g~!7iaTtF$8$k@YFgv@JMU@(5nZmX!l6XNryct1VkpaR4of-zrlT zqQ#D^Tg9T^#r+D`Ic2h}*yOBT&@g?Ph~sbb54n8k88>YH*nOTi_WJ%@FZ1~-S#gNfmXej(xT?izvuGI~N(!;A-D?f{ zywi5Xtx8z|fQ<$B03+$+oWeq-#Lm_cSUVzVthm$VO+ug3t}DlF99&Df1Lk?G(X@tjh`Gw6o93NFpqg!z1DznJROvdm`!WYJ=*)nY@#_$KE!^ z_Ui3;gG?>4mbXOGTjk`ki0Cbw$|C8X(3*cLtxH^GE%B{(XM?N?;Up8)fH#)=1xk4& zvi5SX1&1fxWSOd3(W$CrIiiN*h7}b53ULv|7kCrW-a!$kd^mH%@>KdK=(AHeI3>mz zPWmz3V=oGvxRUUqV8-o1PrfMZk-O!jZ$)dXteh%Z#$u-;ZEXi>AA{Br`NK`26jYcP zgV7K-F$T90^nGbHtWF|Ft{;qZSDAKj4iid^jP1q6*IAK7rtGs^v~1>aP~Fc&xuH}v zbXc2AT_xHk$jS?y^oOBTQLnpNWa=b!r(&MhW`)|)LfAZ|$Nh@rL@-@}?=m)Xwx5%b z`HMW9WmUz)OJ;@B!b_K8CiD9;cba$2EHxWDaWfe=m;9NDTQ_$h}YYw^Fd4*r+c!hdNUWLVJ(^hPiW?2WMM z4Yq=P<=57)A+4@zvd_PugL=P#ev3}(;;UP89k}8)M_~tBeNtC%3)~g#9vAdHYT^dn zm5EX49;Prv!`fZX^9xxA){3=NHB__Z`~*hrl?8MD2{{PJ?^wt z^r#Otm40n?iQYBpHqM2ZfdVr;=qNSS{Z`YrA zPKlRe%Tm3e=8wO+;aOydg>F9k2Ny~;T-U4#Oqi>tm7__$VjA-k-($8-@LFH>{c}^r z=8&v zTJ-7f{8La$3vU{PrbPZU2KQlTS~Lrlwvg)6!DmklhI}vwfj~SLZD4 znH=G@33V*PmE(yH5AN%ok>9W~??q(Aw-M_;``D4{__fhqI!q={iin@v`E~ZK_uB1` z%fy245`3F*5(ZAXLwI9t1)f0I97*GA&6HDvuZmPho!^NOL3{aCa_cv|Sy98`<4qp5 zYvI(Qy93Y90S)s+adu#G`oJGkv+m9X5AJA$4!3+ZZ=j{k9DVxI8Fc3I{RN*XZ5hEdhYPs z;>Y+Jg~|&$&_5h~z3Hjl;3_rxvu2TrrEPVuZZ%JOtetMp-Tf@k|N8VmeaVi~1FyAR z9<+jI@5!UM1di>aZUPK*6C*JJ!fjFd!M$rWIxJToyE{0~*Y*uck@|@2*KMW03NBMt zOokksxC)$wc48aESLgm&@fv%@QP?peYx6^xliM+Sr?`pZadQv%pWQ?Qw-FS5{tldf z;tW$MOZbfpt|OMGx~z5wnxGvj&awLX_dC_kvu2^aT?F2EfzJz8o4H^OC53qT$7qqA zTB9n7+1_8I#=40TFSUtTRJ+hdd@JOo*gBE2aOojZt#0B5Y=gLDPjlzA8c;r>3e`S=B$lxb)`tM5#!+#kqExeZmX&4gA7gCeL&BJ}nRG;B4V(c34(C!7q{$Bk+BhU0i1` zy$BdLk(|A2a6iia`Bu9hE-O-Y=R$bE6^h!gHp%3Pj%CZiQ*fOkD;{^!OYLMGtF*+z zy(W9)t9Eg%-7*fh9eky%7|1(3g$rf=PzR{gItT@_h8H39=-Xm%W+a1+TI3=4FM$#vO;I&+5 z{~YCxluheJ%gc60u|1;BDNNYyr>UZMv*-ibq%U(5$Dq^jB!JgC!ArGxEx1;lfJ%C}6+C$WmV=Y1vI|dR zhhHOPGT%ubuR7nhSFGY?c&gk@oQqox;npm#Wue-N{X;{CS{;R49fG@e@O&D+qmg(d zKv_F`tQvh;t-s1aTSUe9|M~x_@#3)LpgHw(E^DZ3o^?XS_>)WaQIzke8MU8g%vt-W z#=+5u9*&?X-&a*N{^a2%=`bjUnu-%9!B6SFn)3ZsqxM&!PCav;3tweDd_hybziQO} zD)>@4>!;VATuc{r3e?rluD!f^{_MtP@jry9fS6Q;Vdt5SA2a}mhtgWw_bLkJ`EM_`^q5h4f!5wZ{tN1zX0F+>rLL5Lyn;Y0f5)9={`{E0^n z0*_fN;{*geAt_Eq5S@6kYOfH_qOxfO>Mucfgq5doF9if8JVPO{{KmArVp?7`E#HFQ zmFIg3uqtmw=#(x?DTTmts%aT#T53(pbklOVX<2MqEPc8X5jY?&d0z(U+pwFp8yBr^_ijn0yyCBHuPTs2mJ314l5S4-3AUg z9xIHBvQIJ%PL{#RF*tb!r;ouIU~mpI^!y1};Qt8Vpbmuw=V*g7*x(eAqw7{|;8J3^ zWu1ou2mVJGoD&SrNP|-j9MoZy!LKm*V+{To27jEvKhxk(GWcg3{BsQc6oY@B!N0)Z zUuf`a4E}V3GYdGFR~G}@x*uj6oVf;PK5)=K3k=R>z(F6j7@RhPgGbf6I6pKv*BYFq z24|VUx!&L`Cr6Lt3Ine+@J$B)7DIn4v2NpC24@v;&=0>d^uIRv&j1H)=W#9=_um?v z=L}BT;H)z^uNwN-4E^tb1OHnM&g%x}_Xg(=2Ir3k=PiTtw!wLq9Nlm48T{=A|E~sr zhr!uta6U0Oy9~~khW={^3wW#}sm ze1^f9Xy_*ycrtKMhiXG#V_=>i1Z7=h=o<`tiGgPuc&>pP4cr7APx}2Zk68D~wZK6? zEH(JcfP+4{)zIH&;8nnZpT~d$KTjB(CxHV$8w~#M4E|Pw^RB_!VQ@Y+I6HxZG5WiK zKLHNv^9^uNpYMQ!I(%>N_ZpZdwLxA99Qe;Qa6jO{XMv&b4;=U(ZRjT$_+kTJ1swRf z+R&$f13xQ(gZkWVa2_)7lLmgy;D2f8T{I+Ui!^Z9z?lZl0uIWJ0<#-=Y~uY7{8yM) zgaL=YFbMR=8o1ct@QL++bGCu&49+4$zs$h=77PDXxepomNdrG`;PnQ6-N2o|L0jH8 z^dA5Reg3tf-(&Fi8hT#r1bhn^CVy`+unQcN6*BZ0z(L+DgA+A4F@qB~^w|c^H*h}# z9|RnX%Y}x132;!KYYcrma8RGy4bGhg=PrZuxWReS;5=n;eq-pLGx%vkzYaL4=VpWR z3UH?G&({pjn+E4CgY&k*`3^W3i&9*O2Dse7l?I*+9Q4UKhW=dOpigQHeWQUF82B;+ zUvA(l4g3S(psdA)z6CfatJUBvF*w%%2Yt2L&~G&GYrrINoo)dRe12?jzBX_O7l}dt z^fvGy10M|>)OoO>F9Htyml&L(2B*y6oNRDL8l0rTDL3?!3_RJu=Ku%wnPTXt0SEna zje$29*hPf{P9IiY_f86x8!)27b%H|7Bo&x6{=>dB8#5KER-<{;4oH zry2T6Lq8Tc$a{vt8E0_LG&ofTXR^UL$I#C*^cPdF$8k1rP}W?7-(>LT8JuQvbl!!A zei8M$jaL8%^W-Xnb2T|SFTU~UD!0|p;|DHX`fI4yK9>RqKCd(M_$f@6emQW^mK6r) zMuT&+!MVlY+-h)cGdOpUqw9Q^q3@tx*X>^5pl+)S&d+CUgzBm9OQk) z;JikT&b!6Xzi#N?F!XOyuYJA^9Qb_K(7$KsJAs4oeV-g%)^6 zq+Zt{3LNB(8~Qv$--mkbCm%TIw}TA+!3O_OgOe~g0}aj~gL8zzDKt1o8=S%9=sFY` z`eN#JTZRD#Z8^^19B*(=FgPa}oRbaCNP|;ua7G!Nu?A-x^}23n8vH7QKiS})WALXK z{Aq^%d_#Ysp|3IY)2Y{OpJnLh7kZCwgR_Dh-B&9O{Y}*Cw%h_7)bmz@a~nB2?;VEzF6wpOdw_$y_Zgg32Ipr6XSKn3 zz~DS&a2_!@Ysk@cc-+uGNxiPa)4)L;o-y>#8TvH!+Rr-RU`=f>_^%lHH-H15Z<3?) zzGZOUre4?KU4#Fg!RaJN=Y8MMZ>L`8{VQ-#)((U7vBCMo;OsK=Ul{t`hJG(_(8dVA zc+z#~1sv#Oz(F121}DehEvBK11&M&KatW`pwzIXdrahJFk6I`8YiLEbkE&YR@uyl)x$w+;Qf zhW85& z@NYBpw;Pz>vtNNPW&*$buASc{2J&Xe>N`PQ?#oDTH|*OW|ICniKjtwli=z3n<~Pr4 zuAL4Pq?gZ8^1MdAS+NLD2tyBGC^*>yoqx24EBF8ioT=<(tz`uYiC^I z*JfTb1Ppt9<7}1Am{mW2K3&z$o!i)~Uad*J=zi0tm{Z#@x2RE6Pa9VZT7HG4uGL!ws)9XBH1H8$NTWp&C&;w6uOkalN5J z*~3a_%&0X~WhJFUOOGoqHdLkc(~FOve%x?0L%k2QskV8R--OaR3&5LJHlud-jH;61 zlN#n;G`oJ1VpV}Oskpl8?2_YDub`=o^J*`uudWzB>YVwLN~`hz)RK~}W(_U<-+3Bp zbkYCTS7}$Rn&z>){ud1_Gpa>rvzzMXHw`VVZkXH9Tr^+Q&zm>55q&woxvqgJr^Sfs zS&j3X>+7m#%x;)oJ+ompCg%Lcnawk2H`X?jGp|v-uN6I6J)*i=WvQRv+%TuMxxS)d zVM*zT$&JIyF2DTp>T2}q{^aAE<~26eUIg}O^fmIeA{=g1L3&bL*-w={3Kh z0j^69W?-PCwlUEQgr)0;Q~ z-HNihrs`Syt7e-ktGHnFRf*YCl_ zd^NU(60JQz?f02II#bVO8F1U%lU~LBIJ^rn>I3+Ichm14gwL^id)Z zd6)>W+P(w9KWGG!K59Um-&j4Xc5dBlYymT{dCjk`pIa9|?E9Eo)pgx^A8LKm44>?$ z)eCE9FMtm&RuYb|bIP*k^@tVsPa(H8#xUgw^wQMq~ZV znGG`<>gP7k7YEYqw^B<>FuBxbRgK-NeooV@YC1W>+1JHS7shd<%-O%8dirq-Hxpv+~3#)7A)z|tv>;7BM(Bhf?rdQqEh;}t& zD^`=0;uZDt8u#1T%DBV+2f51jFRP>^C<~hfci01Lh20#i*MG+8s&oCNq#R)DE$O1n zuK)Lx<^xi&<<73FU({4xJ*-Dt&;#A3;}2lMMvY4C*8%<(UR_-_;sAN(UplWDrXCg? z%#g>o4A&39t24l08vD=0D^+#FLM%Tu=A0rv#3oU49K{B;!BkIQFmq=8ysG0z`DydK zs)mLJkV;GTBURVUnSQ`?m6Fn~+&FVNAjNlDGW@c64bAns(Ere%Uz@Jw@gJ=*wz8}% zi|UgDtPpzs&lVnt|JgDl@qc)x$I1-H3?E*GgYx`pc$r;acbqzoRyR+oo_M*K+1OM+ zSInF-yK#QKm|5RAQ_O6dhXsms{*2nWJUuQM?k`v@RlTs-$bY*wnX_vp;soXL%X?^W zOxZ`HR%;KATAS2#Ei1wWe~{ZqvflRE`~f@%Rff?OUS_A?>#c{JWTvGA*vDCJ4Sz4zafyP=x3TN{0b%sd6pqhg1pF(XYP}Kj*?Tl z{5vg{M``w$3o^a zha7jx6_EMN+*jJ)dBDMk?Vqk?WI?h0L}L%RKwPb5WQV=KSk^;6Nc^OSe6YB`hkS_O zGjzcx8|AItN9OZz!H4!g?IUmBNB#`*9k^e`5BXp3BWJK<^@sNCedGa@JADG}$L=GK zgv{Sr@k9IgedJomX>)R^ZgU^X#w@y-e0CN>wg`(~P{vqrJ!Okb@d;!P z;}^(B;Tf)c$Xrjf*FjD|_VY(XGi3}8$0r-5Tmg9t1fSnatbzPimmC#;h0JFv{rbfO z-mWYP4Y>$%60)B^CMEz>8gesa{Qj}a{u9XUkPB7$G4VL$HIV)G#>K0U`R8p$D0^J+ zIjgUjU$s9Q?<0YMbyD^mQ2;p(88oyfR}6!kFH*X_eMOS8mD2wEib>3mPYps2m{TAp z6!zsAkdJ`O-x|=4-*2nm5OKez%x8_(0SEF2kl%oOw6^!p6ykkg{>>! zQ|iJe`M-qB=P$3)@=K8Uyx|g^pWkuunM3~0iu{it^SQ&cmeqGi7)-y<@&&&a;B-hGO?QgN66Wm51Q<+r_ev^8*$KmDf8YkAP&M zBHm%jfHxS>a9BtdI#(-0pM;+;R3rzN;Ptg96(wXZXCZ5kn)EG_S$Sx2#FBlT`Sg2G zQIVnbb$xSCd#4xk3_&Fsq!xQEI7Gh}oilnEKl zk#12@;OUXYsHpRfu-E-xaCYZn8F9W7Hs0ZiSL@&p49L+)@CNRPs*@Z&0G-4+AkRS$ z$%7K;UsyAtL;vWuwJk=4uD9&>Ss}cYM@E)}(BskE-f*Ml9p2|EqXRG;i*3AbxF`q4 zzL3-$J2*!%4+GP+wCOP4bd+xzVw#5dreVJ6#BLKx)3f|U*f0t3w%4edFu9l&hlTu_ z^h1~C6(x$~k!s?~fyJoKSa~q$m_!3}Wk1!lkQ|7)AP-LbAFJiS0m=vaV&H(l2f8il zEI>bU?9`-7Y`$97)3cl{G zh&{})WUksFLb7+6KiB$}Nw+K{`j5#@7 zAtVnihJj1naKk)(e1~WXw*U-L5q2}5SDZ-XB;bR6JTxRvE|PeGUq97Aj8|_|Rc#k2 zQXHl>EFNuKaX8}rH>|F226*3gzk@}t{RX-weh}VUfju-K4@D9k5NtrXgRsMAV*GQl z&vF`v6EYX0XdNjtR9&Gt3_Ao47M!L1kvVT5vZ%eo#ikz7m4*W~SlHpRoMz57_PX9~ zFI2VXS;@bsJ#VbwdkyvJ-d&}gum%hm5-h4kPRtt8^P~EQZy0dZciRUjLHvJ9S)dLs zY=>)2EEZxag0O$gm|zRQ3gK)+@(>ly-!*cbJsNpV46i_V0>&(-9}sy72j2sW=YR$| zr5X)(h68PauFRe*@@P%$2zw@DB*;#0E6zaFT>~>L4oF zlerTnQQBqZ4G3i>DA^lsvIX2y8T?}{y0>7-M{A1v|4f#pn^@jXM;J+I3H^A0VA?OVM zWfrg{L%V^Cy$mr#WadFL5Mhtc;9V6}7lM*KifMysiOgYOjYc>UXB9r#X95SzW57IG zWS#?79l`{k$vZR3CxP}k9L!-N^D?l0h`<{bF!G*_ViI5kZiVS*2)an#!ck@d?Z|;6 zTV(zktd|gYRt_U??kFaKX1ZWvY~BWI2LjK}VdQNe#Uv=%)9YK9_)ZUtJHZ-+MaLtW ziqIE?OEEQ~fhAT8?M#FiUqwM~l+wKfmuL{XO#>wH5d2Pn2RNb+e&Ugyx?JkwJ$2;9 zdqc0FH^e(Gg-Nbec{((%lxM0$jK@1vV8h3?&W36Mg0LSXf*ZM0v9dl# z@-2d1nVA{Guv`(e%zJTa&PFl9NnB35NP_W>P+Qe5X@jo|9nfR05%&RRehc2u6XEtD$)%xv1-1T~p| z2J0h)vlLU^pj1rWsl;N!0~DehL7O`RM+7kc2&UV*&D#Sr0n8u5^hLLscQci90#t)7 z*3~G-n{Xy0ya@~b^S+*95@7SYAErmU&AiR0%mk%-a(Bbz;l6~$^|TH_dj)xm5H_bbKz|U~ z@{WP<7YNT$I0*tB@h9wgqqXoMg!n`VAH#x%u7i)Sp%e04DACXhkz_fSAYKQCa25jL zjsIw9N+UG%dO$SvMkJ0+Uifwe?Lp@h#pNSus= za)fB0jr{}W?+{{)Lg2+1#R(Yk{#0xRqB?{qB?|E~;rWG- zY79L+ggZeP)XC630qt*5Lf&~0o`Wy|^~}3a3l~tR)xs(Ybz1lvg^RRM3V(SQLtq(m zA;cFzc%{2Q{zN){MNi$`FbjJzlsHdZf#f_YoI5mforg5?oacb1!JkCIhLTFgq7&gzfiYK*wUP@H_=yMK8!J0K=|af&`;~9Ss?|HzK(g z!Q#mCzN6~APGsc|kz;{2ZxcAwd;v>*D})gcKqmnwCnEl4PhA0YLcRkf%6cCOX4=O{ zzCo~9&MJg_{_uGe0)L1c4YaYlVY(L~`U6B1;)mglWPij>K47xcZ-zzQQP92sZ3lAa z6+_qp;Z+L9X?_@r_-F|4b!Wbay2_q9yqF#{Vmy?X5f>uiuY-kiu|}?Qg+`upJrM6% zXF0cMUBY<~XfbqyoJTbp>^uR)-wBsFYk_VCYIa`(qG!yAcQwR}_?w295&zJTGa__~ zni1sd89}IL1fiZ0y}-+I`XZ)MI0J#60dk$e8ev9^0CX%8!bt`Hf^L$PfS3^zkzkaj z(vVS5i{w%SOB{w<*ZuqF{}e(2?mDC6vESSYDGsUcDgZL_e+Dp6+vS50Txma!1YNlv z34eepoZo5WI)Bl~b3Oxl9@Z@9Tdhkt@sUFCXQYFiJdFlB`9ObwuFN?Cs1vB!9STIx zDdCoDh_0;C5M6n$hV05qfU&s9*Ih}dyOL0MqsDSt^#M!|29yn|qQ6Op}tpFW~*b`sZA5b|>YrUu=W4*^|&C=z5l z63KB0mf)}8(Dl_2Zov(3zw2i}x(-s`ivh^UpAB%Qw#!Q)pz9YQLDw%uG887^+^mu7 z+^>=6{0isYn zfav-wsmVB~4M{tK#SMmElq9(;?BasJI7I_(Ou$5Q^mFjOM~Lx#gaoMRW92vk;!D3X zktJ`v7OtW2M+n!$vWdbwTHx=J^R_|w2`pjMDeogKjG*v2gu7t5h{AVT;BO@JGDi89 zwG^Td=zzb*iw}fwKLpF)Da+C3_>nzz7egoP!BAqjPew8jeBq4I$aSV_-4+eHe(IG2Fk=5W~G$Lk#y;4LRH&0%N$z z*TYSyhnr9j_fGJ#oZUJn26eO$jWFZu2aPb?eE}Vdxx$AkcvBXNI1XdHsbTZwFk;aaZ~ z#Jp8n_?*Ji5Ke(5go@<7q=kMI-qONg2=VO@#(;*wV>#-lIrc|TVxYc3@^X{|6{_%& z>-5nGf9nnCby%~UQmsokrvv>NxN0@?vxnR5Zq=RnQw#X$6ofm);?2I^W3 zF;L4jydHgaFE9p*d_7QvdY}mPK>Y%|EawTGQ#j87J320Vy^JJ3Z4uo zw*%rP)8CO4AxHSXX|jg_$~}Y`;vIB@i-6dYr{eS)LD&Z)J_4s1xfcR7B3K+gKEog` zL+@UP@JHZippDJZ=IAs43bBhdh+Y6dA;#B#O(&Rvs16~%0-kv_f(PSyfjq5LlE|# z5N}8G4%zn^IrT87uo560fxyop{=;;9q7J1Bkzj<+q5D2liL2{`qc3X-O7^G+kAl(< zIt@M%ggpZBX*~8{4&ch16p}+=paZaB5e@+y@a;K)gKI!ri6HD%h#NrjJ_PWbj}hbA z2f04e2)9kX0>nKG`b~)>?{8-Ag(~NCOe^TnltDpR1h@-wG)yH3epN))Nx&6`Tm?L( zTMpL&`!^W!X9M1@yjuD5419SvmMLJ|JKPMKf730i9hzGZw)*wy_Y2^s5!5{6_vhkp zOo-zVVw`zOllTh=A0k*3S0Pl52cZ^W0m6^bu4rJ1T@LeNgxDR3IuN3*h$zH<8i3^h z6!7u>2EU%O3voM#+WAr=bm#YgxM-D?Z1Wsgd-Vd$L$Fv0-Z!jTg$isycnjh0tVm#q z@sfHiLi7Pd6k^W?;AsE~_{ajdb7jFmBuCTpl#^iS&r=s8g2azk3Wnz#hjP9fUX`gJ zGzQ~`V2O+942C>N==lO9htW{A*e~T6rB9S1Ii7l!fV;q=YAw9~0pTMAzOF77Sl}$F zG8LSTWIQv8S9K|qe8V&(H8fOx=$A6n*Uv%Htn_<){guAH6-m3&_r^*^+n4+Ln~~hE z^vC-8dwl(BB#$Wlnb7y=NIywYhMz^^Sf@iWa=LMHb9Qa)q)C2`nwXr5(u%Woc5DK3qdsF1JGGId>v% zfL=JOG{TyB5D;tTaU_m)CaeX|0Iox@s;-BKnr&8;f~`p2QhHv}!?Sk&7w9}^JK`6W z^S@~X=l=kN^RJOO)`N6zoq>%W!K(V3a)L4H1re>vL(*Sa+z^Vzd>Z5%jzLnU3oZVsISx`rB#MN`j?m$V68I)7CbD`%SBOvq6?Vj|$-uL^<;2av zs}ayI7%_xOp4f~)7>BS2`e=M#KyO8I4ML2su%v*GT#t%*8Ij*1*$uhiO@I$sS&t9wVoO#V zDVg6wi&<}vN5f$%2m|y-5c%a0`v`9sgnTE7n8yy`oC?G{E1ok}qqvY~0=hDCHjk^F>&Cjeejgv}89V`7RvtR_D4eV_XglJ(?% zM)^!w^0z}o6%U4hKS_-^t~R-2ff7KTQ>qcFI2;gFJQ+zCHaQ9aRXh_(Kgb1V1I$9e zR|ODJ#p`{-tw>IQCeZ=#Bncc7KGW(g!$9AK@HoO|P@;h)b|1|6^Y$WoCn5^5do&QS zhk+hPh%$N>A@+<0(Wd|?#GclG)sesREAkGK^{nX!0RPR3sGIv-#q226Su%Q-YGrRE zpORYua4dp9+el>B`rOl@_he)e623aMU@E{I#XSdNf1k`)(Shn`CteQmfr>W9CFuL>BZx zG7P~|&wirp9-gNvQluWq@9FsxfUC(KA+h&^3%_~*ZXq=zaxaqaNqqp|c~ZsjZYneA zIWGSMBRZ@T$q+CKb^v^dfIsA=GO!~4f>R~orH+#T3^I$^iaJu0!;&%71M7-s$xz=zD7zd~hZjmcDr^5tiy zC+7ds&;LD=rOY3ijMao-6@SoGxIb{L2mhqqG3myY_R%LngpJjQ~&+-P6)y(oIfKODG-*;zG9W29VvqA-N zBm)pEv8S8SvmPUS=13$}ig{%CpVaswpE(!FV#OSV3W6p0RzMPhQR5VW_vwlknTwYZ0sw)0si_uRs6f-B4rt{S3)@q&@<$o>XyT7gc3IIjn^IGmO}cK0?BG;`RCr zK%9%fF5$0U@@JwC-$pn(TZj)L=z+izeFPM~#5($o1~I-4TRj^2O7j!Norz$h2~=f5xWlY^$4+R5K)Nz0?`8q(Hjs^h~A+=Y!$%I5JdDQ#8k&_ zMRXfg_{81==v0F2i@rmD9)^VPuCnK`%`La1Yh1=`pv z+8pES!6{(!wfVk&jN}6P`U${&^hG~!lT!*mry;DNuRt4nOPgbF0#JajU;4h*BKZZ# zy*2^-fxhU6Kl#X?20u?BypQl;6#fEBl;5$F60JjYF+yyX1|rr1q-@mBqwP`+z~@N; z2~oadoFI0U2GOYi^c$E$ttv~*S7!}Q_ytQo4;-;+>It*n2URk2s?028VxMb;V_dDJ6nS& zzgn-LX0!&;69Fj1a5L2hd<8fKe4_lx7c)osbvoU}__A;X_?0~c5q&TqJq$1bswi&* z6U4?LIuil9r!*@@1AU6vCaCy8MeGQOe1m!P50EItb^`pJrf(5_N00$E9|wrW5b^J3 zb%9u4Ncjk04L~wbK}fP6ItrV>;YhZjX9|u5IG&wXcpNrTe|ztFUg4iaU?=Cc%xzyC z?bWeW$TNI*=OQUa{(@?N*>sm!sNDIPkV_pm;Dm=r_`!eH=4wCtG9-=Q=dJ{}li4{& z*RawT<>7P?;WL<{fi}k9(eb``l+hxD*nACeg%7j@Axb@k*p-M<1dOO*(T|`QoTvN} z$;T}E8Gsj9G>hFp(vMN>eF%48H;e|_7*F4BMu;+6g%G=20})FDtwV@XPa*m%4Pws# zJckftL=z?nV%npRAo?Xj>@h@-Bj6Z?m^Oaon|@XQjO1q2CHH-Rzq6{WCSMINeuZkj zjBq+8el*a=UW57f2vJ7wBgFo!0Uv_Kr5Zw%dJ56q8pOT^_#Pp~h$a#J2#EIRPDEcI z#6Cr|3qiyvs=N^7_kLC7R4f?Or63dFPy|a{0#Tp+`R8RPK#lXVawHQK_ec(lYD?W>oI7aLU=-Z*a-ZZA#VfzFGKzYcrOC}t2*bNhsBQ&$b*50AOtlk z2R_Y^rvX=Y%bD|m7b58Ld3@wZI|O*b^IDj$?>5g0%mgss4b!S_^P<2^fG?kZ1=F+L zX4UQl+Ub_)L2l z4t#RAtf+%Qg_kO*Cn5C5y&td(rUTDLu=4rkCQnAW`T6I?ddFG_v+MR+jHI1REsZs*S9wg7zkn9Fo_11*wHZahq=+1=Ej-;_*hen5p%~15s`;)QxVTWh?XLv5FM>S zY(}8rMHhwW6h!=63^D$p1_B&k5L2x_@&?q=a|>=qvWnG>m!WDri{~cnuSX`p@?qFr zx8Nxx&ykwX8&Znd#Z`GAse^%9%(|EtkpabQLGm{9#`y<-4qVK3*ip>ik?bZlpEsvi zpP))OWc<@|_96$$315I+5W(`k)0tHp{B|4+0}40-$q>ak0$YJm4uuD8V(v4Bbfqj!90MgnRNtDxc_C=8~m)dBDs-SI{+SK z)_h)Auv+R^DdYwc-GWz`&E!Jn|JJwj$c$k;1Uh6t63H-{ix0xO zQ!P^FvCtv+WF+U)9Oua~+vxve&*LNOV1t)ANSaB@=i&}Xy8l4C5;l1IA(9`F7Uwzo z{!PJ%!{sMf;F6^4K&rC>%n_tfqVs9C-a5k~c{&?2D5k zHIqm>P>w%?h64Tz$*0Uwe1^&aYL7uzC8;t{%9kLb6j6;$5W%YC-@ozu)0`+h@BQBcnN@yo5fz$0N3w8R7aoHAhuou)y(LhAl1-q5uz~&u~CTlmfz@5L=>VY zYYY^0sD|SDkpHYP?I26P( zV%Y!(Aw>CX<_Lt?5JbZf0AB-R3qte=+;U*OVoxF>i1Lw03b8ea2%rjBYv@j1|mvv1XYEIjwN7JL@*Q)A6f*Qjf9U3Mk^3eh+V8f z^h^K>u~`~KCjn51)@Tr$0WcFm#Lh!ZHSv{5ukx{c7~P4%_!W}p*|Yh%Xbbusea~3! z>uMK7Mzy_l32Jmygb_nZg1_5A2u4oGm;3^@B6(XCZ~_bH8eUD5AHasac_)%DNGqP9 zXyCC9tcX7s81i{MZqGEw+lO~8iHmmB0vx zCn6b*U{&qxDp{53Z~onNP3_su5NX}!v;sNMV(EeqnS};+mi;*-llgDvD4p!gq zb3qw?=!pLy`_0o>393I-K_sh>yt+oYz81*}1S|iK|JPjq6#hI{SlN~nEr^baYfNq=QUsVWKn#ow0q|6AfN)Il zhV~kR`$m~%5az;JY2>7=ky&kHEgR=qkv^&bT%7bY<2FM%DtGArB4v0BDPmW=J& zI=1i8ed#M2L6viGg%OJgAK;gptf=pMuw|nW*{W)iRm(B0y5!vb{rk@I@FE1bqKn=E z2jyd4A&9=d6 z&GmxrzzNQwsDRg_GZXvd4hp0D0oX`!NrZ43f+Z$WlA)F;qMv2uK(cuzpr;=Zg9SQ|w*Eszhy+qDmm z@_~3??8BqHFOSvniuWX;e-J^7Y`MI<--mn_xkYvY42;mhV^igHU+`>zFf zJzSvq8U)D&)SKY_o`9F)zx-GV55ciiG)9+{F16^m3M4eYSU7DW*MLfK5KVrUlfX?R+0H zml-t(QVliZ7Om$2tFx)V!}w%cKut=^z0RmX@K}I4Ukg_PBxM0vbPO!p6O1f^G=Wy3 zxXmg-pb-VFa* z1HT)-G2iv9Hv#u{L${V)jqtnRs1B8BFTiWykc`{lQA3dNp(#l7>p^8aCJW{PQXOQe zk?9Rei23(RIH?0Y@acm3@C(p@h~XGs1jh(YOzpoDEYHB1AT{0v#}fJv_(nP_zSiVQ z>yJTy0FI*QQz-f;aIo)_@b1?jy@xbtv*%+7J_<*3v0m zRt4kwxS-rX?rsDrPpxP?jkbMSOoZTdMtR<&SQO(h!TdN)?i=jtl7VGKSGZowAUc|E5ME&}cnI3@ud zK2`L>K`grwzER<7B`G+z^Z?ZbA-*ES~F9TP`%`bU2fHrvYSiLCZZJ!B+@s zd>On~3OITpJRU_1v{Q};k;2plIA=a_(;`~rxwo1ItMDj|XSKDBjN1fN$-yfKSfGq% zN74;m8Komz^2RMR&+1fQpYLUkWOm>aP}+?@!M*F-@TcWIXFXW$zZE((S}ujw1U z3ZDmkLUo@*_-hH=Um*M_oQZ-ezMxsMUxsf~xG3z|p-}C=fRCqrLfqF8=8Z8%Eyeyp zvt*xyZ`hq$h85PRLKVD3JBj1&^Zjr}Eyex~4r1A#!#C_sEyHg!YVEm)Fp9T=Mtq2~ zd?t$LfXwT(O^_OS+=4Ok?1hnbF>y{M!x8-E!RDNBq6;_Zj#>_}th=yp8V! zg#Ww2QLoiU|APiky>}a!dhatZSO5N}ff>hV3~Y7NZWEtN3&Y$H7upcu9G~4Z7xD!- z$M;p}`nu6~*>kb46pk|7^2S|igm=N`_B6uWlFn^vgt-F9-EV}ih0on(gsuHgKySm~ zsOxG2Q|3AYTVC2>ifVeOAQ&8UA6KKGXqJ`X;&LI}JD{#pZH0-xK-$TJTA zQUh;>&+Sv8oi`$mGYyV$j2M`@xW%2k)OERmt6?tm z(l;65GMwS-;h12X$N=Z~$iv-LAzy%Ve0B#`$QR%oAGe6~!jZ2EpZh`x*Wq((2;n{O zx#Sw^iV&_D9Az2?rp)UNY|}v;b(nsh>^pq$w*fL{L#07S!y&RPH=!7Vvh)>;hl6Wpq-eh2|Ox|W- zu1In{l000B8Bg?N5Llq++DZ3bNpyU#Q@+P%)ew0q3J zw0nzzX?M=RwEKDk)9xD$OuKJ2Fzx3328@$-f7HOVJ828;ybq4Wfp;P%;p0BY)P2kc zso*Xjr0&~&kkP)|2WipUeUQe!#Rr)V=DmrRN!;p#Og&4?P?<3-OcP|DUEqVihwNk( zFjUqI?hiofv)n9TYDRV~U@9V>i|34k@Mid?W@PEpGUB=PO`{3l0H5h0{0H!vRKo9q z&s-qKBwPME$a4Ogofen8VV@ERJf&VqNtt?;=@OPF6;2RR{|u8R0L_zDg(P zkH({|(UsA*C?8!B<)V$z>!Pt}Q*?Q>C3;OX8eI}y8eJB>Hrjmb25js$xpo?SE*(fh z*7QBCHZRHEw6|w_Z+2CmT18mT#dkuQk3~BF9gZs(&zCg!Zb0$LT0^I#?=eh1Jk-JI zyBDu;Tz5IT1Iw=;X}TFNf!~IIy`&Gdb7fx&&2YTu8flRoRadXZ%Npn2F)T&@(^+lt zWk}ODypU9pz9CvZXM%2ni6?BvwI;2bJ1(uC{VhC0 zP_9dDT37d(v|iMkUDwx9{ViWIxk{kN?qMCixHr4Hv(n1} z>+s6HFQ}0v*?oI^uD9=@`#R`7lx_75I5Erxp0jM4SM~K)Fe2=fewfeHZO7;ZtBsPz z&KonFzXaok#hv;7!t(1!=flOomvm_P;j5~07gnYN)0aY;zKQg4F_SxT&HKsHo;`gE zo5IKOHrA)`PKF@@fX;dsU54~NfeOsU&pU0}SNHYzT-B#8lf+&mnSg{}$d~X=>T@4^ zfnM;%P^shIW7sF%`$D~V-HGYrSmv$gM@MZYCxDkLpH4KQ$%CF1#Nky z5b>YAStqsWJ71*N+1amk+B_-S^bN=BJpQrTGDwW$*oUJvsriOBB#zu2v<(aukzFDqSw>BK8 zR<9cw8(Y>tHeapHHs%}s>#LK?`pdJk{hQBBr_$N8QbYaAJbcPnc3-FezIBK znQs;gY67397o4(y78SvU%Iz+w+&o;NSjo@lCgw_|VqL`oRYPm!XJ#8}SFt=b-P934 zy$-6JL5o#Zb*@paHq|OoIohl%tvpvLR@H2?o@+Gobyy5&a;{!4f;E>L-B~La)MTzv ztTt+3kyPhE*>dr~@>XSN*Mq|2$C}GvW5R~eSoF$4vsUTdNYci7^Z6Jm) zW?FveE7o% z7zi~5y~W|`9gOR8v7i$^JcH9QRY5F=tvQoWX7U}_IeDPfSg{TxtB2btG@aXF=JpD& zrd%yI%lS%qPtiWZa$5$Lw_rzCxC%L1E|*Q!wl!RyNV$BWfHqT|!lQO3zuTyjrzBHNZ+($WJ&f~S*wgUyZk*t<(6w57D^LJRzrl^$m5hn><-(TTLm52$=v(`4*v z3j(Pf`^_7!+F@&(!Gmt;F3;tui((ka#8GYXzpTu-JIGr%CP}EZgYYc_S*KUy+9*yI zsu7Nl-0k40Tbkie&}Tcx9jN&`=JI%TGT9#B+GIPL(%g(P4QaP6ROz{XgELtM8GOGp zuT-qQ;mc>PQp*=|`D!6IRpeV*dc^@b+U9#av%{FA#1f4sz_rx|i@T+0O3UVDvJ^R9 zL1AU+x5-3~&I@A$xpG+^F>YY18wY9w^tH?YOynjpm%-fE^~3ta=pqDz0f?*2G;(

g2hRHf#N*S%T}A|oOT85id<$)!aAT4Za$>@ zY(jULn98y((fXCyLSuF?ohy`gVs_%x(M^}EUbBAFsfRxs357!$%tAGCs0|fN0OIL4 zlteB^`OeMcnq#?5^QuwDDgeA@5wnMezyxr1rBumJHKhBWtJE;f38$>->^#nDJe#&R z>XTcG^?J1yX35q%=1$5p#lz1UlO~A)sh-^0Xco%Y+w*YFco z(=}vuAvakmPvr3CUBnzO=KF?oZSXV@6K0q%#3YG;@X*ePT27R}@R25m6WBhkManQ* zzHrVlo64qA1Ep}b&Y{FYV^z5(R%YTjbT;dP)a=aH8>&>B#r(1Ue}G&t29_o(HRO%) zY^|#owG!hWf|^ogt}(4j+OujJ#o|?}B>yd{S*%o4N&W*R^|@56m6ZImOvpjZsbHR+ zo?~FfMSev)W*g0#^3H+u@OW(~BmLcQD}H`{9?ii& z4w(ROTSjfC?kwZD@^;FxIZy;MtCGQk>G9g?+RRL?x-q{|$JvVCt|l$ZxV+q`X)N-o zN^O_zp7@|{XO@?%tz~)2gf5;ot@weI$5}&-C0Mnr&E}_23Py)DbwwM(c9%>mE&foZ zeL7?K`DZPiw)}jWboz%f$#lALjWIKk*rChIVj#4W-kWmY3mE6uXYdM>C4w93|akI}pwa7N?&35btnPAr)hHjg#BM6Z0F(g?R5Eg2M3$i#(Il#JsRlC);Wx&&B@@B(8ND-r7#Ac62fBx0QdBoID`M68E^1i}ZA zh;dM@xFoyL0{3nfNavk4g&(k9TG*N!vG=dFeJDTU(jKYuektU*e}HDR!9hC z(P2ou$sQm;wqbASFvKRU!?SZ@3@=>VH07oxpY=I7=^Zd5P@OH;(xu!q-eb00yuybB zGU#C+$YFv9X;;&8Q?grUd8w2u?w&1`Mlyn$&R5n#)0PlVRHd3;w?0nDY8?Jwd`T;X zIJeWxY8}$C6%biWslz9A#t2Xunmt?FRdRMW%T?4&ZMP)|ZelipP6Jbz%}poJ8NuNn zAJdY2t445I4b1_%P#6idcx+rr9A8me^hi*Ymu6~M85+q5F5k>or_q1uco`~;3>hT7 z3I~uP7SMpqkH_(8AdDFJvjmYrt(syKr^jNc1?j95ST6zy#i{F#B|2JA(x6Qi%N3E+ zKqy8GrNsBu0~lzo)kVrcp_rg3r-7KDJXJ){K%t;pl#Fp42#3-?vUdbL==j>87`qzq&r5THtoz~`o?kasY~%K@otN1lQ% zHK~{=Y;SC*8Ki_}V7T`srdo_e6x!&(J|Lvj;Kc;Q2ndKDCW!HAd|bfRDDgu9ASggD z7DJ^rrK=$QPyhr9&`SznylO~<5<&whM~e%xwUZ=%C6bTK4BJ$v5`em>k zmL8iuwTT}yJa2Pf1ED%%C?tMd$d*99r3i=-A^LG4bPGbE?_pfyi6v%S6UiOHe73dx)=pHEezkS%qJge;?0BZB|Aa}?bJ1$fg6&jEA~6v#%+vF?Eazq!lqyRyeSx(5n={ZBL7 zJ(>P((u}e!0joLOP1!wAfLCO^kpD_Y#%*5u4W|CEM)yF0xfK9=v9RFB8v`&`_3L=> zf1y(B9w_+rFSD?F>mDf3*KquQ)8NqY#_z_kEz$aRS3Z_f!C_OSSRcrC}?x@ zi+LJiA9%IaJy5{GL9^~o4`6D_Tw>x-@xudH)4~4UIIer3psuklyh-91oX&KTio(>+kI(7`cePWM0o7K^$E3d|t`x0SYg zpnwMzx(5on2MY8VgYJO>990Q7rgsk%bl8Ccem+ot!C(#_omh&G27?gQ-2yGAqoYM1!_t+9ohfVj;ec4Kdw+xB=Z zFU}@CijO1l=#&$aQfk9rR_Eb6GhjWmt6{%~kG5FmU{6w8#V^N4b&-v~!j+ucL{gh1 zvFM8%+s5)?e9rce?~=S5-$*@-n+j3u)gWAt`XW9V@-;yG&>`~Uz*pRXN1X%Lqwd1T zi}nB#F&^`gGF7X9%9VFE)fNJR&)27R=5Xa#9vJ|2O1kG({7od%ri_8iH<^Hla z5|V4nZX?7i%l=LPxuc9{6*Uf;45 z9qhrU)Nq=Sw|Jc>pxoUx1km2p^?Jbe4z70q#wQ_o=iK7}b$0$3ki8-6w@@bTDy)|w z;I7Pil?3c9S>xo>DV`C6hEZ_pWEj|^euz&(J&ez577=2NGiR9HB{F68wzd@B3G-D? zNzBk54O5M_fWm8CvW8+-bq2VW45cugqpmI8(NkkfTv>2BI7GHEXJ4HS*W(? z?9>{Ro)waGiAzPASK~r4r5aFt#AsV*KQjrezB1yI39P;r;$D0>8d;;u8v6Cs4?n`lC&cRO9nQzch=J9m z3SOQ_omYD`)>$amG(3|)R*JaM;0}E37xIo%E?^i%6L!@WN)vZ1)P-z{4rE)ZQ1{*> z$xN7n#NSEicYD-*_&W60kn-j1o!vR~d=OH{utT*c&0pyQYL|vlYj~Rc_8_Fbp###! zO6mx7C(s}vb*AoHS`L9vYkcyw_lGpP^-TA}n$U89`#UWH*aIwQwb@f6e*+0nIQTgU z1g4PZ$JaSn)ig+Pb&G@5{Th^G)lWHCy###)bC8FpH#u0oI;qh-Abp1;;B53~bwCb5 zuRxCgHlBZ8hAIuvoOJd9^+}9eK#=3i$KzvVfc1OFN*_?$4J=l_!w1x-49tVbKLM;DkGg;#Uj#S`8A~3YxEn~bvy5NYbl(e6t1w7#`v89`0sZwT z833ETAe&iQZl-CwgkXA8?eHM9Dvk#HTZasX^xp1*kN%Tk^gRBv7?FB=K8A!CL+=IX z34iYiix7?7qIiqIV$AyhI(}+?$kUz-MEbnZ#|xR%Q`z{eQJrci#CgxuzNR$g@R{$^(eo;W(@@K#;^cw&e`oDPacr-*I zXMKyj(u2D^_y-!~-Bs#;d-Okg@I}6bZuH=k2lsmLUJriBgWvPuehLyvO~s2N(N>|6&hj zJ-ESxB@e#QgD5>Ug5>)b3S9%t_O+i%>G~?vFQq97UJ20OXR1oRoOfy_ck|e-Ug%*D zeivXMe`HX$0{TeLNrWFxg#Xoxo}f$8MSY2c#ok#D@+C36Ve!&L_`ms5`(lFh3r{*# z%E6mC?#pG~gMX|+XVIgH@Gm6nwVW+wBNo5jgB(kktKfd%!K0*C7vA+Ae2WL4@ZfRM zT?_9j--*w8@JcRaUJl%KV8$9@B5BBQb*(EiV2wx##G2yKmbgWNEpX_sCiFBbp zd}ShhS0emj=}|rZx1{g%;S>kt!P00g5q?s_^1OK`hv~Z6pU)w-2CwqqJ3aX49%Ms0 z1r^bcxr44$=5g#LKzc-FpCVhN@|ydLj+8oTNf{lI*EXfAuO+=FBt0IJ`guq?O{%Mv z(xWj+G&z|TU`@lsQ*u9Z5ZrKV$~8$;5c#z@}_NykY|whAxOA+2z4 zjP(AHbbpMLmKtud?^LN(R^etH(h5Hz70iqV zOZW{^JB?9a(E;YG&R5o8c?uQI$$BWA!P zABkriH$!%LL!@6U9_oC=G8r0! zUp6rH-Gj!m8*U8==4bVNA7QKSY4Cg+uGbO`jUvwkd~9rdsInf}pA|V8fYo;l_&9mk zE*&R>$>y_CSF0x$;5#$m>pcM9aKLxW0r*x2d`k`AQNY=s1vdg94721%`yM;P1mIb| zal>aR-`S45XNQ#dZA2|1M-sp55`25U zh&sa#FY$YOg74%fl^Ra)F!%xRu`jT{E#UjmHXHK(A0_ndzi^Q{vQ2;WsRZA1U%N={ zWM`N7{beHFd(OrbK5)t3-vf79=J~T0|AvW0>P`eswg~vFcN{@a1$+&3>h1Xc6?~fm zz7x{%dQY`%2hV`79PqsYd@RfG$7fCt8su!ick7^1Kj;s+^fT&t;F}Kk_Tss)EzTzK F{vRM;JcR%N literal 94840 zcmc${31Ah~**<<|Imz7I05b`MfJ83{8Wlqb5pm50A_4+NaRFSCK!Tt^VhD?@WpZ5E7D29!JR92Va zBM5Kn;6Y|E?SF!>Q-|%aF_`vWN+H(jP!1b|Y2OdqmpXVTkioQPW+H?+Kf) z!=dVT1oMiN4q^Sx_S5dc&cF|S9BB7pW8mjd_I%hF_{m2756rI&h~6m-1DdP)_QKMf z`mY8>Rw1^s!;Q}cux}XLp?JCjDl`f9MI{|d_Ko?O4Ev3Sebxc~t6|?Wq$9`Q5*?Um zI_!TuuR~YW0TpUc6Srv4+?liI&8lvkSvRM$rn<3u(6qYQ^|NXhR!*yHXqZ>uSX)y$ zcjjets%I57E^HM4oIa;+=G@wUO|6^PSU<0^y?{_e7FB+2jVfS)7*K=%S-P^Hl)d~C zKcALe-Tjd>KUlP+EHv!asYo6yr}yvQ|Ne050o11htN8?R=YHyh*nM5d=tdz0Y|6?` z13t-!7pD8K3)LO@|9ARsx{j)RxQyEMWz;@Zw)6Cd?Q+KUUyuCLzHz6A#4g=Tpa54d=_n|>NcWX-BkN1qd6mWSxNK-eD6em?H;**|L4GMN%0bb z@Y6!nuM?$py6oL$2evURYiHT{>hp%?ZD(3_W{-cAmA`+A4KKLAs&PkI?Qgfu*OOJ!#f` z+0_>(o;zLD`}wk)fAw76to75^4Sa9FqnBS0l>Oz3SDzpLt6x61ea&+XGf$kZ``esxK(YuOxY+uG=Dm6zZy=J96|AS7-rkxb4Rx_T{FJkT#*lL>-6bDv0 zi9~$UU%aMOhPXPT8I-Low$lGPar6xIU)AJ1FlSogV!z*^BN(;3d{BuYfAb0t)+s*k;@+D^F& z51mVH@$E#p*DvAq8|WoR(|?s`7q5vm7XiCfYphMetF8jhTDK}@PxexK&=oP~qL@1+ zCMS7KRczP1Etn5hDqwq?`o=fhmgTWl0;8;~m~S!LSJqW-VmCMkTHSW*szX?vc5B5U ztQn!TuiI}ly4Op2GM#CQG@6s;az1!t#to=YR5rUvB)o8#hNC&How{gwV6U=NWmNyPcIuz7lI*4Swl}RtDPHPEFE!Ln z9L)-k-bRc{Cl{$Y7iXV)SZp7HWlJ&dK5t1(8HTRQS5~6vPVjjYShwR~^L-wX+ z8i(04{Fqd|eTkaMZBa|pLVP%yyT_>hj57wX^z6~tGeuL38^SdS#;Ly4#|uNf*W_{U zO23h@Nr)8*wG2x$(n5TV8v3H;Nlz?dpZH;)q};NPyp|_pRi(0bt~CR3j=gR-#!;7x zjDH);?7LOGN9{{rjAn^lsx&8sn)D-QFDIv3(F3reSxS{B^UoC(S#sjnR&$Z;USjY6 zKvoR#n)<4Wohj3nUFc$k%G5Hq{B&)&mA#BxLIQ9L*7nMg|d1w4=2>v>(*E)5gT2fmGYhX zrA~dh{Xwa{s)n7m{sgBv!?9My)7zEX?zZK}R{Y%lG8Rwg+Nqcw^H2e2^=K)U#8x_X zFE74&w6ic7ThRhwuZqW3q|j>Yhgs{ewT=+z#+0z)=$3@F;zkdqgovk$?N##~t2n;@ z9>i{9hnL!h=_k`iiI%Be(;}}~b??!ISxFqfJZxOn3RLN5SRgXLUNp7RXI4M#GuD#A z*mf+bGri}&rt4H>39;as4R?4<&Z9)~M%k8cud8wst57|Z1wSJBH5Niv za=4fDye72+pmYyM!z_@Uvc2(iQh6K8)}=3W6NklCw1)nj8}_#Q_mZ|u9}VYnlv^hHAUC%~wEa+_{$<0~XKaWJK*n1oID-T)rh-REZc}?5B zmJjG>*;IB*GVCI(_o3){^io!*TwVVsx$5PTftH-&_CGw9aS>*|)082zU$UIZ(pzu2 zljM>@Y{J}XR@{P(+CDFE6N|CM@$@70dVIANbAs54@5gMlYzNHnQn!XQnQpP%9OsY>eJuQF8mt-g;3V?n8z;hT%$XvDh-K#3sdJGX`y@rQA~`ehjOYG#b-zNETbheW|TE4K?S#3eD)+}a4n_HHPiplgV*q~(g5=%_USS6hO8|>B= z1yYWeA5Sl%lZ$ih))(b1*^cNMPY-qzSeQ5Bzf3HNiCmezJSHaFt;-w_yVJmUdZs-* zU**cNTkmiR{djt{lPHFs$}03;Ydl@b?ufN)k=~!<8_spaeesQJ7^lyPSJ-yyMs%Q)@Z%dxoJ3)K{g0jMGZaWV&8}k= z#?uW>A&w~-@ifm;tQE_o`+7Y6Q>S`_EdNtnWZS_u)KF%xiKj8^TJ6|9cH1($6+4cFSjREGV>3Ugq5Jr5#JztugpldFk1)eqsknJC!e=#jZ8l zP7TLy##Yw^+|W{!k=;oNr+$?E!NVCzAx`Zky-hf8!EWg$wpc4t05UBd&eCRQrYoOr ziHo1hI!T!l!ChNP$*(aOgC@Z$o4qml`F?O#XV}jW}${nuC^)V;WUY$x&Jg@r?JnagBqt<^GyHJp(n%ahLfP4Of4JJ!zl`UZ5PD)B}8gH!F{ zDdcj}h3u1RS5-1oRq{sr_W5dXtJv-7F&SxL&+-`0!DgPs$l}aajqEla2=)(l3PpUs z@0MMSW#}~hMAa%SvwwoK9lP}~nSFn(Wh(%yRPSRN#9Fr5A3SQ8TqN82SoTGBt1o*c zoQ<=T&y7@ClVmz2Qlq8oqnXl6Ih%j%h~4q$cdIH@$n+kZ(a8jcco0r{?N!$~)h{5U zV_R+_Z8a}*#6mYQ9A`fA7S|Ek*k>F)TUw>NJ)Zu(Q@uf!gVt4gXE>ItCd{sAM%^gg z+nw|vOdFKq_PtP@vi`%ed`El|-?U0~PO(h?gPh?h`=|Sz#4wy%IP2Fs*3&Y*-$}1T zpD4mfICjJ>E4JdM`1&&Go{B1|qPIFc<8GF>c$fw<`vZq_wFz?ob4g`9TaNZv|MWi) z+ryXP*y=1CVHckx+gx%c?un<5lodl`E1SYumz65U9^w?{$Jc+ru5Jv%xf-6=vF7XB z(0guQx+P&DwyZNOE5HO3I44gQ#=pJJSvVZk;((@$>Gq^SaEp147@IlDZCA!{+_!UW z9QzJMwpV#LRhG$eWQ0#y&|fVUt{pXdH`(jbYMyMA4Z=h$w1eX(QtGX1TSo~lMFL-jxBhJ&4?s!5hFbwn3C zu(;J^4_DS@cIbIveWbv&qwcd%Z zPde5XncnMg??Snm(M-EZy8oq094X7O6?e0JcD~F$MwNJz9s7mdc5X}r_Rbqo7QYQ) zP?Dcx^s`dQa1F}T>lnm%8q*T1wJ$eD5qG>Kw^q+X>?Y2_Ntca=7Ya9#&(YT-tM;)} zxK}4tKYZ(~Z?a?0*g+1*VhN@Yj&Uh9g_1E$m0MiP<__=RY)3i4cQn)_B;W+V*}EYA zbvH~EYo*2ST#5s}ox-^9wR_>nvcziH#y!VcrTiqwIp+n&qb~bboKcsBOpcoM6Pev= zuiLJ?Wnrtq$%Ec@#=RfI_d)E0`?tyRE?(-aaQ|WVS`PcF#gp!}aqCNLt!!gku1sPE zPI4AH6tNeT$DGYGWI2vCncUx=uU8#=CHg1+0`_?+&wVqF#fyW&2jh84oQBDdZ(i%v zFOlcI%5@#&*dJs&O{-<%nE2|zF8QrYBx21N)<5&8*Q-3%JVK_Muq(>!npn$NoWol! zXNl$g-124C%4WB`m$h;@)=oT;&0~|5fy1kOw#r)KxT9{jmb{4b3I``M$-8l|;{h(X z$xfx!nNJ!AR&@mYq1_8R#$+x%tZSb6B*HTvv_hTyl*iM@aIvf7qa0n%laTxY*avXr zRpZhRbIjaZ*v1Wm?bsjWXg9Vp&3$#X6<Kk`iG|ak zeLu0+t(D{6jJ055w2IUi>@Xa9w-HR1erK-qc8b)VaNNViOZ_c48x%72C67MkGn_4- z-~@?_dP{M~1lU^d)Z6mhaQ9BxJHMlj1(*Q&@vUu6{RVB?xx)5;XboF>cmuC&{>stQma5~52t6#$r-YFZNOsVK0IA@3TymmN+vyY*Fl-nCzy z3#HGYpH(j)nQFk zhYdgb_jMpy)nWa5wF6_mU2nDAh^Fy7czV6A7>;79hWZPaK1e~-GSH7aX^2$2=;QD8zh5fc2TauLJ z!*LEH^KKNWExi8FGQv%~jjzT6*HXZF$FrB=;Nm;Dn(_Q9u4{GW%HEVi>)W2(SQuMk z%kmq!>Ra}98)(bCl_GVcOijYUNG401O&j>V&klIKuBig`!7iaTtF$8$@r^0YwCy-q z;-x?Pr9h7EYdMo_TwiV4u8K>0O-+j5EK}v8$&PPW!=m5C^$OQH{XAK|)mgvBv9JKA z;C#c{*K^|QFT{Nc@wz2b#g+pxo8@lN7v*r4g0Eoq z30`>C>Lv!omT>l3E#v6qVqE#jimrhq)n$S3dP`DY&kQ?f3mU8Stm=D0R^S58O|raK z*18H=ez?_=lA{BBtHo)vXd0i96k@}DUUSsvJ8ehYrj#`R*jR84FrGfqDJ)dVYDcV! ztgGT_thh7fEkd8uZm7m(9DJ8_`_A^7w~BBOKaAnalp}h?H%w!Fc2NW;z9A=u)6Tq= z@kC4}hsMQfnJRUx)$#N$wLz`InY@!)ZGSMv_G)c^rc5odRy4)aJLGw#anVE8m&VgS zpf&#tT9>%WIyki2J7>y@44h=58t}$)|AtZ?iLbxPYr^3P7g;8=6&salm*t2miksGw z`8$XUDLy}g;wKbw%7-&IEKj9>jXrk@2dBh1!%6>4_t@qHPFzXYoM6UXQBQ78*kya< z#BW4%vm8BHG>yehMcVo_X@3N5Rs4-xGEz`sVhlt>+{74MMu@IU^J=Y=$dMZd;@nlH z9h}2tq{_PO$Ct0Of zb*j2j(craM87*lcY@X8NdPVYFFkOLr8QVD9FG$Gzg&xkbD*V`z8L_nR(j}P5yldu8 z@s`d|Q(E9+GA=HKGZU9?^dy|o$|=1U_Z=)NGk{Oa({~nR`fpxKv+RDHXlj;;VX@ex zj8p;_lx6R;c>OB5E4E^}Om2#~lelnJe200nCWmFI*rQJr>IS$eqcmF-M_mxRL|HRo z%IRbc?@EN$=;}B9ctI?NN=i$+O6#^sNB>0qA^%ZYiqpjakb#CcxDl}Kx;UbbON z540BlOY6XYX)XMh*8YYStw3)?qrl#Xg}s4Ru&=_}hBc(sRZR~0m!zo=8yL3e)ONnQ zG`9-hxXn@ECh45o-rE9K1v|zCJ&&5WQFmow6gq|}2GOu~)brxetOIMs+Nv6=*>W-V zH%u^G?fDL7ohn83d^nC6Q`97B6vsjD76E3|;4TC;aM)`a7!r&H?ooxE31q8`~IR_5*sr z*_@eyZQ)aFFE~qlnD{ebwXtlui(>o6vh_%<-}->kN3?DIL!W51y*G!w8a9D*+rpPh z_J)rUi3ZCt=C-;^=wusn>|m>BSi`aCZj1$5jc@l+i7YF>)96#vr&Ft0E9aomKXmW0 zm%QdCIq_rBgiF5VF>8`K|Lh+V>g)Dio`pK&aH|Vf&T&e-0$Y~qjd1>`)eX-ghzZ?% z_7A=&RdHRjCNN>HnpTb`^@?fCPu$0BImc^$IrPs>6{EA;X8c|jPZ*k;-M*)xpY3J5 zi(!8OWm+_EkFS4~;+H}uGcoP$wzXbMc)p>w`bpSJE#*^-UP}`%8e~k0|7HxX!_c&_ z6_w-{=eO^tt4}P>ob=He_dU#OP7&|Hy{#8egd9By<#sBiqH`$~XiF2$YFNr!tJzYa zcLVn4d8&V|nZa3&%Za!ud)zo(1doqNnb+cMsEsEAnH=V|2z4yOH^);P9^5xNWnZ&0 z@5N>LH*xF7_VH!v__f7ec7jZv8W%sc^K0ze?y*}RlZkn;CAgb#Dh5uvgLq-B4No9! zi>Gm0Gv!p_R#DhdIIFSHUfxP>{+bsnsyKYS$fI^GoLY2r;KezhVV)?Bhsha&a7@u6 z9928WRh&gm4Q5Ek>Yz268_Z>?nSlEO)T^D!QmYIn70_G~dhGo%JuRGdfvSJyi`^J+=t9QIrz*Q&j8p`c-@WHEQ%{w33OX zO|r3euG0gq&jS4)oukqrP7l21R@u9aXYa{lxCD;RQx^eFa1&*i0I`;?^poOz z<2et?)yM8M=lS}cQ7KX%k;A&J3|GN|us+xjaN;U(7RnNF>pVOwUTe1HjK0gC< zlIMPt+{8(^xQFY{Zek|45fpt1who+a{y-@Q^NtL@N32M-TkTb7f_A7l$LsIEdsRQr zXhnP53B2$^pIgjaux2EMc=1uR$WE;dy9F0xMQW^@80@9CGK*>#+K9VCUW%;~DGQ5K zq?+Bt_plA(D}%aXfXi#6-9#1Y99ABs$I~~2m}?g2Gm$s!|Lql1H6I{Q6U=$nhkx8^ z!S^-PN0|<9H}Q^hhrZyS=nuh1S-c34fooH1|2sIgWOPPaI4OLsn`pHp@l_6&DB~}2 z&xxm((9~?(t+*S7>mGjmWu<>&UuGBA*vl>h#ziD&|5{v+vVXe6?uD-vDSPL9c)&LlwO?(O z$x|H5mIEi@dx|W7%tt!LWBv+c6|GC$$$ zKgMqQGasYEH|2^9(S(ch_=bCvlO6#OU*F_-Xnu{|+JI|TGWkQ?pp+E_yv|vEtk*OK zU*C9*s3~Tzs&ry0SwBCXJ_Q7?=_dQ9D7Q@3Zxl^0+N+A~VKq)+!fqX%J{F$fRB#W$olTUymTUx+9qSLC;U#s=49JEE0kN^Mszhb;NGTDE2?d%0J zYZ_;qTt5D^!3QXYAEX&^kY>!;2dKuu(XdXApc#Iks$%?ULrv0=Pz*5@Cr^Z*k^?ov z4_1vhScN)u&Uqnxm3Hz4&G3U&BMw%? z`OOH_UxDxl8$)3Y1q3BLOChrS%Cx*_JQA?hyBv-t(ZdOt<S1W#DpPlE@i_z_~&^79rA)1B~?N82X8Zev+Z*(=rkN5<_2U=%*U` z8be=i;DrXh5t#Fwbz5%eZ!z$#z)_uVGxT>G`c;OW(=X!RYv_M!=LGgZV5(AeKquOlOFyN^ECmWno4bE_bGZHwe zL%G2pW$@23_~Q-!1cP5;@Xt5+7aIIY27ijdzr^5I8vH7QKh@yZ7@W(2(Iu+wvw*Sp zDLlvE)Ek_6z)}A!FgRBMM}630aIQBvOAXEq24|VUxyj%xH#jQ{P8&IT99J6n76adE z@NYBpcM$6~t};0H0!RJu3q$`)ga0gW)b{5L&N_pWHaI*kMss76!TGhJ-)`u407w2` zGdQmsoHq>4TL$Mh2In1v^RB^pj~v}^I}QHt4E`qu|BnXeGlR3+;Cx|lzB2UR82DRY z{8#hJ#RQA`xjQGDu1_9tG%f>yqkbzga0zhar`*twGVpkVbDp6;-@q3DM|G$+^ivJY zbA_m^nTGxf1J5?_90S)I_(}se0QV&KS6%Fs6hM}AfUM{T*w;5=gB zCk>o7_+J_N3^X=sZ>E9c2F^BcSKz2zUKL?C^4P@hiTJN@cY{-8=m#0N#NdoG^cNa< zy20TuCh%YRUvA(B4E%_JpEU4#13z!z*A4t3aMYGvhW=yVsL#JK^!p9Ig)cu4Ro!gh zi0>GB*T5OTQCXg$j{!${yBZwd-~1IZgAcwF9R+FJ`0glRA zVsMrkoL1nduO2Y;+YG!Nm?ZYwtH6=ZPYupD2KMlUG3p=w(mujR8F(OYROcc?Ukn`i zA7XG$FgQaEPMN_OZg55zoRNn9d;?!#;7PzyeWn=ti-Dv5X*KX>181PZ5htIO*L~F+ zIBI(zV4B#6rx~0wLw~-ZzYsXeJK5k=8v1I3Kh4nB82rl({Van&$I#aq`~?Q*DuZ*i z!C4F(wRgF}xzE7w82Aqc?#>H2x_|P3qc-LPgQogtl)=G`r*{2VLq85U$~)fROfWbV z1_w_mxBI!k;7l^~mmB(7)a!cA0glS5H~0+(ztP~#Cr9U9Xy_MFuiJPHaMTZr4G!*u zwC8O$^!V9JyMC#mZ>3)Qya_n+`5i;Q!qB$?M{QYYaK3MFeqeBJGdOn`oI4H9-Q?)@ zt}^uZP_OH@1~{tQy$0t#a&+DY4E;mY>%5NuM|sy8oX5z~d7m)!Pg1Y*J`Eh@ea7HC zOODR_oS{!suk&sIj`D6YIGf4QdAAt)ZPe?$F9An+Uokk_$z+th2H z?*d0Y-!t?(4gH6}(fIBnN0;?GL;nf&+UKXhky#P{2fupvZWN=O~IHww% z(+y6U!5MCFMjD)QgEP+HOrT!Zt-|1+Yw#~H_>&C&6oY@Up}*A7R~h=LhQ5Y+-S*23 zeVu_982B3CsDBn4`V?^Fr`g~vF*r*N&N72@lfhYTa8?+cHiNU09Nky982VeO*KN5C zII8Cz2Io$4bl$rS{VM8p-X8-;d4FPX?lm~~8Jq_U&O-+05rebV;5X} z9i9P>>hP?gPaFCT)N4PRfTK0F+2Fro=-&j6e7;SN&ijtRd6#-!hxZKrPJ{CyIXdqy zL;pMKb>2^aqq6>Ja6UCSyA944hJKHs|I*M~xDge#u?ufX={j^X^Z{^Gha7{`-QeUI zoZg21FoR!U=npse_yI+G9R?Zv!G?Z_!N*g+?e)at!R>j68JyD%PSW6vAV;^c+|ZAr zUib4DLthUZ^+|)lSzzd|GWd%O&b0>TI)l?>aPVW*cK_EKoTcRGdbS$+8>!dzTn-%7 zZH2*UGdMRJobMZ)TglP>Z!`3FP_O;t2T<+)R~h;>hW=jawV(Tdqq+2e!GGA`KWgZI zX6PRWj`IH8;5=z?o;EnokfY0e*3dsky{>;6IO?Ab24@pFI`3vfzlD08cN=h&_a%e# z3OPFOc0>Ov^*ZnCz){{e4bI!-=)CV3`gaZedxm}|_1fo0z>&|74gDvE{*S;>AAU-X zF6%QxzngmP^9$g}=idy@9&&WvFAe?IhJLT1|JKm+hIUj38#pS<0glR&1}D?t1cpAx z;CDClc?Lh<;Pf{1eGL8Kz)^h?+ z2IpFXv)JII3{EpSy3dyw`lZzCK3{I=zi;5X4Ez%VKV;yC4ZPOCKQr(X2L8E$pEmF> z4Ezi*s;s`tzisIMX5f6>?2qPEp@D}Oc({Q_14sQl*3gdwj{4z3gEQISOffiBhW=^; zHyd~o%@5__rARTMhng2LDb&f0u!IpFM>eGm&53Yd7y1z66=~ z{v!L!kXIY>N01*fWL}SXO3R{X?u@yO4UN@Pfui)P*-CDx;|myz@Wf8hU{N%6?py^+ zMNzvN_@9!rVOrgsxs7<*3VA#Eh};cpcX3E&ai>g&^7;Qt7dBu-QAt$85k=^ZLu(sr z`L4>E+Ntv{tDH4+PHlu|&Y4~p;p(YV8*1lA(yY2^5uDyoJ-ag}VqrnX&HNFO%+gLsAim)~fjSw&!YU^gHblQyCxpV2Ndd{4> zM)hJ&>P5$UI>qejnRANjMCFumgNIaBqNL*D>BS{ehfPV$1dDgDhqqjYv%O|9W{Sas?2+UdhiFjUj07Y{8RI(>+t8dg1|q;^`dnGv-) zp=8>$YJ*iexMWDliN(c+s-$*m@kvup9EyhV^`e#a)r~X4MwQH-7d7!f+mzC2)w8Bm z3?4dh=A6rB)lO7dE0A+yapmCRv(*bm$D9cFx?ohRPu&|GCPRpt2oqYa1Ho)S>q~ z_xG&&nz{8uN-Ag0nb}x0SIlj!nMo4o-LT3Tb#wW0*lDw7POY3ia~5X)+`8$F(`VIH zHS*fzr&TX7IySlNqeCGVYCBx3E8(MnRRaaG3qEQEvPpWUItFOKc z>{0YMv~)uCgnv$MsGB#ZX84?%3al#4pE(n*2Or9HX?0DFCSm@}z3Qr&m6e#$2iKu= z?!2i76VZZjo=zD$eR^em-GZ8$GfJk`b7VRcr8V`HGY(eGism)@qj=^Vybc#08X6Di z_y5?8EbW+)7^24i*z6gKclUBO8XM7I{W{-6H0OY6q%$3Qs@2S#&uM7Pv{E(0^lY11 zhqXW2n0fQ78xELwoScW8X=>gcdR~R5L(d}GN`}p;YnWXob&=hjuusGd_Z3me-s?0s`9 zYvt^MWx0nPrD{$M|LA` z$T(ohabj>O);Bg_M`@^>HG3}JLR~w3`dp#*CvkxCpe0)}7?VovR@~TYXV=eA`44fp zsNo0e{t$c5;1k-NEU2A%*^I_RWj}P*Qf`!opyS|FQ8RIH<;Unw0bMa=Nb&S=->Yn_LyH=*3#;i#aZznU-9ejMDL2{wMy}F>%Njg5DhqGo<|ccH z-LQj$75dLO?RBobl9WU2zJuE-vugi6rSXsy?7FjRY8Td5R^rse=r{C0hv}q4n6Ou) zQU`TFxQka-mJT~ap1D^xG{V%$g5w$TgqET0lQMihU!8556WCB!&YX|Mr$(L=C4|@_ zj2Sm|-gKO$Rh%>;OdA_2X3m^R%1P~$GNfPujX2~<&ft>vy#I_6x*T#MT~3?XfVaOl zRBErRIS)#6tN9Z6|7Ibq;Qw^#u}!7zZBm_dh=rq?{@+@U@b}+aeI)(|&LLUS#@)3#q`>`>0)|)16DH9xznoW z@LYZH&~RmAP3slN2LIbd%$)5@7AG@TUDZj0!_5I2wX8dF)FP&)eLZr?c2aPGc2;0H zifDxqU_CM6LcllP&L4c;ZU4C9FZ*%Hq5VUdzxyDE*L5shfj9~&uS2vcSqi+jUhuj6 zNak+?`Xd857Ji*F11X=)9;D<e+4=8pDEsf9DP{dPayF5+R*Na&m$vJ+V>nFyWs9@=Vu8%OTEjG9|Mk_gSAAK zz?-hcr-uDfR#boJfBFG3pY4o3w6`1}^BK=VR5k^Yg$p1?H|^s4e})Y+!lUkEmlLGVaQKFUTDZK z9FYGNC8u=xdE&hT?4LsRL`siGPjLq7l5NP}ha7!apF1Jr2YlLJzIgZm`!5fWw;dqw zI6!{?0Qt`c$bW~-XL0d37Uo=U!DsfO59?D1na`rG#hBAR5;C6!y;1Woh0JF?|ET3f zkon9ee>X)wpWWkgmHki#Wj?3JGQQOQUIvanEDtY)Rv%W=5r>HnI>`lMx0aC|_QS>A zPI4c-(ILzq+K&)DJIM)gl$OZ~P~MOOj33umfLwg8%{SzmAtxYnebN33_diIl-@(!4mn?>bo+V?t&yrPz6AvGBZHc{pA|UM%yRYgrsr zUXKiU6eJ53@s3mmyvKotBQs>7vsfAO5@EiKA~|q8UgCRdQ9^cc=Ck&wNzWpg-5o8C zTe7D!mwtN}6&c!4*E0vTce*goAXJh;ia{AgO3m8fw{n)ngPN;;R(o)#<6K)^Wo@XN zhU?3?dde%x9T#4wapS?yf7?gn1z|tNW@Y7K9FU;9(KI&?XfdlH-R{(?o^X$p`De+l z{h&<9t~t^zDvCV)>^fA`c}v)v{sYcdUnk?v--Z1qe4*vNbLB`Rcn^78)k%)*i%#Mk zkQbnbWbXv}7uGE3&_B9uH(rMdU2oyN7-$6EO(f$>GSK5)b9=yznn!r6t?b$t!*QLB zw=Nguz}OQK=bJ3ZQOqO3bS-TtMs>!@0?;vu`sK=As%aUrALfEANc@l0vR_~2gMHDj zZ{!2r*43G(Ca(x5T_PvyzCSH?ZnN-8H;cu`u{`9kcH8e4bFlBS@P;7Wx80_I&~=dP zriMjzD@O>qyRnmpU>>81x)u1V7Fc_-5Di8R5@=FU4p&0gK`M7&Df*#aYPAhQLCDzE zS-{a2P7E&FtMS%i=TY0f7h{L?n_HWpWDj>L<-+Ph~l#E0-@#W|f&x7Zr2ED9RZWCWB!> zfrp3l60PoC%zZ(1K!5zy152ndTtfZPI+WACZXUii!+FcL@zOtewA0H%z2&jFXpb|U zoj1tojkSn9%(1Zfao4~+DGldZUa53Tv9An9b@Gs^nZ#L)zQt6=3Jz67U5CgVbTN7n zn_*5-PELEskcSn+z@=`uVV-ca&5%bFa|^%_73nQOy2Xh^P69sADLQjo%w@??4+9@(3hd`$ij3 zZh!3XS?H8p?6aKPv4qUUC|XC$Ouc=@j>Haug9UehKFHj?AF`;u!^Nf^*Oi6?HCWi; zvYkfGHTJsRZZB1}=UK_WsJ*^-0+PAAN;_fo?K>!1R12MM)}YQG)jxd0f~($*aEKE4 z`)JGhzef3$I=HYIu2nV!zw}4Id)OHh{0g8=IIkdihzjQ&ja=uC8hOrMpvPg%b}~vs zUcxyH=sD={+GC9dI!6L+g|5`WT;C(Xd1ay>)=OP(_!)?YGL>|tP@%KaygYGDVbD>g4 z;#BCE?Je1tHI!L8%={*+$|We-7n=x^W7A#sMSxcz{4jKsodRw%-`3sYYNT_i6ZDMtj_kpoAz$SMVE z1VXl>n!$@oibiFf?THa+6{b4BppmK1^35Slm(g-DcrQh$bWS1mPE$ zVt!-^s-c~Z5UfQ+u1{$V!4(<={Hj0=J~>VBdpkV95q&VS%gYKst zd9R}G=FYkwQFkkJk9F`~pzik0I$kx)xf430E_@R~&g#y(1=QW!S@$S)4|dk6U$e`# zP&%3NX(XPTu?kfvOmfZ34bZq!ZdHkRzFW9p5nJ1#+KnLWqwtNEFC37U0k|@I4wCr@ zdWB~-17F`EZvs^f8o}Uw*~?-2UWZxU0qn}$8n_l#B2$!!?yI5VpkTM=H(-^Upk!Yz z3yEk?fVMKE@j`;45e(kvZGUMncPeJq(=cuBFz<>S5n!zyelqHSpmTo`nF(NC4AV^=W?m&#&IwQrwpdr= zL$LmW@Fpzy&+CJVNq|js>?!yY5(wJN%Z18JP_i$3HB65pusiTSI}_KS^AWThn+qIv zaQ4-JOAyM!&7;Sgz`sMVxD+=bh|l4{f%OvvKhpY7!@}1R1#l}PL#J74!XHQJcw+0&grUkaH}A z0idCwEaWTbgd7AV8afn7wlfm(KI9e71ggPxok<#@p*4gub_Ej0CNDNu!M6#oZr92d z!pxpGA$bVF68XLU3+V*->%9x${IC*2{s96um)%If{}M?-S;)Tt>0sKHn{yEa{tz7Jk@Oc>$C$mo-lIsyH`s2m0;^|;5LRf*|N7~?TFn@~> zF!I0)808Q!>O)YAXgY#Vi9*iPNwBfLfa&QW)CGh3ToPwU8CV4kwGR90)n@L*O4A*9G!d={dVP>(o_X`wvj!RP}2l zx1x06WDF0H>*Q&KKY{~v7p&P%iPj~YGlA}duD^4ZMgyI*fgXph)VT!cIiN=Oav*w6 z33s7}I90ttL!7Fv&~Q1%wu2MT(Nf*^Z?~9z?dsPLxR!&I}MpV_94k0f$rkS^U|ky3EZ6sv(Sk_q|F-w4mE#+ zCFc|fbHhF+0p~R$C)rtd7<59O0VT>BhXgb2JR~&;7R%vf)qMWeoWBj{Z@>LW8?1(D z4T66iA__U*L9QHJ+XW_TBCjWlyqlrLMR~Cbx%2LT5Qp$Gh1HrL12N}e2)#NoUq;GK?LuSE?NPdf8iA&LGhacYCDaQce z!ZpjW#$>|O6H1nQ;;`3WKY1Dlt)mLS#UIxGY~BA zJIH=`e!l2+HAD)%uLa<564{-y83MX~84_gs9+K4vmiP^`9o~B@gdMo%A9nrAkoXIq zUatd?(fdsR{tid^`Yi->{f9`<^?yY&2PXVQM~z&k+o(|IIemfV!J6$Hr*#P@36z4a zzf-Q!KxZ`2P0*D(7Xa~RR*mj7AbL&-_eu@X^(hU}^*3n9uKyu0x}JR9^@O_X33b=s z175cCkj^Qbr+|J5v+Jza2wnd&pkpyt>wXmK-z0UI)gq#)#JCO%Euvz<4!F5&zMs1CaR&gU8pbp8so2s-?M zlF>q357g*(1)}GaaQkS8;XY1740nl!9PUxT7;f_Qa1-j`Ce*_{9=vSlLY-4MQ-L0U z*>z@VgyCKY=vd4ZODXv4Y!uN7=;5!5DNPzic?TdC(P|{v%^sv7^N7chJdI#+ka>^J z;}00`Lf}n0Khg%pFqLxn`8Ll92qJGkvR#3%iTuS{UY9YU@K*{25UzzK0~N_T2EvmN zdQ%vzh2trlqJ<=coDmS#gN9LLq5Qd$u+M}Nqc#aiE^NZ7(a3cgHS(OLK)qqjcG|Qq z;rs+>0CfGG`!yQqJPcF}U8(a+pi_Vv-7P@$oD%Mv8e-Hw))1risfNqZfnqE>FoS$O zYJ_^!2=%CCf|uv|rL z=sJ^f*A!yA>n(_#u4@qEOZ#(F$@mLM?xm|=(`Y{oDBmK?6u(7&7Xh*LK2(235cWS1 z^C^TL!_LChD+G&U&u1{iP3ZX_A-o0bN7{gwcGTi|4w6JlHtK(Q}sgpq$05Z6xVHzkt1KAZI$s6ItVLI?MSa2!?^09Rk! z@i_HE2&*Ep^N0=kSm2TlId(d5cwwXWD8L^ouU7AI2A$FG58%2=fq@A$%9@@*_*Yw*>R$ zz`@;!?m_UEAfkZ3!>2(T00n%!=i%3LwjpkXAK~oK2;KQMAinXwkHoQN!`kilfS(~) zti)!7il@8aGy>sMgg>()ktImOyb;0Y9eoM`zo9Ge3;+duVH57hi3EqapN8;eO5n0f} ztC2J#SQWpAK3~XXO5d{$$?Zy?FM8esaK9D`)&l%O3B9nikYfV`SN7YAWC!)E1E2Y* zSlkt}2;p9Y3E&2i}OOa=*QnHccB3LYe zPnuP{(N%~)AnZfn<99)1fwSH!Q$b%OM>CUnS(kErXedQ;G7S|UhovM#{h3H6C_OK! zppEB;`iqfFRr(%SsnE{|^>s+*DgE)G{_0TQjHFfRd71L>1n`qigYVPl)M>&n;Cx@$#+S39pD{Bcq%093<rTVNH{hm3`X(=3Bv%&6rqRItrRHdf_bA2y5ngK&+YNNE~YdtOd6K-icsUEQg53uThkO z2a!Cc^n5N5p0)E|K<7EnA>OQ`@jMn?EP#x1mAeRo`6^tcn6{=m`n^a5$2qmEi;$ge(sACn6cH^y5SQS)u-1B$JhX zx^`3*8ZJXprwoh33=5QAY|KG9T)#L+SPa#T2*SP_@p2x<-UqNV`6Um|X-sqC@Ui2i%OH78M`a96hibj*W30x!h<8ZbY;k!S^B! zuiEuT2!n0Afk%XLqY?RlcDLi2w(*X9FsJHcQ*$5F@((s+d%On zOYjqz??v!`gor|bKS-~D2p$FEzUwo34k36}1OI6N3c)iPusZVoup&Q4!Xt6PuK<3{ ziikZBxr*6Qs$@uX|ct4Ym1hA&^x6|4;g?A2q3N*^;4Ko^V|;R1yo28Q4B_qe-Rrmy7 z1AIg6eri|`A^(bcVG8U=(g&IznHOMDBB;Xn)TOX}oW>(u3?X0@lva)b2^r5v!utRP zmjKK`u*4FGn7yilgvG;?kPC8Ye z)svbTzXl247+bIe;C52Q&d*X5XIWi|^yC&;MQJqlP8 zW_}RK7-oJPU>!5(x2epmG4e+JuN=fZhm}f4JAV70eVKR5(LXn}MLAONSuo32wnD0Hc^y zjA2$)O4uHGA*nKcDUuPSP6L>usMmB*$yF6r-meR@EJZSpS#AQjRb}Cg1MR(YmY;@M z9znv3^aYOtY*ATW>&T+oEk9D!fi>M9^ z72qyX#m((hm4UwTkx#*h-Do2czQeHFivaH+s4n5JcJddY4?jaVJ-|)9IC_AcMT^g` zBzSmI_puh z66c~HA3?~uPXQiA5CMNBb_Rk!2GPX?=V}m42AF~%{Bek>4$elz-}tDHJPsYiV?B}pJ<_8L z;4B1-W$>pX;&60U2?FmI_>nevMVo_{04QJpE(v|jM8b>oJ+1_}mcHocU2;aj&lH5U z^c86X9@S|M-bO?LzP=m!`XQ40LGJcrfJfwo0zYzn*z}i?tUNgeI=ImG~E#qt=8q!{@NP68N3cZvDRU6_gaLqGa#Fg&dga#EPR21yiooi``7pk5TMX2zO#f^doJs5~d#@_>AsF2v%z#f(<~M5Pa$> z_`lE~coray5HO+%lLRsC{#ry&Aq0;jdIAB*D8#h!BiDvieG19`RVtaU%q2HRnN1Hoss3n6%41N=E;WOEUG>M8hNY7l$_z+WH+jA#=6pP-`M z{|wO{gy1iTzCaKGMcVk0Z--TVA4w8*DcA+@6{{+)fXH(U&L$q;W%o*Twsjbife4oP zeg~uTdD+O2ITp!9in;EeF&h+9{1!W6cmQ;*tDstfAnaQaKZ=UVw-hV>9+Jah$Q^(v z#RYVP$o?IayAg_@!{w6fZ-Fzb+GW`t*mbiDkn}^q2_%hN3(3Q#lGw>IN zoKcN)41}mghXE%HxfJ-M4moQ)a0P-ce-e%;9AAe3PnK50G`+(-BQg`fd=*TKJIp-j ztK0;*`Sd-QZtXCub|=toM`S+$_0JF_Ka{Ha-%ltn zd!XKj@E0re;!nkw76dIT>OfH8is z-R*feL>aZpWj7@G2v+{DI+^=Ihup^@8A5Y$3HDD`4|Qbw)jVTe2@#_s5gSXAil`0B ztolP!!&$~S8f>@`@)VSWeXShHSuB*h5`URK=~?V&3-e&?iL0IX8tzAy;8>XX_>TV_ z&Gl~vxC0^hK?H6Epnz|si0?x18LdGGRz=`P02D;P_b>BZ%RUL}MZEU|yn*09g6MUE z$0M*6;8ld+*BapaI}p|Wa~cGEq?8)<@qY`%2a5b+L}wuc<%swuX8#046#Oy`f)N@B ze;5$e0pIt`cRSGA8w&Z}XSSIinAfgZ~LUb(xKLOu*-5P^uh-C!10Dahufrw5< z2>9BIVF-ZR!FUzHFT^DW)+=}t5rKayG!%lz5D`FULq{>_4{#KMpBZT$ftn_te^h`% zz#0+Y6Es3OpZp1kCdvNlZp&KF!>Lbs^JjXh_7)dRsygv!`REvp=M=dS2 zCv&6XTEi-t10Gh%0wmWl3){i>t>mu+VH?68gvU^*A6bGHnEAS8e}m@wn=}Z12sLy2 z+n}Kkv>_sZj?eD>3Bi9A(K`siYZ?fDC(y@KMF8;ckoO|^{Cm~>Gu1&C7137#5dS{4 zpFq@~>V6sspW?|>9gAoX0i$Aq6A%qW0Gxy5N(6rtA_~DQ4g3lK3c=+X_~!#q@TY1J z)B?;v5CJcIP)&R-(#0W`H=sK)7~ey3J9{=i7i~emqwg7GG`QcXh^J(RphibU&?1Fr zX5$9eF>*q#4hwh?$rGx8lUV>*AxRIh{1t52?l&WOg|y;nibii_lg<)^d=pkwcqfuS zkeJW+nA4Z49Omw$w=NLRHbFAgId_CQiVUd5;FC95*q8?EaQ zHdV+0VZK2~PGG*`zUWf;|CgCg0TY!fM>2t#yla?A^>!Gu>g*ilD6A(H;Xl|yLG_0! zh-CGVlS0?kNG_-A{I~vNuIIuZ?rvIv<#au)>xg)6d_Y$p$0a)#inv4vcM(q4F}cIA z0$mNEmHnZO$4`eg!?MQY#^XhRnSDjSIRD^?r*Z?tx+&g}E@N=rD616095^e9pPF5k z-7?m)T|73IrwYKAvd(7w_B$5TrhE*sTbeoPV5rQ1LjLI8m*=SgpyPH;Bn;r-I51r@XP~syYcy z{Pb(9zTUmpT6?Xv*M6RT_Uq_S%n1=EWtajV%I1F1WVL*2*gHKCH+sLT?bg5!5M+#QJ%~Bhr!r@;TZl{ng zvZS*BXs%&PIupRl;JVaJYww1CkAdOIZ$AEi6prBxyVt<*Z04=y-$O;!@EO+_%FZf@Sh~g9hchsMu6ADd79q< zlw2TP1MfxwH{!qiSPBoru~algmyDrBDIni{aGqk4{$5B?wIJyMIB0t{Jo$OF)t2^g z0DIt|jT$~BV5Eg{e;v-Z$)iO!k@k5J9l?M3k@SDzW~nHJBs~h}+vL$An?47gFN)|0 zHGE0HNDJ+G8qT-LqeV86_ASkKK0NtZzFBfHmyoEcjMnU{8wJkuYd-DY3?GYkc4{xh zz6S@E>~^pk6;bRzLfG-3lO45`?9ade)4!q+uNN=77 zi}1LI3cQe#pCvJl`Ki4>1ThN^gEC55F-sLPpq?wTMG?e5Uv^Gv?{`63Ze)Q{mIY%074Aep97lhSfqjT)dY2B`D35CUY#G_vRzShgn{S)eq5R-w4h=MmO< zaD+jUUm7@b*{59y{8BiU2UIKuc!5Jt1$e$g`G7ppphu?m@&xS*9r_$1In<#)2l^~Y z&S)D8$1el%xq0Opo#p6Iya9NH5-o>bz4;<>(zYA=EXqmA56q> z2k;LiXzvGpJDe$%T>!cF(4f@PfPWa~I+SHe*gO`M_=aIk3#-s?1I zbBhXSj>)YiKyGj}C}pV*ZS@`S-YH zb?G`_583(k0Vz>%;+BxFk)sBX&IT(tCIP{a4hgon;^hZd-(`xw1Vs?P_i>RvV7G9 z`RxB2w1?oxzEHE@2^3ZFL3lbh3f69hJZ_lLrBe4@aOg+B0Z*qpVrIw_aMXbJNwuk>5>1MFx7pz6*41h4M)*9;1zV!dix)B{Y1}`25ge0%4xcJs00*(` z5PZWP)kucF7|v@VjubuQNjek`TB3xJc7#Yq!!0Md(WZ(fz6{Rf=zM@Q!E4Q24tk}K zM$U%E`$J&N8hAYK=nax6#{)}#4tTUENu=!%(IU^s?b2W!9;Na8wziRRn~*9wcqIV~ zl+lbFam()#kVfH{d>ia%MIK>1dygPw^EI$#2?Y& zYk3Zd2ZH?6{sZuDC1_s&{xvug1yyi!I-__DzEKfHVb2)(YPoe>P6c@l;oG477|y7r z*i&#+`wV=;9;p@lkhrz8h$m?O3E5x68MPGqDIC>4M_;o?YKgzqsJIC}cij7y{~2)7 zeVXMnQ3MEn3!Fizk;gI^BhP3U=_p3V@EIK*RUYoze;`4#d;h7&)&TNw*SK$uM~nE# z!_D75pGS-M>;`e4&!a_rb_b@<=g}fQ?k?P6;(Z!EH}O%1+xGt5z_?aZb7E zBis$2`}_#cfj`&4N5kj-K+<{a=_CW&JSju(kBx4L!-O-A*#>4DRv&#_ktzD97c)Tu zTYXG}i6crE@ly=n4e+@ekM_J5{`(AkJN!Eg%w2Wd2S^^S}a!dOu;{J@D^0Fyna0z*aZyHt|JiAbl0j zl=)uG@DQw0%Xi4lm^X#gR(3)s~Cf_^o>E;s{k8= zqJ$8?7LG=oeIyD8j_@k@Tu&v;JJz|7O88RvTtX$h6+RbA3G-fcu4WRx3I5v*%oWVr z49t~Fu3M6aOO{+MB+PHda@CM9zY}|}f%$D%u0oQ|@4<2fkFd?4Yhd>|hDN(DG%)Sn zXkgmC#lW;XXJFcWgMn%H%?763w;Gsszu&;L`z{01?xZcW^Am6^4!kEZ3A{qVpiJFI z9ZCg%?NI8z!=a4!-43Niw>Xr>{;5Nm4(7dyh)H~{Lz#M(mO!>Nzih33gs<+m6VuZ7D1lEhG;G-x?c8cgyV4a{}u zn+^O<_{N|pArB+AU*k6$yC-MO%64auT&sffgI5QugEhek!HL0f!STV1gJXkZf)@p+ z1*ZqS!KuM1!ApXZf|COk%nG`KLxS1Cp}}E65S$Ur3(gE)8oWGsMR0ELs^E`<#lezb zX)q_48yp?<1j~Zu!C=tO_m+)&}!~RB%@C%HZtaoM0eW5G)K91${v}=npc% z%Yu<$OK@4RHOK{*24S!+cx^BoYzQt1HU}34L&5rBV{mcsnqbp0YtjFkTssr~jc}5X zCe|rz!*|sc*+bdKZW+jMa;|$OkWCVdJ5?)A$@-<>BIAKu;;k0D|-|+ zijUxJtOvNl5COo3tFvn2Vox+O#k0>FwItqb`=ju9i$d!Y|}Y_)O|^AA1qf zgLGr4G~?c5*eBihV!e1h6Vu1B&@DJK!iDS)OZlPAE=QZ4>QR?Ty+u1ko5kOZsk0+U z=M5MTaeewRo95L$^Ve|NsM?*~0)LrIr(kAf3ucfo&R+%y6KKeW6+Mb%%(tK|FOfj} zXKyx>+Vq{r>veYaYcp}p;)WAY{+LVSKGd0*zR?r)UWdgqFnt_nti+@sw>w-R>639r z?~1wEtzDshd(*8Ggh7F3Oxt`X(!2a*y@lgEjI(6^Wkt{9Y8BsI4|)F~HsO1A>xn1y zReN@u&Wa#9G2L&W$HH9Pp51vTfv!&XZhLkEL|-Sut)T7n&@Vz}su>jFFz-#9m0@A_l>yHN5B**AKDhB%~?dG|93;CG|;2t} zS-rzk)mptd)$CnW&7ajO(8%cXHuZxoAT_0cewA1_bl#)}2D zEi^P`0WB(mO%>vLk#GvGP^{#p!fg|!Qn8_8NY#Wjb7S?Uy1ZE4K02-=fO?Ip(2&I{ zt2%6!tK({^s2mz^D6KrK6sxK}-UyrHxdto-l%HrcieL@Hp~+ggpz^gwW15w;eq`C?eDm77J6Ih~#^ENnJMYls$>^$mpdnVEHx7)i>*YZK$Ku)Y|< zm}>cut{Ggi`Vuw9=)%pLGi*DP zgBgv7`TS_EfnsisHx{Cr7fTDXlFI((#375McWn(cp4%Sldj|| zI7l(;SM+aNN^R>?g_J6wE<{ux((ND&ONH9RHnel(56awnx>cY(*Yd?C0=A>WVLJ)y z=pTM}J(V#sUz=cKV3sVf@Yn>=G`vbNx07&213F!$awDvaHBCoTDdWZvOUl=ZrBc)N zBFonQ)}e57el1z;^uIFh`+(UK3{7t?_&ooj{dmb{BW__tTn>^^ubF;%2SHi zehV?AV`^QBO63Z>@`F?ynS^3=$Oki@28_OX_}eMyxZXOR+BTkpn@t0)s?GDU9vVU)=r#dOHe ze-vZ-YTJpo_Y;BNasvb9hRtert>tRI zQ5=&o;O71`vtVCLUa^){S%mF#G-ky9^q4&FA2<-kp?HS>CK1cHUB+-I>Hhv{Vs%`x zblQ=f9xoh7I-Me$&;|RAlALYpQZn`XF{fO`Yl(du;R6#XPWLhTmXJ2j%mRO9rQdNN z#CHHaXxf%mxjvOk>o9rou|%LahO82`okW?Mv~1 zU#eBSOp|4d_Y)43WQNLcs)&cPa$z5)cR1?$gDyEKr}e*!xkL;+;&ZmP9A0q#N^k!p$+SoEnl@^-v4~+9SR3Bm~L%`sD>5HcH?O~kR&cZW#MCFINUI$nhh*@ z!5c4Ps@w#i@<`^DD!J`VdE87?YM9f9Q`U5LR%bU4rtQr}eoL{@sMh=}+0ww&TzRbc zKhGMICW!&5&Tnas7s|h-xK^xMGl(p06mw&kuMa1hZa#FhhO91x`AT^kdfZA83mTZ~ zT^P2Z(?HC}VqzRKZvw(Y^CoElNdm)1nj)IO=7FQ745Q`qr?j)FY%0}P@+X5Ml2~Z0 zD%ZryOq_;ZZl#x+$y}qUO0_x`OZ5MJkThe&3Qc)%O50cd9Qn6N2^3O6M2Wt(G#52S^=6)N@+6buYaN|vu>J3bH zmsA8;ZH8{c4cSnQXNZ#}yj4`GL;F^R#^OXxi}T^3kXI%7Z$u}m7zgH+@vJ^@prGWx zB?((e{(B^FfrJ_w)fxQ^6k^+u(&dfvI0{sIVK~7xfM)s1B6^V$nnS_-PlO12czLaX za1Ty!QQj~)FwTQ1nc8Gg8P6mID{eXTAjUJq@v%CapR)e`YuVUNwA`_}vcAozg08LF z+rJuJ<@JA~qG{@Z^)0z-=@u{nla?_8q5#V|*|d;VW@=2V%1kyjYJJOFD~*@%Dls1G ziJO*sF#2M&SFT`k85o0==B~#0`a)qzVaG&soRezo711qbicNI>SQQ=yLw~xwW3X>w z8(xwICyUhskzdq~*+#RxJlU6CI8qzPNPoAml|D5!h34QMhfDytEu*$mcb0Klc?ad# z94La73(4UA^hj-4ZEUPoU6)&@<7}nx!1A(T8IhMMHHsB&RjFO>Kd9T8<>YEBSe~+A zf~QR@y)Wfx)=*;!mgsBs+;)_L(P2$p)Fxm@luRov{y?UEI%D*ygO*NPelATq{R5d~ zI-_xoF*A|afy^|Cm4HNDuqql@PAn{`7KU>9ovW%g(-*Xm%dAQ=&_cC9(Igm5B9d|g znX<$yk1u(IK^nZi^a`)A7qtl}yV@v5Bl2pkF_x>Kr{3UM@99Y|+!se1g)PyV^t9T8 z6iHUNR%LT?`Y5%seHk^qR>|#fycXKDbC8@QmXoa@&LHt8r4VJT720G-0kw$`Lv?2b z=Ut?KuvW#TT!fy~Kt`lmDzQ;P?P4~1mcD@`kuB8>^QCKuxI-yAqE{9h9QpO9lCp7@ zNRy5%&TI@%5=AC%I9`af!ARl$Oh~fC)k)Ub9+pZac5TT*&k{qXaBJnWe32>8ip)qy znc)YB3Njceg+;m*x)ow(Mi25caoUa@Ep@Cpv8_cYPHQ7%?c}l`%DKV4GpPrddZgQt>3Q1_mcpF&UMc$~ein~N{^j>QV z3hSmZzDjXAK8ZWhR~es%ueb}Xit9gE*@0$PUHkxFRyRKElG-&&h9GvtHm=UPf%e8bV9L0Og<~55PCXgX7bV!H^9;983PHdO` zYYR%Huy{qiR2s|(X*5?^0Zp5II!TpkdgZEkKvvW6f6e;V5YnQJj8^M_j;(;mVoD== zQfDjxDt)u-waZJ9-Q(pdYNoc^1_*6iJwZ-`QmBWc335hg_{YbzB;TqLnpQ(|KrR#p zeJzd}R}!aJ)Mh;r6y+tXJU~rGXu0uRbrk)Vj+aLUHQ4V*{fwucQ%{FP1AJrvYD#6iSKjss||0Tx*Dw zfqXF`QBDIfL3yf(pn-frAyH5RalztPC~XIMh~W@;ETJ@neJkEeCFk8-FxmS&yfB0z zV+;4rVxwBDU>y+O;etR00v@Tv2wZNu5c2lNcsU@A+K~%Emzq>eQmMqpV2fr1B{YM= zy*4q`Vl1N2MtfR7kWzye6A&XHAif_h1W)R&6F;(~1L3=-cL0>RMZ0(=;Xga&*Od2llQGT8P@kIkOi#E%)Cv$?MU zUmYnF5Q{9sJy^i1dUOy~4W=k$z!+Oczb#%@VFnCDLVI;UrFK(XyUcXt%4 zzjJyfI$_c|J%b%A*d&A#%g^_~Q0MfFoGD43A9?=AcCf`Jw5Luwr)PM|pL>hjY>wsO zndCu>&gq%9Hx1Y=r0#XqOyJl6EI#QIOP$j*zyJ3}*h1T9Y04Rk&gmIFPZ>Sn?U~s9 zU(R7O+3jw2CzGZ<8-qE=&gmIHcYfDbtV~ymozpYFceml#qVjvS&gmHpf3VvYTRM0F z5>_LAAMY`8C5Nf^an(6J(>Xn(@ANW*OdNWs);gzWuvmoCJ<(Aap5W1UEk&gGNf`_# zu$eth>ztlxsLtsbbG?{;I(AOaOn+|9tiN?m&v2!>b9x55X?UEa{i%`|y>ohoPb-e* zc$}A&C)%QF4llKyl9A_C%PFDG=^0(=+8lP7{-BCJa<#96Dmd5HdK^bKeVH>vD;TZp zo?g?}IX%NW|K#8e_OIHL9sTLf>6y;y8M`;WKkatf$7!9@Go8~j7&Txoesb@;N9>%Q zv3Gr7(9k(OV-D2eY12790qatq1^sjQbnNAz zwE5P-UwUM77v&E?^1o-G_a(@e5i+ylK}KRTOu#(B{;pSFM)MB-73OClg}653`CSXX zMGO6AS9{;6g`ejQ-G8s84&o)-bMVbVtS$&&nyIqB4 z)r&92+iKu#qiVxkRt0=<{Wsh6^DdFpl}%!q)}*rfHokR!z<0fV4?a$IdDAoN^g`(%jg z@^YXkrTc^LLHc}P^WgL%GQ+-w#@nUl<8zqT;M0j80!3e0c&~j}w~fA1v3>;AqjfZXr*?*OAa{hkG4mL$8; zF+_Ly^#ZXM_-zDiu4StVkG?_eda`KnlK?gJ7>RNp-!p*BEqt@l=Je%zClQi6_c8`* zs!IUL&3dmVNnfM)UV?IY-UAU)--GuZ8=}!JG(MaJ<_&oKY^=HPZUCUYx^_YYv@A3I% zf{KYvOjMnuJHzPCAAK{=B?+p&g6Gx*6*UDKp3&6AojNbYmk^P+(QP+!d(MUgQLf6l zE=lCQID3RR?bSC=Xqo6nD({+`*}B7aLGDVMv;81l;!=^O)QE(bQuRVy#S&n2XM0ek1@4u_nF zsX6RW?JW(ja)`QI!)WlliQ#q+Q{UEzw6T&p1la1PAKxoD3K>p* zJLSV5nze3zhS_ZuUy4Bj0`#4uzX0NGYec%e~Xc=twWO7o0Ws`_}My)oj?{%=^BWAjeO3@10b9=!IQL5OATXQOF95d13ees~{|zC#JuE;K422T=fF^pQ1HXgD=iWLPD7Q8*0$?KiqJa9_pJU*b@EZV_@E<$y1T9Ky8JE>s!n9ZgWoE!T!VLy z1HaAEV^E2Sw3UINf5Kin%@0bQi$ zCh&(6I3EP2wwrXG(RoQkw*mRKDGTGP7wd zcrqsNtj4qjCrC}Tx|V262aU#p-s%VaZ7k@!e$cT}ldZzl8q*4Q$AbRS5BgLrC@nSI ztdY!OAwEKhCn@SFC0roRLZ zbzYqYN11tWsK{zQ94e`L1srvp4Tnih)dz=pMwNl1&INGC!f^tV(~z8i+L^$du zoj#`(eK{NN%MiwFX51`}uLJ0{fxs=u>>*6PGXRi}{Pt)07K1>Tam@$t1o&3w?LHrP$oD5!8GNhnBL-%?cN)G_8@|tae2;^V(+0G| z{;a;Qfk2r0o&wL0;J$2`Oc>E07?^zbpgn#PZaD+Y&+6L?-0J%!czzAnZ39ghML6$n z`PiQMqQ-h@e^z9k$2SK&$HKKs$0G3Ad}hwQWE#HZ9$)u9_||)TbN0cv+2cFT@Er-7 z{aLUGfH1o-{%GG5^EJ%>mT#xwvmxn #include "signal_processing/include/signal_path.h" -// Register und Bitmasken f�r Interrupts zwischen ARM und LPDSP Prozessor +// Register und Bitmasken für Interrupts zwischen ARM und LPDSP Prozessor #define CSS_CMD 0xC00004 #define CSS_CMD_0 (1<<0) #define CSS_CMD_1 (1<<1) // Shared Memory von ARM und DSP definieren -#define INPUT_PORT0_ADD 0x800000 // Feste Adressen f�r Eingangsdaten im Shared Memory -#define OUTPUT_PORT_ADD (INPUT_PORT0_ADD + 16) // Feste Adressen f�r Ausgangsdatensdaten im Shared Memory, 16 Byte von Eingangsadresse Weg +#define INPUT_PORT0_ADD 0x800000 // Feste Adressen für Eingangsdaten im Shared Memory +#define OUTPUT_PORT_ADD (INPUT_PORT0_ADD + 16) // Feste Adressen für Ausgangsdatensdaten im Shared Memory, 16 Byte von Eingangsadresse Weg // Structs anlegen f�r die Signalpfade - hier werden Konfigurationen abgelegt(signal_path.h) -static SingleSignalPath corrupted_signal; -static SingleSignalPath reference_noise_signal; +static SingleSignalPath c_sensor_signal_t; +static SingleSignalPath acc_sensor_signal_t; -static volatile int16_t chess_storage(DMB:INPUT_PORT0_ADD) input_port[4]; //Array mit 4x16 Bit Eintr�gen auf 2x32 Bit Registern - nur die ersten 2 werden genutzt -static volatile int16_t chess_storage(DMB:OUTPUT_PORT_ADD) output_port[4]; //Array mit 4x16 Bit Eintr�gen auf 2x32 Bit Registern - alle werden genutzt +static volatile int16_t chess_storage(DMB:INPUT_PORT0_ADD) input_port[4]; //Array mit 4x16 Bit Einträgen auf 2x32 Bit Registern - nur die ersten 2 werden genutzt +static volatile int16_t chess_storage(DMB:OUTPUT_PORT_ADD) output_port[4]; //Array mit 4x16 Bit Einträgen auf 2x32 Bit Registern - alle werden genutzt static volatile int16_t chess_storage(DMB) *input_pointer_0; static volatile int16_t chess_storage(DMB) *input_pointer_1; static volatile int16_t chess_storage(DMB) *output_pointer; static volatile int16_t chess_storage(DMB) *sample_pointer; -static volatile int16_t chess_storage(DMB) sample; //Speicherplatz f�r Ergebnis der calc()-Funktion +static volatile int16_t chess_storage(DMB) sample; //Speicherplatz für Ergebnis der calc()-Funktion int main(void) { - // Enum, welcher den Ausgabemodus definiert - wird in calc()-Funktion verwendet - static OutputMode mode = OUTPUT_MODE_FIR_LMS; - // Biquad Filter f�r C-Sensor und Acc-Sensor anlegen + // Biquad Filter für C-Sensor und Acc-Sensor anlegen // Alle 0 bis auf b[0] -> einfacher Gain auf 0,75 double b0[5]={0.75, 0., 0., 0., 0.}; double b1[5]={0.75, 0., 0., 0., 0.}; - int coefficients = MAX_FIR_COEFFS; // 64 Koeffizienten f�r ANR + int coefficients = MAX_FIR_COEFFS; // 64 Koeffizienten für ANR - // Signale initialisieren, oben angelegte Structs mit Parametern f�llen + // Signale initialisieren: oben angelegte Structs mit Parametern füllen + // Buffer für Delay-Line und Koeffizienten initialisieren init( - &corrupted_signal, &reference_noise_signal, //Signal-Structs + &c_sensor_signal_t, &acc_sensor_signal_t, //Signal-Structs b0, // Biqquad Koeffizienten C-Sensor b1, // Biqquad Koeffizienten Acc-Sensor 2, // Sample Delay C-Sensor @@ -47,7 +46,7 @@ int main(void) { coefficients // Anzahl Filterkoeffizienten ); - FILE *fp1 = fopen("./simulation_data/complex_corrupted_signal.txt", "r"); + FILE *fp1 = fopen("./simulation_data/complex_c_sensor_signal_t.txt", "r"); FILE *fp2 = fopen("./simulation_data/complex_noise_signal.txt", "r"); FILE *fp3 = fopen("./simulation_data/output/complex_output_simulated.txt", "w"); @@ -61,7 +60,7 @@ int main(void) { input_port[i+1] = (int16_t) d1; } calc( - &corrupted_signal, &reference_noise_signal, mode, &input_port[0], &input_port[1], output_port); + &c_sensor_signal_t, &acc_sensor_signal_t, &input_port[0], &input_port[1], output_port); for (int i=0; ibuffer_len = length; buffer->ptr_start = buffer_start_add; buffer->ptr_current = buffer_start_add; @@ -84,7 +87,8 @@ int sig_init_buffer(BufferPtr *buffer, int *buffer_start_add, int length, int ma } } -int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *buffer, int chess_storage(DMB) *buffer_start_add, int length, int max_buffer_len){ +//DMB Buffer initialisieren +int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *buffer, int chess_storage(DMB) *buffer_start_add, int length, int max_buffer_len){ buffer->buffer_len = length; buffer->ptr_start = buffer_start_add; buffer->ptr_current = buffer_start_add; @@ -100,25 +104,28 @@ int sig_init_buffer_DMB(BufferPtrDMB chess_storage(DMB) *buffer, int chess_stora } } -void sig_cirular_buffer_ptr_increment(BufferPtr *buffer, int i_incr){ +//Allgemeinen Buffer um bestimmten Eingabewert inkrementieren - nicht in Verwendung +void increment_buffer(BufferPtr *buffer, int i_incr){ buffer->ptr_current = cyclic_add(buffer->ptr_current, i_incr, buffer->ptr_start, buffer->buffer_len); } -void sig_cirular_buffer_ptr_increment_DMB(BufferPtrDMB *buffer, int i_incr){ +//DMB-Buffer um bestimmten Eingabewert inkrementieren - nicht in Verwendung +void increment_buffert_DMB(BufferPtrDMB *buffer, int i_incr){ buffer->ptr_current = cyclic_add(buffer->ptr_current, i_incr, buffer->ptr_start, buffer->buffer_len); } - -void sig_cirular_buffer_ptr_put_sample(BufferPtr *buffer, int sample){ +//Übergabesample in allgemeinen Buffer schreiben und Buffer inkrementieren - nicht in Verwendung +void write_buffer(BufferPtr *buffer, int sample){ *buffer->ptr_current = sample; buffer->ptr_current = cyclic_add(buffer->ptr_current, 1, buffer->ptr_start, buffer->buffer_len); } -void sig_cirular_buffer_ptr_put_sample_DMB(BufferPtrDMB chess_storage(DMB) *buffer, int sample){ +//Übergabesample in DMB Buffer schreiben (Delay-Line) und Buffer inkrementieren +void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *buffer, int sample){ *buffer->ptr_current = sample; //Sample des Acc-Sensors wird in Adresse geschrieben, auf die der Pointer zeigt buffer->ptr_current = cyclic_add(buffer->ptr_current, 1, buffer->ptr_start, buffer->buffer_len); //Pointer wird inkrementiert } -void static inline sig_circular_buffer_ptr_put_block(BufferPtr *buffer, int* block){ +void static inline write_buffer_block(BufferPtr *buffer, int* block){ // increment pointer to oldest block //buffer->ptr_current = cyclic_add(buffer->ptr_current, BLOCK_LEN, buffer->ptr_start, buffer->buffer_len); // load the next block @@ -129,7 +136,7 @@ void static inline sig_circular_buffer_ptr_put_block(BufferPtr *buffer, int* blo } } -//Initialisierungsfunktion f�r Biquad Filter Koeffizienten +//Initialisierungsfunktion für Biquad Filter Koeffizienten void sig_init_preemph_coef(SingleSignalPath *signal, double b0, double b1, double b2, double a1, double a2, int scale_bits) { // Wenn b0=1 und Rest 0 -> kein Filter weil effektiv 1*Xn if (b0 == 1. && b1 == 0. && b2 == 0. && a1 == 0. && a2 == 0.) { @@ -150,10 +157,10 @@ void sig_init_preemph_coef(SingleSignalPath *signal, double b0, double b1, doubl /*Initialization functions - make sure all of them were called to ensure functionality*/ int sig_init_delay(SingleSignalPath *signal, int n_delay) { - return sig_init_buffer(&signal->delay_buffer, signal->_delay_buffer, n_delay, MAX_DELAY_SAMPS); + return initialize_buffer(&signal->delay_buffer, signal->_delay_buffer, n_delay, MAX_DELAY_SAMPS); } -//Initialisierungsfunktion f�r Gewichtung +//Initialisierungsfunktion für Gewichtung void sig_init_weight(SingleSignalPath *signal, double weight, int scale_nbits) { // Wenn Gewichtung 1 -> kein Effekt if (weight == 1.) { @@ -197,7 +204,7 @@ int sig_delay_buffer_load_and_get(SingleSignalPath *signal, int x) { } int out = *signal->delay_buffer.ptr_current; *signal->delay_buffer.ptr_current = x; - sig_cirular_buffer_ptr_increment(&signal->delay_buffer, 1); + increment_buffer(&signal->delay_buffer, 1); return out; } @@ -210,15 +217,15 @@ int sig_calc_weight(SingleSignalPath *signal, int x) { return rnd_saturate(acc); } -int inline sig_calc_fir_lpdsp32_single(BufferPtrDMB chess_storage(DMB) *ptr_fir_lms_delay_line, BufferPtr *ptr_fir_lms_coeffs){ +int inline apply_fir_filter(BufferPtrDMB chess_storage(DMB) *pointer_delay_line, BufferPtr *pointer_filter_coefficients){ // Filterkoeffizienten mit Acc-Sensor Samples multiplizieren und aufsummieren um Akkumulator Output des adaptiven Filters zu erhalten //Pointer für Koeffizienten und Delay Line Samples anlegen - int chess_storage(DMB) *p_x0 = ptr_fir_lms_delay_line->ptr_current; - int chess_storage(DMB) *px_start = ptr_fir_lms_delay_line->ptr_start; - int *p_h = ptr_fir_lms_coeffs->ptr_current; - int delay_line_len = ptr_fir_lms_delay_line->buffer_len; - int n_coeff = ptr_fir_lms_coeffs->buffer_len; + int chess_storage(DMB) *p_x0 = pointer_delay_line->ptr_current; + int chess_storage(DMB) *px_start = pointer_delay_line->ptr_start; + int *p_h = pointer_filter_coefficients->ptr_current; + int delay_line_len = pointer_delay_line->buffer_len; + int n_coeff = pointer_filter_coefficients->buffer_len; //Variablen und Akkumulatoren (72-Bit) anlegen int d0,d1,h0,h1; @@ -226,12 +233,6 @@ int inline sig_calc_fir_lpdsp32_single(BufferPtrDMB chess_storage(DMB) *ptr_fir_ accum_t acc1_B = to_accum(0); accum_t acc1_C; - // iterate over the coefficients to calculate the filter on x - the canceller - /* Abschaetzung cycles per 2coefficient: - dual - load : 1 - dual mac and dual load: 1 - -> 48/2 * 2 = 48 cycles for 48 coefficents - */ // In 2er Schritten durch die Koeffizienten iterieren, immer 2 Samples und 2 Koeffizienten pro Schleifendurchlauf -> DUAL LOAD und DUAL MAC for (int i=0; i < n_coeff; i+=2) chess_loop_range(1,){ d0 = *p_x0; //Sample 1 aus Delay Line @@ -252,18 +253,18 @@ int inline sig_calc_fir_lpdsp32_single(BufferPtrDMB chess_storage(DMB) *ptr_fir_ return rnd_saturate(acc1_C); } -void static inline adapt_coeffs_lpdsp32_single_v1(BufferPtrDMB chess_storage(DMB) *ptr_fir_lms_delay_line, BufferPtr *ptr_fir_lms_coeffs, int out){ +void static inline update_filter_coefficients(BufferPtrDMB chess_storage(DMB) *pointer_delay_line, BufferPtr *pointer_filter_coefficients, int out){ - int chess_storage(DMA) *p_h0 = ptr_fir_lms_coeffs->ptr_start; //Pointer auf Filterkoeffizienten-Array - int chess_storage(DMB) *p_x0 = ptr_fir_lms_delay_line->ptr_current; //Current-Pointer 1 auf Delay-Line Array - int chess_storage(DMB) *p_x1 = ptr_fir_lms_delay_line->ptr_current; //Current-Pointer 2 auf Delay-Line Array - int chess_storage(DMB) *px_start = ptr_fir_lms_delay_line->ptr_start; //Start-Pointer auf Delay-Line Array + int chess_storage(DMA) *p_h0 = pointer_filter_coefficients->ptr_start; //Pointer auf Filterkoeffizienten-Array + int chess_storage(DMB) *p_x0 = pointer_delay_line->ptr_current; //Current-Pointer 1 auf Delay-Line Array + int chess_storage(DMB) *p_x1 = pointer_delay_line->ptr_current; //Current-Pointer 2 auf Delay-Line Array + int chess_storage(DMB) *px_start = pointer_delay_line->ptr_start; //Start-Pointer auf Delay-Line Array - int delay_line_len = ptr_fir_lms_delay_line->buffer_len; // Länge des Delay-Line Arrays - int n_coeff = ptr_fir_lms_coeffs->buffer_len; // Anzahl der Filterkoeffizienten + int delay_line_len = pointer_delay_line->buffer_len; // Länge des Delay-Line Arrays + int n_coeff = pointer_filter_coefficients->buffer_len; // Anzahl der Filterkoeffizienten int prod, x0, x1, h0, h1; - p_x1 = cyclic_add(p_x1, -1, ptr_fir_lms_delay_line->ptr_start, ptr_fir_lms_delay_line->buffer_len); //Current-Pointer 2 dekrementieren um 1 + p_x1 = cyclic_add(p_x1, -1, pointer_delay_line->ptr_start, pointer_delay_line->buffer_len); //Current-Pointer 2 dekrementieren um 1 accum_t acc_A, acc_B; @@ -279,11 +280,7 @@ void static inline adapt_coeffs_lpdsp32_single_v1(BufferPtrDMB chess_storage(DMB */ for (int i=0; i< n_coeff; i+=2) chess_loop_range(1,){ // Calculate the coefficient wise adaption - #ifdef PLATFORM_GENERIC - lldecompose(*((long long *)p_h0), &h0, &h1); - #else - lldecompose(*((long long *)p_h0), h0, h1); - #endif + lldecompose(*((long long *)p_h0), h0, h1); acc_A = to_accum(h0); acc_B = to_accum(h1); @@ -301,8 +298,8 @@ void static inline adapt_coeffs_lpdsp32_single_v1(BufferPtrDMB chess_storage(DMB } void init( - SingleSignalPath *cSensorSignal, - SingleSignalPath *accSensorSignal, + SingleSignalPath *c_sensor_signal_t, + SingleSignalPath *acc_sensor_signal_t, double *b_c, double *b_acc, int delay_c, @@ -310,87 +307,86 @@ void init( double weight_c, double weight_acc, double lms_mu, - int lms_fir_num_coeffs + int number_coefficients ){ int scale_bits=31; // C-Sensor Initialisierung: Biquad, Delay, Weight skalieren und in Struct schreiben - sig_init_preemph_coef(cSensorSignal, b_c[0], b_c[1], b_c[2], b_c[3], b_c[4], scale_bits); - sig_init_delay(cSensorSignal, delay_c); - sig_init_weight(cSensorSignal, weight_c, scale_bits); + sig_init_preemph_coef(c_sensor_signal_t, b_c[0], b_c[1], b_c[2], b_c[3], b_c[4], scale_bits); + sig_init_delay(c_sensor_signal_t, delay_c); + sig_init_weight(c_sensor_signal_t, weight_c, scale_bits); // Acc-Sensor Initialisierung: Biquad, Delay, Weight skalieren und in Struct schreiben - sig_init_preemph_coef(accSensorSignal, b_acc[0], b_acc[1], b_acc[2], b_acc[3], b_acc[4], scale_bits); - sig_init_delay(accSensorSignal, delay_acc); - sig_init_weight(accSensorSignal, weight_acc, 31); + sig_init_preemph_coef(acc_sensor_signal_t, b_acc[0], b_acc[1], b_acc[2], b_acc[3], b_acc[4], scale_bits); + sig_init_delay(acc_sensor_signal_t, delay_acc); + sig_init_weight(acc_sensor_signal_t, weight_acc, 31); //Mu Skalierung und in globale Variable schreiben int scale = pow(2, scale_bits) - 1; mu = lms_mu * scale; // Buffer Initialisierung (Delay Line und Koeffizienten) - sig_init_buffer_DMB(&ptr_fir_lms_delay_line, fir_lms_delay_line, lms_fir_num_coeffs, MAX_FIR_COEFFS); - sig_init_buffer(&ptr_fir_lms_coeffs, fir_lms_coeffs, lms_fir_num_coeffs, MAX_FIR_COEFFS); + initialize_buffer_dmb(&pointer_delay_line, delay_line, number_coefficients, MAX_FIR_COEFFS); + initialize_buffer(&pointer_filter_coefficients, filter_coefficients, number_coefficients, MAX_FIR_COEFFS); // Einträge in Delay Line und Koeffizienten-Array auf 0 setzen - for (int i = 0; i < lms_fir_num_coeffs; i++) { - ptr_fir_lms_delay_line.ptr_start[i] = 0; - ptr_fir_lms_coeffs.ptr_start[i] = 0; + for (int i = 0; i < number_coefficients; i++) { + pointer_delay_line.ptr_start[i] = 0; + pointer_filter_coefficients.ptr_start[i] = 0; } } -// Data d(cSensor) is signal + noise -// x (accSensor) is reference noise signal +// C-Sensor (d) = Corrupted Signal (Desired Signal + Corruption Noise Signal) +// Acc-Sensor (x) = Reference Noise Signal void calc( - SingleSignalPath *cSensorSignal, - SingleSignalPath *accSensorSignal, - OutputMode output_mode, - int16_t volatile chess_storage(DMB) *cSensor, //Pointer auf Input-Port im Shared Memory - int16_t volatile chess_storage(DMB) *accSensor, //Pointer auf Input-Port im Shared Memory - int16_t volatile chess_storage(DMB) *out_16 //Pointer auf Output-Port im Shared Memory + SingleSignalPath *c_sensor_signal_t, + SingleSignalPath *acc_sensor_signal_t, + int16_t volatile chess_storage(DMB) *c_sensor_input, //Pointer auf Input-Port im Shared Memory + int16_t volatile chess_storage(DMB) *acc_sensor_input, //Pointer auf Input-Port im Shared Memory + int16_t volatile chess_storage(DMB) *output_port //Pointer auf Output-Port im Shared Memory ){ //Speicherbereiche anlegen -> bei blockweiser Verarbeitung hat jedes Array nur den Eintrag [0] - static int chess_storage(DMA) c_block_pre[BLOCK_LEN]; //Speicherbereich für C-Sensor Preemphasis Input - static int chess_storage(DMA) acc_block_pre[BLOCK_LEN]; //Speicherbereich für Acc-Sensor Preemphasis Input - static int chess_storage(DMA) cSensor_32[BLOCK_LEN]; //Speicherbereich für 32-Bit C-Sensor Input - static int chess_storage(DMA) accSensor_32[BLOCK_LEN]; //Speicherbereich für 32-Bit Acc-Sensor Input + static int chess_storage(DMA) c_sensor_32[BLOCK_LEN]; //Speicherbereich für 32-Bit C-Sensor Input + static int chess_storage(DMA) acc_sensor_32[BLOCK_LEN]; //Speicherbereich für 32-Bit Acc-Sensor Input + static int chess_storage(DMA) c_sensor_pre[BLOCK_LEN]; //Speicherbereich für C-Sensor Preemphasis Input + static int chess_storage(DMA) acc_sensor_pre[BLOCK_LEN]; //Speicherbereich für Acc-Sensor Preemphasis Input - static int chess_storage(DMB) acc_block_filt[BLOCK_LEN]; //Speicherbereich für Akkumulator Output des adaptiven Filters - static int chess_storage(DMB) out_32[BLOCK_LEN]; //Speicherbereich für 32-Bit Output Signal + static int chess_storage(DMB) filter_accumulator[BLOCK_LEN]; //Speicherbereich für Akkumulator Output des adaptiven Filters + static int chess_storage(DMB) output_32[BLOCK_LEN]; //Speicherbereich für 32-Bit Output Signal - // Pointer auf die Arrays anlegen - static int chess_storage(DMA) *p_c_block_pre =c_block_pre; - static int chess_storage(DMA) *p_acc_block_filt =acc_block_pre; - static int chess_storage(DMB) *p_out_32=out_32; + // Pointer auf Sample-Speicherbereiche legen - wird nicht benötigt, wenn allgemeine allgemein Arrays für Blockverarbeitung verwendet werden (Array -> automatisch Pointer) + // static int chess_storage(DMA) *pointer_c_sensor_pre =c_sensor_pre; + // static int chess_storage(DMA) *pointer_filter_accumulator =acc_sensor_pre; + // static int chess_storage(DMB) *pointer_output_32=output_32; // 16-Bit Eingangssignale auf 32-Bit konvertieren mit Bitshift, in neuem Speicherbereich ablegen for (uint32_t i=0; i Delay Line hat Länge der Filterkoeffizienten - sig_cirular_buffer_ptr_put_sample_DMB(&ptr_fir_lms_delay_line, acc_block_pre[0]); + write_buffer_dmb(&pointer_delay_line, acc_sensor_pre[0]); // Filter auf Acc-Sensor Signal anwenden und Korrektursignal berechnen // Sample des Acc-Sensors in der Delay-Line werden mit den Filterkoeffizienten multipliziert und aufsummiert -> Akkumulator Output des adaptiven Filters - acc_block_filt[0]= sig_calc_fir_lpdsp32_single(&ptr_fir_lms_delay_line, &ptr_fir_lms_coeffs); + filter_accumulator[0] = apply_fir_filter(&pointer_delay_line, &pointer_filter_coefficients); // Output-Signal berechnen -> C-Sensor Sample - Akkumulator Output des adaptiven Filters - out_32[0] = c_block_pre[0] - acc_block_filt[0]; + output_32[0] = c_sensor_pre[0] - filter_accumulator[0]; // Filterkoeffizienten adaptieren - adapt_coeffs_lpdsp32_single_v1(&ptr_fir_lms_delay_line, &ptr_fir_lms_coeffs, out_32[0]); + update_filter_coefficients(&pointer_delay_line, &pointer_filter_coefficients, output_32[0]); // Bitshift zurück auf 16-Bit und in Ausgangsarray schreiben for (uint32_t i=0; i> BITSHIFT_16_TO_32); // 12 cycles for blocksize 4 //TODO: use rnd_saturate(out_32[i] >> input_nbit_bitshift) + output_port[i] = rnd_saturate(to_accum(output_32[i]) >> BITSHIFT_16_TO_32); } }