Files
DSP_Simulation/simulation/Release/chesswork/signal_path-d74ce2.sfg
2026-01-27 16:38:58 +01:00

370 lines
16 KiB
Plaintext

// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
// Copyright 2014-2025 Synopsys, Inc. All rights reserved.
// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
/***
!! void sig_init_weight(SingleSignalPath *, double, int)
F_Z15sig_init_weightP16SingleSignalPathdi : user_defined, called {
fnm : "sig_init_weight" 'void sig_init_weight(SingleSignalPath *, double, int)';
arg : ( dmaddr_:i dmaddr_:i int64_:i int32_:i );
loc : ( LR[0] A[0] AX[0] RA[0] );
vac : ( srIM[0] );
frm : ( );
}
****
!! extern double ff_pow(double, double)
Fff_pow : user_defined, called {
fnm : "ff_pow" 'double ff_pow(double, double)';
arg : ( dmaddr_:i int64_:r int64_:i int64_:i );
loc : ( LR[0] AX[0] AX[1] BX[0] );
vac : ( srIM[0] );
llv : 0 1 0 0 0 ;
}
!! int float64_eq(float64, float64)
F_Z10float64_eqyy : user_defined, called {
fnm : "float64_eq" 'int float64_eq(float64, float64)';
arg : ( dmaddr_:i int32_:r int64_:i int64_:i );
loc : ( LR[0] RA[0] AX[0] AX[1] );
vac : ( srIM[0] );
llv : 0 0 0 0 0 ;
}
!! float64 int32_to_float64(int)
F_Z16int32_to_float64i : user_defined, called {
fnm : "int32_to_float64" 'float64 int32_to_float64(int)';
arg : ( dmaddr_:i int64_:r int32_:i );
loc : ( LR[0] AX[0] RA[0] );
vac : ( srIM[0] );
llv : 0 0 0 0 0 ;
}
!! float64 float64_sub(float64, float64)
F_Z11float64_subyy : user_defined, called {
fnm : "float64_sub" 'float64 float64_sub(float64, float64)';
arg : ( dmaddr_:i int64_:r int64_:i int64_:i );
loc : ( LR[0] AX[0] AX[1] BX[0] );
vac : ( srIM[0] );
llv : 0 0 0 0 0 ;
}
!! int float64_to_int32_round_to_zero(float64)
F_Z30float64_to_int32_round_to_zeroy : user_defined, called {
fnm : "float64_to_int32_round_to_zero" 'int float64_to_int32_round_to_zero(float64)';
arg : ( dmaddr_:i int32_:r int64_:i );
loc : ( LR[0] RA[0] AX[0] );
vac : ( srIM[0] );
llv : 0 0 0 0 0 ;
}
!! float64 float64_mul(float64, float64)
F_Z11float64_mulyy : user_defined, called {
fnm : "float64_mul" 'float64 float64_mul(float64, float64)';
arg : ( dmaddr_:i int64_:r int64_:i int64_:i );
loc : ( LR[0] AX[0] AX[1] BX[0] );
vac : ( srIM[0] );
llv : 0 0 0 0 0 ;
}
***/
[
0 : _Z15sig_init_weightP16SingleSignalPathdi typ=uint20_ bnd=e stl=PM tref=void_____PSingleSignalPath___fdouble___sint__
11 : __M_WDMA typ=int32_ bnd=d stl=WDMA
26 : __R_SP typ=dmaddr_ bnd=d stl=SP
34 : __sp typ=dmaddr_ bnd=b stl=SP
36 : __extDM_SingleSignalPath_weight_actived typ=int8_ bnd=b stl=DM
38 : __extDM_SingleSignalPath_weight typ=int8_ bnd=b stl=DM
39 : __extDM_SingleSignalPath__weight_scale_nbits typ=int8_ bnd=b stl=DM
40 : __rd___sp typ=dmaddr_ bnd=m
41 : __ct_0 typ=uint1_ val=0f bnd=m
42 : __la typ=dmaddr_ bnd=p tref=dmaddr___
43 : signal typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
44 : weight typ=int64_ bnd=p tref=__fdouble__
45 : scale_nbits typ=int32_ bnd=p tref=__sint__
49 : __tmpb0_F_Z15sig_init_weightP16SingleSignalPathdi typ=int64_ bnd=m lscp=181 tref=__fdouble__
50 : __tmpb2_F_Z15sig_init_weightP16SingleSignalPathdi typ=int64_ bnd=m lscp=181 tref=__fdouble__
52 : scale typ=int32_ bnd=m lscp=181 tref=__sint__
53 : __ct_4607182418800017408 typ=int64_ val=4607182418800017408f bnd=m
56 : __ct_0 typ=int32_ val=0f bnd=m
61 : __ct_1 typ=int32_ val=1f bnd=m
67 : __ct_4611686018427387904 typ=int64_ val=4611686018427387904f bnd=m
72 : __tmp typ=int64_ bnd=m
74 : __tmp typ=int64_ bnd=m
75 : __tmp typ=int64_ bnd=m
76 : __tmp typ=int32_ bnd=m
96 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
117 : __tmp typ=int32_ bnd=m
126 : __ct_0S0 typ=int18_ val=0S0 bnd=m
127 : __ct_132 typ=int18_ val=132f bnd=m
130 : __ct_0s0 typ=int18_ val=0s0 bnd=m
131 : __ct_4 typ=int18_ val=4f bnd=m
135 : __tmp typ=bool bnd=m
142 : __a0 typ=int64_ bnd=m tref=__atp0___48
144 : ff_pow typ=dmaddr_ val=0r bnd=m
145 : __link typ=dmaddr_ bnd=m
162 : __a1 typ=int64_ bnd=m tref=__atp1___12
163 : _Z10float64_eqyy typ=dmaddr_ val=0r bnd=m
164 : __link typ=dmaddr_ bnd=m
170 : __tmp typ=uint3_ bnd=m
175 : _Z16int32_to_float64i typ=dmaddr_ val=0r bnd=m
176 : __link typ=dmaddr_ bnd=m
178 : __tmpb2_F_Z15sig_init_weightP16SingleSignalPathdi typ=int64_ bnd=m
180 : __a1 typ=int64_ bnd=m tref=__atp1___9
181 : _Z11float64_subyy typ=dmaddr_ val=0r bnd=m
182 : __link typ=dmaddr_ bnd=m
184 : __tmp typ=int64_ bnd=m
186 : _Z30float64_to_int32_round_to_zeroy typ=dmaddr_ val=0r bnd=m
187 : __link typ=dmaddr_ bnd=m
190 : __tmp typ=int64_ bnd=m
193 : _Z11float64_mulyy typ=dmaddr_ val=0r bnd=m
194 : __link typ=dmaddr_ bnd=m
196 : __tmp typ=int64_ bnd=m
206 : __either typ=bool bnd=m
207 : __trgt typ=int10_ val=0j bnd=m
208 : __trgt typ=int10_ val=0j bnd=m
]
F_Z15sig_init_weightP16SingleSignalPathdi {
#272 off=0
(__R_SP.24 var=26) st_def () <48>;
(__sp.32 var=34) source () <56>;
(__extDM_SingleSignalPath_weight_actived.34 var=36) source () <58>;
(__extDM_SingleSignalPath_weight.36 var=38) source () <60>;
(__extDM_SingleSignalPath__weight_scale_nbits.37 var=39) source () <61>;
(__ct_0.39 var=41) const () <63>;
(__la.41 var=42 stl=LR off=0) inp () <65>;
(__la.42 var=42) deassign (__la.41) <66>;
(signal.44 var=43 stl=A off=0) inp () <68>;
(signal.45 var=43) deassign (signal.44) <69>;
(weight.47 var=44 stl=AX off=0) inp () <71>;
(weight.48 var=44) deassign (weight.47) <72>;
(scale_nbits.50 var=45 stl=RA off=0) inp () <74>;
(scale_nbits.51 var=45) deassign (scale_nbits.50) <75>;
(__rd___sp.53 var=40) rd_res_reg (__R_SP.24 __sp.32) <77>;
(__R_SP.57 var=26 __sp.58 var=34) wr_res_reg (__rt.177 __sp.32) <81>;
(__ct_4607182418800017408.63 var=53) const () <87>;
(__rt.177 var=96) __Pvoid__pl___Pvoid_int18_ (__rd___sp.53 __ct_0S0.284) <249>;
(__ct_0S0.284 var=126) const () <398>;
(_Z10float64_eqyy.329 var=163) const () <485>;
(__link.330 var=164) dmaddr__call_dmaddr_ (_Z10float64_eqyy.329) <486>;
call {
(weight.331 var=44 stl=AX off=0) assign (weight.48) <487>;
(__a1.332 var=162 stl=AX off=1) assign (__ct_4607182418800017408.63) <488>;
(__link.333 var=164 stl=LR off=0) assign (__link.330) <489>;
(__tmp.334 var=117 stl=RA off=0) F_Z10float64_eqyy (__link.333 weight.331 __a1.332) <490>;
(__tmp.335 var=117) deassign (__tmp.334) <491>;
} #273 off=1
#269 off=2
(__ct_0.85 var=56) const () <110>;
(__rt.205 var=96) __Pvoid__pl___Pvoid_int18_ (signal.45 __ct_132.285) <286>;
(__ct_132.285 var=127) const () <400>;
(__tmp.339 var=170) uint3__cmp_int72__int72_ (__tmp.335 __ct_0.85) <498>;
(__tmp.344 var=135) bool_nequal_uint3_ (__tmp.339) <518>;
(__trgt.403 var=207) const () <646>;
() void_jump_bool_int10_ (__tmp.344 __trgt.403) <647>;
(__either.404 var=206) undefined () <648>;
if {
{
() if_expr (__either.404) <109>;
} #5
{
(__M_WDMA.90 var=11 __extDM_SingleSignalPath_weight_actived.91 var=36) store (__ct_0.85 __rt.205 __extDM_SingleSignalPath_weight_actived.34) <115>;
} #6 off=18
{
#285 off=3
(__ct_1.92 var=61) const () <116>;
(__M_WDMA.97 var=11 __extDM_SingleSignalPath_weight_actived.98 var=36) store (__ct_1.92 __rt.205 __extDM_SingleSignalPath_weight_actived.34) <121>;
(__rt.249 var=96) __Pvoid__pl___Pvoid_int18_ (__rt.205 __ct_4.289) <342>;
(__ct_4.289 var=131) const () <408>;
(_Z16int32_to_float64i.346 var=175) const () <521>;
(__link.347 var=176) dmaddr__call_dmaddr_ (_Z16int32_to_float64i.346) <522>;
call {
(scale_nbits.348 var=45 stl=RA off=0) assign (scale_nbits.51) <523>;
(__link.349 var=176 stl=LR off=0) assign (__link.347) <524>;
(__tmpb2_F_Z15sig_init_weightP16SingleSignalPathdi.350 var=178 stl=AX off=0) F_Z16int32_to_float64i (__link.349 scale_nbits.348) <525>;
(__tmpb2_F_Z15sig_init_weightP16SingleSignalPathdi.351 var=50) deassign (__tmpb2_F_Z15sig_init_weightP16SingleSignalPathdi.350) <526>;
} #286 off=4
#282 off=5
(__ct_4611686018427387904.104 var=67) const () <127>;
(ff_pow.302 var=144) const () <440>;
(__link.303 var=145) dmaddr__call_dmaddr_ (ff_pow.302) <441>;
call {
(__a0.304 var=142 stl=AX off=1) assign (__ct_4611686018427387904.104) <442>;
(__tmpb2_F_Z15sig_init_weightP16SingleSignalPathdi.305 var=50 stl=BX off=0) assign (__tmpb2_F_Z15sig_init_weightP16SingleSignalPathdi.351) <443>;
(__link.306 var=145 stl=LR off=0) assign (__link.303) <444>;
(__tmpb0_F_Z15sig_init_weightP16SingleSignalPathdi.307 var=49 stl=AX off=0) Fff_pow (__link.306 __a0.304 __tmpb2_F_Z15sig_init_weightP16SingleSignalPathdi.305) <445>;
(__tmpb0_F_Z15sig_init_weightP16SingleSignalPathdi.308 var=49) deassign (__tmpb0_F_Z15sig_init_weightP16SingleSignalPathdi.307) <446>;
} #248 off=6
#299 off=7
(_Z11float64_subyy.355 var=181) const () <533>;
(__link.356 var=182) dmaddr__call_dmaddr_ (_Z11float64_subyy.355) <534>;
call {
(__tmpb0_F_Z15sig_init_weightP16SingleSignalPathdi.357 var=49 stl=AX off=1) assign (__tmpb0_F_Z15sig_init_weightP16SingleSignalPathdi.308) <535>;
(__a1.358 var=180 stl=BX off=0) assign (__ct_4607182418800017408.63) <536>;
(__link.359 var=182 stl=LR off=0) assign (__link.356) <537>;
(__tmp.360 var=184 stl=AX off=0) F_Z11float64_subyy (__link.359 __tmpb0_F_Z15sig_init_weightP16SingleSignalPathdi.357 __a1.358) <538>;
(__tmp.361 var=72) deassign (__tmp.360) <539>;
} #300 off=8
#305 off=9
(_Z30float64_to_int32_round_to_zeroy.364 var=186) const () <545>;
(__link.365 var=187) dmaddr__call_dmaddr_ (_Z30float64_to_int32_round_to_zeroy.364) <546>;
call {
(__tmp.366 var=72 stl=AX off=0) assign (__tmp.361) <547>;
(__link.367 var=187 stl=LR off=0) assign (__link.365) <548>;
(scale.368 var=52 stl=RA off=0) F_Z30float64_to_int32_round_to_zeroy (__link.367 __tmp.366) <549>;
(scale.369 var=52) deassign (scale.368) <550>;
} #306 off=10
#311 off=11
(__link.373 var=176) dmaddr__call_dmaddr_ (_Z16int32_to_float64i.346) <557>;
call {
(scale.374 var=52 stl=RA off=0) assign (scale.369) <558>;
(__link.375 var=176 stl=LR off=0) assign (__link.373) <559>;
(__tmp.376 var=190 stl=AX off=0) F_Z16int32_to_float64i (__link.375 scale.374) <560>;
(__tmp.377 var=74) deassign (__tmp.376) <561>;
} #312 off=12
#317 off=13
(_Z11float64_mulyy.381 var=193) const () <568>;
(__link.382 var=194) dmaddr__call_dmaddr_ (_Z11float64_mulyy.381) <569>;
call {
(weight.383 var=44 stl=AX off=1) assign (weight.48) <570>;
(__tmp.384 var=74 stl=BX off=0) assign (__tmp.377) <571>;
(__link.385 var=194 stl=LR off=0) assign (__link.382) <572>;
(__tmp.386 var=196 stl=AX off=0) F_Z11float64_mulyy (__link.385 weight.383 __tmp.384) <573>;
(__tmp.387 var=75) deassign (__tmp.386) <574>;
} #318 off=14
#323 off=15
(__link.391 var=187) dmaddr__call_dmaddr_ (_Z30float64_to_int32_round_to_zeroy.364) <581>;
call {
(__tmp.392 var=75 stl=AX off=0) assign (__tmp.387) <582>;
(__link.393 var=187 stl=LR off=0) assign (__link.391) <583>;
(__tmp.394 var=76 stl=RA off=0) F_Z30float64_to_int32_round_to_zeroy (__link.393 __tmp.392) <584>;
(__tmp.395 var=76) deassign (__tmp.394) <585>;
} #324 off=16
#296 off=17
(__M_WDMA.117 var=11 __extDM_SingleSignalPath_weight.118 var=38) store (__tmp.395 __rt.249 __extDM_SingleSignalPath_weight.36) <140>;
(__M_WDMA.122 var=11 __extDM_SingleSignalPath__weight_scale_nbits.123 var=39) store (scale_nbits.51 __rt.271 __extDM_SingleSignalPath__weight_scale_nbits.37) <144>;
(__rt.271 var=96) __Pvoid__pl___Pvoid_int18_ (__rt.249 __ct_4.289) <370>;
(__trgt.405 var=208) const () <649>;
() void_jump_int10_ (__trgt.405) <650>;
} #181
{
(__extDM_SingleSignalPath_weight_actived.124 var=36) merge (__extDM_SingleSignalPath_weight_actived.91 __extDM_SingleSignalPath_weight_actived.98) <145>;
(__extDM_SingleSignalPath_weight.125 var=38) merge (__extDM_SingleSignalPath_weight.36 __extDM_SingleSignalPath_weight.118) <146>;
(__extDM_SingleSignalPath__weight_scale_nbits.126 var=39) merge (__extDM_SingleSignalPath__weight_scale_nbits.37 __extDM_SingleSignalPath__weight_scale_nbits.123) <147>;
} #8
} #4
#10 off=19 nxt=-2
(__rd___sp.131 var=40) rd_res_reg (__R_SP.24 __sp.58) <152>;
(__R_SP.135 var=26 __sp.136 var=34) wr_res_reg (__rt.227 __sp.58) <156>;
() void_ret_dmaddr_ (__la.42) <157>;
() sink (__sp.136) <163>;
() sink (__extDM_SingleSignalPath_weight_actived.124) <165>;
() sink (__extDM_SingleSignalPath_weight.125) <167>;
() sink (__extDM_SingleSignalPath__weight_scale_nbits.126) <168>;
() sink (__ct_0.39) <169>;
(__rt.227 var=96) __Pvoid__pl___Pvoid_int18_ (__rd___sp.131 __ct_0s0.288) <314>;
(__ct_0s0.288 var=130) const () <406>;
} #0
0 : 'signal_processing\\signal_path.c';
----------
0 : (0,164:0,0);
4 : (0,166:4,1);
6 : (0,166:22,2);
10 : (0,176:0,22);
181 : (0,174:14,18);
248 : (0,172:20,13);
269 : (0,166:15,1);
272 : (0,166:15,1);
273 : (0,166:15,1);
282 : (0,172:20,13);
285 : (0,172:25,10);
286 : (0,172:25,10);
296 : (0,174:14,18);
299 : (0,172:40,16);
300 : (0,172:40,16);
305 : (0,172:40,16);
306 : (0,172:40,16);
311 : (0,173:32,17);
312 : (0,173:32,17);
317 : (0,173:32,17);
318 : (0,173:32,17);
323 : (0,173:23,17);
324 : (0,173:23,17);
----------
77 : (0,164:5,0);
81 : (0,164:5,0);
87 : (0,166:18,0);
109 : (0,166:4,1);
110 : (0,167:33,0);
115 : (0,167:14,2);
116 : (0,171:33,0);
121 : (0,171:14,5);
127 : (0,172:20,0);
140 : (0,173:14,17);
144 : (0,174:14,18);
145 : (0,166:4,21);
146 : (0,166:4,21);
147 : (0,166:4,21);
152 : (0,176:0,0);
156 : (0,176:0,22);
157 : (0,176:0,22);
249 : (0,164:5,0);
286 : (0,167:14,2);
314 : (0,176:0,0);
342 : (0,173:14,0);
370 : (0,174:14,0);
398 : (0,164:5,0);
400 : (0,167:14,0);
406 : (0,176:0,0);
408 : (0,173:14,0);
440 : (0,172:20,0);
441 : (0,172:20,13);
442 : (0,172:20,13);
443 : (0,172:20,13);
444 : (0,172:20,13);
445 : (0,172:20,13);
446 : (0,172:20,13);
485 : (0,166:15,0);
486 : (0,166:15,1);
487 : (0,166:15,1);
488 : (0,166:15,1);
489 : (0,166:15,1);
490 : (0,166:15,1);
491 : (0,166:15,1);
498 : (0,166:15,1);
518 : (0,166:15,1);
521 : (0,172:25,0);
522 : (0,172:25,10);
523 : (0,172:25,10);
524 : (0,172:25,10);
525 : (0,172:25,10);
526 : (0,172:25,10);
533 : (0,172:40,0);
534 : (0,172:40,16);
535 : (0,172:40,16);
536 : (0,172:40,16);
537 : (0,172:40,16);
538 : (0,172:40,16);
539 : (0,172:40,16);
545 : (0,172:40,0);
546 : (0,172:40,16);
547 : (0,172:40,16);
548 : (0,172:40,16);
549 : (0,172:40,16);
550 : (0,172:40,16);
557 : (0,173:32,17);
558 : (0,173:32,17);
559 : (0,173:32,17);
560 : (0,173:32,17);
561 : (0,173:32,17);
568 : (0,173:32,0);
569 : (0,173:32,17);
570 : (0,173:32,17);
571 : (0,173:32,17);
572 : (0,173:32,17);
573 : (0,173:32,17);
574 : (0,173:32,17);
581 : (0,173:23,17);
582 : (0,173:23,17);
583 : (0,173:23,17);
584 : (0,173:23,17);
585 : (0,173:23,17);
647 : (0,166:4,1);