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\section{Introduction}
\subsection{Motivation}
According to the \ac{WHO}, around 1.6 billion people over 14 years worldwide suffer from any kind of hearing loss. Included in this 1.6 billion people, around 430 million suffer from disabling hearing loss (up to deafness), requiring rehabilitation. In the case of disabling hearing loss, the possibility of using an implant system solution has revolutionized auditory rehabilitation by restoring partial hearing. Despite steady progress in implant technology over the past decades, the system still faces its limitations. Complex auditory environments, like static noises overlain by a person speaking, can still propose a considerable challenge for users of auditory implants compared to people with a healthy hearing. \\ \\
Therefore, the improvement of implant performance in regard to the suppression of disturbance noises is therefore a crucial step in the development of more user-friendly implant solutions which provide users with more natural sound perception and greater listening comfort.
\\ \\
By addressing these challenges, this work aims to contribute to the next generation of cochlear implant technology, ultimately enhancing the auditory experience and quality of life for people with severe hearing impairments.
Therefore, the improvement of implant performance in regard to the suppression of disturbance noises is therefore a crucial step in the development of more user-friendly implant solutions which provide users with more natural sound perception and greater listening comfort.\\ \\
By addressing these challenges, this thesis aims to contribute to the next generation of cochlear implant technology, ultimately enhancing the auditory experience and quality of life for people with severe hearing impairments.
\subsection{Introduction to cochlear implant systems}
A \ac{CI} System is a specialized form of hearing aid, used to restore partly or complete deafness. In contrary to standard hearing aids, \ac{CI}'s do not just amplify the audio signal received by the ear, but stimulate the auditory nerve itself directly through electric pulses.\\ \\
Usually, a \ac{CI} system consists out of an external processor with a microphone (``audio processor'') receiving the ambient audio signal, processing it, and then transmitting it inductively via a transmission coil through the skin to the cochlear implant itself, implanted on the patient's skull (see Figure \ref{fig:fig_synchrony}). The \ac{CI} stimulates the auditory nerves inside the cochlear through charge pulses, thus enabling the patient to hear the received audio signal as sound.\\
@@ -25,5 +24,5 @@ Usually, a \ac{CI} system consists out of an external processor with a microphon
The above problem description of noise interference shows the need of further improvement of \ac{CI} systems in this regard. For persons with a healthy hearing sense, the addition of noise to an observed signal may just mean a decrease in hearing comfort, whereas for aurally impaired people it can make the difference in the basic understanding of information. As everyday environments present fluctuating background noise - from static crowd chatter to sudden sounds of different characteristics — that can severely degrade speech perception, the ability to suppress noise is a crucial benefit for users of cochlear implant systems. \\ \\
Adaptive Noise Reduction (\ac{ANR}) (also commonly referred as \ac{ANC}), is an advanced signal processing technique that adjusts the parameters of a digital filter to suppress unwanted noise from a signal while preserving the desired target signal. In contrary to static filters (like a high- or low-pass filter), \ac{ANR} uses real-time feedback to adjust said digital filter to adapt to the current circumstances.\\ \\
The challenge in the implementation of \ac{ANR} in \ac{CI} systems lies in the limited capacities. As the \ac{CI} system is powered by a small battery located in the audio processor, energy efficiency is crucial for a possible solution of the described problem of noise interference. Any approach to a reduction of interference noise must be highly optimized with regard to computing power and implemented on dedicated low-power hardware, being able to be powered within the limitations of a \ac{CI} system.\\ \\
The main solution concept of this thesis is the optimization of the adaptive filter of the \ac{ANR} algorithm in combination with the used low-power hardware. Its goal is, to deliver the best possible result in interference noise reduction while still being able to be powered by the limited resources of a \ac{CI} system. Different variants, like the fully adaptive filter, the hybrid static/adaptive filter and different optimization approaches of the latter one are low-level simulated on the dedicated digital signal processor. Especially, the different optimization strategies of the hybrid static/adaptive filter algorithm shall be evaluated and compared in regard of their required computing power, and therefore, their required power consumption. Depending on the kind of interference noise, the frequency and the intensity, a promising optimization approach is the reduction of adaptation steps per sample while still maintaining an adequate quality of the filtered audio signal.\\ \\
Due to the fact, that the \ac{CI} system is powered by a battery with a relatively small capacity, the firmware is required to work with the least power possible. Therefore, optimization in regard to a minimization of needed processor clocks is aimed for.
The main solution concept of this thesis is the optimization of the adaptive filter of the \ac{ANR} algorithm in combination with the used low-power hardware. Its goal is, to deliver the best possible result in interference noise reduction while still being able to be powered by the limited resources of a \ac{CI} system. Different optimization strategies of the adaptive filter algorithm shall be evaluated and compared in regard of their performance and their required computing power.\\ \\
Due to the fact, that the \ac{CI} system is powered by a battery with a relatively small capacity, the firmware is required to work with the least power possible, while maintaining the required performance. Therefore, optimization in regard to a minimization of needed processor clocks is aimed for.
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The following subchapters shall supply the reader with the theoretical foundation of digital signal processing to better understand the following implementation of \ac{ANR} on a low-power signal processor.\\ \\
The chapter begins with the description of signals, the problem of them interfering and the basics of digital signal processing in general, covering fundamental topics like signal representation, transfer functions and filters.\\
Filters are used in various functional designs, therefore a short explanation into the concepts of Finite Impulse Response- and Infinite Impulse Response filters is indispensable.\\
At this point an introduction into adaptive noise reduction follows, including a short overview of the most important steps in history, the general concept of \ac{ANR}, its design possibilities and its optimization possibilities in regard of error calculation.\\
At this point an introduction into \ac{ANR} follows, including a short overview of the most important steps in history, the general concept of \ac{ANR}, its design possibilities and its optimization possibilities in regard of error calculation.\\
With this knowledge covered, a realistic signal flow diagram of an implanted \ac{CI} system with corresponding transfer functions is designed, essential to implement \ac{ANR} on a low-power digital signal processor.\\
At the end of chapter two, high-level Python simulations shall function as a practical demonstration of the recently presented theoretical background.\\ \\
At the end of chapter two, high-level Python simulations shall function as a feasibility demonstration of the recently presented theoretical background.\\ \\
Throughout this thesis, sampled signals are denoted in lowercase with square brackets (e.g. {x[n]}) to distinguish them from time-continuous signals (e.g. {x(t)}). Vectors are notated in lowercase bold font, whereas matrix are notated in uppercase bold font. Scalars are notated in normal lowercase font.\\
\subsection{Signals and signal interference}
A signal is a physical parameter (e.g. pressure, voltage) changing its value over time. Whereas in nature, a signal is always analog, meaning continuous in both time and amplitude, a digital signal is represented in a discrete form, being sampled at specific time intervals and quantized to finite amplitude levels.\\ \\
@@ -15,7 +15,7 @@ The term "signal interference" describes the overlapping of unwanted signals or
\caption{Noisy signal containing different frequencies and cleaned signal. \cite{source_dsp_ch1}}
\label{fig:fig_interference}
\end{figure}
\noindent In cochlear implant systems, speech signals must be reconstructed with high spectral precision to ensure intelligibility for the user. As signal interference can cause considerable degradation to the quality of said final audio signal, the objective of this thesis shall be the improvement of implant technology in regard of adaptive noise reduction.
\noindent In cochlear implant systems, speech signals must be reconstructed with high spectral precision to ensure intelligibility for the user. As signal interference can cause considerable degradation to the quality of said final audio signal, the objective of this thesis is the improvement of implant technology in regard of adaptive noise reduction.
\subsection{Fundamentals of digital signal processing}
Digital signal processing describes the manipulation of digital signals on a \ac{DSP} through mathematical approaches. Analog signals have to be digitalized before being able to be handled by a \ac{DSP}.
\subsubsection{Signal conversion and representation}
@@ -64,7 +64,7 @@ During the description of transfer functions, the term ``filter'' was used but n
\label{fig:fig_lowpass}
\end{figure}
\subsection{Filter designs}
Before we continue with the introduction to the actual topic of this thesis, adaptive noise reduction, two very essential filter designs need further explanation - the Finite Impulse Response- and Infinite Impulse Response filter.
Before we continue with the introduction to the actual topic of this thesis, \ac{ANR}, two very essential filter designs need further explanation - the Finite Impulse Response- and Infinite Impulse Response filter.
\subsubsection{Finite Impulse Response filters}
A \ac{FIR} filter, commonly referred to as a ``Feedforward Filter'' is defined through the property, that it uses only input values and not feedback from output samples to determine its filtering behavior - therefore, if the input signal is reduced to zero, the response of a \ac{FIR} filter reaches zero after a finite number of samples.\\ \\
Equation \ref{equation_fir} specifies the input-output relationship of a \ac{FIR} filter - $x[n]$ is the input sample, $y[n]$ is output sample, and $b_0$ to $b_M$ the filter coefficients and M the length of the filter
@@ -102,7 +102,7 @@ A higher number of needed coefficients implies, that the filter itself needs mor
\subsection{Introduction to Adaptive Noise Reduction}
\subsubsection{History}
The necessity for the use of electric filters arose the first time in the beginnings of the 20th century with the development of the quite young fields of tele- and radio-communication. At his time, engineers used static filters, like low- or highpass filters, to improve transmission quality - this fundamental techniques allowed limiting the frequency spectrum, by cutting out certain frequencies like high-pitched noises or humming. From this time on, the development of new filter designs accelerated, for example with the soon-to-be developed LC-filter by Otto Zobel, an American scientist working at the telecommunication company AT\&T. Until then, the used filters were static, meaning they didn't change their behavior over time.\\ \\
In the 1930s, the first real concept of active noise cancellation was proposed by the German Physician Paul Lueg. Lueg patented the idea of two speakers emitting antiphase signals which cancel each other out. Though his patent was granted in 1936, back at the time, there was no technical possibility detect and process audio signals in a way, to make his noise cancellation actually work in a technical environment.\\ \\
In the 1930s, the first real concept of \ac{ANC} was proposed by the German Physician Paul Lueg. Lueg patented the idea of two speakers emitting antiphase signals which cancel each other out. Though his patent was granted in 1936, back at the time, there was no technical possibility detect and process audio signals in a way, to make his noise cancellation actually work in a technical environment.\\ \\
20 years after Lueg's patent, Lawrence Fogel patented a practical concept of noise cancellation, intended for noise suppression in aviation - this time, the technical circumstances of the 1950s enabled the development of an aviation headset, lowering the overall noise experienced by pilots in the cockpit of a helicopter or an airplane by emitting a 180 degree phase shifted signal of the recorded background noise of the cockpit into the pilots' headset. (see Figure \ref{fig:fig_patent}).
\begin{figure}[H]
\centering
@@ -110,11 +110,11 @@ In the 1930s, the first real concept of active noise cancellation was proposed b
\caption{Reconstruction of Lawrence Fogel´s patent in 1960. \cite{source_patent}}
\label{fig:fig_patent}
\end{figure}
\noindent In contrary to the static filters in the beginning of the century, the active noise cancellation of Lueg and Widrow was far more advanced than just reducing a signal by a specific frequency portion like with the use of static filters, yet this technique still has their limitations as it is designed only to work within to a certain environment.\\ \\
With the rapid advancement of digital signal processing technologies, noise cancellation techniques evolved from static, hardware-based filters and physical soundwave cancellation towards more sophisticated approaches. In the then 1970s, the concept of digital adaptive filtering arose, allowing digital filters to adjust their parameters in real-time based on the characteristics of the incoming signal and noise. This marked a significant leap forward, as it enabled systems to deal with dynamic and unpredictable noise environments - the concept of adaptive noise reduction was born.
\noindent In contrary to the static filters in the beginning of the century, the \ac{ANC} approach of Lueg and Widrow was far more advanced than just reducing a signal by a specific frequency portion like with the use of static filters, yet this technique still has their limitations as it is designed only to work within to a certain environment.\\ \\
With the rapid advancement of digital signal processing technologies, noise cancellation techniques evolved from static, hardware-based filters and physical soundwave cancellation towards more sophisticated approaches. In the then 1970s, the concept of digital adaptive filtering arose, allowing digital filters to adjust their parameters in real-time based on the characteristics of the incoming signal and noise. This marked a significant leap forward, as it enabled systems to deal with dynamic and unpredictable noise environments - the concept of adaptive noise reduction was born.
\subsubsection{The concept of adaptive filtering}
Adaptive noise reduction describes an advanced filtering method based on an error-metric and represents a significant advancement over these earlier methods by allowing the filter parameters to continuously adapt to the changing acoustic environment in real-time. This adaptability makes \ac{ANR} particularly suitable for hearing devices, where environmental noise characteristics vary constantly.\\ \\
Static filters, like low- and high-pass filters, as described in the previous chapter feature coefficients that remain constant over time. They are designed for known, predictable noise conditions (e.g., removing a steady 50 Hz hum). While these filters are efficient and easy to implement, they fail to function when noise characteristics change dynamically.\\ \\
Static filters, like low- and high-pass filters, as described in the previous subchapter, feature coefficients that remain constant over time. They are designed for known, predictable noise conditions (e.g., removing a steady 50 Hz hum). While these filters are efficient and easy to implement, they fail to function when noise characteristics change dynamically.\\ \\
Although active noise cancellation and adaptive noise reduction share obvious similarities, they differ fundamentally in their application and signal structure. While active noise cancellation aims to physically cancel noise in the acoustic domain — typically before, or at the time, the signal reaches the ear — \ac{ANR} operates within the signal processing chain, attempting to extract the noisy component from the digital signal. In cochlear implant systems, the latter is more practical because the acoustic waveform is converted into electrical stimulation signals; thus, signal-domain filtering is the only feasible approach.
\begin{figure}[H]
\centering
@@ -122,7 +122,7 @@ Although active noise cancellation and adaptive noise reduction share obvious si
\caption{The basic idea of an adaptive filter design for noise reduction.}
\label{fig:fig_anr}
\end{figure}
\noindent Figure \ref{fig:fig_anr} shows the basic concept of an adaptive filter design, represented through a feedback filter application. The primary sensor (top) aims to receive the desired signal and outputs the corrupted signal $d[n]$, which consists out of the desired signal $s[n]$ and the corruption noise signal $n[n]$ after passing the transfer function of the sensor, whereas the secondary signal sensor aims to receive (ideally) only the noise signal and outputs the reference noise signal $x[n]$ after also passing the respective transfer function, which then feeds the adaptive filter. We assume at this point, that the corruption noise signal is uncorrelated to the desired signal, and therefore separable from it. In addition, we assume, that the corruption noise signal is correlated to the reference noise signal, as it originates from the same source, but takes a different signal path. \\ \\ The adaptive filter removes a certain, noise-related, frequency part of the input signal and re-evaluates the output through its feedback design. The filter parameters are then adjusted and applied to the next sample to minimize the observed error $e[n]$, which also represents the approximated desired signal $š[n]$. In reality, a signal contamination of the two sensors has to be expected, which will be illustrated in a more realistic signal flow diagram of an implanted \ac{CI} system in chapter 2.6.
\noindent Figure \ref{fig:fig_anr} shows the basic concept of an adaptive filter design, represented through a feedback filter application. The primary sensor (top) aims to receive the desired signal and outputs the corrupted signal $d[n]$, which consists out of the desired signal $s[n]$ and the corruption noise signal $n[n]$ after passing the transfer function of the sensor, whereas the secondary signal sensor aims to receive (ideally) only the noise signal and outputs the reference noise signal $x[n]$ after also passing the respective transfer function, which then feeds the adaptive filter. We assume at this point, that the corruption noise signal is uncorrelated to the desired signal, and therefore separable from it. In addition, we assume, that the corruption noise signal is correlated to the reference noise signal, as it originates from the same source, but takes a different signal path. \\ \\ The adaptive filter removes a certain, noise-related, frequency part of the input signal and re-evaluates the output through its feedback design. The filter parameters are then adjusted and applied to the next sample to minimize the observed error $e[n]$, which also represents the approximated desired signal $š[n]$.
\subsubsection{Fully adaptive vs. hybrid filter design}
The basic \ac{ANR} concept illustrated in Figure \ref{fig:fig_anr} can be understood as a fully adaptive variant. A fully adaptive filter design works with a fixed number of coefficients of which everyone is updated after every sample processing. Even if this approach features the best performance in noise reduction, it also requires a relatively high amount of computing power, as every coefficient has to be re-calculated after every evaluation step.\\ \\
To reduce the required computing power, a hybrid static/adaptive filter design can be taken into consideration instead (refer to Figure \ref{fig:fig_anr_hybrid}). In this approach, the initial fully adaptive filter is split into a fixed and an adaptive part - the static filter removes a certain, known, or estimated, frequency portion of the noise signal, whereas the adaptive part only has to adapt to the remaining, unforecastable, noise parts. This approach reduces the number of coefficients required to be adapted, therefore lowering the required computing power.
@@ -179,7 +179,7 @@ The Wiener filter aims to adjust its coefficients to generate a filter output, w
If we square the error signal and calculate the expected value, we receive the Mean Squared Error $J$, mentioned in the previous chapter, which is the metric the Wiener filter aims to minimize by adjusting its coefficients $w$.
\begin{equation}
\label{equation_j}
J = E(e[n]^2) = E(d^2[n])-2wE(d[n]x[n])+w^2E(x^2[n]) = MSE
J = E(e[n]^2) = E(d^2[n])-2wE(d[n]x[n])+w^2E(x^2[n]) = \text{MSE}
\end{equation}
The terms contained in Equation \ref{equation_j} can be further be defined as:
\begin{itemize}
@@ -255,9 +255,9 @@ The result of Equation \ref{equation_j_lms_final} can now be inserted into Equat
\label{equation_lms}
w[n+1] = w[n] - 2\mu e[n]x[n]
\end{equation}
The \ac{LMS} algorithm therefore updates the filter coefficients $w[n]$ after every sample by adding a correction term, which is calculated by the error signal $e[n]$ and the reference noise signal $x[n]$, scaled by the constant step size $\mu$. By iteratively applying the \ac{LMS} algorithm, the filter coefficients converge towards the optimal values that minimize the mean squared error between the desired signal and the filter output. When a predefined acceptable error level is reached, the adaptation process can be stopped to save computing power.\\ \\
The \ac{LMS} algorithm therefore updates the filter coefficients $w[n]$ after every sample by adding a correction term, which is calculated by the error signal $e[n]$ and the reference noise signal $x[n]$, scaled by the constant step size $\mu$. By iteratively applying the \ac{LMS} algorithm, the filter coefficients converge towards the optimal values that minimize the mean squared error between the desired signal and the filter output.
\subsection{Signal flow diagram of an implanted cochlear implant system}
Now equipped with the necessary theoretical background about signal processing, adaptive noise reduction and the \ac{LMS} algorithm, a realistic signal flow diagram with the relevant transfer functions of an implanted cochlear implant system can be designed, which will serve as the basis for the implementation of \ac{ANR} on a low-power digital signal processor.
Now equipped with the necessary theoretical background about signal processing, \ac{ANR} and the \ac{LMS} algorithm, a realistic signal flow diagram with the relevant transfer functions of an implanted cochlear implant system can be designed, which will serve as the basis for the implementation of \ac{ANR} on a low-power \ac{DSP}
\begin{figure}[H]
\centering
\includegraphics[width=1.1\linewidth]{Bilder/fig_anr_implant.jpg}
@@ -289,7 +289,7 @@ x[n] = v[n] * (E_nB)
\end{equation}
where $v[n]$ is the noise signal at its source.\\ \\
Another possible signal interaction could be the leakage of the desired signal into the secondary sensor, leading to the partial removal of the desired signal from the output signal. This case is not illustrated in Figure \ref{fig:fig_anr_implant} as it won't be further evaluated in this thesis, but shall be mentioned for the sake of completeness.\\ \\
At this point, the theoretical background and the fundamentals of adaptive noise reduction have been adequately introduced and explained as necessary for the understanding of the following chapters of this thesis. The next chapter will now focus on practical high level simulations of the \ac{ANR} algorithm under different circumstances to evaluate their performance in regard of noise reduction quality before the actual implementation on a low-power digital signal processor is conducted.
At this point, the theoretical background and the fundamentals of adaptive noise reduction have been adequately introduced and explained as necessary for the understanding of the following chapters of this thesis. The next chapter will now focus on practical high-level simulations of the \ac{ANR} algorithm under different circumstances to evaluate their performance in regard of noise reduction quality before the actual implementation on a low-power \ac{DSP} is conducted.
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\section{High level simulations}
The main purpose of the high-level simulations is to verify and demonstrate the theoretical approach of the previous chapters and to evaluate the performance of the proposed algorithms under various conditions. The following simulations include different scenarios such as, different types of noise signals and different considerations of transfer functions. The goal is to verify different approaches before taking the step to the implementation of said algorithms on the low-power \ac{DSP}.\\ \\
The implementation is conducted in Python, which provides a flexible environment for numerical computations and data visualization. The simulation is graphically represented using the Python library Matplotlib, allowing for clear visualization of the results.
The implementation is conducted in Python, which provides a flexible environment for numerical computations and data visualization. The simulation is graphically represented using the Python library Matplotlib, allowing clear visualization of the results.
\subsection{Adaptive Noise Reduction algorithm implementation}
The high-level implementation of the \ac{ANR} algorithm follows the theoretical framework outlined in Subchapter 2.5, specifically Equation \ref{equation_lms}. The algorithm is designed to adaptively filter out noise from a desired signal using a reference noise signal. The implementation of the \ac{ANR} function includes the following key steps:
\begin{itemize}
@@ -52,7 +52,7 @@ def anr_function(input, ref_noise, coefficients, mu, adaption_step=1):
\end{gather}
with $\text{P}_{\text{Desired-signal}}$ being the power of the desired signal, $\text{P}_{\text{Noise-signal}}$ being the power of the noise signal and $\text{P}_{\text{Error-signal}}$ being the power of the error signal, which is the difference between the desired signal and the filter output. A positive \ac{SNR}-Gain indicates an improvement in signal quality, while a negative \ac{SNR}-Gain indicates a degradation in signal quality after applying the \ac{ANR} algorithm.
\subsection{Simple ANR use cases}
To evaluate the general functionality and performance of the \ac{ANR} algorithm from Listing \ref{lst:lst_anr_code} a set of three simple, artificial scenarios are introduced. These examples shall serve as a showcase to demonstrate the general functionality, the possibilities and the limitations of the \ac{ANR} algorithm.\\ \\
To evaluate the general functionality and performance of the \ac{ANR} algorithm from Listing \ref{lst:lst_anr_code}, a set of three simple, artificial scenarios are introduced. These examples shall serve as a showcase to demonstrate the general functionality, the possibilities and the limitations of the \ac{ANR} algorithm.\\ \\
In all three scenarios, a chirp signal with a frequency range from 100-1000 Hz is used as the desired signal, which is then corrupted with a sine wave (Use case 1 and 2) or a Gaussian white noise (Use case 3) as noise signal respectively. In this simple setup, the corruption noise signal is also available as the reference noise signal. Every approach is conducted with 16 filter coefficients and a step size of 0.01. The four graphs in the respective first plot show the desired signal, the corrupted signal, the reference noise signal and the filter output. The two graphs in the respective second plot show the performance of the filter in form of the resulting error signal and the evolution of three filter coefficients over time.\\ \\
\noindent This artificial setup could be solved analytically, as the signals do not pass separate, different transfer functions, meaning, that the reference noise signal is the same as the corruption noise signal. Though, this simple setup would not require an adaptive filter approach, it nevertheless allows to clearly evaluate the performance of the \ac{ANR} algorithm in different scenarios. Also, due to the fact that the desired signal is known, it is possible to evaluate the performance of the algorithm in a simple way.
\subsubsection{Simple use case 1: Sine noise at 2000 Hz}
@@ -117,7 +117,7 @@ After the general functionality of the \ac{ANR} algorithm has been verified with
\end{figure}
\noindent The error signal in Figure \ref{fig:fig_plot_2_wav.png} confirms the function of the algorithm and shows maxima corresponding to the maxima in the breathing noise, indicating the moments, when the \ac{ANR} algorithm is setting its coefficients again to adapt to the changing noise characteristics. It makes sense, that the adaption of the filter coefficients causes repeating maxima in the error signal, as the noise signal now is not static or periodic, but rather dynamic and changing it frequency and amplitude over time. The \ac{SNR}-Gain of 6.41 dB also indicates a significant improvement in signal quality and can be compared againtst the complex use case in the next subchapter, where the same audio tracks are used, but now with different transfer functions applied to them.
\subsection{Complex ANR use case}
To close the topic of high-level simulations of the \ac{ANR} algorithm, a more complex and realistic use case is finally introduced. In this scenario, the same two audio tracks of the previous use case are utilized - but now they pass different transfer functions, which mimic the case that the sensor recording the corrupted signal, shows another frequency response characteristic as the one recording the reference noise signal. Additionaly, a delay of 2 ms between the corruption noise signal and the reference noise signal is introduced - this simulates the realsitic case, that the microphones are located on different locations, leading to a small delay due to traveling time of the signal. Now, an analytical solution is not possible anymore, as the signals are affected in different ways, making it impossible to simply subtract the noise signal from the corrupted signal. This scenario represents a more realistic application of the \ac{ANR} algorithm, as it involves complex audio signals with varying frequency components and dynamics, as well as on synchrone signals passing different singal paths.\\ \\
To close the topic of high-level simulations of the \ac{ANR} algorithm, a more complex and realistic use case is finally introduced. In this scenario, the same two audio tracks of the previous use case are utilized - but now they pass different transfer functions, which mimic the case that the sensor recording the corrupted signal, shows another frequency response characteristic as the one recording the reference noise signal. Additionaly, a delay of 2 ms between the corruption noise signal and the reference noise signal is introduced - this simulates the realsitic case, that the microphones are located on different locations, leading to a small delay due to traveling time of the signal. Now, an analytical solution is not possible anymore, as the signals are affected in different ways, making it impossible to simply subtract the noise signal from the corrupted signal. This scenario represents a more realistic application of the \ac{ANR} algorithm, as it involves complex audio signals with varying frequency components and dynamics, as well as on signals passing different singal paths delayed.\\ \\
Using a sampling frequency of 20 kHz, a delay of 2 ms represents a shift of 40 samples. As the corrpution noise signal, which the alorithm tries to filter out of the corrupoted signal, is now delayed by these 40 samples, the filter needs more coefficients to aqquire a certain ''memory'' - this means, that the until now used 16 tap filter is not sufficient anymore. To prove the correct function of the \ac{ANR} algorithm, the filter length is adapted up to 55 taps. \\ \\
The now introduced challenges ae making adaptive noise reduction the only feasible approach to reduce the noise from the corrupted signal.
\begin{figure}[H]
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\relax
\@writefile{toc}{\contentsline {section}{\numberline {4}Hardware implementation and performance quantization of the ANR Algorithm on a low-power system}{41}{}\protected@file@percent }
\acronymused{ANR}
\acronymused{ANR}
\acronymused{CI}
\acronymused{ANR}
\acronymused{ANR}
\acronymused{ANR}
\@writefile{toc}{\contentsline {subsection}{\numberline {4.1}Low-power system architecture and integration}{41}{}\protected@file@percent }
\AC@undonewlabel{acro:SOC}
\newlabel{acro:SOC}{{4.1}{41}{}{}{}}
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\section{Hardware implementation and performance quantization of the ANR Algorithm on a low-power system}
This section can be considered as the heart of this thesis. The first subchapter describes the hardware, on which the \ac{ANR} algorithm is implemented, including its environment, which serves as a link to the \ac{CI} system itself. The following subchapter continues with the basic implementation of the \ac{ANR} algorithm on the hardware itself and shall provide the reader with a basic understanding of its challenges, possibilities and limitations. This basic implementation is then low-level simulated with some of the previous use cases to get some idea of the general performance.\\
The last subchapter picks the final optimizations of the \ac{ANR} algorithm itself as a central theme, especially with respect to the capabilities of a hybrid \ac{ANR} approach.
Now, with a functioning high-level implementation in place, the focus shifts to the hardware implementation of the \ac{ANR} algorithm on a low-power system. The first subchapter describes the hardware, on which the \ac{ANR} algorithm is implemented, including its environment, which serves as a link to the \ac{CI} system itself. The following subchapter continues with the basic implementation of the \ac{ANR} algorithm on the hardware itself and shall provide the reader with a basic understanding of its challenges, possibilities and limitations. This implementation is then tested on a simulator to be compared to the high-level implementation.\\
\subsection{Low-power system architecture and integration}
This thesis considers a low-power \ac{SOC} architecture that integrates a general-purpose \ac{ARM} core with a dedicated \ac{DSP} core. The system combines the flexibility of an \ac{ARM}-based control processor with the computational efficiency of a specialized \ac{DSP}, splitting general computing tasks from real-time signal processing workloads.
\subsubsection{ARM and DSP hardware architecture overview}
A 32-bit \ac{ARM} core serves as the primary control unit of the system. It is responsible for high-level application logic, system configuration, peripheral management as also scheduling and serves as a general-purpose processing unit. Due to its universal instruction set and extensive input/output interface, the \ac{ARM} core is well suited for handling general tasks and the interaction with the \ac{CI} system. Time-critical numerical processing is intentionally offloaded to the \ac{DSP} core in order to reduce computational load and power consumption on the control processor.\\ \\
The \ac{DSP} used for the implementation features a 32-bit dual Harvard, dual \ac{MAC} architecture primarily designed for audio signal-processing applications in low-power embedded systems. It doesn't feature a designated boot ROM, as it is initialized and managed by the \ac{ARM} core. The firmware executing the \ac{ANR} algorithm is developed and programmed in the C programming language. The used proprietary compiler is highly efficient and generates optimized assembler code, which is then translated in machine code to execute the \ac{ANR} algorithm on incoming samples.\\ \\
The \ac{DSP} used for the implementation features a 32-bit dual Harvard, dual \ac{MAC} architecture primarily designed for audio signal-processing applications in low-power embedded systems. It doesn't feature a designated boot ROM, as it is initialized and managed by the \ac{ARM} core. The firmware executing the \ac{ANR} algorithm is developed and programmed in the C programming language. The used proprietary compiler offers highly efficient functions and generates optimized assembler code, which is then translated in machine code to execute the \ac{ANR} algorithm on incoming samples.\\ \\
All memory instances and registers of the \ac{SOC} are directly addressable by the \ac{ARM} through the standard buses, also enabling a simplified control of the \ac{DSP} through a shared memory section. The memory consists mainly out of the two following parts:
\begin{itemize}
\item \textbf{Program Memory:} This memory section stores the executable code for both the \ac{ARM} core and the \ac{DSP} core. It contains the compiled instructions that define the behavior of the system, including the \ac{ANR} algorithm implemented on the \ac{DSP}.
\item \textbf{Data Memory:} This memory section is used for storing runtime data and variables, required during the execution of the program. This also includes the memory section for input/output audio samples and intermediate processing results. The shared memory section between the \ac{ARM} core and the \ac{DSP} core is also part of the data memory, featuring a total size of 64 KB.
\end{itemize}
The data memory is supported by an integrated \ac{DMA} controller, which allows efficient data transfers between peripherals and memory without burdening the processing cores. This is particularly needed for transferring audio samples from the \ac{PCM} interface to the shared memory section for further processing by the \ac{DSP}, as well as transferring processed samples back to the \ac{PCM} interface for playback. The shared memory section is crucial for enabling efficient communication and data exchange between the two processing units, further described in the following subchapter.\\ \\
When the \ac{DSP} is not required to process audio data, it can be paused by pausing the clock provided to the \ac{DSP} core. When paused, the \ac{DSP} core enters a low-power state, still allowing the \ac{ARM} core to access its shared memory and wake up the \ac{DSP} core when needed. This mechanism helps to reduce overall power consumption, which is crucial for battery-operated devices like cochlear implants.\\ \\
When the \ac{DSP} is not required to process audio data, it can be put to sleep by halting the clock provided to the \ac{DSP} core. When halted, the \ac{DSP} core enters a low-power state, still allowing the \ac{ARM} core to access its shared memory and wake up the \ac{DSP} core when needed. This mechanism helps to reduce overall power consumption, which is crucial for battery-operated devices like cochlear implants.\\ \\
The processing unit of the \ac{DSP} is equipped with load/store architecture, meaning that, initially all operands need to be moved from the memory to the registers, before any operation can be performed. After this task is performed, the execution units (\ac{ALU} and multiplier) can perform their operations on the data and write back the results into the registers. Finally, the results need to be explicitly moved back to the memory.\\ \\
Processor-wise, the \ac{DSP} includes a three stage pipeline consisting of fetch, decode, and execute stages, allowing for overlapping instruction execution and improved throughput. The architecture is optimized for high cycle efficiency when executing computationally intensive signal-processing workloads. The featured dual Harvard, dual \ac{MAC} architecture (two separate \ac{ALU}s) enables the execution of two \ac{MAC} operations, two memory operations (load/store) and two pointer updates in a single processor cycle.
\subsubsection{Intercore communication mechanisms}
@@ -33,7 +32,7 @@ In order to ensure a smooth, but power-efficient, operation together with the \a
\subsection{Software architecture and execution flow}
\subsubsection{ARMDSP communication and data exchange details}
In contrary, to the high-level simulation environment written in Python from the previous chapter, the implementation of the \ac{ANR} algorithm on the \ac{DSP} requires a low-level programming approach, as which takes into account the specific architecture and capabilities of the processor and its environment. This includes considerations such as memory management, data types, and optimization techniques specific to the \ac{DSP} architecture. The implementation is required to be done in the C programming language, which is a standard for embedded systems, as it allows low-level hardware implementation.\\ \\
In contrary, to the high-level simulation environment written in Python from the previous chapter, the implementation of the \ac{ANR} algorithm on the \ac{DSP} requires a low-level programming approach, as which takes into account the specific architecture and capabilities of the processor and its environment. This includes considerations such as memory management, data types, and optimization techniques specific to the \ac{DSP} architecture. The implementation is required to be done in the C programming language, which is a standard for embedded systems.\\ \\
The implementation of the \ac{ANR} algorithm on the \ac{DSP} follows the same overall structure as the high-level variant, but now the focus lies on memory management, interrupt-handling and communication between the two cores. The \ac{ARM} operates in a continuous loop, structured into several states:
\begin{itemize}
\item \textbf{Idle:} The \ac{ARM} core waits for an interrupt from the \ac{DMA} controller, indicating that new audio samples are available in the input buffer.
@@ -89,7 +88,7 @@ static volatile int action_required;
\end{figure}
\paragraph{Main loop and interrupt handling}
The main loop of the \ac{DSP} core is quite compact, as it mainly focuses on handling interrupts and delegating the sample processing to the \ac{ANR} function. The loop starts by enabling interrupts with a compiler-specific function and setting up pointers for the output buffer and the sample variable. After setting the action flag to zero, the main function enters an infinite loop, signaling the \ac{ARM} core it's halted state by setting the interrupt register to 1 and halting the core.\\ \\
If the \ac{ARM} core requests a sample to be processed, it activates the \ac{DSP} core and triggers an interrupt, which sets the action flag to 1. The main loop then checks the action flag, and sets the interrupt register back to 0, indicating the \ac{ARM} core it is now processing the sample. After resetting the action flag, the output pointer is updated to point to the next position in the output buffer using a cyclic addition function. Before triggering the calculate\_output()-function, the calculated sample from the previous cycle is moved from its temporary memory location to the current position in the output buffer. Afterwards, the calculate\_output()-function is triggered for the current cycle and the loop restarts. The flow diagram in Figure \ref{fig:fig_dsp_logic.jpg} visualizes the described behavior of the main loop and interrupt handling on the \ac{DSP} core.
If the \ac{ARM} core requests a sample to be processed, it activates the \ac{DSP} core and triggers an interrupt, which sets the action flag to 1. The main loop then checks the action flag, and sets the interrupt register back to 0, indicating the \ac{ARM} core it is now processing the sample. After resetting the action flag, the output pointer is updated to point to the next position in the output buffer using a cyclic addition function. Before triggering the $calculate\_output()$-function, the calculated sample from the previous cycle is moved from its temporary memory location to the current position in the output buffer. Afterwards, the $calculate\_output()$-function is triggered for the current cycle and the loop restarts. The flow diagram in Figure \ref{fig:fig_dsp_logic.jpg} visualizes the described behavior of the main loop and interrupt handling on the \ac{DSP} core.
\begin{listing}[H]
\centering
\begin{lstlisting}[style=cstyle]
@@ -132,14 +131,14 @@ int main(void) {
\label{fig:fig_dsp_logic.jpg}
\end{figure}
\paragraph{calculate\_output()-function}
The calculate\_output()-function at the very end of the main process loop represents the heart of the \ac{DSP} code, as it is responsible for applying the \ac{ANR} algorithm on the two input samples. As it follows the same structure as the high-level implementation described in the previous chapter, the general functionality will not be described in detail again. Yet, the technical implementation on the \ac{DSP} however will be outlined in detail in the following subchapter, as the hardware-specific optimizations are key elements for the estimation of the expectable power consumption of the system.\\ \\
The $calculate\_output()$-function at the very end of the main process loop represents the heart of the \ac{DSP} code, as it is responsible for applying the \ac{ANR} algorithm on the two input samples. The technical implementation on the \ac{DSP} will be outlined in detail in the following subchapter, as the hardware-specific optimizations are key elements for the estimation of the expectable power consumption of the system.\\ \\
\subsection{DSP-level implementation of the ANR algorithm}
The ability to process audio samples in real-time on the \ac{DSP} core is strongly dependent on compiler-specific optimizations and hardware-specific implementation techniques, which allow a far more efficient execution of the algorithm compared to a native C implementation.
\subsubsection{DSP-specific optimizations for real-time processing}
In the following, some examples of optimization possibilities shall be outlined, before the entire \ac{ANR} implementation on the \ac{DSP} is analyzed in regard of its performance.
\paragraph{Logic operations}
Logic operstions, such as finding the maximum or minimum of two values, are quite common in signal processing algorithms. However, their implementation in C usually involves conditional statements (if-else), which can be inefficient on certain architectures due to pipeline stalls.\\ \\
Logic operations, such as finding the maximum or minimum of two values, are quite common in signal processing algorithms. However, their implementation in C usually involves conditional statements (if-else), which can be inefficient on certain architectures due to pipeline stalls.\\ \\
The simple function shown in Listing \ref{lst:lst_dsp_code_find_max} returns the maximum of two given integer values. Processing this manual implementation on the \ac{DSP} takes 12 cycles to execute, while the intrinsic function of the \ac{DSP} compiler allows a 4-cycle execution.
\begin{listing}[H]
\centering
@@ -186,9 +185,9 @@ The $calculate\_output()$ functions consists out of the following five main part
\item $update\_filter\_coefficients()$: Update of the \ac{FIR} filter coefficients based on the error signal
\item $write\_output()$: Writing the output sample back to the output port in the shared memory section
\end{itemize}
These sub-functions feature \ac{DSP}-spefic optimizations and are partly depenend on the setable parameters like the filter length in regard of their computational cost. The following paragraphs will analyze the computational efficiency of these sub-functions in detail.
\paragraph{write\_buffer()}The $write\_buffer()$-function is responsible for managing the input line, where the samples of the reference noise signal are stored for further processing. The buffer management mainly consits out of a cyclic pointer increase operation and a pointer dereference operation to write the new sample into the buffer. The cyclic pointer increase operation is implemented using the already mentioned intrinsic function of the \ac{DSP} compiler, while the pointer dereference operation takes 15 cycles to execute. This results in a total duration of 16 cycles for the $write\_buffer()$-function to process, indipentent of the filter length or other parameters.
\paragraph{apply\_fir\_filter()} The $apply\_fir\_filter()$-function is responsible for applying the coefficients of the \ac{FIR} filter on the reference noise signal samples stored in the input line. The needed cycles for this function are mainly depenendent on the lenght of the filter, as the number of multiplications and additions increase with the filter length. To increase the performance, the dual \ac{MAC} architecture of the \ac{DSP} is utilized, allowing two multiplications and two additions to be performed in a single cycle. Another \ac{DSP}-specific optimization is the use of the already introduced 72-bit accumulators and the fractional multiplication function, which allows performing multiplications on two 32-bit integers without losing precision or the need for manual bit-shifting operations.
These sub-functions feature \ac{DSP}-specific optimizations and are partly depenend on the setable parameters like the filter length in regard of their computational cost. The following paragraphs will analyze the computational efficiency of these sub-functions in detail.
\paragraph{write\_buffer()}The $write\_buffer()$-function is responsible for managing the sample line, where the samples of the reference noise signal are stored for further processing. The buffer management mainly consists out of a cyclic pointer increase operation and a pointer dereference operation to write the new sample into the buffer. The cyclic pointer increase operation is implemented using the already mentioned intrinsic function of the \ac{DSP} compiler, while the pointer dereference operation takes 15 cycles to execute. This results in a total duration of 16 cycles for the $write\_buffer()$-function to process, indipendent of the filter length or other parameters.
\paragraph{apply\_fir\_filter()} The $apply\_fir\_filter()$-function is responsible for applying the coefficients of the \ac{FIR} filter on the reference noise signal samples stored in the sample line. The needed cycles for this function are mainly depenendent on the lenght of the filter, as the number of multiplications and additions increase with the filter length. To increase the performance, the dual \ac{MAC} architecture of the \ac{DSP} is utilized, allowing two multiplications and two additions to be performed in a single cycle. Another \ac{DSP}-specific optimization is the use of the already introduced 72-bit accumulators and the fractional multiplication function, which allows performing multiplications on two 32-bit integers without losing precision or the need for manual bit-shifting operations.
\begin{listing}[H]
\centering
\begin{lstlisting}[style=cstyle]
+11 -11
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@@ -25,7 +25,7 @@ To verify the general performance of the \ac{DSP}-implemented \ac{ANR} algorithm
\caption{Histogram of the error amplitude between the high- and low-level simulation output.}
\label{fig:fig_high_low_comparison_hist.png}
\end{figure}
\noindent Figure \ref{fig:fig_plot_1_dsp_complex.png} and \ref{fig:fig_plot_2_dsp_complex.png} show the results of the complex \ac{ANR} use case, simulated on the \ac{DSP} - with a \ac{SNR}-Gain of 10.26 dB it performs equivalent sucessful as the one of the high-level implementation. Figure \ref{fig:fig_high_low_comparison.png} shows both outputs seperately and then together in one subfigure, together with the plotted error amplitude. Figure \ref{fig:fig_high_low_comparison_hist.png} feautres a histogram of the error amplitude between the high- and low-level implemenation, indicating the correct functionality of the \ac{DSP} implementation. The small deviations can be explained by the fact that the \ac{DSP} implementation is based on fixed-point arithmetic, which leads to a slightly different convergence behavior. Nevertheless, the results show that the \ac{DSP} implementation of the \ac{ANR} algorithm is able to achieve the same performance as the high-level implementation. The next step is of evaluate the performance of the \ac{DSP} implementation in terms of computational efficiency under different scenarios and non-synchrone signals.
\noindent Figure \ref{fig:fig_plot_1_dsp_complex.png} and \ref{fig:fig_plot_2_dsp_complex.png} show the results of the complex \ac{ANR} use case, simulated on the \ac{DSP} - with a \ac{SNR}-Gain of 10.26 dB it performs equivalent sucessful as the one of the high-level implementation. Figure \ref{fig:fig_high_low_comparison.png} shows both outputs seperately and then together in one subfigure, together with the plotted error amplitude. Figure \ref{fig:fig_high_low_comparison_hist.png} features a histogram of the error amplitude between the high- and low-level implemenation, indicating the correct functionality of the \ac{DSP} implementation. The small deviations can be explained by the fact that the \ac{DSP} implementation is based on fixed-point arithmetic, which leads to a slightly different convergence behavior. Nevertheless, the results show that the \ac{DSP} implementation of the \ac{ANR} algorithm is able to achieve the same performance as the high-level implementation. The next step is of evaluate the performance of the \ac{DSP} implementation in terms of computational efficiency under different scenarios and non-synchrone signals.
\subsection{Determination of the optimal filter length}
\noindent The main focus for evaluating the computational efficiency is the determination of the optimal filter length. To achieve this goal, different signal combinations, which are to be expected every day situiations for a \ac{CI} patient, are considered. Again, a delay of 2 ms bewteen the corruption noise signal and the reference noise signal is applied, increasing the need for a longer filter. The desired signal of a male voice is now corrupted with 5 different noise signals, ruling out, that a certain combination of signals is not representative for the overall performance of the \ac{ANR} algorithm:
\begin{itemize}
@@ -51,8 +51,7 @@ The vizualization of the noise signals is shown in Figure \ref{fig:fig_noise_sig
\end{figure}
\noindent Figure \ref{fig:fig_snr_comparison.png} shows the expected \ac{SNR}-Gain for the different noise signals and filter lengths. The results shows, that a minimum filter length of about 32 taps is required, before (in any case) a significant rise in the \ac{SNR}-Gain can be observed - this is highly contrary to the synchrone intermediate high level simulation, where a filter length of only 16 taps provided sufficent noise reduction. This circumstance can be explained by the fact, that the corruption noise signal is now delayed to the reference noise signal, meaning, that the filter needs a certain length before it can be sufficently adapted. The results also show, that the \ac{SNR}-Gain is different for the different noise signals, indicating, that the noise signals have different characteristics, like the number of peaks, their frequency spectrum an their amplitude.\\ \\
The mean \ac{SNR}-Gain of the different noise signals, also shown in Figure \ref{fig:fig_snr_comparison.png}, signals, that after reaching 95\% of the maximum \ac{SNR}-Gain, the \ac{SNR}-Gain increase is slowing down. This threshold is reached at a filter length of 45 taps. This means, that a filter length of 45 taps represents an optimal solution for a statisfying performance of the \ac{ANR} algorithm, while a further increase of the filter length does not lead to a significant increase of the \ac{SNR}-Gain in this setup. This is an important finding, as it allows to optimize the computational efficiency of the \ac{ANR} algorithm by choosing an appropriate filter length.
\subsection{Evaluation of a a fixed update implementation}
\subsubsection{Full-Update implementation}
\subsection{Evaluation of the Full-update implementation}
\noindent Equation \ref{equation_computing_final} can now be utilized to calculate the needed cycles for the calculation of one sample of the filter output, using a filter length of 45 taps and an update of the filter coefficients every cycle. The needed cycles are calculated as follows:
\begin{equation}
\label{equation_computing_calculation_full_update}
@@ -71,6 +70,7 @@ As already mentioned in the previous chapters, the sampling rate of the audio da
\noindent The results, calculated in Equation \ref{equation_computing_calculation_full_update} to \ref{equation_load_calculation_full_update} can also be recapped as follows:\\ \\
With the optimal filter length of 45 taps and an update rate of the filter coefficients every cycle, the \ac{ANR} algorithm is able to achieve a \ac{SNR}-Gain of about 11.54 dB, averaged over different signal/noise combinations. Under this circumstances, the computational load of the \ac{DSP} core amounts about 45\%, which means that 55\% of the time, which a new sample takes to arrive, it can be halted, and therefore, the overall power consumption can be reduced.\\ \\
The initial signal/noise combination of a male speaker disturbed by a breathing noise, which is used for the verification of the \ac{DSP} implementation, shall serve as a benchmark for the coming evaluations. With 45 filter coefficients it delivers an \ac{SNR}-Gain of about 9.47 dB.
\subsection{Evaluation of a Reduced-update implementation}
\subsubsection{Reduced-update implementation for the benchmark case}
The most straight-forward method to further reduce the computing effort for the \ac{DSP} core is to reduce the update frequency of the filter coeffcients. For every sample, the new filter coefficients are calculated, but not written to the into the Filter Line - this means, that the filter, calculated for the previous sample, is applied to the actual sample. Depending on the acoustic situation, the savings in computing power will most likely lead to a degredation of the noise reduction quality, depending if the current situation is highly dynamic (and therefore would require a frequent update of the filter coefficients) or is rather static. Changing the update frequency, changes the denominator in Equation \ref{equation_c_5} and therefore in Equation \ref{equation_computing_final}.\\ \\
As already mentioned, the reduction of the update rate is initially evaluated for the benchmark case (male speaker disturbed by a breathing noise) and then checked for general validity. Therefore the \ac{SNR}-Gain of 9.47 dB with 45 filter coefficients represent 100\% achievable noise reduction with a maximum of 357 cycles (also 100\%) in the following figure.
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@@ -110,7 +110,16 @@ by \par
\include{acronyms}
\newpage
\begin{abstract}
abstract
\noindent The goal of this thesis is the implementation followed by the investigation of improvement options of a real-time capable \ac{ANR} algorithm in \ac{CI} systems. The focus lies on the reduction of the computational load, and subsequently the power consumption, of the used \ac{DSP} core, while still keeping the noise reduction performance as high as possible.\\ \\
\noindent The chosen method for noise reduction is the use of a \ac{LMS} algorithm, which is a widely utilized method in this context. The evaluation of the performance is conducted via the \ac{SNR}-Gain, which serves as a metric for the quality of the noise reduction. Several use cases (from simple to realistic) are analyzed to evaluate qualitiy of the output under different conditions.\\ \\
\noindent After confirming the general feasibility of the proposed method in a high-level Python-implementation, the algorithm is implemented in C, using \ac{DSP} compiler instrinsic functions to achieve real-time capability. The performance of the C-implementation is then sucessfully compared to the initial high-level implementation, showing only minor deviations.\\ \\
\noindent With a working C-implementation in place, a closer look on the achievable performance under full-update settings is taken, which serves as a benchmark-setting for the remaining thesis. The computational cost of the algorithm is evaluated in terms of the needed cycles to compute one audio sample, which can be expressed as a function of the filter length and the update rate.\\ \\
\noindent With this formula developed, several noise sources are put under test, to evaluatue the optimal filter length, which is a trade-off between the performance improvement and the computational cost. The ideal filter length is determined at 45 coeffcients, where about 95\% averaged \ac{SNR}-Gain can be achieved.\\ \\
\noindent With the filter lenght set, the improvement of the algorithm is tackled, both for a benchmark track and different signal/noise scenarios.\\ \\
\noindent The first approach is a reduction of the update rate. This strategy is able to significantly reduce the needed cycles, but with a simultanious considerable decrease in the \ac{SNR}-Gain.\\ \\
\noindent The second approach is an error driven optimization, utilizing the idea of a fixed threshold for the error signal, over which the decision over an upgrade of the filter coefficients is made. This approach turns out to be a success, as it is able to achieve a significant reduction in the needed cycles, while only reducing the \ac{SNR}-Gain by a small amount.\\ \\
\noindent Therefore, the error driven optimization approach can be seen as the sucessful result of this thesis, as it is able to further improve an already real-time capable \ac{ANR} algorithm by significantly reducing the computational load of the \ac{DSP} core, while only slightly reducing the performance improvement in terms of \ac{SNR}-Gain.\\ \\
\end{abstract}
\include{chapter_01}
\include{chapter_02}