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DSP_Simulation/testcode/Release/testcode.cmic2
2026-01-15 13:06:36 +01:00

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// File generated by darts version X-2025.06#84ea4f0b1c#250602, Thu Jan 15 11:31:20 2026
// Copyright 2014-2025 Synopsys, Inc. All rights reserved.
// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\darts.exe -c C:/Users/phangl/00_Repos/06_DSP_Simulation/testcode/Release/testcode -I C:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib lpdsp32 -o C:/Users/phangl/00_Repos/06_DSP_Simulation/testcode/Release/testcode.cmic2_2585875621056 -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -D__tct_patch__=0 +Mdec +F
// Release: ipp X-2025.06
0 "01100100000000000000" // jp 32 /* MW 2 */ /* control_operation: words=2 jump unconditional cycles_taken=2 direct absolute target_address=32 */
1 "00000000001000000111" // /* MW 1 */
2 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
3 "00111000000000000000" // /* MW 1 */
4 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
5 "00111000000000000000" // /* MW 1 */
6 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
7 "00111000000000000000" // /* MW 1 */
8 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
9 "00111000000000000000" // /* MW 1 */
10 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
11 "00111000000000000000" // /* MW 1 */
12 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
13 "00111000000000000000" // /* MW 1 */
14 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
15 "00111000000000000000" // /* MW 1 */
16 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
17 "00111000000000000000" // /* MW 1 */
18 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
19 "00111000000000000000" // /* MW 1 */
20 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
21 "00111000000000000000" // /* MW 1 */
22 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
23 "00111000000000000000" // /* MW 1 */
24 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
25 "00111000000000000000" // /* MW 1 */
26 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
27 "00111000000000000000" // /* MW 1 */
28 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
29 "00111000000000000000" // /* MW 1 */
30 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
31 "00111000000000000000" // /* MW 1 */
32 "10111010000100010010" // r = 1 /* control_operation: words=1 cycles_taken=1 */
33 "10111010000100010011" // s = 1 /* control_operation: words=1 cycles_taken=1 */
34 "01101000000000000011" // sp = 65528 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
35 "11111111111000111000" // /* MW 1 */
36 "01000110000010001000" // ie = 1; nop /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
37 "00111000000000000000" // /* MW 1 */
38 "00111000001111011110" // rb0 = 123 /* control_operation: words=1 cycles_taken=1 */
39 "01101110010000000000" // [8388616] = rb0.s /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
40 "00000000010001110110" // /* MW 1 */
41 "01101000001000000000" // a0 = -8388608 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
42 "00000000000000100000" // /* MW 1 */
43 "01011100000110010010" // ra0 = 100; rb0 = 200 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
44 "00110000011001000110" // /* MW 1 */
45 "01011100100000001000" // c0 = 2; a0[0] = ra0.s /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
46 "00010100000001110100" // /* MW 1 */
47 "01011100000110010110" // ra0 = 101; a0 = a0 + 2 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
48 "00100000000000010000" // /* MW 1 */
49 "01011100000110011010" // ra0 = 102; [a0+c0] = ra0.s /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
50 "00010100000001010100" // /* MW 1 */
51 "01011100000110011110" // ra0 = 103; [a0+c0] = ra0.s /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
52 "00010100000001010100" // /* MW 1 */
53 "10010100000001110100" // a0[0] = ra0.s /* control_operation: words=1 cycles_taken=1 */
54 "01101000001000000000" // a1 = -8388592 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
55 "00000000010000100001" // /* MW 1 */
56 "10100000010000110000" // a0 = a0 - 6 /* control_operation: words=1 cycles_taken=1 */
57 "10010100100001110110" // a1[0] = rb0.s /* control_operation: words=1 cycles_taken=1 */
58 "10100000100000010001" // a1 = a1 + 2 /* control_operation: words=1 cycles_taken=1 */
59 "10110000011001001110" // rb0 = 201 /* control_operation: words=1 cycles_taken=1 */
60 "10010100100001010110" // [a1+c0] = rb0.s /* control_operation: words=1 cycles_taken=1 */
61 "10110000011001010110" // rb0 = 202 /* control_operation: words=1 cycles_taken=1 */
62 "10010100100001110110" // a1[0] = rb0.s /* control_operation: words=1 cycles_taken=1 */
63 "01101100000000000000" // [4] = a0 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
64 "00000000001001100000" // /* MW 1 */
65 "01000110000010100100" // retdb; rb0 = 203 /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=1 delay_slots=2 */
66 "00110000011001011110" // /* MW 1 */
67 "10010100100011110110" // a1[2] = rb0.s /* control_operation: words=1 cycles_taken=1 */
68 "01000000000000000000" // nop; ra0 = zero /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
69 "00011000111010001000" // /* MW 1 */