Calc Funktion weitergecoded - kompiliert
This commit is contained in:
Patrick Hangl
115
simulation/Release/chesswork/signal_path-f431c2.sfg
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115
simulation/Release/chesswork/signal_path-f431c2.sfg
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// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:33:18 2026
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// Copyright 2014-2025 Synopsys, Inc. All rights reserved.
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// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
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/***
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!! void increment_buffert_DMB(BufferPtrDMB *, int)
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F_Z21increment_buffert_DMBP12BufferPtrDMBi : user_defined, called {
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fnm : "increment_buffert_DMB" 'void increment_buffert_DMB(BufferPtrDMB *, int)';
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arg : ( dmaddr_:i dmaddr_:i int32_:i );
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loc : ( LR[0] A[0] RA[0] );
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vac : ( srIM[0] );
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frm : ( );
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}
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****
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***/
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[
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0 : _Z21increment_buffert_DMBP12BufferPtrDMBi typ=uint20_ bnd=e stl=PM tref=void_____PBufferPtrDMB___sint__
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11 : __M_WDMA typ=int32_ bnd=d stl=WDMA
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26 : __R_SP typ=dmaddr_ bnd=d stl=SP
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34 : __sp typ=dmaddr_ bnd=b stl=SP
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36 : __extDM_BufferPtrDMB_ptr_current typ=int8_ bnd=b stl=DM
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38 : __extDM_BufferPtrDMB_ptr_start typ=int8_ bnd=b stl=DM
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39 : __extDM_BufferPtrDMB_buffer_len typ=int8_ bnd=b stl=DM
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41 : __rd___sp typ=dmaddr_ bnd=m
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42 : __ct_0 typ=uint1_ val=0f bnd=m
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43 : __la typ=dmaddr_ bnd=p tref=dmaddr___
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44 : buffer typ=dmaddr_ bnd=p tref=__PBufferPtrDMB__
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45 : i_incr typ=int32_ bnd=p tref=__sint__
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52 : __fch___extDM_BufferPtrDMB_ptr_current typ=dmaddr_ bnd=m
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59 : __fch___extDM_BufferPtrDMB_ptr_start typ=dmaddr_ bnd=m
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63 : __fch___extDM_BufferPtrDMB_buffer_len typ=int32_ bnd=m
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67 : __tmp typ=dmaddr_ bnd=m
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90 : __ct_2 typ=int32_ val=2f bnd=m
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93 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
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118 : __ct_0S0 typ=int18_ val=0S0 bnd=m
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119 : __ct_8 typ=int18_ val=8f bnd=m
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122 : __ct_0s0 typ=int18_ val=0s0 bnd=m
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124 : __ct_4 typ=int18_ val=4f bnd=m
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128 : __ct_2 typ=uint2_ val=2f bnd=m
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133 : __tmp typ=int18_ bnd=m
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134 : __tmp typ=int18_ bnd=m
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]
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F_Z21increment_buffert_DMBP12BufferPtrDMBi {
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(__M_WDMA.9 var=11) st_def () <18>;
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(__R_SP.24 var=26) st_def () <48>;
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(__sp.32 var=34) source () <56>;
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(__extDM_BufferPtrDMB_ptr_current.34 var=36) source () <58>;
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(__extDM_BufferPtrDMB_ptr_start.36 var=38) source () <60>;
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(__extDM_BufferPtrDMB_buffer_len.37 var=39) source () <61>;
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(__ct_0.40 var=42) const () <64>;
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(__la.42 var=43 stl=LR off=0) inp () <66>;
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(__la.43 var=43) deassign (__la.42) <67>;
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(buffer.45 var=44 stl=A off=0) inp () <69>;
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(buffer.46 var=44) deassign (buffer.45) <70>;
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(i_incr.48 var=45 stl=RA off=0) inp () <72>;
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(i_incr.49 var=45) deassign (i_incr.48) <73>;
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(__rd___sp.51 var=41) rd_res_reg (__R_SP.24 __sp.32) <75>;
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(__R_SP.55 var=26 __sp.56 var=34) wr_res_reg (__rt.133 __sp.32) <79>;
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(__fch___extDM_BufferPtrDMB_ptr_current.60 var=52) load (__M_WDMA.9 __rt.155 __extDM_BufferPtrDMB_ptr_current.34) <84>;
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(__fch___extDM_BufferPtrDMB_ptr_start.67 var=59) load (__M_WDMA.9 __rt.199 __extDM_BufferPtrDMB_ptr_start.36) <91>;
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(__fch___extDM_BufferPtrDMB_buffer_len.71 var=63) load (__M_WDMA.9 __rt.221 __extDM_BufferPtrDMB_buffer_len.37) <95>;
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(__M_WDMA.79 var=11 __extDM_BufferPtrDMB_ptr_current.80 var=36) store (__tmp.110 __rt.243 __extDM_BufferPtrDMB_ptr_current.34) <103>;
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(__rd___sp.81 var=41) rd_res_reg (__R_SP.24 __sp.56) <104>;
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(__R_SP.85 var=26 __sp.86 var=34) wr_res_reg (__rt.177 __sp.56) <108>;
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() void_ret_dmaddr_ (__la.43) <109>;
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() sink (__sp.86) <115>;
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() sink (__extDM_BufferPtrDMB_ptr_current.80) <117>;
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() sink (__ct_0.40) <122>;
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(__tmp.110 var=67) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch___extDM_BufferPtrDMB_ptr_current.60 __tmp.266 __fch___extDM_BufferPtrDMB_ptr_start.67 __tmp.271) <155>;
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(__ct_2.119 var=90) const () <175>;
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(__rt.133 var=93) __Pvoid__pl___Pvoid_int18_ (__rd___sp.51 __ct_0S0.256) <201>;
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(__rt.155 var=93) __Pvoid__pl___Pvoid_int18_ (buffer.46 __ct_8.257) <229>;
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(__rt.177 var=93) __Pvoid__pl___Pvoid_int18_ (__rd___sp.81 __ct_0s0.260) <257>;
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(__rt.199 var=93) __Pvoid__mi___Pvoid_int18_ (__rt.155 __ct_4.262) <285>;
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(__rt.221 var=93) __Pvoid__mi___Pvoid_int18_ (__rt.199 __ct_4.262) <313>;
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(__rt.243 var=93) __Pvoid__pl___Pvoid_int18_ (__rt.221 __ct_8.257) <341>;
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(__ct_0S0.256 var=118) const () <367>;
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(__ct_8.257 var=119) const () <369>;
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(__ct_0s0.260 var=122) const () <375>;
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(__ct_4.262 var=124) const () <379>;
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(__ct_2.265 var=128) const () <384>;
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(__tmp.266 var=133) int72__shift_int72__int72__uint2_ (i_incr.49 __ct_2.119 __ct_2.265) <385>;
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(__tmp.271 var=134) int72__shift_int72__int72__uint2_ (__fch___extDM_BufferPtrDMB_buffer_len.71 __ct_2.119 __ct_2.265) <393>;
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} #5 off=0 nxt=-2
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0 : 'signal_processing\\signal_path.c';
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----------
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5 : (0,115:0,2);
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----------
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75 : (0,113:5,0);
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79 : (0,113:5,0);
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84 : (0,114:43,1);
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91 : (0,114:72,1);
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95 : (0,114:91,1);
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103 : (0,114:10,1);
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104 : (0,115:0,0);
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108 : (0,115:0,2);
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109 : (0,115:0,2);
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155 : (0,114:26,1);
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175 : (0,114:58,0);
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201 : (0,113:5,0);
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229 : (0,114:43,1);
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257 : (0,115:0,0);
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285 : (0,114:72,0);
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341 : (0,114:43,0);
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367 : (0,113:5,0);
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369 : (0,114:43,0);
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375 : (0,115:0,0);
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379 : (0,114:72,0);
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384 : (0,114:58,0);
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385 : (0,114:58,1);
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393 : (0,114:91,1);
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