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Calc Funktion weitergecoded - kompiliert

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This commit is contained in:
Patrick Hangl
2026-01-27 16:38:58 +01:00
parent 9b09cb21fa
commit 6f52b7ace4
93 changed files with 15970 additions and 14407 deletions
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240
simulation/Release/chesswork/signal_path-101f20.sfg
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@@ -1,5 +1,5 @@
// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 11:15:58 2026
// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 13:04:23 2026
// Copyright 2014-2025 Synopsys, Inc. All rights reserved.
// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
@@ -35,16 +35,16 @@ F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi :
32 : __extDM typ=int8_ bnd=b stl=DM
33 : __extPM typ=uint20_ bnd=b stl=PM
34 : __sp typ=dmaddr_ bnd=b stl=SP
35 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
36 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
37 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
38 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
35 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
36 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
37 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
38 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
39 : ptr_fir_lms_delay_line typ=int8_ bnd=e sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB
40 : __extDM_BufferPtrDMB typ=int8_ bnd=b stl=DM
41 : ptr_fir_lms_coeffs typ=int8_ bnd=e sz=12 algn=4 stl=DMA tref=BufferPtr_DMA
42 : __extDM_BufferPtr typ=int8_ bnd=b stl=DM
43 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
44 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
43 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
44 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
45 : _ZL2mu typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__sint_DMA
46 : __extDM_int32_ typ=int8_ bnd=b stl=DM
47 : __extDM_int16_ typ=int8_ bnd=b stl=DM
@@ -59,24 +59,24 @@ F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi :
56 : ptr_fir_lms_coeffs_ptr_start typ=int8_ bnd=b stl=DM
57 : __extDM_int64_ typ=int8_ bnd=b stl=DM
58 : __rd___sp typ=dmaddr_ bnd=m
60 : __ptr_cSensor_32 typ=dmaddr_ val=0a bnd=m adro=35
62 : __ptr_accSensor_32 typ=dmaddr_ val=0a bnd=m adro=36
64 : __ptr_c_block_pre typ=dmaddr_ val=0a bnd=m adro=37
66 : __ptr_acc_block_pre typ=dmaddr_ val=0a bnd=m adro=38
60 : __ptr_c_sensor_32 typ=dmaddr_ val=0a bnd=m adro=35
62 : __ptr_acc_sensor_32 typ=dmaddr_ val=0a bnd=m adro=36
64 : __ptr_c_sensor_pre typ=dmaddr_ val=0a bnd=m adro=37
66 : __ptr_acc_sensor_pre typ=dmaddr_ val=0a bnd=m adro=38
67 : __ptr_ptr_fir_lms_delay_line typ=dmaddr_ bnd=m
68 : __ptr_ptr_fir_lms_delay_line typ=dmaddr_ val=0a bnd=m adro=39
70 : __ptr_ptr_fir_lms_coeffs typ=dmaddr_ val=0a bnd=m adro=41
72 : __ptr_acc_block_filt typ=dmaddr_ val=0a bnd=m adro=43
74 : __ptr_out_32 typ=dmaddr_ val=0a bnd=m adro=44
72 : __ptr_filter_accumulator typ=dmaddr_ val=0a bnd=m adro=43
74 : __ptr_output_32 typ=dmaddr_ val=0a bnd=m adro=44
76 : __ptr_mu typ=dmaddr_ val=0a bnd=m adro=45
77 : __ct_0 typ=uint1_ val=0f bnd=m
78 : __la typ=dmaddr_ bnd=p tref=dmaddr___
79 : cSensorSignal typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
80 : accSensorSignal typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
81 : output_mode typ=int32_ bnd=p tref=OutputMode__
82 : cSensor typ=dmaddr_ bnd=p tref=__PDMB__sshort__
83 : accSensor typ=dmaddr_ bnd=p tref=__PDMB__sshort__
84 : out_16 typ=dmaddr_ bnd=p tref=__PDMB__sshort__
82 : c_sensor_input typ=dmaddr_ bnd=p tref=__PDMB__sshort__
83 : acc_sensor_input typ=dmaddr_ bnd=p tref=__PDMB__sshort__
84 : output typ=dmaddr_ bnd=p tref=__PDMB__sshort__
92 : __tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ typ=int32_ bnd=m tref=__sint__
97 : __inl_p_x0 typ=dmaddr_ bnd=m tref=__PDMB__sint__
99 : __inl_p_h typ=dmaddr_ bnd=m tref=__P__sint__
@@ -99,7 +99,7 @@ F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi :
156 : __fch___extDM_int16_ typ=int16_ bnd=m
160 : __tmp typ=int32_ bnd=m
202 : __ct_0 typ=int32_ val=0f bnd=m
205 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre typ=int32_ bnd=m
205 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre typ=int32_ bnd=m
206 : _Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi typ=dmaddr_ val=0r bnd=m
208 : __link typ=dmaddr_ bnd=m
212 : __fch_ptr_fir_lms_delay_line_ptr_current typ=dmaddr_ bnd=m
@@ -113,7 +113,7 @@ F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi :
249 : __fchtmp typ=int32_ bnd=m
259 : __tmp typ=int72_ bnd=m
261 : __tmp typ=int72_ bnd=m
275 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre typ=int32_ bnd=m
275 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre typ=int32_ bnd=m
280 : __tmp typ=int32_ bnd=m
291 : __fch_ptr_fir_lms_coeffs_ptr_start typ=dmaddr_ bnd=m
328 : __fch__ZL2mu typ=int32_ bnd=m
@@ -125,7 +125,7 @@ F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi :
357 : __tmp typ=int32_ bnd=m
358 : __tmp typ=int32_ bnd=m
359 : __tmp typ=int64_ bnd=m
378 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 typ=int32_ bnd=m
378 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32 typ=int32_ bnd=m
382 : __tmp typ=int72_ bnd=m
383 : __tmp typ=int32_ bnd=m
384 : __tmp typ=int16_ bnd=m
@@ -161,16 +161,16 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
(__extDM.30 var=32) source () <54>;
(__extPM.31 var=33) source () <55>;
(__sp.32 var=34) source () <56>;
(_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.33 var=35) source () <57>;
(_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.34 var=36) source () <58>;
(_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.35 var=37) source () <59>;
(_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.36 var=38) source () <60>;
(_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32.33 var=35) source () <57>;
(_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32.34 var=36) source () <58>;
(_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.35 var=37) source () <59>;
(_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.36 var=38) source () <60>;
(ptr_fir_lms_delay_line.37 var=39) source () <61>;
(__extDM_BufferPtrDMB.38 var=40) source () <62>;
(ptr_fir_lms_coeffs.39 var=41) source () <63>;
(__extDM_BufferPtr.40 var=42) source () <64>;
(_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.41 var=43) source () <65>;
(_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.42 var=44) source () <66>;
(_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator.41 var=43) source () <65>;
(_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.42 var=44) source () <66>;
(_ZL2mu.43 var=45) source () <67>;
(__extDM_int32_.44 var=46) source () <68>;
(__extDM_int16_.45 var=47) source () <69>;
@@ -184,10 +184,10 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
(ptr_fir_lms_coeffs_buffer_len.53 var=55) source () <77>;
(ptr_fir_lms_coeffs_ptr_start.54 var=56) source () <78>;
(__extDM_int64_.55 var=57) source () <79>;
(__ptr_cSensor_32.57 var=60) const () <81>;
(__ptr_accSensor_32.59 var=62) const () <83>;
(__ptr_c_block_pre.61 var=64) const () <85>;
(__ptr_acc_block_pre.63 var=66) const () <87>;
(__ptr_c_sensor_32.57 var=60) const () <81>;
(__ptr_acc_sensor_32.59 var=62) const () <83>;
(__ptr_c_sensor_pre.61 var=64) const () <85>;
(__ptr_acc_sensor_pre.63 var=66) const () <87>;
(__ptr_ptr_fir_lms_delay_line.65 var=68) const () <89>;
(__ct_0.75 var=77) const () <99>;
(__la.77 var=78 stl=LR off=0) inp () <101>;
@@ -195,21 +195,21 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
(cSensorSignal.80 var=79 stl=A off=0) inp () <104>;
(accSensorSignal.83 var=80 stl=A off=1) inp () <107>;
(output_mode.86 var=81 stl=RA off=0) inp () <110>;
(cSensor.89 var=82 stl=A off=4) inp () <113>;
(cSensor.90 var=82) deassign (cSensor.89) <114>;
(accSensor.92 var=83 stl=A off=5) inp () <116>;
(accSensor.93 var=83) deassign (accSensor.92) <117>;
(out_16.95 var=84 stl=__spill_WDMA off=0) inp () <119>;
(out_16.96 var=84) deassign (out_16.95) <120>;
(c_sensor_input.89 var=82 stl=A off=4) inp () <113>;
(c_sensor_input.90 var=82) deassign (c_sensor_input.89) <114>;
(acc_sensor_input.92 var=83 stl=A off=5) inp () <116>;
(acc_sensor_input.93 var=83) deassign (acc_sensor_input.92) <117>;
(output.95 var=84 stl=__spill_WDMA off=0) inp () <119>;
(output.96 var=84) deassign (output.95) <120>;
(__rd___sp.98 var=58) rd_res_reg (__R_SP.24 __sp.32) <122>;
(__R_SP.102 var=26 __sp.103 var=34) wr_res_reg (__rt.2219 __sp.32) <126>;
(__fch___extDM_int16_.246 var=141 __extDM_int16_.247 var=47 __vola.248 var=29) load (__M_SDMB.6 cSensor.90 __extDM_int16_.45 __vola.27) <270>;
(__fch___extDM_int16_.246 var=141 __extDM_int16_.247 var=47 __vola.248 var=29) load (__M_SDMB.6 c_sensor_input.90 __extDM_int16_.45 __vola.27) <270>;
(__ct_16.250 var=143) const () <272>;
(__M_WDMA.258 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.259 var=35) store (__tmp.2415 __ptr_cSensor_32.57 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.33) <280>;
(__fch___extDM_int16_.265 var=156 __extDM_int16_.266 var=47 __vola.267 var=29) load (__M_SDMB.6 accSensor.93 __extDM_int16_.247 __vola.248) <286>;
(__M_WDMA.277 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.278 var=36) store (__tmp.2420 __ptr_accSensor_32.59 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.34) <296>;
(__M_WDMA.563 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.564 var=37) store (__tmp.2415 __ptr_c_block_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.35) <494>;
(__M_WDMA.576 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.577 var=38) store (__tmp.2420 __ptr_acc_block_pre.63 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.36) <506>;
(__M_WDMA.258 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32.259 var=35) store (__tmp.2415 __ptr_c_sensor_32.57 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32.33) <280>;
(__fch___extDM_int16_.265 var=156 __extDM_int16_.266 var=47 __vola.267 var=29) load (__M_SDMB.6 acc_sensor_input.93 __extDM_int16_.247 __vola.248) <286>;
(__M_WDMA.277 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32.278 var=36) store (__tmp.2420 __ptr_acc_sensor_32.59 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32.34) <296>;
(__M_WDMA.563 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.564 var=37) store (__tmp.2415 __ptr_c_sensor_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.35) <494>;
(__M_WDMA.576 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.577 var=38) store (__tmp.2420 __ptr_acc_sensor_pre.63 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.36) <506>;
(_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi.766 var=206) const () <608>;
(__link.768 var=208) dmaddr__call_dmaddr_ (_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi.766) <610>;
(__rt.2219 var=481) __Pvoid__pl___Pvoid_int18_ (__rd___sp.98 __ct_0S0.2408) <1905>;
@@ -219,9 +219,9 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
(__tmp.2420 var=160) int72__shift_int72__int72__uint2_ (__fch___extDM_int16_.265 __ct_16.250 __ct_2.2414) <2192>;
call {
(__ptr_ptr_fir_lms_delay_line.760 var=67 stl=A off=4) assign (__ptr_ptr_fir_lms_delay_line.65) <602>;
(__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.765 var=205 stl=RA off=0) assign (__tmp.2420) <607>;
(__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.765 var=205 stl=RA off=0) assign (__tmp.2420) <607>;
(__link.769 var=208 stl=LR off=0) assign (__link.768) <611>;
(_ZL2mu.770 var=45 __extDM.771 var=32 __extDM_BufferPtr.772 var=42 __extDM_BufferPtrDMB.773 var=40 __extDM___PDMint32_.774 var=51 __extDM_int16_.775 var=47 __extDM_int32_.776 var=46 __extDM_int64_.777 var=57 __extDM_void.778 var=48 __extPM.779 var=33 __extPM_void.780 var=49 ptr_fir_lms_coeffs.781 var=41 ptr_fir_lms_coeffs_buffer_len.782 var=55 ptr_fir_lms_coeffs_ptr_current.783 var=53 ptr_fir_lms_coeffs_ptr_start.784 var=56 ptr_fir_lms_delay_line.785 var=39 ptr_fir_lms_delay_line_buffer_len.786 var=54 ptr_fir_lms_delay_line_ptr_current.787 var=50 ptr_fir_lms_delay_line_ptr_start.788 var=52 __vola.789 var=29) F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi (__link.769 __ptr_ptr_fir_lms_delay_line.760 __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.765 _ZL2mu.43 __extDM.30 __extDM_BufferPtr.40 __extDM_BufferPtrDMB.38 __extDM___PDMint32_.49 __extDM_int16_.266 __extDM_int32_.44 __extDM_int64_.55 __extDM_void.46 __extPM.31 __extPM_void.47 ptr_fir_lms_coeffs.39 ptr_fir_lms_coeffs_buffer_len.53 ptr_fir_lms_coeffs_ptr_current.51 ptr_fir_lms_coeffs_ptr_start.54 ptr_fir_lms_delay_line.37 ptr_fir_lms_delay_line_buffer_len.52 ptr_fir_lms_delay_line_ptr_current.48 ptr_fir_lms_delay_line_ptr_start.50 __vola.267) <612>;
(_ZL2mu.770 var=45 __extDM.771 var=32 __extDM_BufferPtr.772 var=42 __extDM_BufferPtrDMB.773 var=40 __extDM___PDMint32_.774 var=51 __extDM_int16_.775 var=47 __extDM_int32_.776 var=46 __extDM_int64_.777 var=57 __extDM_void.778 var=48 __extPM.779 var=33 __extPM_void.780 var=49 ptr_fir_lms_coeffs.781 var=41 ptr_fir_lms_coeffs_buffer_len.782 var=55 ptr_fir_lms_coeffs_ptr_current.783 var=53 ptr_fir_lms_coeffs_ptr_start.784 var=56 ptr_fir_lms_delay_line.785 var=39 ptr_fir_lms_delay_line_buffer_len.786 var=54 ptr_fir_lms_delay_line_ptr_current.787 var=50 ptr_fir_lms_delay_line_ptr_start.788 var=52 __vola.789 var=29) F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi (__link.769 __ptr_ptr_fir_lms_delay_line.760 __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.765 _ZL2mu.43 __extDM.30 __extDM_BufferPtr.40 __extDM_BufferPtrDMB.38 __extDM___PDMint32_.49 __extDM_int16_.266 __extDM_int32_.44 __extDM_int64_.55 __extDM_void.46 __extPM.31 __extPM_void.47 ptr_fir_lms_coeffs.39 ptr_fir_lms_coeffs_buffer_len.53 ptr_fir_lms_coeffs_ptr_current.51 ptr_fir_lms_coeffs_ptr_start.54 ptr_fir_lms_delay_line.37 ptr_fir_lms_delay_line_buffer_len.52 ptr_fir_lms_delay_line_ptr_current.48 ptr_fir_lms_delay_line_ptr_start.50 __vola.267) <612>;
} #14 off=1
#616 off=2
(__ptr_ptr_fir_lms_coeffs.67 var=70) const () <91>;
@@ -282,15 +282,15 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
} #19
} #16 rng=[1,65535]
#99 off=4
(__ptr_acc_block_filt.69 var=72) const () <93>;
(__ptr_out_32.71 var=74) const () <95>;
(__ptr_filter_accumulator.69 var=72) const () <93>;
(__ptr_output_32.71 var=74) const () <95>;
(__ptr_mu.73 var=76) const () <97>;
(__inl_acc1_C.1130 var=111) accum_t__pl_accum_t_accum_t (__inl_acc1_A.1059 __inl_acc1_B.1061) <866>;
(__tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131 var=92) __sint_rnd_saturate_accum_t (__inl_acc1_C.1130) <867>;
(__M_WDMB.1135 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.1136 var=43) store (__tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131 __ptr_acc_block_filt.69 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.41) <871>;
(__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.1140 var=275) load (__M_WDMA.9 __ptr_c_block_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.564) <875>;
(__tmp.1145 var=280) __sint__mi___sint___sint (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.1140 __tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131) <880>;
(__M_WDMB.1149 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1150 var=44) store (__tmp.1145 __ptr_out_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.42) <884>;
(__M_WDMB.1135 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator.1136 var=43) store (__tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131 __ptr_filter_accumulator.69 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator.41) <871>;
(__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.1140 var=275) load (__M_WDMA.9 __ptr_c_sensor_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.564) <875>;
(__tmp.1145 var=280) __sint__mi___sint___sint (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.1140 __tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1131) <880>;
(__M_WDMB.1149 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1150 var=44) store (__tmp.1145 __ptr_output_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.42) <884>;
(__fch_ptr_fir_lms_coeffs_ptr_start.1166 var=291) load (__M_WDMA.9 __rt.2395 ptr_fir_lms_coeffs_ptr_start.784) <900>;
(__fch__ZL2mu.1214 var=328) load (__M_WDMA.9 __ptr_mu.73 _ZL2mu.770) <948>;
(__inl_prod.1216 var=125) __sint_rnd_saturate_accum_t (__inl_acc_C.2046) <950>;
@@ -341,10 +341,10 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
} #24
} #21 rng=[1,65535]
#36 off=6 nxt=-2
(__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1712 var=378) load (__M_WDMB.10 __ptr_out_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1150) <1355>;
(__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1712 var=378) load (__M_WDMB.10 __ptr_output_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1150) <1355>;
(__tmp.1717 var=383) __sint_rnd_saturate_accum_t (__tmp.2430) <1360>;
(__tmp.1718 var=384) __sshort___sshort___sint (__tmp.1717) <1361>;
(__M_SDMB.1724 var=8 __extDM_int16_.1725 var=47 __vola.1726 var=29) store (__tmp.1718 out_16.96 __extDM_int16_.775 __vola.789) <1367>;
(__M_SDMB.1724 var=8 __extDM_int16_.1725 var=47 __vola.1726 var=29) store (__tmp.1718 output.96 __extDM_int16_.775 __vola.789) <1367>;
(__rd___sp.1913 var=58) rd_res_reg (__R_SP.24 __sp.103) <1467>;
(__R_SP.1917 var=26 __sp.1918 var=34) wr_res_reg (__rt.2241 __sp.103) <1471>;
() void_ret_dmaddr_ (__la.78) <1472>;
@@ -352,16 +352,16 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
() sink (__extDM.771) <1476>;
() sink (__extPM.779) <1477>;
() sink (__sp.1918) <1478>;
() sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.259) <1479>;
() sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.278) <1480>;
() sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.564) <1481>;
() sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.577) <1482>;
() sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_sensor_32.259) <1479>;
() sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_sensor_32.278) <1480>;
() sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12c_sensor_pre.564) <1481>;
() sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_sensor_pre.577) <1482>;
() sink (ptr_fir_lms_delay_line.785) <1483>;
() sink (__extDM_BufferPtrDMB.773) <1484>;
() sink (ptr_fir_lms_coeffs.781) <1485>;
() sink (__extDM_BufferPtr.772) <1486>;
() sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.1136) <1487>;
() sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1150) <1488>;
() sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E18filter_accumulator.1136) <1487>;
() sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1150) <1488>;
() sink (_ZL2mu.1382) <1489>;
() sink (__extDM_int32_.1384) <1490>;
() sink (__extDM_int16_.1725) <1491>;
@@ -378,69 +378,69 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
() sink (__ct_0.75) <1502>;
(__rt.2241 var=481) __Pvoid__pl___Pvoid_int18_ (__rd___sp.1913 __ct_0s0.2409) <1933>;
(__ct_0s0.2409 var=510) const () <2174>;
(__tmp.2430 var=382) int72__shift_int72__int72__uint2_ (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1712 __ct_16.250 __ct_1.2429) <2208>;
(__tmp.2430 var=382) int72__shift_int72__int72__uint2_ (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E9output_32.1712 __ct_16.250 __ct_1.2429) <2208>;
} #0
0 : 'signal_processing\\signal_path.c';
----------
0 : (0,343:0,0);
14 : (0,381:4,26);
16 : (0,384:23,43);
16 : (0,384:27,43);
21 : (0,388:4,85);
36 : (0,396:0,113);
99 : (0,388:4,83);
404 : (0,384:23,56);
404 : (0,384:27,56);
474 : (0,388:4,0);
594 : (0,381:4,26);
616 : (0,384:23,43);
616 : (0,384:27,43);
----------
85 : (0,386:16,0);
85 : (0,386:19,0);
87 : (0,381:67,0);
89 : (0,384:23,0);
91 : (0,384:23,0);
89 : (0,384:27,0);
91 : (0,384:27,0);
93 : (0,384:4,0);
95 : (0,386:4,0);
122 : (0,343:5,0);
126 : (0,343:5,0);
266 : (0,368:39,0);
270 : (0,368:39,11);
272 : (0,368:47,0);
280 : (0,368:18,11);
286 : (0,369:42,12);
296 : (0,369:20,12);
494 : (0,374:20,19);
506 : (0,375:22,20);
266 : (0,368:47,0);
270 : (0,368:47,11);
272 : (0,368:55,0);
280 : (0,368:19,11);
286 : (0,369:50,12);
296 : (0,369:21,12);
494 : (0,374:21,19);
506 : (0,375:23,20);
602 : (0,381:42,0);
603 : (0,381:81,0);
607 : (0,381:80,0);
603 : (0,381:82,0);
607 : (0,381:81,0);
610 : (0,381:4,26);
611 : (0,381:4,0);
612 : (0,381:4,26);
622 : (0,384:23,33);
627 : (0,384:23,34);
632 : (0,384:23,35);
637 : (0,384:23,36);
642 : (0,384:23,37);
706 : (0,384:23,43);
708 : (0,384:23,43);
711 : (0,384:23,43);
712 : (0,384:23,43);
747 : (0,384:23,43);
748 : (0,384:23,44);
758 : (0,384:23,49);
759 : (0,384:23,50);
770 : (0,384:23,55);
772 : (0,384:23,56);
777 : (0,384:23,59);
825 : (0,384:23,59);
827 : (0,384:23,59);
830 : (0,384:23,59);
831 : (0,384:23,59);
866 : (0,384:23,60);
867 : (0,384:23,61);
871 : (0,384:18,64);
875 : (0,386:27,65);
880 : (0,386:31,65);
884 : (0,386:10,65);
622 : (0,384:27,33);
627 : (0,384:27,34);
632 : (0,384:27,35);
637 : (0,384:27,36);
642 : (0,384:27,37);
706 : (0,384:27,43);
708 : (0,384:27,43);
711 : (0,384:27,43);
712 : (0,384:27,43);
747 : (0,384:27,43);
748 : (0,384:27,44);
758 : (0,384:27,49);
759 : (0,384:27,50);
770 : (0,384:27,55);
772 : (0,384:27,56);
777 : (0,384:27,59);
825 : (0,384:27,59);
827 : (0,384:27,59);
830 : (0,384:27,59);
831 : (0,384:27,59);
866 : (0,384:27,60);
867 : (0,384:27,61);
871 : (0,384:22,64);
875 : (0,386:31,65);
880 : (0,386:35,65);
884 : (0,386:13,65);
900 : (0,388:4,73);
948 : (0,388:4,82);
950 : (0,388:4,83);
@@ -471,45 +471,45 @@ F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ {
1148 : (0,388:4,96);
1149 : (0,388:4,96);
1150 : (0,388:4,96);
1355 : (0,393:48,103);
1355 : (0,393:51,103);
1360 : (0,393:20,103);
1361 : (0,393:18,103);
1367 : (0,393:14,103);
1467 : (0,396:0,0);
1471 : (0,396:0,113);
1472 : (0,396:0,113);
1624 : (0,384:23,48);
1635 : (0,384:23,54);
1643 : (0,384:23,55);
1651 : (0,384:23,56);
1624 : (0,384:27,48);
1635 : (0,384:27,54);
1643 : (0,384:27,55);
1651 : (0,384:27,56);
1662 : (0,388:4,80);
1670 : (0,388:4,82);
1678 : (0,388:4,88);
1686 : (0,388:4,89);
1697 : (0,388:4,90);
1708 : (0,388:4,91);
1738 : (0,384:23,0);
1738 : (0,384:27,0);
1740 : (0,388:4,0);
1861 : (0,384:23,0);
1861 : (0,384:27,0);
1905 : (0,343:5,0);
1933 : (0,396:0,0);
1961 : (0,384:23,0);
1989 : (0,384:23,0);
1961 : (0,384:27,0);
1989 : (0,384:27,0);
2017 : (0,388:4,0);
2045 : (0,384:23,0);
2073 : (0,384:23,0);
2101 : (0,384:23,0);
2045 : (0,384:27,0);
2073 : (0,384:27,0);
2101 : (0,384:27,0);
2129 : (0,388:4,0);
2172 : (0,343:5,0);
2174 : (0,396:0,0);
2176 : (0,384:23,0);
2176 : (0,384:27,0);
2178 : (0,388:4,0);
2183 : (0,368:44,0);
2184 : (0,368:44,11);
2192 : (0,369:47,12);
2200 : (0,384:23,48);
2207 : (0,393:53,0);
2208 : (0,393:53,103);
2309 : (0,384:23,59);
2183 : (0,368:52,0);
2184 : (0,368:52,11);
2192 : (0,369:55,12);
2200 : (0,384:27,48);
2207 : (0,393:56,0);
2208 : (0,393:56,103);
2309 : (0,384:27,59);
2312 : (0,388:4,96);