C/DSP_Simulation
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Calc Funktion weitergecoded - kompiliert

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This commit is contained in:
Patrick Hangl
2026-01-27 16:38:58 +01:00
parent 9b09cb21fa
commit 6f52b7ace4
93 changed files with 15970 additions and 14407 deletions
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21
simulation/Release/chesswork/main.gvt
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@@ -1,5 +1,5 @@
// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 20 09:59:26 2026
// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Tue Jan 27 16:29:55 2026
// Copyright 2014-2025 Synopsys, Inc. All rights reserved.
// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32
@@ -8,8 +8,8 @@
2 : _irq_stat_var_ typ=uint15_ bnd=e sz=1 algn=1 stl=irq_stat tref=uint15__irq_stat
4 : stdin typ=int8_ bnd=e sz=4 algn=4 stl=DMA tref=__PFILE_DMA
5 : stdout typ=int8_ bnd=e sz=4 algn=4 stl=DMA tref=__PFILE_DMA
10 : _ZL16corrupted_signal typ=int8_ bnd=f sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA
11 : _ZL22reference_noise_signal typ=int8_ bnd=f sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA
10 : _ZL17c_sensor_signal_t typ=int8_ bnd=f sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA
11 : _ZL19acc_sensor_signal_t typ=int8_ bnd=f sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA
12 : _ZL10input_port typ=int8_ val=8388608f bnd=f sz=8 algn=2 stl=DMB tref=__A4DMB__sshort_DMB
13 : _ZL11output_port typ=int8_ val=8388624f bnd=f sz=8 algn=2 stl=DMB tref=__A4DMB__sshort_DMB
14 : _ZL15input_pointer_0 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__PDMB__sshort_DMA
@@ -17,14 +17,13 @@
16 : _ZL14output_pointer typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__PDMB__sshort_DMA
17 : _ZL14sample_pointer typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__PDMB__sshort_DMA
18 : _ZL6sample typ=int8_ bnd=f sz=2 algn=2 stl=DMB tref=int16_t_DMB
19 : _ZZ4mainvE4mode typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=OutputMode_DMA
20 : _ZL13__str8a4fef85 typ=int8_ bnd=F sz=47 algn=1 stl=DMA tref=__A47__cchar_DMA
21 : _ZL13__str00f02b8f typ=int8_ bnd=F sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA
22 : _ZL13__strff0646f3 typ=int8_ bnd=F sz=43 algn=1 stl=DMA tref=__A43__cchar_DMA
23 : _ZL13__str8a32ec0e typ=int8_ bnd=F sz=54 algn=1 stl=DMA tref=__A54__cchar_DMA
24 : _ZL13__str00f52cca typ=int8_ bnd=F sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA
25 : _ZL13__str41232700 typ=int8_ bnd=F sz=3 algn=1 stl=DMA tref=__A3__cchar_DMA
26 : _ZL13__str2eb09b76 typ=int8_ bnd=F sz=4 algn=1 stl=DMA tref=__A4__cchar_DMA
19 : _ZL13__strdb58f936 typ=int8_ bnd=F sz=48 algn=1 stl=DMA tref=__A48__cchar_DMA
20 : _ZL13__str00f02b8f typ=int8_ bnd=F sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA
21 : _ZL13__strff0646f3 typ=int8_ bnd=F sz=43 algn=1 stl=DMA tref=__A43__cchar_DMA
22 : _ZL13__str8a32ec0e typ=int8_ bnd=F sz=54 algn=1 stl=DMA tref=__A54__cchar_DMA
23 : _ZL13__str00f52cca typ=int8_ bnd=F sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA
24 : _ZL13__str41232700 typ=int8_ bnd=F sz=3 algn=1 stl=DMA tref=__A3__cchar_DMA
25 : _ZL13__str2eb09b76 typ=int8_ bnd=F sz=4 algn=1 stl=DMA tref=__A4__cchar_DMA
]
__main_sttc {
} #0