376 lines
15 KiB
TeX
376 lines
15 KiB
TeX
\relax
|
||
\@writefile{toc}{\contentsline {section}{\numberline {4}Hardware implementation and optimization of the ANR Algorithm on a low-power system}{40}{}\protected@file@percent }
|
||
\acronymused{ANR}
|
||
\acronymused{CI}
|
||
\acronymused{ANR}
|
||
\acronymused{ANR}
|
||
\acronymused{ANR}
|
||
\@writefile{toc}{\contentsline {subsection}{\numberline {4.1}Low-power system architecture and integration}{40}{}\protected@file@percent }
|
||
\AC@undonewlabel{acro:SOC}
|
||
\newlabel{acro:SOC}{{4.1}{40}{}{}{}}
|
||
\acronymused{SOC}
|
||
\AC@undonewlabel{acro:ARM}
|
||
\newlabel{acro:ARM}{{4.1}{40}{}{}{}}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.1.1}ARM and DSP hardware architecture overview}{40}{}\protected@file@percent }
|
||
\acronymused{ARM}
|
||
\acronymused{ARM}
|
||
\acronymused{CI}
|
||
\acronymused{DSP}
|
||
\acronymused{DSP}
|
||
\AC@undonewlabel{acro:MAC}
|
||
\newlabel{acro:MAC}{{4.1.1}{40}{}{}{}}
|
||
\acronymused{MAC}
|
||
\acronymused{ARM}
|
||
\acronymused{ANR}
|
||
\acronymused{ANR}
|
||
\acronymused{SOC}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\acronymused{ANR}
|
||
\acronymused{DSP}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\AC@undonewlabel{acro:DMA}
|
||
\newlabel{acro:DMA}{{4.1.1}{41}{}{}{}}
|
||
\acronymused{DMA}
|
||
\AC@undonewlabel{acro:PCM}
|
||
\newlabel{acro:PCM}{{4.1.1}{41}{}{}{}}
|
||
\acronymused{PCM}
|
||
\acronymused{DSP}
|
||
\acronymused{PCM}
|
||
\acronymused{DSP}
|
||
\acronymused{DSP}
|
||
\acronymused{DSP}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\acronymused{DSP}
|
||
\AC@undonewlabel{acro:ALU}
|
||
\newlabel{acro:ALU}{{4.1.1}{41}{}{}{}}
|
||
\acronymused{ALU}
|
||
\acronymused{DSP}
|
||
\acronymused{MAC}
|
||
\acronymused{ALU}
|
||
\acronymused{MAC}
|
||
\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.1.2}Inter-core communication mechanisms}{41}{}\protected@file@percent }
|
||
\acronymused{CI}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\acronymused{DSP}
|
||
\acronymused{ARM}
|
||
\@writefile{lof}{\contentsline {figure}{\numberline {32}{\ignorespaces Simplified visualization of the interaction between the \ac {CI}-System, the \ac {ARM} core and the \ac {DSP} core, making use of the \ac {PCM} interface and shared memory for audio data exchange.}}{42}{}\protected@file@percent }
|
||
\acronymused{CI}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\acronymused{PCM}
|
||
\newlabel{fig:fig_dsp_setup.jpg}{{32}{42}{}{}{}}
|
||
\acronymused{ARM}
|
||
\acronymused{PCM}
|
||
\acronymused{DMA}
|
||
\acronymused{PCM}
|
||
\acronymused{DSP}
|
||
\acronymused{DSP}
|
||
\acronymused{ANR}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\acronymused{DMA}
|
||
\acronymused{PCM}
|
||
\@writefile{lof}{\contentsline {figure}{\numberline {33}{\ignorespaces Simplified flowchart of the sample processing between the \ac {ARM} core and the \ac {DSP} core via interrupts and shared memory.}}{43}{}\protected@file@percent }
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\newlabel{fig:fig_dsp_comm.jpg}{{33}{43}{}{}{}}
|
||
\@writefile{toc}{\contentsline {subsection}{\numberline {4.2}Software architecture and execution flow}{43}{}\protected@file@percent }
|
||
\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.2.1}ARM–DSP communication and data exchange details}{43}{}\protected@file@percent }
|
||
\acronymused{ANR}
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||
\acronymused{DSP}
|
||
\acronymused{DSP}
|
||
\acronymused{ANR}
|
||
\acronymused{DSP}
|
||
\acronymused{ARM}
|
||
\acronymused{ARM}
|
||
\acronymused{DMA}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\acronymused{DSP}
|
||
\acronymused{ARM}
|
||
\acronymused{ARM}
|
||
\acronymused{DMA}
|
||
\acronymused{PCM}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\acronymused{DSP}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\acronymused{ARM}
|
||
\acronymused{ANR}
|
||
\acronymused{DSP}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\acronymused{DMA}
|
||
\acronymused{PCM}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\@writefile{lof}{\contentsline {figure}{\numberline {34}{\ignorespaces Detailed visualization of the \ac {DMA} operations between the PCM interface to the shared memory section. When the memory buffer occupied, an interrupt is triggerd, either to the \ac {DSP} core or to the \ac {ARM} core, depending if triggered during a Read- or Write-operation.}}{45}{}\protected@file@percent }
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||
\acronymused{DMA}
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||
\acronymused{DSP}
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||
\acronymused{ARM}
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||
\newlabel{fig:fig_dsp_dma.jpg}{{34}{45}{}{}{}}
|
||
\acronymused{DMA}
|
||
\acronymused{DMA}
|
||
\acronymused{PCM}
|
||
\acronymused{DSP}
|
||
\acronymused{DMA}
|
||
\acronymused{PCM}
|
||
\acronymused{ARM}
|
||
\acronymused{ANR}
|
||
\acronymused{DSP}
|
||
\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.2.2}System control flow and main processing loop}{45}{}\protected@file@percent }
|
||
\acronymused{ANR}
|
||
\acronymused{DSP}
|
||
\@writefile{toc}{\contentsline {paragraph}{Memory initialization and mapping}{45}{}\protected@file@percent }
|
||
\acronymused{DSP}
|
||
\acronymused{PCM}
|
||
\acronymused{DSP}
|
||
\newlabel{fig:fig_dps_code_memory}{{4.2.2}{46}{}{}{}}
|
||
\@writefile{lof}{\contentsline {figure}{\numberline {35}{\ignorespaces Low-level implementation: Memory initialization and mapping}}{46}{}\protected@file@percent }
|
||
\@writefile{lof}{\contentsline {figure}{\numberline {36}{\ignorespaces Exemplary memory map of the 4-element input buffer array. As it is initialized as a 16 bit integer array, each element occupies 2 bytes of memory, resulting in a total size of 8 bytes for the entire array. As the DSP architecture works in 32-bit double-words, the bytewise adressing is a result of the compiler abstraction.}}{46}{}\protected@file@percent }
|
||
\newlabel{fig:fig_compiler.jpg}{{36}{46}{}{}{}}
|
||
\@writefile{toc}{\contentsline {paragraph}{Main loop and interrupt handling}{46}{}\protected@file@percent }
|
||
\acronymused{DSP}
|
||
\acronymused{ANR}
|
||
\acronymused{ARM}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\acronymused{ARM}
|
||
\acronymused{DSP}
|
||
\@writefile{lof}{\contentsline {figure}{\numberline {37}{\ignorespaces Low-level implementation: Main loop and interrupt handling}}{47}{}\protected@file@percent }
|
||
\newlabel{fig:fig_dps_code_mainloop}{{37}{47}{}{}{}}
|
||
\@writefile{lof}{\contentsline {figure}{\numberline {38}{\ignorespaces Flow diagram of the code implementation of the main loop and interrupt handling on the \ac {DSP} core.}}{48}{}\protected@file@percent }
|
||
\acronymused{DSP}
|
||
\newlabel{fig:fig_dsp_logic.jpg}{{38}{48}{}{}{}}
|
||
\@writefile{toc}{\contentsline {paragraph}{calculate\_output()-function}{48}{}\protected@file@percent }
|
||
\acronymused{DSP}
|
||
\acronymused{ANR}
|
||
\acronymused{DSP}
|
||
\@writefile{toc}{\contentsline {subsection}{\numberline {4.3}DSP-level implementation of the ANR algorithm}{49}{}\protected@file@percent }
|
||
\acronymused{DSP}
|
||
\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.3.1}DSP-specific optimizations for real-time processing}{49}{}\protected@file@percent }
|
||
\acronymused{ANR}
|
||
\acronymused{DSP}
|
||
\@writefile{toc}{\contentsline {paragraph}{Logic operations}{49}{}\protected@file@percent }
|
||
\acronymused{DSP}
|
||
\acronymused{DSP}
|
||
\@writefile{lof}{\contentsline {figure}{\numberline {39}{\ignorespaces Manual implementation of a max-function, returning the maximum of two integer values, taking 12 cycles to execute. The intrinsic functions of the DSP compiler allows a 4-cycle implementation of such an operations.}}{49}{}\protected@file@percent }
|
||
\newlabel{fig:fig_dsp_code_find_max}{{39}{49}{}{}{}}
|
||
\@writefile{toc}{\contentsline {paragraph}{Cyclic array iteration}{49}{}\protected@file@percent }
|
||
\acronymused{ANR}
|
||
\@writefile{lof}{\contentsline {figure}{\numberline {40}{\ignorespaces Manual implementation of a cyclic array iteration function in C, taking the core 20 cycles to execute an pointer inremen of 1. The intrinsic functions of the DSP compiler allows a single-cycle implementation of such cyclic additions.}}{50}{}\protected@file@percent }
|
||
\newlabel{fig:fig_dsp_code_cyclic_add}{{40}{50}{}{}{}}
|
||
\acronymused{DSP}
|
||
\acronymused{DSP}
|
||
\@writefile{toc}{\contentsline {paragraph}{Fractional fixed-point arithmetic}{50}{}\protected@file@percent }
|
||
\acronymused{DSP}
|
||
\acronymused{MAC}
|
||
\acronymused{ALU}
|
||
\acronymused{DSP}
|
||
\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.3.2}Performance quantization of the ANR calculation}{50}{}\protected@file@percent }
|
||
\acronymused{ANR}
|
||
\acronymused{DSP}
|
||
\acronymused{FIR}
|
||
\acronymused{FIR}
|
||
\acronymused{DSP}
|
||
\@writefile{toc}{\contentsline {paragraph}{write\_buffer}{51}{}\protected@file@percent }
|
||
\acronymused{DSP}
|
||
\@writefile{toc}{\contentsline {paragraph}{apply\_fir\_filter}{51}{}\protected@file@percent }
|
||
\acronymused{FIR}
|
||
\acronymused{MAC}
|
||
\acronymused{DSP}
|
||
\acronymused{DSP}
|
||
\@writefile{lof}{\contentsline {figure}{\numberline {41}{\ignorespaces Code snippet of the $apply\_fir\_filter$-function, showing the use of the dual \ac {MAC} architecture of the \ac {DSP} and the fractional multiplication function. The loop iterates through the filter coefficients and reference noise signal samples, performing two multiplications and two additions in each cycle.}}{52}{}\protected@file@percent }
|
||
\acronymused{MAC}
|
||
\acronymused{DSP}
|
||
\newlabel{fig:fig_dsp_code_apply_fir_filter}{{41}{52}{}{}{}}
|
||
\@writefile{lof}{\contentsline {figure}{\numberline {42}{\ignorespaces Visualization of the FIR filter calculation in the $apply\_fir\_filter$-function during the 2nd cyclce of a calculation loop. The reference noise signal samples are stored in the sample line, while the filter coefficients are stored in a separate memory section (filter line).}}{52}{}\protected@file@percent }
|
||
\newlabel{fig:fig_dsp_fir_cycle.jpg}{{42}{52}{}{}{}}
|
||
\@writefile{toc}{\contentsline {paragraph}{update\_output}{53}{}\protected@file@percent }
|
||
\@writefile{toc}{\contentsline {paragraph}{update\_filter\_coefficient}{53}{}\protected@file@percent }
|
||
\acronymused{DSP}
|
||
\acronymused{MAC}
|
||
\@writefile{lof}{\contentsline {figure}{\numberline {43}{\ignorespaces Code snippet of the $update\_filter\_coefficient$-function, again making use of of the dual \ac {MAC} architecture of the \ac {DSP} and the fractional multiplication function. Additionaly, 32-bit values are loaded and stored as 64-bit values, using two also intrinisc functions, allowing to update two filter coefficients in a single cycle.}}{53}{}\protected@file@percent }
|
||
\acronymused{MAC}
|
||
\acronymused{DSP}
|
||
\newlabel{fig:fig_dsp_code_update_filter_coefficients}{{43}{53}{}{}{}}
|
||
\@writefile{lof}{\contentsline {figure}{\numberline {44}{\ignorespaces Visualization of the coefficient calculation in the $update\_filter\_coefficient$-function during the 2nd cyclce of a calculation loop. The output is multiplied with the step size and the corresponding sample from the sample line, before being added to the current filter coefficient.}}{54}{}\protected@file@percent }
|
||
\newlabel{fig:fig_dsp_coefficient_cycle.jpg}{{44}{54}{}{}{}}
|
||
\@writefile{toc}{\contentsline {paragraph}{write\_output}{54}{}\protected@file@percent }
|
||
\newlabel{equation_computing}{{24}{54}{}{}{}}
|
||
\newlabel{equation_c_1}{{25}{54}{}{}{}}
|
||
\newlabel{equation_c_2}{{26}{54}{}{}{}}
|
||
\newlabel{equation_c_3}{{27}{54}{}{}{}}
|
||
\newlabel{equation_c_4}{{28}{54}{}{}{}}
|
||
\newlabel{equation_c_5}{{30}{54}{}{}{}}
|
||
\newlabel{equation_computing_final}{{31}{55}{}{}{}}
|
||
\acronymused{DSP}
|
||
\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.3.3}Performance evaluation of different implementation variants}{55}{}\protected@file@percent }
|
||
\acronymused{DSP}
|
||
\acronymused{ANR}
|
||
\acronymused{FIR}
|
||
\acronymused{ANR}
|
||
\acronymused{SNR}
|
||
\@setckpt{chapter_04}{
|
||
\setcounter{page}{56}
|
||
\setcounter{equation}{31}
|
||
\setcounter{enumi}{0}
|
||
\setcounter{enumii}{0}
|
||
\setcounter{enumiii}{0}
|
||
\setcounter{enumiv}{0}
|
||
\setcounter{footnote}{0}
|
||
\setcounter{mpfootnote}{0}
|
||
\setcounter{part}{0}
|
||
\setcounter{section}{4}
|
||
\setcounter{subsection}{3}
|
||
\setcounter{subsubsection}{3}
|
||
\setcounter{paragraph}{0}
|
||
\setcounter{subparagraph}{0}
|
||
\setcounter{figure}{44}
|
||
\setcounter{table}{0}
|
||
\setcounter{float@type}{16}
|
||
\setcounter{tabx@nest}{0}
|
||
\setcounter{listtotal}{0}
|
||
\setcounter{listcount}{0}
|
||
\setcounter{liststart}{0}
|
||
\setcounter{liststop}{0}
|
||
\setcounter{citecount}{0}
|
||
\setcounter{citetotal}{0}
|
||
\setcounter{multicitecount}{0}
|
||
\setcounter{multicitetotal}{0}
|
||
\setcounter{instcount}{18}
|
||
\setcounter{maxnames}{3}
|
||
\setcounter{minnames}{1}
|
||
\setcounter{maxitems}{3}
|
||
\setcounter{minitems}{1}
|
||
\setcounter{citecounter}{0}
|
||
\setcounter{maxcitecounter}{0}
|
||
\setcounter{savedcitecounter}{0}
|
||
\setcounter{uniquelist}{0}
|
||
\setcounter{uniquename}{0}
|
||
\setcounter{refsection}{0}
|
||
\setcounter{refsegment}{0}
|
||
\setcounter{maxextratitle}{0}
|
||
\setcounter{maxextratitleyear}{0}
|
||
\setcounter{maxextraname}{3}
|
||
\setcounter{maxextradate}{0}
|
||
\setcounter{maxextraalpha}{0}
|
||
\setcounter{abbrvpenalty}{50}
|
||
\setcounter{highnamepenalty}{50}
|
||
\setcounter{lownamepenalty}{25}
|
||
\setcounter{maxparens}{3}
|
||
\setcounter{parenlevel}{0}
|
||
\setcounter{blx@maxsection}{0}
|
||
\setcounter{mincomprange}{10}
|
||
\setcounter{maxcomprange}{100000}
|
||
\setcounter{mincompwidth}{1}
|
||
\setcounter{afterword}{0}
|
||
\setcounter{savedafterword}{0}
|
||
\setcounter{annotator}{0}
|
||
\setcounter{savedannotator}{0}
|
||
\setcounter{author}{0}
|
||
\setcounter{savedauthor}{0}
|
||
\setcounter{bookauthor}{0}
|
||
\setcounter{savedbookauthor}{0}
|
||
\setcounter{commentator}{0}
|
||
\setcounter{savedcommentator}{0}
|
||
\setcounter{editor}{0}
|
||
\setcounter{savededitor}{0}
|
||
\setcounter{editora}{0}
|
||
\setcounter{savededitora}{0}
|
||
\setcounter{editorb}{0}
|
||
\setcounter{savededitorb}{0}
|
||
\setcounter{editorc}{0}
|
||
\setcounter{savededitorc}{0}
|
||
\setcounter{foreword}{0}
|
||
\setcounter{savedforeword}{0}
|
||
\setcounter{holder}{0}
|
||
\setcounter{savedholder}{0}
|
||
\setcounter{introduction}{0}
|
||
\setcounter{savedintroduction}{0}
|
||
\setcounter{namea}{0}
|
||
\setcounter{savednamea}{0}
|
||
\setcounter{nameb}{0}
|
||
\setcounter{savednameb}{0}
|
||
\setcounter{namec}{0}
|
||
\setcounter{savednamec}{0}
|
||
\setcounter{translator}{0}
|
||
\setcounter{savedtranslator}{0}
|
||
\setcounter{shortauthor}{0}
|
||
\setcounter{savedshortauthor}{0}
|
||
\setcounter{shorteditor}{0}
|
||
\setcounter{savedshorteditor}{0}
|
||
\setcounter{labelname}{0}
|
||
\setcounter{savedlabelname}{0}
|
||
\setcounter{institution}{0}
|
||
\setcounter{savedinstitution}{0}
|
||
\setcounter{lista}{0}
|
||
\setcounter{savedlista}{0}
|
||
\setcounter{listb}{0}
|
||
\setcounter{savedlistb}{0}
|
||
\setcounter{listc}{0}
|
||
\setcounter{savedlistc}{0}
|
||
\setcounter{listd}{0}
|
||
\setcounter{savedlistd}{0}
|
||
\setcounter{liste}{0}
|
||
\setcounter{savedliste}{0}
|
||
\setcounter{listf}{0}
|
||
\setcounter{savedlistf}{0}
|
||
\setcounter{location}{0}
|
||
\setcounter{savedlocation}{0}
|
||
\setcounter{organization}{0}
|
||
\setcounter{savedorganization}{0}
|
||
\setcounter{origlocation}{0}
|
||
\setcounter{savedoriglocation}{0}
|
||
\setcounter{origpublisher}{0}
|
||
\setcounter{savedorigpublisher}{0}
|
||
\setcounter{publisher}{0}
|
||
\setcounter{savedpublisher}{0}
|
||
\setcounter{language}{0}
|
||
\setcounter{savedlanguage}{0}
|
||
\setcounter{origlanguage}{0}
|
||
\setcounter{savedoriglanguage}{0}
|
||
\setcounter{pageref}{0}
|
||
\setcounter{savedpageref}{0}
|
||
\setcounter{textcitecount}{0}
|
||
\setcounter{textcitetotal}{0}
|
||
\setcounter{textcitemaxnames}{0}
|
||
\setcounter{biburlbigbreakpenalty}{100}
|
||
\setcounter{biburlbreakpenalty}{200}
|
||
\setcounter{biburlnumpenalty}{0}
|
||
\setcounter{biburlucpenalty}{0}
|
||
\setcounter{biburllcpenalty}{0}
|
||
\setcounter{smartand}{1}
|
||
\setcounter{bbx:relatedcount}{0}
|
||
\setcounter{bbx:relatedtotal}{0}
|
||
\setcounter{parentequation}{0}
|
||
\setcounter{lstnumber}{15}
|
||
\setcounter{FancyVerbLine}{0}
|
||
\setcounter{linenumber}{1}
|
||
\setcounter{LN@truepage}{55}
|
||
\setcounter{FancyVerbWriteLine}{0}
|
||
\setcounter{FancyVerbBufferLine}{0}
|
||
\setcounter{FV@TrueTabGroupLevel}{0}
|
||
\setcounter{FV@TrueTabCounter}{0}
|
||
\setcounter{FV@HighlightLinesStart}{0}
|
||
\setcounter{FV@HighlightLinesStop}{0}
|
||
\setcounter{FancyVerbLineBreakLast}{0}
|
||
\setcounter{FV@BreakBufferDepth}{0}
|
||
\setcounter{minted@FancyVerbLineTemp}{0}
|
||
\setcounter{listing}{0}
|
||
\setcounter{lstlisting}{0}
|
||
}
|