Korr 3

chapter_01.tex

@@ -1,28 +1,28 @@
 \section{Introduction}
 \subsection{Motivation}
-According to the \ac{WHO}, around 1.6 billion people over 14 years worldwide suffer from any kind of hearing loss. Included in this 1.6 billion people, around 430 million suffer from disabling hearing loss (up to deafness), requiring rehabilitation. In the case of disabling hearing loss, the possibility of using an implant system solution has revolutionized auditory rehabilitation by restoring partial hearing. Despite steady progress in implant technology over the past decades, the system still faces its limitations. Complex auditory environments, like static noises overlain by a person speaking, can still propose a considerable challenge for users of auditory implants compared to people with a healthy hearing. \\ \\
+According to the \ac{WHO}, around 1.6 billion people over 14 years worldwide suffer from any kind of hearing loss. Included in this 1.6 billion people, around 430 million suffer from disabling hearing loss (up to deafness) requiring rehabilitation. In the case of disabling hearing loss, the possibility of using an implant system solution has revolutionized auditory rehabilitation by restoring partial hearing. Despite steady progress in implant technology over the past decades, the system still faces its limitations. Complex auditory environments, like static noises overlain by a person speaking, can still propose a considerable challenge for users of auditory implants compared to people with a healthy hearing. \\ \\
-Therefore, the improvement of implant performance in regard to the suppression of disturbance noises is therefore a crucial step in the development of more user-friendly implant solutions which provide users with more natural sound perception and greater listening comfort.\\ \\
+Therefore, the improvement of implant performance in regard to the suppression of disturbance noises is a crucial step in the development of more user-friendly implant solutions which provide users with more natural sound perception and greater listening comfort.\\ \\
 By addressing these challenges, this thesis aims to contribute to the next generation of cochlear implant technology, ultimately enhancing the auditory experience and quality of life for people with severe hearing impairments.
 \subsection{Introduction to cochlear implant systems}
-A \ac{CI} System is a specialized form of hearing aid, used to restore partly or complete deafness. In contrary to standard hearing aids, \ac{CI}'s do not just amplify the audio signal received by the ear, but stimulate the auditory nerve itself directly through electric pulses.\\ \\
+A \ac{CI} System is a specialized form of hearing aid used to restore partly or complete deafness. In contrary to standard hearing aids, \ac{CI}'s do not just amplify the audio signal received by the ear, but stimulate the auditory nerve itself directly through electric pulses.\\ \\
-Usually, a \ac{CI} system consists out of an external processor with a microphone (``audio processor'') receiving the ambient audio signal, processing it, and then transmitting it inductively via a transmission coil through the skin to the cochlear implant itself, implanted on the patient's skull (see Figure \ref{fig:fig_synchrony}). The \ac{CI} stimulates the auditory nerves inside the cochlear through charge pulses, thus enabling the patient to hear the received audio signal as sound.\\ 
+Usually, a \ac{CI} system consists out of an external processor with a microphone (``audio processor'') receiving the ambient audio signal, processing it, and then transmitting it inductively via a transmission coil through the skin to the cochlea implant itself, implanted on the patient's skull (see Figure \ref{fig:fig_synchrony}). The \ac{CI} stimulates the auditory nerves inside the cochlea through charge pulses, thus enabling the patient to hear the received audio signal as sound.\\ 
 \begin{figure}[H]
     \centering
     \includegraphics[width=0.6\linewidth]{Bilder/fig_synchrony.png}
     \caption{Sketch of a MED-EL Synchrony Cochlear Implant with a Sonnet 3 Audio Processor \cite{source_synchrony}}
     \label{fig:fig_synchrony}
 \end{figure}
-\noindent The pulse transmission to the cochlear is realized through a silicone electrode with embedded metal contacts. Said electrode is inserted into the cochlear through a drilled hole in the bone, where, depending on the insertion depth, different contact areas stimulate different parts of the frequency spectrum of the hearing sense. The smaller end of the electrode array inserted deep into the cochlear stimulates low frequencies, whereas the larger part at the beginning of the array stimulates high frequencies. (see Figure \ref{fig:fig_electrode}).
+\noindent The pulse transmission to the cochlea is realized through a silicone electrode with embedded metal contacts. Said electrode is inserted into the cochlea through a drilled hole in the bone, where, depending on the insertion depth, different contact areas stimulate different parts of the frequency spectrum of the hearing sense. The smaller end of the electrode array inserted deep into the cochlea stimulates low frequencies, whereas the larger part at the beginning of the array stimulates high frequencies. (see Figure \ref{fig:fig_electrode}).
 \begin{figure}[H]
     \centering
     \includegraphics[width=0.8\linewidth]{Bilder/fig_electrode.jpg}
-    \caption{Visualization of a MED-EL electrode inserted into a human cochlear. \cite{source_electrode}}
+    \caption{Visualization of a MED-EL electrode inserted into a human cochlea. \cite{source_electrode}}
     \label{fig:fig_electrode}
 \end{figure}
 \noindent As for any head worn hearing aid, the audio processor of a \ac{CI} system does not only pick up the desired ambient audio signal, but also any sort of interference noises from different sources. This circumstance leads to a decrease in the quality of the final audio signal for the user. Reducing this interference noise through adaptive noise reduction, implemented on a low-power digital signal processor, which can be powered within the electrical limitations of a CI system, is the topic of this master's thesis.
 \subsection{Implementation of Adaptive Noise Reduction in Cochlear Implant Systems}
 The above problem description of noise interference shows the need of further improvement of \ac{CI} systems in this regard. For persons with a healthy hearing sense, the addition of noise to an observed signal may just mean a decrease in hearing comfort, whereas for aurally impaired people it can make the difference in the basic understanding of information. As everyday environments present fluctuating background noise - from static crowd chatter to sudden sounds of different characteristics — that can severely degrade speech perception, the ability to suppress noise is a crucial benefit for users of cochlear implant systems. \\ \\
-Adaptive Noise Reduction (\ac{ANR}) (also commonly referred as \ac{ANC}), is an advanced signal processing technique that adjusts the parameters of a digital filter to suppress unwanted noise from a signal while preserving the desired target signal. In contrary to static filters (like a high- or low-pass filter), \ac{ANR} uses real-time feedback to adjust said digital filter to adapt to the current circumstances.\\ \\
+\ac{ANR} (also commonly referred as \ac{ANC}), is an advanced signal processing technique that adjusts the parameters of a digital filter to suppress unwanted noise from a signal while preserving the desired target signal. In contrary to static filters (like a high- or low-pass filter), \ac{ANR} uses real-time feedback to adjust said digital filter to adapt to the current circumstances.\\ \\
 The challenge in the implementation of \ac{ANR} in \ac{CI} systems lies in the limited capacities. As the \ac{CI} system is powered by a small battery located in the audio processor, energy efficiency is crucial for a possible solution of the described problem of noise interference. Any approach to a reduction of interference noise must be highly optimized with regard to computing power and implemented on dedicated low-power hardware, being able to be powered within the limitations of a \ac{CI} system.\\ \\
-The main solution concept of this thesis is the optimization of the adaptive filter of the \ac{ANR} algorithm in combination with the used low-power hardware. Its goal is, to deliver the best possible result in interference noise reduction while still being able to be powered by the limited resources of a \ac{CI} system. Different optimization strategies of the adaptive filter algorithm shall be evaluated and compared in regard of their performance and their required computing power.\\ \\
+The main topic of this thesis is the optimization of the adaptive filter of the \ac{ANR} algorithm in combination with the used low-power hardware. Its goal is, to deliver the best possible result in interference noise reduction while still being able to be powered by the limited resources of a \ac{CI} system. Different optimization strategies of the adaptive filter algorithm shall be evaluated and compared in regard of their performance and their required computing power.\\ \\
-Due to the fact, that the \ac{CI} system is powered by a battery with a relatively small capacity, the firmware is required to work with the least power possible, while maintaining the required performance. Therefore, optimization in regard to a minimization of needed processor clocks is aimed for.
+Due to the fact, that the \ac{CI} system is powered by a battery with a relatively small capacity, the firmware is required to work with the least power possible, while maintaining the required performance. Therefore, optimization in regard of a minimization of needed processor clocks is aimed for.

chapter_02.tex

@@ -3,8 +3,7 @@ The following subchapters shall supply the reader with the theoretical foundatio
 The chapter begins with the description of signals, the problem of them interfering and the basics of digital signal processing in general, covering fundamental topics like signal representation, transfer functions and filters.\\
 Filters are used in various functional designs, therefore a short explanation into the concepts of Finite Impulse Response- and Infinite Impulse Response filters is indispensable.\\
 At this point an introduction into \ac{ANR} follows, including a short overview of the most important steps in history, the general concept of \ac{ANR}, its design possibilities and its optimization possibilities in regard of error calculation.\\
-With this knowledge covered, a realistic signal flow diagram of an implanted \ac{CI} system with corresponding transfer functions is designed, essential to implement \ac{ANR} on a low-power digital signal processor.\\
+With this knowledge covered, a realistic signal flow diagram of an implanted \ac{CI} system with corresponding transfer functions is designed, essential to implement \ac{ANR} on a low-power digital signal processor.\\ \\
-At the end of chapter two, high-level Python simulations shall function as a feasibility demonstration of the recently presented theoretical background.\\ \\
 Throughout this thesis, sampled signals are denoted in lowercase with square brackets (e.g. {x[n]}) to distinguish them from time-continuous signals (e.g. {x(t)}). Vectors are notated in lowercase bold font, whereas matrix are notated in uppercase bold font. Scalars are notated in normal lowercase font.\\ 
 \subsection{Signals and signal interference}
 A signal is a physical parameter (e.g. pressure, voltage) changing its value over time. Whereas in nature, a signal is always analog, meaning continuous in both time and amplitude, a digital signal is represented in a discrete form, being sampled at specific time intervals and quantized to finite amplitude levels.\\ \\
@@ -102,7 +101,7 @@ A higher number of needed coefficients implies, that the filter itself needs mor
 \subsection{Introduction to Adaptive Noise Reduction}
 \subsubsection{History}
 The necessity for the use of electric filters arose the first time in the beginnings of the 20th century with the development of the quite young fields of tele- and radio-communication. At his time, engineers used static filters, like low- or highpass filters, to improve transmission quality - this fundamental techniques allowed limiting the frequency spectrum, by cutting out certain frequencies like high-pitched noises or humming. From this time on, the development of new filter designs accelerated, for example with the soon-to-be developed LC-filter by Otto Zobel, an American scientist working at the telecommunication company AT\&T. Until then, the used filters were static, meaning they didn't change their behavior over time.\\ \\
-In the 1930s, the first real concept of \ac{ANC} was proposed by the German Physician Paul Lueg. Lueg patented the idea of two speakers emitting antiphase signals which cancel each other out. Though his patent was granted in 1936, back at the time, there was no technical possibility detect and process audio signals in a way, to make his noise cancellation actually work in a technical environment.\\ \\
+In the 1930s, the first real concept of active noise cancellation was proposed by the German Physician Paul Lueg. Lueg patented the idea of two speakers emitting antiphase signals which cancel each other out. Though his patent was granted in 1936, back at the time, there was no technical possibility detect and process audio signals in a way, to make his noise cancellation actually work in a technical environment.\\ \\
 20 years after Lueg's patent, Lawrence Fogel patented a practical concept of noise cancellation, intended for noise suppression in aviation - this time, the technical circumstances of the 1950s enabled the development of an aviation headset, lowering the overall noise experienced by pilots in the cockpit of a helicopter or an airplane by emitting a 180 degree phase shifted signal of the recorded background noise of the cockpit into the pilots' headset. (see Figure \ref{fig:fig_patent}).  
 \begin{figure}[H]
     \centering
@@ -110,11 +109,11 @@ In the 1930s, the first real concept of \ac{ANC} was proposed by the German Phys
     \caption{Reconstruction of Lawrence Fogel´s patent in 1960. \cite{source_patent}}
     \label{fig:fig_patent}
 \end{figure}
-\noindent In contrary to the static filters in the beginning of the century, the \ac{ANC} approach of Lueg and Widrow was far more advanced than just reducing a signal by a specific frequency portion like with the use of static filters, yet this technique still has their limitations as it is designed only to work within to a certain environment.\\ \\
+\noindent In contrary to the static filters in the beginning of the century, the active noise cancellation approach of Lueg and Widrow was far more advanced than just reducing a signal by a specific frequency portion like with the use of static filters, yet this technique still has their limitations as it is designed only to work within to a certain environment.\\ \\
 With the rapid advancement of digital signal processing technologies, noise cancellation techniques evolved from static, hardware-based filters and physical soundwave cancellation towards more sophisticated approaches. In the then 1970s, the concept of digital adaptive filtering arose, allowing digital filters to adjust their parameters in real-time based on the characteristics of the incoming signal and noise. This marked a significant leap forward, as it enabled systems to deal with dynamic and unpredictable noise environments - the concept of adaptive noise reduction was born.
 \subsubsection{The concept of adaptive filtering}
 Adaptive noise reduction describes an advanced filtering method based on an error-metric and represents a significant advancement over these earlier methods by allowing the filter parameters to continuously adapt to the changing acoustic environment in real-time. This adaptability makes \ac{ANR} particularly suitable for hearing devices, where environmental noise characteristics vary constantly.\\ \\
-Static filters, like low- and high-pass filters, as described in the previous subchapter, feature coefficients that remain constant over time. They are designed for known, predictable noise conditions (e.g., removing a steady 50 Hz hum). While these filters are efficient and easy to implement, they fail to function when noise characteristics change dynamically.\\ \\
+Static filters, like low- and high-pass filters, as described in the previous subchapter, feature coefficients that remain constant over time. They are designed for known, predictable noise conditions (e.g. removing a steady 50 Hz hum originating from a power supply). While these filters are efficient and easy to implement, they fail to function when noise characteristics change dynamically.\\ \\
 Although active noise cancellation and adaptive noise reduction share obvious similarities, they differ fundamentally in their application and signal structure. While active noise cancellation aims to physically cancel noise in the acoustic domain — typically before, or at the time, the signal reaches the ear — \ac{ANR} operates within the signal processing chain, attempting to extract the noisy component from the digital signal. In cochlear implant systems, the latter is more practical because the acoustic waveform is converted into electrical stimulation signals; thus, signal-domain filtering is the only feasible approach.
 \begin{figure}[H]
     \centering
@@ -261,7 +260,7 @@ The \ac{LMS} algorithm therefore updates the filter coefficients $w[n]$ after ev
  \begin{figure}[H]
     \centering
     \includegraphics[width=1.1\linewidth]{Bilder/fig_anr_implant.jpg}
-    \caption{Realistic implant design.}
+    \caption{Filter design for an implanted cochlear implant system with two signal sensors.}
     \label{fig:fig_anr_implant}
 \end{figure}
 \noindent Figure \ref{fig:fig_anr_hybrid} showed us the basic concept of an \ac{ANR} implementation, without a detailed description how the corrupted signal $d[n]$ and the reference noise signal $x[n]$ are formed. Figure \ref{fig:fig_anr_implant} now shows a more complete and realistic signal flow diagram of an implanted cochlear implant system, with two signal sensors and an adaptive noise reduction circuit afterwards. \\ \\

chapter_03.tex

@@ -1,6 +1,6 @@
 \section{High level simulations}
 The main purpose of the high-level simulations is to verify and demonstrate the theoretical approach of the previous chapters and to evaluate the performance of the proposed algorithms under various conditions.  The following simulations include different scenarios such as, different types of noise signals and different considerations of transfer functions. The goal is to verify different approaches before taking the step to the implementation of said algorithms on the low-power \ac{DSP}.\\ \\
-The implementation is conducted in Python, which provides a flexible environment for numerical computations and data visualization. The simulation is graphically represented using the Python library Matplotlib, allowing clear visualization of the results. 
+The implementation is conducted in Python, which provides a flexible environment for numerical computations and data visualization. The simulation is graphically represented using the Matplotlib-library. 
 \subsection{Adaptive Noise Reduction algorithm implementation}
 The high-level implementation of the \ac{ANR} algorithm follows the theoretical framework outlined in Subchapter 2.5, specifically Equation \ref{equation_lms}. The algorithm is designed to adaptively filter out noise from a desired signal using a reference noise signal. The implementation of the \ac{ANR} function includes the following key steps:
 \begin{itemize}
@@ -53,7 +53,7 @@ def anr_function(input, ref_noise, coefficients, mu, adaption_step=1):
 with $\text{P}_{\text{Desired-signal}}$ being the power of the desired signal, $\text{P}_{\text{Noise-signal}}$ being the power of the noise signal and $\text{P}_{\text{Error-signal}}$ being the power of the error signal, which is the difference between the desired signal and the filter output. A positive \ac{SNR}-Gain indicates an improvement in signal quality, while a negative \ac{SNR}-Gain indicates a degradation in signal quality after applying the \ac{ANR} algorithm.
 \subsection{Simple ANR use cases}
 To evaluate the general functionality and performance of the \ac{ANR} algorithm from Listing \ref{lst:lst_anr_code}, a set of three simple, artificial scenarios are introduced. These examples shall serve as a showcase to demonstrate the general functionality, the possibilities and the limitations of the \ac{ANR} algorithm.\\ \\
-In all three scenarios, a chirp signal with a frequency range from 100-1000 Hz is used as the desired signal, which is then corrupted with a sine wave (Use case 1 and 2) or a Gaussian white noise (Use case 3) as noise signal respectively. In this simple setup, the corruption noise signal is also available as the reference noise signal. Every approach is conducted with 16 filter coefficients and a step size of 0.01. The four graphs in the respective first plot show the desired signal, the corrupted signal, the reference noise signal and the filter output. The two graphs in the respective second plot show the performance of the filter in form of the resulting error signal and the evolution of three filter coefficients over time.\\ \\
+In all three scenarios, a chirp signal with a frequency range from 100-1000 Hz is used as the desired signal, which is then corrupted with a sine wave (Use case 1 and 2) or a Gaussian white noise (Use case 3) as noise signal respectively. In this simple setup, the corruption noise signal is also available as the reference noise signal. Every approach is conducted with 16 filter coefficients and a step size of 0.01. The four graphs in the respective first plot show the desired signal, the corrupted signal, the reference noise signal and the filter output. The two graphs in the respective second plot show the performance of the filter in form of the resulting error signal and the evolution of three exemplary filter coefficients over time.\\ \\
 \noindent This artificial setup could be solved analytically, as the signals do not pass separate, different transfer functions, meaning, that the reference noise signal is the same as the corruption noise signal. Though, this simple setup would not require an adaptive filter approach, it nevertheless allows to clearly evaluate the performance of the \ac{ANR} algorithm in different scenarios. Also, due to the fact that the desired signal is known, it is possible to evaluate the performance of the algorithm in a simple way.
 \subsubsection{Simple use case 1: Sine noise at 2000 Hz}
 In the first use case, a sine wave with a frequency of 2000 Hz, which lies outside the frequency spectrum of the chirp, is used as noise signal to corrupt the desired signal. The shape of the initial desired signal is still clearly recognizable, even if its shape is affected in the higher frequency area. The filter output in Figure \ref{fig:fig_plot_1_sine_1.png} shows a satisfying performance of the \ac{ANR} algorithm, as the noise is almost completely removed from the corrupted signal after the filter coefficients have adapted.
@@ -78,7 +78,7 @@ The second use case resembles the first one, but instead of a 2000 Hz sine wave,
     \caption{Desired signal, corrupted signal, reference noise signal and filter output of simple use case 2}
     \label{fig:fig_plot_1_sine_2.png}
 \end{figure}
-\noindent Figure \ref{fig:fig_plot_2_sine_2.png} shows a significant increase of the amplitude of the error signal compared to Use case 1, especially around the 500 Hz frequency of the noise signal. Also, the adaption of the coefficients shows far more variance compared to Use case 1, with a complete rearrangement in the area of 500 Hz. This indicates that the \ac{ANR} algorithm is struggling to adapt effectively in a scenario, where the noise signal overlaps with the desired signal.
+\noindent Figure \ref{fig:fig_plot_2_sine_2.png} shows a significant increase of the amplitude of the error signal compared to Use case 1, especially around the 500 Hz frequency of the noise signal. Also, the adaption of the coefficients shows far more variance compared to use case 1, with a complete rearrangement in the area of 500 Hz. This indicates that the \ac{ANR} algorithm is struggling to adapt effectively in a scenario, where the noise signal overlaps with the desired signal.
 \begin{figure}[H]
     \centering
     \includegraphics[width=1.0\linewidth]{Bilder/fig_plot_2_sine_2.png}
@@ -93,7 +93,7 @@ The last on of our three simplified use cases involves the use of a Gaussian whi
     \caption{Desired signal, corrupted signal, reference noise signal and filter output of simple use case 3}
     \label{fig:fig_plot_1_noise.png}
 \end{figure}
-\noindent The error signal in Figure \ref{fig:fig_plot_2_noise.png} shows a noticeable variance compared to the previous use cases, especially at the beginning of the signal, where low frequencies dominate. The evolution of the filter coefficients show an interesting pattern, as only the coefficient in the beginning adapts significantly, while the others remain relatively stable around zero. Also the \ac{SNR}-Gain of this use case is significantly lower compared to the previous use cases, which can be explained by the fact that the noise signal contains a broad spectrum of frequencies, making it more difficult for the \ac{ANR} algorithm to effectively isolate and reduce the noise from the desired signal.
+\noindent The error signal in Figure \ref{fig:fig_plot_2_noise.png} shows a noticeable variance compared to the previous use cases, especially at the beginning of the signal, where low frequencies dominate. The evolution of the filter coefficients show an interesting pattern, as only the coefficient in the beginning adapts significantly, while the others remain relatively stable around zero. Also, the \ac{SNR}-Gain of this use case is significantly lower compared to the previous use cases, which can be explained by the fact that the noise signal contains a broad spectrum of frequencies, making it more difficult for the \ac{ANR} algorithm to effectively isolate and reduce the noise from the desired signal.
 \begin{figure}[H]
     \centering
     \includegraphics[width=1.0\linewidth]{Bilder/fig_plot_2_noise.png}
@@ -115,10 +115,10 @@ After the general functionality of the \ac{ANR} algorithm has been verified with
     \caption{Error signal and filter coefficient evolution of the intermediate \ac{ANR} use case}
     \label{fig:fig_plot_2_wav.png}
 \end{figure}
-\noindent The error signal in Figure \ref{fig:fig_plot_2_wav.png} confirms the function of the algorithm and shows maxima corresponding to the maxima in the breathing noise, indicating the moments, when the \ac{ANR} algorithm is setting its coefficients again to adapt to the changing noise characteristics. It makes sense, that the adaption of the filter coefficients causes repeating maxima in the error signal, as the noise signal now is not static or periodic, but rather dynamic and changing it frequency and amplitude over time. The \ac{SNR}-Gain of 6.41 dB also indicates a significant improvement in signal quality and can be compared againtst the complex use case in the next subchapter, where the same audio tracks are used, but now with different transfer functions applied to them.
+\noindent The error signal in Figure \ref{fig:fig_plot_2_wav.png} confirms the function of the algorithm and shows maxima corresponding to the maxima in the breathing noise, indicating the moments, when the \ac{ANR} algorithm is setting its coefficients again to adapt to the changing noise characteristics. It makes sense, that the adaption of the filter coefficients causes repeating maxima in the error signal, as the noise signal now is not static or periodic, but rather dynamic and changing it frequency and amplitude over time. The \ac{SNR}-Gain of 6.41 dB also indicates a significant improvement in signal quality and can be compared against the complex use case in the next subchapter, where the same audio tracks are used, but now with different transfer functions applied to them.
 \subsection{Complex ANR use case}
-To close the topic of high-level simulations of the \ac{ANR} algorithm, a more complex and realistic use case is finally introduced. In this scenario, the same two audio tracks of the previous use case are utilized - but now they pass different transfer functions, which mimic the case that the sensor recording the corrupted signal, shows another frequency response characteristic as the one recording the reference noise signal. Additionaly, a delay of 2 ms between the corruption noise signal and the reference noise signal is introduced - this simulates the realsitic case, that the microphones are located on different locations, leading to a small delay due to traveling time of the signal. Now, an analytical solution is not possible anymore, as the signals are affected in different ways, making it impossible to simply subtract the noise signal from the corrupted signal. This scenario represents a more realistic application of the \ac{ANR} algorithm, as it involves complex audio signals with varying frequency components and dynamics, as well as on signals passing different singal paths delayed.\\ \\
+To close the topic of high-level simulations of the \ac{ANR} algorithm, a more complex and realistic use case is finally introduced. In this scenario, the same two audio tracks of the previous use case are utilized - but now they pass different transfer functions, which mimic the case that the sensor recording the corrupted signal, shows another frequency response characteristic as the one recording the reference noise signal. Additionaly, a delay of 2 ms between the corruption noise signal and the reference noise signal is introduced - this simulates the realsitic case, that the microphones are located on different locations, leading to a small delay due to traveling time of the signal. Now, an analytical solution is not possible anymore, as the signals are affected in different ways, making it impossible to simply subtract the noise signal from the corrupted signal. This scenario represents a realistic application of the \ac{ANR} algorithm, as it involves complex audio signals as well as signals passing different signal paths while being delayed.\\ \\
-Using  a sampling frequency of 20 kHz, a delay of 2 ms represents a shift of 40 samples. As the corrpution noise signal, which the alorithm tries to filter out of the corrupoted signal, is now delayed by these 40 samples, the filter needs more coefficients to aqquire a certain ''memory'' - this means, that the until now used 16 tap filter is not sufficient anymore. To prove the correct function of the \ac{ANR} algorithm, the filter length is adapted up to 55 taps. \\ \\
+Using  a sampling frequency of 20 kHz, a delay of 2 ms represents a shift of 40 samples. As the corrpution noise signal, which the alorithm tries to filter out of the corrupoted signal, is now delayed by these 40 samples, the filter needs more coefficients to aqquire a certain ``memory'' - this means, that the used 16 tap filter is not sufficient anymore. To prove the correct function of the \ac{ANR} algorithm, the filter length is increased by 40 taps up to 56 taps. \\ \\
 The now introduced challenges ae making adaptive noise reduction the only feasible approach to reduce the noise from the corrupted signal.
 \begin{figure}[H]
     \centering
@@ -133,7 +133,7 @@ The now introduced challenges ae making adaptive noise reduction the only feasib
     \caption{The raw noise signal recorded with two different sensors, showing the effect of different transfer functions on the signal}
     \label{fig:fig_plot_4_wav_complex.png}
 \end{figure}
-\noindent To evaluate the performance of the \ac{ANR} algorithm in this complex scenario, the corrupted signal is recorded with the primary sensor while the reference noise signal is recorded with secondary sensor. The filter output and \ac{SNR}-Ratio in Figure \ref{fig:fig_plot_1_wav_complex.png} display with 10.26 dB an excellent performance. 
+\noindent To evaluate the performance of the \ac{ANR} algorithm in this complex scenario, the corrupted signal is recorded with the primary sensor while the reference noise signal is recorded with secondary sensor. The filter output and \ac{SNR}-Gain in Figure \ref{fig:fig_plot_1_wav_complex.png} display an excellent performance at 10.26 dB. 
 \begin{figure}[H]
     \centering
     \includegraphics[width=1.0\linewidth]{Bilder/fig_plot_1_wav_complex.png}

chapter_04.aux

@@ -6,10 +6,10 @@
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@@ -21,7 +21,7 @@
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@@ -36,10 +36,10 @@
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@@ -50,7 +50,7 @@
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@@ -69,7 +69,7 @@
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-\newlabel{fig:fig_dsp_setup.jpg}{{31}{43}{}{}{}}
+\newlabel{fig:fig_dsp_setup.jpg}{{31}{43}{}{figure.31}{}}
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@@ -84,7 +84,7 @@
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chapter_04.tex

@@ -1,5 +1,5 @@
 \section{Hardware implementation and performance quantization of the ANR Algorithm on a low-power system}
-Now, with a functioning high-level implementation in place, the focus shifts to the hardware implementation of the \ac{ANR} algorithm on a low-power system. The first subchapter describes the hardware, on which the \ac{ANR} algorithm is implemented, including its environment, which serves as a link to the \ac{CI} system itself. The following subchapter continues with the basic implementation of the \ac{ANR} algorithm on the hardware itself and shall provide the reader with a basic understanding of its challenges, possibilities and limitations. This implementation is then tested on a simulator to be compared to the high-level implementation.\\
+Now, with a functioning high-level implementation in place, the focus shifts to the hardware implementation of the \ac{ANR} algorithm on a low-power system. The first subchapter describes the hardware, on which the \ac{ANR} algorithm is implemented, including its environment, which serves as a link to the \ac{CI} system itself. The following subchapter continues with the basic implementation of the \ac{ANR} algorithm on the hardware itself and shall provide the reader with a basic understanding of its challenges, possibilities and limitations. This implementation is then tested on a simulator to be compared to the high-level implementation.
 \subsection{Low-power system architecture and integration}
 This thesis considers a low-power \ac{SOC} architecture that integrates a general-purpose \ac{ARM} core with a dedicated \ac{DSP} core. The system combines the flexibility of an \ac{ARM}-based control processor with the computational efficiency of a specialized \ac{DSP}, splitting general computing tasks from real-time signal processing workloads.
 \subsubsection{ARM and DSP hardware architecture overview}
@@ -22,7 +22,7 @@ In order to ensure a smooth, but power-efficient, operation together with the \a
     \caption{Simplified visualization of the interaction between the \ac{CI}-System, the \ac{ARM} core and the \ac{DSP} core, making use of the \ac{PCM} interface and shared memory for audio data exchange.}
     \label{fig:fig_dsp_setup.jpg}
 \end{figure}
-\noindent The \ac{ARM} Core receives the 16-bit audio data (the corrupted signal and the reference noise signal via two channels) from the CI system via a \ac{PCM} interface, which offers one 32-bit input and one 32-bit output register. An interrupt triggers the integrated \ac{DMA} controller when the input register is occupied, which transfers the audio data from the \ac{PCM} interface to the input buffer in a predefined memory location (now in two 16-bit samples again). Once completed, the \ac{DSP} core is requested to start processing the audio data. The \ac{DSP} core then reads the audio samples from the shared memory, processes them using the implemented \ac{ANR} algorithm, and writes the 16-bit processed sample back to an output buffer, also located in the shared memory. Finally, the \ac{ARM} core is notified via an interrupt from the \ac{DSP} core, that the processing is complete - the \ac{DMA} controller then transfers the processed audio samples from the output buffer back to the \ac{PCM} interface for playback (refer to Figure \ref{fig:fig_dsp_comm.jpg}).\\ \\ 
+\noindent The \ac{ARM} Core receives the 16-bit audio data (the corrupted signal and the reference noise signal on two seperate channels) from the CI system via a \ac{PCM} interface, which offers one 32-bit input and one 32-bit output register. An interrupt triggers the integrated \ac{DMA} controller when the input register is occupied, which transfers the audio data from the \ac{PCM} interface to the input buffer in a predefined memory location (now in two 16-bit samples again). Once completed, the \ac{DSP} core is requested to start processing the audio data. The \ac{DSP} core then reads the audio samples from the shared memory, processes them using the implemented \ac{ANR} algorithm, and writes the 16-bit processed sample back to an output buffer, also located in the shared memory. Finally, the \ac{ARM} core is notified via an interrupt from the \ac{DSP} core, that the processing is complete - the \ac{DMA} controller then transfers the processed audio samples from the output buffer back to the \ac{PCM} interface for playback (refer to Figure \ref{fig:fig_dsp_comm.jpg}).\\ \\ 
 \begin{figure}[H]
     \centering
     \includegraphics[width=0.9\linewidth]{Bilder/fig_dsp_comm.jpg}
@@ -33,7 +33,7 @@ In order to ensure a smooth, but power-efficient, operation together with the \a
 \subsection{Software architecture and execution flow}
 \subsubsection{ARM–DSP communication and data exchange details}
 In contrary, to the high-level simulation environment written in Python from the previous chapter, the implementation of the \ac{ANR} algorithm on the \ac{DSP} requires a low-level programming approach, as which takes into account the specific architecture and capabilities of the processor and its environment. This includes considerations such as memory management, data types, and optimization techniques specific to the \ac{DSP} architecture. The implementation is required to be done in the C programming language, which is a standard for embedded systems.\\ \\ 
-The implementation of the \ac{ANR} algorithm on the \ac{DSP} follows the same overall structure as the high-level variant, but now the focus lies on memory management, interrupt-handling and communication between the two cores. The \ac{ARM} operates in a continuous loop, structured into several states:
+The implementation of the \ac{ANR} algorithm on the \ac{DSP} follows the same overall structure as the high-level variant, but now the focus lies on memory management, interrupt-handling and communication between the two cores. The \ac{ARM} core operates in a continuous loop, structured into several states:
 \begin{itemize}
     \item \textbf{Idle:} The \ac{ARM} core waits for an interrupt from the \ac{DMA} controller, indicating that new audio samples are available in the input buffer.
     \item \textbf{Work:} After receiving the interrupt, the \ac{ARM} core triggers an interrupt on the \ac{DSP} core to start processing the audio samples.
@@ -187,7 +187,7 @@ The $calculate\_output()$ functions consists out of the following five main part
 \end{itemize}
 These sub-functions feature \ac{DSP}-specific optimizations and are partly depenend on the setable parameters like the filter length in regard of their computational cost. The following paragraphs will analyze the computational efficiency of these sub-functions in detail.
 \paragraph{write\_buffer()}The $write\_buffer()$-function is responsible for managing the sample line, where the samples of the reference noise signal are stored for further processing. The buffer management mainly consists out of a cyclic pointer increase operation and a pointer dereference operation to write the new sample into the buffer. The cyclic pointer increase operation is implemented using the already mentioned intrinsic function of the \ac{DSP} compiler, while the pointer dereference operation takes 15 cycles to execute. This results in a total duration of 16 cycles for the $write\_buffer()$-function to process, indipendent of the filter length or other parameters.
-\paragraph{apply\_fir\_filter()} The $apply\_fir\_filter()$-function is responsible for applying the coefficients of the \ac{FIR} filter on the reference noise signal samples stored in the sample line. The needed cycles for this function are mainly depenendent on the lenght of the filter, as the number of multiplications and additions increase with the filter length. To increase the performance, the dual \ac{MAC} architecture of the \ac{DSP} is utilized, allowing two multiplications and two additions to be performed in a single cycle. Another \ac{DSP}-specific optimization is the use of the already introduced 72-bit accumulators and the fractional multiplication function, which allows performing multiplications on two 32-bit integers without losing precision or the need for manual bit-shifting operations.
+\paragraph{apply\_fir\_filter()} The $apply\_fir\_filter()$-function is responsible for applying the coefficients of the \ac{FIR} filter on the reference noise signal samples stored in the sample line. The needed cycles for this function are mainly depenendent on the length of the filter, as the number of multiplications and additions increase with the filter length. To increase the performance, the dual \ac{MAC} architecture of the \ac{DSP} is utilized, allowing two multiplications and two additions to be performed in a single cycle. Another \ac{DSP}-specific optimization is the use of the already introduced 72-bit accumulators and the fractional multiplication function, which allow performing multiplications on two 32-bit integers without losing precision or the need for manual bit-shifting operations.
 \begin{listing}[H]
 \centering
 \begin{lstlisting}[style=cstyle]

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 \@writefile{lof}{\contentsline {figure}{\numberline {51}{\ignorespaces Updated plot of the relative performance of the SNR-Gain, the cycles per samples and the DSP load in regard of the update rate for the benchmark case. The higher load is indicated by the newly added continuous lines.}}{70}{}\protected@file@percent }
-\newlabel{fig:fig_snr_update_rate_new.png}{{51}{70}{}{}{}}
+\newlabel{fig:fig_snr_update_rate_new.png}{{51}{70}{}{figure.51}{}}
 \acronymused{DSP}
 \acronymused{DSP}
 \acronymused{SNR}
@@ -141,12 +141,12 @@
 \acronymused{ANR}
 \acronymused{CI}
 \@writefile{lof}{\contentsline {figure}{\numberline {52}{\ignorespaces Updated plot of the relative performance of the SNR-Gain, the cycles per samples and the DSP load in regard of the error threshold for the benchmark case. The higher load is indicated by the newly added continuous lines.}}{71}{}\protected@file@percent }
-\newlabel{fig:fig_snr_error_threshold_new.png}{{52}{71}{}{}{}}
+\newlabel{fig:fig_snr_error_threshold_new.png}{{52}{71}{}{figure.52}{}}
 \acronymused{ANR}
 \acronymused{SNR}
 \acronymused{DSP}
 \@writefile{lot}{\contentsline {table}{\numberline {1}{\ignorespaces Summary of the performance evaluation for the different implementations of the ANR algorithm. The load of the DSP core is calculated with the additional computational effort of the optimization.}}{71}{}\protected@file@percent }
-\newlabel{tab:summary_performance_evaluation}{{1}{71}{}{}{}}
+\newlabel{tab:summary_performance_evaluation}{{1}{71}{}{table.1}{}}
 \@setckpt{chapter_05}{
 \setcounter{page}{72}
 \setcounter{equation}{49}

chapter_05.tex

@@ -1,6 +1,6 @@
 \section{Performance evaluation of different implementation variants}
 \subsection{Verification of the \ac{DSP} implementation}
-To verify the general performance of the \ac{DSP}-implemented \ac{ANR} algorithm, the complex usecase of the high-level implemenation is utilized, which includes, again, a 55-tap \ac{FIR} filter and an update of the filter coefficients every cycle. In contary to the high-level implementation, the coeffcient convergence is now not included in the evaluation anymore, but the metric for the \ac{ANR} performance stays the same as for the \ac{SNR}  improvement.
+To verify the general performance of the \ac{DSP}-implemented \ac{ANR} algorithm, the complex usecase of the high-level implemenation is utilized, which includes, again, a 56-tap \ac{FIR} filter and an update of the filter coefficients every cycle. In contary to the high-level implementation, the coeffcient convergence is now not included in the evaluation anymore, but the metric for the \ac{ANR} performance stays the same as for the \ac{SNR}  improvement.
 \begin{figure}[H]
     \centering
     \includegraphics[width=1.0\linewidth]{Bilder/fig_plot_1_dsp_complex.png}
@@ -25,7 +25,7 @@ To verify the general performance of the \ac{DSP}-implemented \ac{ANR} algorithm
 \caption{Histogram of the error amplitude between the high- and low-level simulation output.}
     \label{fig:fig_high_low_comparison_hist.png}
 \end{figure}  
-\noindent Figure \ref{fig:fig_plot_1_dsp_complex.png} and \ref{fig:fig_plot_2_dsp_complex.png} show the results of the complex \ac{ANR} use case, simulated on the \ac{DSP} - with a \ac{SNR}-Gain of 10.26 dB it performs equivalent sucessful as the one of the high-level implementation. Figure \ref{fig:fig_high_low_comparison.png} shows both outputs seperately and then together in one subfigure, together with the plotted error amplitude. Figure \ref{fig:fig_high_low_comparison_hist.png} features a histogram of the error amplitude between the high- and low-level implemenation, indicating the correct functionality of the \ac{DSP} implementation. The small deviations can be explained by the fact that the \ac{DSP} implementation is based on fixed-point arithmetic, which leads to a slightly different convergence behavior. Nevertheless, the results show that the \ac{DSP} implementation of the \ac{ANR} algorithm is able to achieve the same performance as the high-level implementation. The next step is of evaluate the performance of the \ac{DSP} implementation in terms of computational efficiency under different scenarios and non-synchrone signals.
+\noindent Figure \ref{fig:fig_plot_1_dsp_complex.png} and \ref{fig:fig_plot_2_dsp_complex.png} show the results of the complex \ac{ANR} use case, simulated on the \ac{DSP} - with a \ac{SNR}-Gain of 10.26 dB it performs equivalent sucessful as the one of the high-level implementation. Figure \ref{fig:fig_high_low_comparison.png} shows both outputs seperately and then together in one subfigure, together with the plotted error amplitude. Lastly, Figure \ref{fig:fig_high_low_comparison_hist.png} features a histogram of the error amplitude between the high- and low-level implemenation, indicating the correct functionality of the \ac{DSP} implementation. The small deviations can be explained by the fact that the \ac{DSP} implementation is based on fixed-point arithmetic, which leads to a slightly different convergence behavior. Nevertheless, the results show that the \ac{DSP} implementation of the \ac{ANR} algorithm is able to achieve the same performance as the high-level implementation. The next step is of evaluate the performance of the \ac{DSP} implementation in terms of computational efficiency under different scenarios and non-synchrone signals.
 \subsection{Determination of the optimal filter length}
 \noindent The main focus for evaluating the computational efficiency is the determination of the optimal filter length. To achieve this goal, different signal combinations, which are to be expected every day situiations for a \ac{CI} patient, are considered. Again, a delay of 2 ms bewteen the corruption noise signal and the reference noise signal is applied, increasing the need for a longer filter. The desired signal of a male voice is now corrupted with 5 different noise signals, ruling out, that a certain combination of signals is not representative for the overall performance of the \ac{ANR} algorithm:
 \begin{itemize}
@@ -49,8 +49,8 @@ The vizualization of the noise signals is shown in Figure \ref{fig:fig_noise_sig
     \caption{Simulation of the to be expected \ac{SNR}-Gain for different noise signals and filter lengths applied to the desired signal of a male speaker. The applied delay between the signals amounts 2ms. The graphs are smoothed by a third order savigol filter.}
     \label{fig:fig_snr_comparison.png}
 \end{figure}  
-\noindent Figure \ref{fig:fig_snr_comparison.png} shows the expected \ac{SNR}-Gain for the different noise signals and filter lengths. The results shows, that a minimum filter length of about 32 taps is required, before (in any case) a significant rise in the \ac{SNR}-Gain can be observed - this is highly contrary to the synchrone intermediate high level simulation, where a filter length of only 16 taps provided sufficent noise reduction. This circumstance can be explained by the fact, that the corruption noise signal is now delayed to the reference noise signal, meaning, that the filter needs a certain length before it can be sufficently adapted. The results also show, that the \ac{SNR}-Gain is different for the different noise signals, indicating, that the noise signals have different characteristics, like the number of peaks, their frequency spectrum an their amplitude.\\ \\
+\noindent Figure \ref{fig:fig_snr_comparison.png} shows the expected \ac{SNR}-Gain for the different noise signals and filter lengths. The result confirms, that a minimum filter length of about 32 taps is required, before (in any case) a significant rise in the \ac{SNR}-Gain can be observed - this is highly contrary to the synchrone intermediate high level simulation, where a filter length of only 16 taps provided sufficent noise reduction. This circumstance can be explained by the fact, that the corruption noise signal is now delayed to the reference noise signal, meaning, that the filter needs a certain length before it can be sufficently adapted. The results also show, that the \ac{SNR}-Gain is different for the different noise signals, indicating, that the noise signals have different characteristics, like the number of peaks, their frequency spectrum and their amplitude.\\ \\
-The mean \ac{SNR}-Gain of the different noise signals, also shown in Figure \ref{fig:fig_snr_comparison.png}, signals, that after reaching 95\% of the maximum \ac{SNR}-Gain, the \ac{SNR}-Gain increase is slowing down. This threshold is reached at a filter length of 45 taps. This means, that a filter length of 45 taps represents an optimal solution for a statisfying performance of the \ac{ANR} algorithm, while a further increase of the filter length does not lead to a significant increase of the \ac{SNR}-Gain in this setup. This is an important finding, as it allows to optimize the computational efficiency of the \ac{ANR} algorithm by choosing an appropriate filter length.
+The mean \ac{SNR}-Gain of the different noise signals, also shown in Figure \ref{fig:fig_snr_comparison.png}, signals, that after reaching 95\% of the maximum \ac{SNR}-Gain, the \ac{SNR}-Gain increase is slowing down - that threshold is reached at a filter length of 45 taps. This means, that a filter length of 45 taps represents an optimal solution for a statisfying performance of the \ac{ANR} algorithm, while a further increase of the filter length does not lead to a significant increase of the \ac{SNR}-Gain in this setup. This is an important finding, as it allows optimizing the computational efficiency of the \ac{ANR} algorithm by choosing an appropriate filter length.
 \subsection{Evaluation of the Full-update implementation}
 \noindent Equation \ref{equation_computing_final} can now be utilized to calculate the needed cycles for the calculation of one sample of the filter output, using a filter length of 45 taps and an update of the filter coefficients every cycle. The needed cycles are calculated as follows:
 \begin{equation}
@@ -68,12 +68,12 @@ As already mentioned in the previous chapters, the sampling rate of the audio da
     \text{Load}_{\text{DSP}} = \frac{\text{C}_{\text{total}}}{\text{C}_{\text{budget}}} = \frac{357 \text{ cycles}}{800 \text{ cycles}} = 44.6 \%
 \end{equation}
 \noindent The results, calculated in Equation \ref{equation_computing_calculation_full_update} to \ref{equation_load_calculation_full_update} can also be recapped as follows:\\ \\ 
-With the optimal filter length of 45 taps and an update rate of the filter coefficients every cycle, the \ac{ANR} algorithm is able to achieve a \ac{SNR}-Gain of about 11.54 dB, averaged over different signal/noise combinations. Under this circumstances, the computational load of the \ac{DSP} core amounts about 45\%, which means that 55\% of the time, which a new sample takes to arrive, it can be halted, and therefore, the overall power consumption can be reduced.\\ \\
+With the optimal filter length of 45 taps and an update rate of the filter coefficients every cycle, the \ac{ANR} algorithm is able to achieve a \ac{SNR}-Gain of about 11.54 dB, averaged over different signal/noise combinations. Under these circumstances, the computational load of the \ac{DSP} core amounts about 45\%, which means that 55\% of the time, which a new sample takes to arrive, it can be halted, and therefore, the overall power consumption can be reduced.\\ \\
-The initial signal/noise combination of a male speaker disturbed by a breathing noise, which is used for the verification of the \ac{DSP} implementation, shall serve as a benchmark for the coming evaluations. With 45 filter coefficients it delivers an \ac{SNR}-Gain of about 9.47 dB.
+The initial signal/noise combination of a male speaker disturbed by a breathing noise, which is used for the verification of the \ac{DSP} implementation, shall serve as a benchmark for the coming evaluations. With 45 filter coefficients it delivers a \ac{SNR}-Gain of about 9.47 dB.
 \subsection{Evaluation of a Reduced-update implementation}
 \subsubsection{Reduced-update implementation for the benchmark case}
-The most straight-forward method to further reduce the computing effort for the \ac{DSP} core is to reduce the update frequency of the filter coeffcients. For every sample, the new filter coefficients are calculated, but not written to the into the Filter Line - this means, that the filter, calculated for the previous sample, is applied to the actual sample. Depending on the acoustic situation, the savings in computing power will most likely lead to a degredation of the noise reduction quality, depending if the current situation is highly dynamic (and therefore would require a frequent update of the filter coefficients) or is rather static. Changing the update frequency, changes the denominator in Equation \ref{equation_c_5} and therefore in Equation \ref{equation_computing_final}.\\ \\
+The most straight-forward method to further reduce the computing effort for the \ac{DSP} core is to reduce the update frequency of the filter coeffcients. For every sample, the new filter coefficients are calculated, but not written to the into the Filter Line - this means, that the filter, calculated for the previous sample, is applied to the actual sample. Depending on the acoustic situation, the savings in computing power will most likely lead to a degredation of the noise reduction quality, depending on if the current situation is highly dynamic (and therefore would require a frequent update of the filter coefficients) or is rather static. Changing the update frequency, changes the denominator in Equation \ref{equation_c_5} and therefore in Equation \ref{equation_computing_final}.\\ \\
-As already mentioned, the reduction of the update rate is initially evaluated for the benchmark case (male speaker disturbed by a breathing noise) and then checked for general validity. Therefore the \ac{SNR}-Gain of 9.47 dB with 45 filter coefficients represent 100\% achievable noise reduction with a maximum of 357 cycles (also 100\%) in the following figure.
+As already mentioned, the reduction of the update rate is initially evaluated for the benchmark case (male speaker disturbed by a breathing noise) and then checked for general validity. Therefore, the \ac{SNR}-Gain of 9.47 dB with 45 filter coefficients represent 100\% achievable noise reduction with a maximum of 357 cycles (also 100\%) in the following figure.
 \begin{figure}[H]
     \centering
     \includegraphics[width=1.0\linewidth]{Bilder/fig_snr_update_rate.png}
@@ -91,7 +91,7 @@ The maximum offset bewteen the two graphs can be found at an updat rate of 0.39,
 \label{equation_load_calculation_reduced_update_1}
     \text{Load}_{\text{DSP}} = \frac{\text{C}_{\text{total}}}{\text{C}_{\text{budget}}} = \frac{188 \text{ cycles}}{800 \text{ cycles}} = 23.5 \%
 \end{equation}
-The interpretation of this results leads to the conclusion, that the most cost-effective way to reduce the load of the \ac{DSP} would be to reduce the update rate of the filter coefficients to 0.39. In the case of the benchmark signal/noise combination, this action nearly halfs the processor load from 44.6\% to 23.5\%, while only reducing the \ac{SNR}-Gain by rougly 31 \% from 9.47 dB to 6.40 dB. In the next step, the same analysis will be applied on all introduced noise signal combinations, to get an idea of the general validity of the made observation.
+The interpretation of these results leads to the conclusion, that the most cost-effective way to reduce the load of the \ac{DSP} would be to reduce the update rate of the filter coefficients to 0.39. In the case of the benchmark signal/noise combination, this action nearly halfs the processor load from 44.6\% to 23.5\%, while only reducing the \ac{SNR}-Gain by rougly 31 \% from 9.47 dB to 6.40 dB. In the next step, the same analysis will be applied on all introduced noise signal combinations, to get an idea of the general validity of the made observation.
 \subsubsection{Reduced-update implementation for multiple noise signals}
 Now the same evaluation as in the previous subchapter is conducted for the five introduced noise signals in combination with the male speaker. The metric for the evaluation is now the performance gain (the distance between relative SNR-Gain and the needed relative cycles/sample) instead of the \ac{SNR}-Gain, as it allows a better picture of the cost-value ratio for the different update rates.
 \begin{figure}[H]
@@ -115,7 +115,7 @@ Now the same evaluation as in the previous subchapter is conducted for the five
 \label{equation_load_calculation_reduced_update_2}
     \text{Load}_{\text{DSP}} = \frac{\text{C}_{\text{total}}}{\text{C}_{\text{budget}}} = \frac{168 \text{ cycles}}{800 \text{ cycles}} = 20.8 \%
 \end{equation}
-Equation \ref{equation_computing_calculation_reduced_update_2} and \ref{equation_load_calculation_reduced_update_2} confirm, that for an update rate of 0.32, a reduction of the \ac{DSP} load to 20.8\% can be achieved, correlating with a performance gain of 24.9\%. This means, that for all viewed scenarios, an update rate of 0.32 represents the best cost-value ratio, for reducing the load while geting the best possible noise reduction. The relative performance for all scenarios result in a mean \ac{SNR}-Gain reduction of 24.5\% from 11.54 dB to 8.72 dB, while the load of the \ac{DSP} core is reduced by about 53.4\% from 44.6\% to 20.8\%.
+Equation \ref{equation_computing_calculation_reduced_update_2} and \ref{equation_load_calculation_reduced_update_2} confirm, that for an update rate of 0.32, a reduction of the \ac{DSP} load to 20.8\% can be achieved, correlating with a performance gain of 24.9\%. This means, that for all viewed scenarios, an update rate of 0.32 represents the best cost-value ratio, for reducing the load while geting the best possible noise reduction. The relative performance for all scenarios results in a mean \ac{SNR}-Gain reduction of 24.5\% from 11.54 dB to 8.72 dB, while the load of the \ac{DSP} core is reduced by about 53.4\% from 44.6\% to 20.8\%.
 \subsubsection{Computational load of the reduced-update implementation}
 The most straight forward implmementation of a reduced update rate is through the use of a counter and a modulo operation, which checks, if for the current sample the filter coefficients has to be updated or not. The code must therefore be extended by two blocks which are responsible for additional computational load: 
 \begin{gather}
@@ -133,13 +133,13 @@ Incrementing the counter and checking if the counter has reached the update rate
 \label{equation_load_calculation_reduced_update_3}
     \text{Load}_{\text{DSP}} = \frac{\text{C}_{\text{total}}}{\text{C}_{\text{budget}}} = \frac{197 \text{ cycles}}{800 \text{ cycles}} = 24.6 \%
 \end{equation}
-The results from the updated equations show, that the computational load for an update rate of 0.32 increase substantially from 20.8\% to 24.6\% through the use of a counter and a modulo operation, as the latter iscomputational quite  expensive. A better alternative would be the use of a bitwise check, but this would reduce the possible update rates to powers of 2. In the case of the benchmark track, the load rises from 23.5\% to 27.1\%.
+The results from the updated equations show, that the computational load for an update rate of 0.32 increase substantially from 20.8\% to 24.6\% through the use of a counter and a modulo operation, as the latter is computational quite expensive. A better alternative would be the use of a bitwise check, but this would reduce the possible update rates to powers of 2. In the case of the benchmark track, the load rises from 23.5\% to 27.1\%.
 \subsection{Evaluation of an error driven implementation}
-In contrary to the fixed update implementation of the previous chapter, the error-driven implementation is a more sophisticated approach, which focuses on an error metric, over which the decision for an coefficient update is made. 
+In contrary to the fixed update implementation of the previous chapter, the error-driven implementation is a more sophisticated approach, which focuses on an error metric, over which the decision for a coefficient update is made. 
-The idea is, as the update size of the filter coefficients gets smaller, the benefit of updating them decreases. In practice, a closer look at the update of the filter coefficients is taken: As shown in Figure \ref{fig:fig_dsp_coefficient_cycle.jpg}, the size of the update of the filter coefficients is directly related to the error signal - if the error signal decreases, the update-size of the filter coefficients also decreases. \\ \\
+The idea is, as the update size of the filter coefficients gets smaller, the benefit of updating them decreases. In practice, a closer look at the update of the filter coefficients is taken: As shown in Equation \ref{equation_lms}, the size of the update of the filter coefficients is directly related to the error signal - if the error signal decreases, the update-size of the filter coefficients also decreases. \\ \\
 As the fixed update implementation is not able to detect such changes, the reduction in update frequency is applied in a static way, which means, that there are situations were it is beneficial and situations where it is not. The error-driven implementation, on the other hand, is able to detect such changing behavior and therefore can adapt the update frequency accordingly. Therefore, the error-driven implementation is expected to deliver a better cost-value ratio than the fixed update implementation.
 \subsubsection{Error threshold implementation for the benchmark case}
-The chosen approach for this thessis the use a fixed error threshold. This means, that if the error signal remains below an, in advance set, certain threshold, the filter coefficients remain unchanged and are not updated. If the error signal exceeds the threshold, the filter coefficients are updated as in the full-update implementation.\\ \\ The crucial aspect of this approach, is the right choise of the error threshold, which is expected to be highly dependent on the acoustic situation. To get an idea of a beneficial error threshold, different values are initially evaluated for the already used benchmark case.\\ \\ The reduction in computational load must now be calculated for the whole audio track by the percentage of samples, where the error signal exceeds the threshold and therefore the coefficients are adapted. This means in detail, that if for a certain error threshold, 50000 of 200000 samples exceed said threshold, the filter coefficients are updated in 25\% of the samples - therefore the update rate of the filter coefficients amounts to 0.25. The result can therefore be expressed in the same way as for the fixed update implementation, where the update rate is directly calculated for one sample.
+The chosen approach for this thessis the use a fixed error threshold. This means, that if the error signal remains below an in advance set, certain threshold, the filter coefficients remain unchanged and are not updated. If the error signal exceeds the threshold, the filter coefficients are updated as in the full-update implementation.\\ \\ The crucial aspect of this approach, is the right choise of the error threshold, which is expected to be highly dependent on the acoustic situation. To get an idea of a beneficial error threshold, different values are initially evaluated for the already used benchmark case.\\ \\ The reduction in computational load must now be calculated for the whole audio track by the percentage of samples, where the error signal exceeds the threshold and therefore the coefficients are adapted. This means in detail, that if for a certain error threshold, 50000 of 200000 samples exceed said threshold, the filter coefficients are updated in 25\% of the samples - therefore the update rate of the filter coefficients amounts to 0.25. The result can therefore be expressed in the same way as for the fixed update implementation, where the update rate is directly calculated for one sample.
 \begin{figure}[H]
     \centering
     \includegraphics[width=1.0\linewidth]{Bilder/fig_snr_error_threshold.png}
@@ -157,7 +157,7 @@ The chosen approach for this thessis the use a fixed error threshold. This means
 \end{equation}
 The performance difference to reducing the update rate is already clearly for the benchmark track: With a similar \ac{DSP} load of 24.1\% (again, nearly half the load of the full update implementation), the \ac{SNR}-Gain is reduced by only 8.9\% from 9.47dB to 8.63 dB. The same analysis will be applied on all introduced noise signal, to get an idea of the general validity of the made observation. 
 \subsubsection{Error threshold implementaion for multiple noise signals}
-Again, the same evaluation as for the benchmark track is conducted for the five introduced noise signals, featuring the the performance gain instead of the \ac{SNR}-Gain as a evaluation metric.
+Again, the same evaluation as for the benchmark track is conducted for the five introduced noise signals, featuring the performance gain instead of the \ac{SNR}-Gain as an evaluation metric.
 \begin{figure}[H]
     \centering
     \includegraphics[width=1.0\linewidth]{Bilder/fig_gain_error_threshold.png}
@@ -170,7 +170,7 @@ Again, the same evaluation as for the benchmark track is conducted for the five
 \caption{Absolute \ac{DSP} load in relation to the error threshold for different noise signals.}
     \label{fig:fig_load_error_threshold.png}
 \end{figure}
-\noindent Similar to the reduced update rate implementation, the observation made for every signal/noise combination is comparable to the benchmark case, but not the same. Figure \ref{fig:fig_gain_error_threshold.png} shows the performance gain for the five different scenarios. The most beneficial error threshold shifted noticeable to a value of 0.07. It´s interesting to notice, that the benchmark case seems to be a bit of an exception compared to the behavior of the other scenarios.\\ \\
+\noindent Similar to the reduced update rate implementation, the observation made for every signal/noise combination is comparable to the benchmark case, but not the same. Figure \ref{fig:fig_gain_error_threshold.png} shows the performance gain for the five different scenarios. The most beneficial error threshold shifted noticeable to a value of 0.07. It's interesting to notice, that the benchmark case seems to be a bit of an exception compared to the behavior of the other scenarios.\\ \\
 A mean error threshold of 0.07 results in a mean update of 38244 out of 200000 samples, which equivalents an update rate of 19.1\%. The \ac{DSP} load for all scenarios is now not the same anymore, but still quite similar - Figure \ref{fig:fig_load_error_threshold.png} shows the absolute load of the \ac{DSP} core for an error threshold of 0.07 results in only 16.6\%.
 \begin{equation}
 \label{equation_computing_calculation_error_threshold_2}
@@ -180,7 +180,7 @@ A mean error threshold of 0.07 results in a mean update of 38244 out of 200000 s
 \label{equation_load_calculation_error_threshold_2}
     \text{Load}_{\text{DSP}} = \frac{\text{C}_{\text{total}}}{\text{C}_{\text{budget}}} = \frac{132 \text{ cycles}}{800 \text{ cycles}} = 16.6 \%
 \end{equation}
-Equation \ref{equation_computing_calculation_error_threshold_2} and \ref{equation_load_calculation_error_threshold_2} confirm, that for an error threshold of 0.07, a reduction of the \ac{DSP} load to 16.6\% can be achieved, correlating with a performance gain of 48.4\%. This means, that for all viewed scenarios, an error threshold of 0.07 represents the best cost-value ratio, for reducing the load while geting the best possible noise reduction. The relative performance for all scenarios result in a mean \ac{SNR}-Gain reduction of 11.7\% from 11.54 dB to 10.19 dB, while the load of the \ac{DSP} core is reduced by about 62.8\% from 44.6\% to 16.6\%.
+Equation \ref{equation_computing_calculation_error_threshold_2} and \ref{equation_load_calculation_error_threshold_2} confirm, that for an error threshold of 0.07, a reduction of the \ac{DSP} load to 16.6\% can be achieved, correlating with a performance gain of 48.4\%. This means, that for all viewed scenarios, an error threshold of 0.07 represents the best cost-value ratio, for reducing the load while geting the best possible noise reduction. The relative performance for all scenarios results in a mean \ac{SNR}-Gain reduction of 11.7\% from 11.54 dB to 10.19 dB, while the load of the \ac{DSP} core is reduced by about 62.8\% from 44.6\% to 16.6\%.
 \subsubsection{Computational load of the error threshold implementation}
 In contrary to the fixed update implementation, the error threshold implementation for a fixed error threshold does not require computational expensive operations: The threshold is implemented as a 32-bit integer which is simply checked for every sample by a single if-clause.
 \begin{gather}
@@ -197,9 +197,9 @@ Equation \ref{equation_computing_calculation_error_threshold_3} and \ref{equatio
 \label{equation_load_calculation_error_threshold_3}
     \text{Load}_{\text{DSP}} = \frac{\text{C}_{\text{total}}}{\text{C}_{\text{budget}}} = \frac{142 \text{ cycles}}{800 \text{ cycles}} = 17.8 \%
 \end{equation}
-Contrary to the fixed update implementation, the computational load for an error threshold of 0.07 only shows only a minimal increase from 16.6\% to 17.8\% through the use of a computational cheap if-clause. This is a clear advantage compared to the fixed update implementation. In the case of the benchmark track, the load rises from 24.1\% to 25.7\%.
+Contrary to the fixed update implementation, the computational load for an error threshold of 0.07 shows only a minimal increase from 16.6\% to 17.8\% through the use of a computational cheap if-clause. This is a clear advantage compared to the fixed update implementation. In the case of the benchmark track, the load rises from 24.1\% to 25.7\%.
 \subsection{Summary of the performance evaluation}
-The results of two analysis can be summarized as follows: \\ \\ With the optimal filter length of 45 taps and an update rate of the filter coefficients every cycle, the \ac{ANR} algorithm is able to achieve a \ac{SNR}-Gain of about 11.54 dB, averaged over all different signal/noise combinations. Under this circumstances, the computational load of the \ac{DSP} core amounts about 45\%, which means that 55\% of the time, which a new sample takes to arrive, it can be halted, and therefore, the overall power consumption can be reduced.\\ \\
+The results of two analysis can be summarized as follows: \\ \\ With the optimal filter length of 45 taps and an update rate of the filter coefficients every cycle, the \ac{ANR} algorithm is able to achieve a \ac{SNR}-Gain of about 11.54 dB, averaged over all different signal/noise combinations. Under these circumstances, the computational load of the \ac{DSP} core amounts about 45\%, which means that 55\% of the time, which a new sample takes to arrive, it can be halted, and therefore, the overall power consumption can be reduced.\\ \\
 A simple method to further reduce the load of the \ac{DSP} core is to reduce the update frequency of the filter coeffcients. For the benchmark signal/noise combination, an update rate of 0.39 nearly halfs the processor load from 44.6\% to 23.5\%, while only reducing the \ac{SNR}-Gain by rougly 31 \% from 9.47 dB to 6.40 dB. For all viewed scenarios, an update rate of 0.32 represents the best cost-value ratio, for reducing the load while geting the best possible noise reduction - with a mean \ac{SNR}-Gain reduction of 24.5\% from 11.54 dB to 8.72 dB, while the load of the \ac{DSP} core is reduced by about 53.4\% from 44.6\% to 20.8\%. While the perfromance benefit of this approach is reasonable, the computanional effort of the implementation is significant -  the 20.8\% total load rise to 24.6\%. Figure \ref{fig:fig_snr_update_rate_new.png} shows the updated plot of the relative performance of the SNR-Gain, the cycles per samples and the DSP load in regard of the update rate for the benchmark case, where the higher load is indicated by the newly added continuous grahps. The initial graphs are still slightly visible allowing a better comparison of the two implementations.
 \begin{figure}[H]
     \centering
@@ -215,7 +215,7 @@ This result proofes, that an error-driven implementation of the \ac{ANR} algorit
     \caption{Updated plot of the relative performance of the SNR-Gain, the cycles per samples and the DSP load in regard of the error threshold for the benchmark case. The higher load is indicated by the newly added continuous lines.}
     \label{fig:fig_snr_error_threshold_new.png}
 \end{figure}
-\noindent The results of the performance evaluation for the different implementations of the \ac{ANR} algorithm are summarized in Table \ref{tab:summary_performance_evaluation}. The \ac{SNR} Gain is individually calculated for the most beneficial update rate or error threshold for the specific implementation, while the load of the \ac{DSP} core is calculated with the additional computational effort caused by the optimization.
+\noindent The results of the performance evaluation for the different implementations of the \ac{ANR} algorithm are summarized in Table \ref{tab:summary_performance_evaluation}. The \ac{SNR}-Gain is individually calculated for the most beneficial update rate or error threshold for the specific implementation, while the load of the \ac{DSP} core is calculated with the additional computational effort caused by the optimization.
 \begin{table}[h]
 \centering
 \begin{tabular}{|c|c|c|c|}

chapter_06.tex

@@ -1,12 +1,12 @@
 \section{Conclusion and outlook}
-The focus of this thesis was to investigate the possibilities and improvement options for the implementation of a real-time capable \ac{ANR} algorithm in \ac{CI} systems.\\ \\ The initial high-level implementation in Python proofed the general feasibility of the proposed \ac{LMS} method, where the \ac{SNR}-Gain was introduced as a metric for the quality of the noise reduction. Said metric was used to evaluate the performance of the algorithm in various settings and noise conditions. First a fictional desired signal (sine wave) and noise signal (sine wave or white noise) were used to check the algrotihm for it´s general functionality. Then the step to real, recorded signals was made. The final and most complex combination (which then served as a benchmark for the remaining thesis) was the use of the same real world signals, but now different transfer functions and delays were introduced, to mimic a complex, practical and realistic situation. In every case, the algorithm was able to achieve significant performance improvement in the \ac{SNR} for the processed signals. \\ \\
+The focus of this thesis was to investigate the feasibility and the improvement options for the implementation of a real-time capable \ac{ANR} algorithm in \ac{CI} systems.\\ \\ The initial high-level implementation in Python proofed the general suitability of the proposed \ac{LMS} method, where the \ac{SNR}-Gain was introduced as a metric for the quality of the noise reduction. Said metric was used to evaluate the performance of the algorithm in various settings and noise conditions. First a fictional desired signal (chirp) and noise signal (sine wave or white noise) were used to check the algorithm for its general functionality. Then the step to real, recorded signals was made. The final and most complex combination (which then served as a benchmark for the remaining thesis) was the use of the same real world signals, but now different transfer functions and delays were introduced, to mimic a complex, practical and realistic situation. In every case, the algorithm was able to achieve significant performance improvement in the \ac{SNR} for the processed signals. \\ \\
-\noindent The next challenge was to implement the algorithm in a efficient way in the C programming language, to achieve real-time capability. This was achieved by the use of \ac{DSP} compiler instrinsic functions, which allow to perform logic operations with a minimum of needed instructions. After the C-implementation was functional, the performacne for the benchmark track was compared to the initial Python implementation. A histrogram of the differences between the two ouptuts showed only minor deviations, which can be attributed to the fixed-point calculations of the \ac{DSP} compiler.\\ \\
+\noindent The next challenge was to implement the algorithm efficiently in the C programming language, to achieve real-time capability. This was achieved by the use of \ac{DSP} compiler instrinsic functions, which allow performing logic operations with a minimum of needed instructions. After the C implementation was functional, the performacne for the benchmark track was compared to the initial Python implementation. A histrogram of the differences between the two ouptuts showed only minor deviations, which can be attributed to the fixed-point calculations of the \ac{DSP} compiler.\\ \\
-\noindent With the working C-implementation in place, a closer look on the performance, especially the needed cycles to compute one sample, was taken - the result was a formula, which calculates the needed samples as a function of the filter length and the update rate. With this information in mind, several noise sources were put under test, to evaluatue the optimal filter length, which is a trade-off between the performance improvement and the computational cost - the result was 45 coefficients for an assumption of a signal delay of 2 milliseconds.\\ \\
+\noindent Having a working C-implementation in place, a closer look on the performance, especially the needed cycles to compute one sample, was taken - the result was a formula, which calculates the needed samples as a function of the filter length and the update rate. With this information in mind, several noise sources were put under test, to evaluatue the optimal filter length, which is a trade-off between the performance improvement and the computational cost - the result was 45 coefficients for an assumption of a signal delay of 2 milliseconds.\\ \\
-With a set filter length of 45 coefficients, the final improvement of the algorithm regarding performance and computational cost could be evaluated. The base was the computational most costly full-update implementation, needing 357 cycles to process one sample - this correspondends with about 45\% \ac{DSP} load.\\ \\ 
+With a set filter length of 45 coefficients, the final improvement of the algorithm regarding performance and computational cost could be conducted. The base was the computational most costly full-update implementation, needing 357 cycles to process one sample - this correspondends with about 45\% \ac{DSP} load.\\ \\ 
-\noindent The first approach was a rather simple reduction in the update rate, evaluated for the benchmark case and different signal/noise combinations. The result was a significant reduction in the needed cycles, but with quite strong decrease in the \ac{SNR}-Gain. Additionaly, the implementation of such an universal reduction, required computational expensive processor operations, further reducing the cost-benefit-ratio.\\ \\ 
+\noindent The first approach was a rather simple reduction in the update rate, evaluated for the benchmark case and different signal/noise combinations. The result was a significant reduction in the needed cycles, but with quite strong decrease in the \ac{SNR}-Gain. Additionaly, the implementation of such a universal reduction, required computational expensive processor operations, further reducing the cost-benefit-ratio.\\ \\ 
 \noindent The second approach was the proposed method of an error driven optimization, utilizing the idea of a fixed threshold for the error signal. Again, evaluated for the benchmark case and different signal/noise combinations, this approach can be considered a success, as it was able to achieve a significant reduction in the needed cycles, while only reducing the \ac{SNR}-Gain by a small amount. The implementation of this method is also computationally efficient, as it only requires a simple comparison operation to check if an update is necessary.\\ \\
-\noindent The error driven optimization approach can therefore be seen as a the clear winner, as it was able to further improve an already real-time capable \ac{ANR} algorithm, by significantly reducing the computational load of the \ac{DSP} core, while only slightly reducing the performance improvement in terms of \ac{SNR}-Gain.\\ \\
+\noindent The error driven optimization approach can therefore be seen as the clear winner, as it was able to further improve an already real-time capable \ac{ANR} algorithm, by significantly reducing the computational load of the \ac{DSP} core, while only slightly reducing the performance improvement in terms of \ac{SNR}-Gain.\\ \\
-\noindent For future work, a more advanced method to further optimize the system could be the use of a dynamic threshold, which could be adapted according to the current noise conditions. The background for this proposal is the fact, that beside the error-signal, also the noise signal itself influences the size of the filter-coeffcient update. In the current implementation, the threshold is only dependend on the error signal - if a sitatuion arises, where the noise signal is very small, but the error/output signal is high due to a high input signal, an update of the filter coefficients would be triggered, even if not necessary. A dynamic threshold, which also takes the noise signal into account, could further reduce the number of updates, but with a potentially higher computational effort.\\ \\
+\noindent For future work, a more advanced method to further optimize the system could be the use of a dynamic threshold, which could be adapted according to the current noise conditions. The background for this proposal is the fact, that beside the error signal, also the noise signal itself influences the size of the filter coeffcient update. In the current implementation, the threshold is only dependend on the error signal - if a sitatuion arises, where the noise signal is very small, but the error/output signal is high due to a high input signal, an update of the filter coefficients would be triggered, even if not necessary. A dynamic threshold, which also takes the noise signal into account, could further reduce the number of updates, but with a potentially higher computational effort.\\ \\
 \noindent Also, the already in Chapter 2 mentioned hybrid filter approach, which splits the filter into a static and adaptive part, could be further investigated. The idea behind this approach is, that the static part of the filter covers certain signal paths, which are to be expected time invariant, while the adaptive part of the filter only needs to cover changing signals.\\ \\ 
 \noindent Therefore, the final result of this thesis can be summarized as follows:\\ \\
 The approach of an error driven optimization of a real-time capable \ac{ANR} algorithm, utilizing the idea of a fixed threshold for the error signal, is a viable method to achieve significant reduction in computational load while still keeping the performance near its maximum. For the use in a \ac{CI} system, this means, that the additional power usage needed for Adaptive Noise Reduction can be kept low, making it a promising option to further improve the auditory quality for \ac{CI} users.\\ \\

main.tex

@@ -110,15 +110,15 @@ by \par
 \include{acronyms}
 \newpage
 \begin{abstract}
-    \noindent The goal of this thesis is the implementation followed by the investigation of improvement options of a real-time capable Adaptive Noise Reduction (ANR) algorithm in Cochlear Implant systems. The focus lies on the reduction of the computational load, and subsequently the power consumption, of the used Digital Signal Processor (DSP) core, while still keeping the noise reduction performance as high as possible.\\ \\
+    \noindent The goal of this thesis is the implementation, followed by the investigation of improvement options, of a real-time capable Adaptive Noise Reduction (ANR) algorithm in Cochlear Implant (CI) systems. The focus lies on the reduction of the computational load, and subsequently the power consumption, of the used Digital Signal Processor (DSP) core, while still keeping the noise reduction performance as high as possible.\\ \\
-    \noindent The chosen method for noise reduction is the use of a Least Mean Square algorithm, which is a widely utilized method in this context. The evaluation of the performance is conducted via the Signal-Noise-Ratio (SNR)-Gain, which serves as a metric for the quality of the noise reduction. Several use cases (from simple to realistic) are analyzed to evaluate qualitiy of the output under different conditions.\\ \\
+    \noindent The chosen method for noise reduction is the use of an adaptive filter combined with the Least Mean Square algorithm, which is a widely utilized method in this context. The evaluation of the performance is conducted via the Signal-Noise-Ratio (SNR)-Gain, which serves as a metric for the quality of the noise reduction. Several use cases (from simple to realistic) are analyzed to evaluate qualitiy of the output under different conditions.\\ \\
     \noindent After confirming the general feasibility of the proposed method in a high-level Python-implementation, the algorithm is implemented in C, using DSP compiler instrinsic functions to achieve real-time capability. The performance of the C-implementation is then sucessfully compared to the initial high-level implementation, showing only minor deviations.\\ \\
     \noindent With a working C-implementation in place, a closer look on the achievable performance under full-update settings is taken, which serves as a benchmark-setting for the remaining thesis. The computational cost of the algorithm is evaluated in terms of the needed cycles to compute one audio sample, which can be expressed as a function of the filter length and the update rate.\\ \\
     \noindent With this formula developed, several noise sources are put under test, to evaluatue the optimal filter length, which is a trade-off between the performance improvement and the computational cost. The ideal filter length is determined at 45 coeffcients, where about 95\% averaged \ac{SNR}-Gain can be achieved.\\ \\
     \noindent With the filter lenght set, the improvement of the algorithm is tackled, both for a benchmark track and different signal/noise scenarios.\\ \\
     \noindent The first approach is a reduction of the update rate. This strategy is able to significantly reduce the needed cycles, but with a simultanious considerable decrease in the SNR-Gain.\\ \\
     \noindent The second approach is an error driven optimization, utilizing the idea of a fixed threshold for the error signal, over which the decision over an upgrade of the filter coefficients is made. This approach turns out to be a success, as it is able to achieve a significant reduction in the needed cycles, while only reducing the SNR-Gain by a small amount.\\ \\
-    \noindent Therefore, the error driven optimization approach can be seen as the sucessful result of this thesis, as it is able to further improve an already real-time capable ANR algorithm by significantly reducing the computational load of the DSP core, while only slightly reducing the performance improvement in terms of SNR-Gain.\\ \\
+    \noindent Therefore, the error driven optimization approach can be seen as the sucessful result of this thesis, as it is able to further improve an already real-time capable ANR algorithm by significantly reducing the computational load of the DSP core, while only slightly reducing the performance improvement in terms of the SNR-Gain.\\ \\
 
 \end{abstract}
 \include{chapter_01}