diff --git a/chapter_04.aux b/chapter_04.aux index 2196128..7ceab72 100644 --- a/chapter_04.aux +++ b/chapter_04.aux @@ -7,10 +7,10 @@ \acronymused{ANR} \@writefile{toc}{\contentsline {subsection}{\numberline {4.1}Low-power system architecture and integration}{42}{}\protected@file@percent } \AC@undonewlabel{acro:SOC} -\newlabel{acro:SOC}{{4.1}{42}{}{subsection.4.1}{}} +\newlabel{acro:SOC}{{4.1}{42}{}{}{}} \acronymused{SOC} \AC@undonewlabel{acro:ARM} -\newlabel{acro:ARM}{{4.1}{42}{}{subsection.4.1}{}} +\newlabel{acro:ARM}{{4.1}{42}{}{}{}} \acronymused{ARM} \acronymused{DSP} \acronymused{ARM} @@ -22,7 +22,7 @@ \acronymused{DSP} \acronymused{DSP} \AC@undonewlabel{acro:MAC} -\newlabel{acro:MAC}{{4.1.1}{42}{}{subsubsection.4.1.1}{}} +\newlabel{acro:MAC}{{4.1.1}{42}{}{}{}} \acronymused{MAC} \acronymused{ARM} \acronymused{ANR} @@ -37,10 +37,10 @@ \acronymused{ARM} \acronymused{DSP} \AC@undonewlabel{acro:DMA} -\newlabel{acro:DMA}{{4.1.1}{43}{}{subsubsection.4.1.1}{}} +\newlabel{acro:DMA}{{4.1.1}{43}{}{}{}} \acronymused{DMA} \AC@undonewlabel{acro:PCM} -\newlabel{acro:PCM}{{4.1.1}{43}{}{subsubsection.4.1.1}{}} +\newlabel{acro:PCM}{{4.1.1}{43}{}{}{}} \acronymused{PCM} \acronymused{DSP} \acronymused{PCM} @@ -51,7 +51,7 @@ \acronymused{DSP} \acronymused{DSP} \AC@undonewlabel{acro:ALU} -\newlabel{acro:ALU}{{4.1.1}{43}{}{subsubsection.4.1.1}{}} +\newlabel{acro:ALU}{{4.1.1}{43}{}{}{}} \acronymused{ALU} \acronymused{DSP} \acronymused{MAC} @@ -70,7 +70,7 @@ \acronymused{ARM} \acronymused{DSP} \acronymused{PCM} -\newlabel{fig:fig_dsp_setup.jpg}{{32}{44}{}{figure.32}{}} +\newlabel{fig:fig_dsp_setup.jpg}{{32}{44}{}{}{}} \acronymused{ARM} \acronymused{PCM} \acronymused{DMA} @@ -85,7 +85,7 @@ \@writefile{lof}{\contentsline {figure}{\numberline {33}{\ignorespaces Simplified flowchart of the sample processing between the \ac {ARM} core and the \ac {DSP} core via interrupts and shared memory.}}{45}{}\protected@file@percent } \acronymused{ARM} \acronymused{DSP} -\newlabel{fig:fig_dsp_comm.jpg}{{33}{45}{}{figure.33}{}} +\newlabel{fig:fig_dsp_comm.jpg}{{33}{45}{}{}{}} \@writefile{toc}{\contentsline {subsection}{\numberline {4.2}Software architecture and execution flow}{45}{}\protected@file@percent } \@writefile{toc}{\contentsline {subsubsection}{\numberline {4.2.1}ARM–DSP communication and data exchange details}{45}{}\protected@file@percent } \acronymused{ANR} @@ -121,7 +121,7 @@ \acronymused{DMA} \acronymused{DSP} \acronymused{ARM} -\newlabel{fig:fig_dsp_dma.jpg}{{34}{47}{}{figure.34}{}} +\newlabel{fig:fig_dsp_dma.jpg}{{34}{47}{}{}{}} \acronymused{DMA} \acronymused{DMA} \acronymused{PCM} @@ -138,10 +138,10 @@ \acronymused{DSP} \acronymused{PCM} \acronymused{DSP} -\newlabel{fig:fig_dps_code_memory}{{4.2.2}{48}{}{lstnumber.-2.13}{}} +\newlabel{fig:fig_dps_code_memory}{{4.2.2}{48}{}{}{}} \@writefile{lof}{\contentsline {figure}{\numberline {35}{\ignorespaces Low-level implementation: Memory initialization and mapping}}{48}{}\protected@file@percent } \@writefile{lof}{\contentsline {figure}{\numberline {36}{\ignorespaces Exemplary memory map of the 4-element input buffer array. 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