diff --git a/Bilder/fig_anr_logic.jpg b/Bilder/fig_anr_logic.jpg index d1c644e..bc5e13a 100644 Binary files a/Bilder/fig_anr_logic.jpg and b/Bilder/fig_anr_logic.jpg differ diff --git a/Bilder/fig_dsp_logic.jpg b/Bilder/fig_dsp_logic.jpg index 02e1413..8d2433d 100644 Binary files a/Bilder/fig_dsp_logic.jpg and b/Bilder/fig_dsp_logic.jpg differ diff --git a/chapter_04.aux b/chapter_04.aux index a351954..ac06e14 100644 --- a/chapter_04.aux +++ b/chapter_04.aux @@ -155,7 +155,7 @@ \@writefile{lof}{\contentsline {figure}{\numberline {38}{\ignorespaces Flow diagram of the code implementation of the main loop and interrupt handling on the \ac {DSP} core.}}{48}{}\protected@file@percent } \acronymused{DSP} \newlabel{fig:fig_dsp_logic.jpg}{{38}{48}{}{}{}} -\@writefile{toc}{\contentsline {paragraph}{Calc()-function}{48}{}\protected@file@percent } +\@writefile{toc}{\contentsline {paragraph}{calculate\_output()-function}{48}{}\protected@file@percent } \acronymused{DSP} \acronymused{ANR} \acronymused{DSP} @@ -180,9 +180,13 @@ \acronymused{MAC} \acronymused{ALU} \acronymused{DSP} -\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.3.2}Performance evaluation and quantization of the DSP implementation}{50}{}\protected@file@percent } +\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.3.2}Performance quantization of the ANR calculation}{50}{}\protected@file@percent } +\acronymused{ANR} +\@writefile{toc}{\contentsline {paragraph}{write\_buffer}{51}{}\protected@file@percent } +\@writefile{toc}{\contentsline {paragraph}{apply\_fir\_filter}{51}{}\protected@file@percent } +\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.3.3}Performance evaluation of different implementation variants}{51}{}\protected@file@percent } \@setckpt{chapter_04}{ -\setcounter{page}{51} +\setcounter{page}{52} \setcounter{equation}{21} \setcounter{enumi}{0} \setcounter{enumii}{0} @@ -193,7 +197,7 @@ \setcounter{part}{0} \setcounter{section}{4} \setcounter{subsection}{3} -\setcounter{subsubsection}{2} +\setcounter{subsubsection}{3} \setcounter{paragraph}{0} \setcounter{subparagraph}{0} \setcounter{figure}{40} @@ -317,7 +321,7 @@ \setcounter{lstnumber}{11} \setcounter{FancyVerbLine}{0} \setcounter{linenumber}{1} -\setcounter{LN@truepage}{50} +\setcounter{LN@truepage}{51} \setcounter{FancyVerbWriteLine}{0} \setcounter{FancyVerbBufferLine}{0} \setcounter{FV@TrueTabGroupLevel}{0} diff --git a/chapter_04.tex b/chapter_04.tex index dd59c04..3a4c5a9 100644 --- a/chapter_04.tex +++ b/chapter_04.tex @@ -120,8 +120,8 @@ If the \ac{ARM} core requests a sample to be processed, it activates the \ac{DSP \caption{Flow diagram of the code implementation of the main loop and interrupt handling on the \ac{DSP} core.} \label{fig:fig_dsp_logic.jpg} \end{figure} -\paragraph{Calc()-function} -The calc()-function at the very end of the main process loop represents the heart of the \ac{DSP}code, as it is responsible for applying the \ac{ANR} algorithm on the two input samples. As it follows the same structure as the high-level implementation described in the previous chapter, the general functionality will not be described in detail again. The technical implementation on the \ac{DSP} however will be outlined in detail in the following subchapter, as the hardware-specific optimizations, responsible for a real-time capable implementation, are a key element for the estimation of the expectable power consumption of the system.\\ \\ +\paragraph{calculate\_output()-function} +The calculate\_output()-function at the very end of the main process loop represents the heart of the \ac{DSP} code, as it is responsible for applying the \ac{ANR} algorithm on the two input samples. As it follows the same structure as the high-level implementation described in the previous chapter, the general functionality will not be described in detail again. Yet, the technical implementation on the \ac{DSP} however will be outlined in detail in the following subchapter, as the hardware-specific optimizations are key elements for the estimation of the expectable power consumption of the system.\\ \\ \subsection{DSP-level implementation of the ANR algorithm} The ability to process audio samples in real-time on the \ac{DSP} core is strongly dependent on compiler-specific optimizations and hardware-specific implementation techniques, which allow a far more efficient execution of the algorithm compared to a native C implementation. @@ -165,8 +165,20 @@ As already mentioned during the beginning of the current chapter, the used \ac{D To tackle this issues, the \ac{DSP} compiler provides intrinsic functions for fractional fixed-point arithmetic, such as a fractional multiplication function, which takes two 32-bit integers as input and return an already bit-shifted 64-bit output, representing the fractional multiplication result. This approach prevents the need for manual bit-shifting operations after each multiplication.\\ \\ To support such operations, a 72-bit accumulator is provided, allowing to store intermediate 64-bit results of 32-bit multiplications without losing precision - the remaining 8 bit serve as an overflow space. If needed, a saturation function is also provided, to round the 64-bit result back to a 32-bit value. -\subsubsection{Performance evaluation and quantization of the DSP implementation} - +\subsubsection{Performance quantization of the ANR calculation} +As mentioned in the previous subchapter, the \ac{ANR} calucation for every sample is executed in the calculate\_output()-function. The general scheme of the calculation was already visualized in \ref{fig:fig_anr_logic} and did not change for the implemenation in C. The main focus lies now on the computational efficiency of the different parts of the function, finally resulting in the generation of a formula, able to calculate the needed cycles in dependecy of various parameters.\\ \\ +The calculate\_output() functions consists out of the following four main parts, described in detail afterwards: +\begin{itemize} + \item write\_buffer + \item apply\_fir\_filter + \item update\_output + \item update\_filter\_coefficients +\end{itemize} +Some of the sub-functions feature dsp-specific operations, resulting in a minimum count of processor cycles per input samples, depending on parameters like filter length and adaption pauses. +\paragraph{write\_buffer} +\paragraph{apply\_fir\_filter} + +\subsubsection{Performance evaluation of different implementation variants} diff --git a/drawio/fig_anr_logic.drawio b/drawio/fig_anr_logic.drawio index c9f8ceb..4744a34 100644 --- a/drawio/fig_anr_logic.drawio +++ b/drawio/fig_anr_logic.drawio @@ -1,159 +1,159 @@ - + - + - - + + - - + + - - + + - - + + - - + + - - - - + + + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - + - - + + - - + + - - - - + + + + - - + + - - - - + + + + - - + + - - - - + + + + - - + + - - + + - - - - + + + + - - + + - - + + - - + + diff --git a/drawio/fig_dsp_logic.drawio b/drawio/fig_dsp_logic.drawio index 1b97ad5..b026460 100644 --- a/drawio/fig_dsp_logic.drawio +++ b/drawio/fig_dsp_logic.drawio @@ -1,6 +1,6 @@ - + - + @@ -184,7 +184,7 @@ - +