Rechtschreibfehler
This commit is contained in:
@@ -7,10 +7,10 @@
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\acronymused{ANR}
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\@writefile{toc}{\contentsline {subsection}{\numberline {4.1}Low-power system architecture and integration}{40}{}\protected@file@percent }
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\AC@undonewlabel{acro:SOC}
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\newlabel{acro:SOC}{{4.1}{40}{}{}{}}
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\newlabel{acro:SOC}{{4.1}{40}{}{subsection.4.1}{}}
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\acronymused{SOC}
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\AC@undonewlabel{acro:ARM}
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\newlabel{acro:ARM}{{4.1}{40}{}{}{}}
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\newlabel{acro:ARM}{{4.1}{40}{}{subsection.4.1}{}}
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\acronymused{ARM}
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\acronymused{DSP}
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\acronymused{ARM}
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@@ -22,7 +22,7 @@
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\acronymused{DSP}
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\acronymused{DSP}
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\AC@undonewlabel{acro:MAC}
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\newlabel{acro:MAC}{{4.1.1}{40}{}{}{}}
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\newlabel{acro:MAC}{{4.1.1}{40}{}{subsubsection.4.1.1}{}}
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\acronymused{MAC}
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\acronymused{ARM}
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\acronymused{ANR}
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@@ -37,10 +37,10 @@
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\acronymused{ARM}
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\acronymused{DSP}
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\AC@undonewlabel{acro:DMA}
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\newlabel{acro:DMA}{{4.1.1}{41}{}{}{}}
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\newlabel{acro:DMA}{{4.1.1}{41}{}{subsubsection.4.1.1}{}}
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\acronymused{DMA}
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\AC@undonewlabel{acro:PCM}
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\newlabel{acro:PCM}{{4.1.1}{41}{}{}{}}
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\newlabel{acro:PCM}{{4.1.1}{41}{}{subsubsection.4.1.1}{}}
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\acronymused{PCM}
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\acronymused{DSP}
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\acronymused{PCM}
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@@ -51,13 +51,13 @@
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\acronymused{DSP}
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\acronymused{DSP}
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\AC@undonewlabel{acro:ALU}
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\newlabel{acro:ALU}{{4.1.1}{41}{}{}{}}
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\newlabel{acro:ALU}{{4.1.1}{41}{}{subsubsection.4.1.1}{}}
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\acronymused{ALU}
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\acronymused{DSP}
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\acronymused{MAC}
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\acronymused{ALU}
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\acronymused{MAC}
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\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.1.2}Inter-core communication mechanisms}{41}{}\protected@file@percent }
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\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.1.2}Intercore communication mechanisms}{41}{}\protected@file@percent }
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\acronymused{CI}
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\acronymused{ARM}
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\acronymused{DSP}
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@@ -70,7 +70,7 @@
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\acronymused{ARM}
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\acronymused{DSP}
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\acronymused{PCM}
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\newlabel{fig:fig_dsp_setup.jpg}{{32}{42}{}{}{}}
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\newlabel{fig:fig_dsp_setup.jpg}{{32}{42}{}{figure.32}{}}
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\acronymused{ARM}
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\acronymused{PCM}
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\acronymused{DMA}
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@@ -85,7 +85,7 @@
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\@writefile{lof}{\contentsline {figure}{\numberline {33}{\ignorespaces Simplified flowchart of the sample processing between the \ac {ARM} core and the \ac {DSP} core via interrupts and shared memory.}}{43}{}\protected@file@percent }
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\acronymused{ARM}
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\acronymused{DSP}
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\newlabel{fig:fig_dsp_comm.jpg}{{33}{43}{}{}{}}
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\newlabel{fig:fig_dsp_comm.jpg}{{33}{43}{}{figure.33}{}}
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\@writefile{toc}{\contentsline {subsection}{\numberline {4.2}Software architecture and execution flow}{43}{}\protected@file@percent }
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\@writefile{toc}{\contentsline {subsubsection}{\numberline {4.2.1}ARM–DSP communication and data exchange details}{43}{}\protected@file@percent }
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\acronymused{ANR}
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@@ -117,11 +117,11 @@
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\acronymused{PCM}
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\acronymused{ARM}
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\acronymused{DSP}
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\@writefile{lof}{\contentsline {figure}{\numberline {34}{\ignorespaces Detailed visualization of the \ac {DMA} operations between the PCM interface to the shared memory section. When the memory buffer occupied, an interrupt is triggerd, either to the \ac {DSP} core or to the \ac {ARM} core, depending if triggered during a Read- or Write-operation.}}{45}{}\protected@file@percent }
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\@writefile{lof}{\contentsline {figure}{\numberline {34}{\ignorespaces Detailed visualization of the \ac {DMA} operations between the PCM interface to the shared memory section. When the memory buffer occupied, an interrupt is triggered, either to the \ac {DSP} core or to the \ac {ARM} core, depending on, if triggered during a Read- or Write-operation.}}{45}{}\protected@file@percent }
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\acronymused{DMA}
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\acronymused{DSP}
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\acronymused{ARM}
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\newlabel{fig:fig_dsp_dma.jpg}{{34}{45}{}{}{}}
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\newlabel{fig:fig_dsp_dma.jpg}{{34}{45}{}{figure.34}{}}
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\acronymused{DMA}
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\acronymused{DMA}
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\acronymused{PCM}
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@@ -138,10 +138,10 @@
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\acronymused{DSP}
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\acronymused{PCM}
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\acronymused{DSP}
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\newlabel{fig:fig_dps_code_memory}{{4.2.2}{46}{}{}{}}
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\newlabel{fig:fig_dps_code_memory}{{4.2.2}{46}{}{lstnumber.-2.13}{}}
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\@writefile{lof}{\contentsline {figure}{\numberline {35}{\ignorespaces Low-level implementation: Memory initialization and mapping}}{46}{}\protected@file@percent }
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\@writefile{lof}{\contentsline {figure}{\numberline {36}{\ignorespaces Exemplary memory map of the 4-element input buffer array. As it is initialized as a 16 bit integer array, each element occupies 2 bytes of memory, resulting in a total size of 8 bytes for the entire array. As the DSP architecture works in 32-bit double-words, the bytewise adressing is a result of the compiler abstraction.}}{46}{}\protected@file@percent }
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\newlabel{fig:fig_compiler.jpg}{{36}{46}{}{}{}}
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\@writefile{lof}{\contentsline {figure}{\numberline {36}{\ignorespaces Exemplary memory map of the 4-element input buffer array. As it is initialized as a 16-bit integer array, each element occupies 2 bytes of memory, resulting in a total size of 8 bytes for the entire array. As the DSP architecture works in 32-bit double-words, the bytewise addressing is a result of the compiler abstraction.}}{46}{}\protected@file@percent }
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\newlabel{fig:fig_compiler.jpg}{{36}{46}{}{figure.36}{}}
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\@writefile{toc}{\contentsline {paragraph}{Main loop and interrupt handling}{46}{}\protected@file@percent }
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\acronymused{DSP}
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\acronymused{ANR}
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@@ -151,10 +151,10 @@
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\acronymused{ARM}
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\acronymused{DSP}
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\@writefile{lof}{\contentsline {figure}{\numberline {37}{\ignorespaces Low-level implementation: Main loop and interrupt handling}}{47}{}\protected@file@percent }
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\newlabel{fig:fig_dps_code_mainloop}{{37}{47}{}{}{}}
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\newlabel{fig:fig_dps_code_mainloop}{{37}{47}{}{figure.37}{}}
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\@writefile{lof}{\contentsline {figure}{\numberline {38}{\ignorespaces Flow diagram of the code implementation of the main loop and interrupt handling on the \ac {DSP} core.}}{48}{}\protected@file@percent }
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\acronymused{DSP}
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\newlabel{fig:fig_dsp_logic.jpg}{{38}{48}{}{}{}}
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\newlabel{fig:fig_dsp_logic.jpg}{{38}{48}{}{figure.38}{}}
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\@writefile{toc}{\contentsline {paragraph}{calculate\_output()-function}{48}{}\protected@file@percent }
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\acronymused{DSP}
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\acronymused{ANR}
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@@ -167,12 +167,12 @@
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\@writefile{toc}{\contentsline {paragraph}{Logic operations}{49}{}\protected@file@percent }
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\acronymused{DSP}
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\acronymused{DSP}
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\@writefile{lof}{\contentsline {figure}{\numberline {39}{\ignorespaces Manual implementation of a max-function, returning the maximum of two integer values, taking 12 cycles to execute. The intrinsic functions of the DSP compiler allows a 4-cycle implementation of such an operations.}}{49}{}\protected@file@percent }
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\newlabel{fig:fig_dsp_code_find_max}{{39}{49}{}{}{}}
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\@writefile{lof}{\contentsline {figure}{\numberline {39}{\ignorespaces Manual implementation of a max-function, returning the maximum of two integer values, taking 12 cycles to execute. The intrinsic functions of the DSP compiler allows a 4-cycle implementation of such an operation.}}{49}{}\protected@file@percent }
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\newlabel{fig:fig_dsp_code_find_max}{{39}{49}{}{figure.39}{}}
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\@writefile{toc}{\contentsline {paragraph}{Cyclic array iteration}{49}{}\protected@file@percent }
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\acronymused{ANR}
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\@writefile{lof}{\contentsline {figure}{\numberline {40}{\ignorespaces Manual implementation of a cyclic array iteration function in C, taking the core 20 cycles to execute an pointer inremen of 1. The intrinsic functions of the DSP compiler allows a single-cycle implementation of such cyclic additions.}}{50}{}\protected@file@percent }
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\newlabel{fig:fig_dsp_code_cyclic_add}{{40}{50}{}{}{}}
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\@writefile{lof}{\contentsline {figure}{\numberline {40}{\ignorespaces Manual implementation of a cyclic array iteration function in C, taking the core 20 cycles to execute a pointer inremen of 1. The intrinsic functions of the DSP compiler allows a single-cycle implementation of such cyclic additions.}}{50}{}\protected@file@percent }
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\newlabel{fig:fig_dsp_code_cyclic_add}{{40}{50}{}{figure.40}{}}
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\acronymused{DSP}
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\acronymused{DSP}
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\@writefile{toc}{\contentsline {paragraph}{Fractional fixed-point arithmetic}{50}{}\protected@file@percent }
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@@ -196,27 +196,27 @@
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\@writefile{lof}{\contentsline {figure}{\numberline {41}{\ignorespaces Code snippet of the $apply\_fir\_filter$-function, showing the use of the dual \ac {MAC} architecture of the \ac {DSP} and the fractional multiplication function. The loop iterates through the filter coefficients and reference noise signal samples, performing two multiplications and two additions in each cycle.}}{52}{}\protected@file@percent }
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\acronymused{MAC}
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\acronymused{DSP}
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\newlabel{fig:fig_dsp_code_apply_fir_filter}{{41}{52}{}{}{}}
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\newlabel{fig:fig_dsp_code_apply_fir_filter}{{41}{52}{}{figure.41}{}}
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\@writefile{lof}{\contentsline {figure}{\numberline {42}{\ignorespaces Visualization of the FIR filter calculation in the $apply\_fir\_filter$-function during the 2nd cyclce of a calculation loop. The reference noise signal samples are stored in the sample line, while the filter coefficients are stored in a separate memory section (filter line).}}{52}{}\protected@file@percent }
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\newlabel{fig:fig_dsp_fir_cycle.jpg}{{42}{52}{}{}{}}
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\newlabel{fig:fig_dsp_fir_cycle.jpg}{{42}{52}{}{figure.42}{}}
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\@writefile{toc}{\contentsline {paragraph}{update\_output}{53}{}\protected@file@percent }
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\@writefile{toc}{\contentsline {paragraph}{update\_filter\_coefficient}{53}{}\protected@file@percent }
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\acronymused{DSP}
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\acronymused{MAC}
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\@writefile{lof}{\contentsline {figure}{\numberline {43}{\ignorespaces Code snippet of the $update\_filter\_coefficient$-function, again making use of of the dual \ac {MAC} architecture of the \ac {DSP} and the fractional multiplication function. Additionaly, 32-bit values are loaded and stored as 64-bit values, using two also intrinisc functions, allowing to update two filter coefficients in a single cycle.}}{53}{}\protected@file@percent }
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\@writefile{lof}{\contentsline {figure}{\numberline {43}{\ignorespaces Code snippet of the $update\_filter\_coefficient$-function, again making use of the dual \ac {MAC} architecture of the \ac {DSP} and the fractional multiplication function. Additionaly, 32-bit values are loaded and stored as 64-bit values, using two also intrinisc functions, allowing to update two filter coefficients in a single cycle.}}{53}{}\protected@file@percent }
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\acronymused{MAC}
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\acronymused{DSP}
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\newlabel{fig:fig_dsp_code_update_filter_coefficients}{{43}{53}{}{}{}}
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\newlabel{fig:fig_dsp_code_update_filter_coefficients}{{43}{53}{}{figure.43}{}}
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\@writefile{lof}{\contentsline {figure}{\numberline {44}{\ignorespaces Visualization of the coefficient calculation in the $update\_filter\_coefficient$-function during the 2nd cyclce of a calculation loop. The output is multiplied with the step size and the corresponding sample from the sample line, before being added to the current filter coefficient.}}{54}{}\protected@file@percent }
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\newlabel{fig:fig_dsp_coefficient_cycle.jpg}{{44}{54}{}{}{}}
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\newlabel{fig:fig_dsp_coefficient_cycle.jpg}{{44}{54}{}{figure.44}{}}
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\@writefile{toc}{\contentsline {paragraph}{write\_output}{54}{}\protected@file@percent }
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\newlabel{equation_computing}{{24}{54}{}{}{}}
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\newlabel{equation_c_1}{{25}{54}{}{}{}}
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\newlabel{equation_c_2}{{26}{54}{}{}{}}
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\newlabel{equation_c_3}{{27}{54}{}{}{}}
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\newlabel{equation_c_4}{{28}{54}{}{}{}}
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\newlabel{equation_c_5}{{30}{54}{}{}{}}
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\newlabel{equation_computing_final}{{31}{55}{}{}{}}
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\newlabel{equation_computing}{{24}{54}{}{equation.24}{}}
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\newlabel{equation_c_1}{{25}{54}{}{equation.25}{}}
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\newlabel{equation_c_2}{{26}{54}{}{equation.26}{}}
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\newlabel{equation_c_3}{{27}{54}{}{equation.27}{}}
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\newlabel{equation_c_4}{{28}{54}{}{equation.28}{}}
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\newlabel{equation_c_5}{{30}{54}{}{equation.30}{}}
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\newlabel{equation_computing_final}{{31}{55}{}{equation.31}{}}
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\acronymused{DSP}
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\@setckpt{chapter_04}{
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\setcounter{page}{56}
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