988 lines
57 KiB
Plaintext
988 lines
57 KiB
Plaintext
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// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Thu Mar 19 16:03:51 2026
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// Copyright 2014-2025 Synopsys, Inc. All rights reserved.
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// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=16 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32
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/***
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!! int main()
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F_main : user_defined, called {
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fnm : "main" 'int main()';
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arg : ( dmaddr_:i int32_:r );
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loc : ( LR[0] RA[0] );
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vac : ( srIM[0] );
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frm : ( l=88 b=8 );
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}
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****
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!! void initialize_signal(SingleSignalPath *, SingleSignalPath *, double *, double *, int, int, double, double, double, int)
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F_Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi : user_defined, called {
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fnm : "initialize_signal" 'void initialize_signal(SingleSignalPath *, SingleSignalPath *, double *, double *, int, int, double, double, double, int)';
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arg : ( dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i int32_:i int32_:i int64_:i int64_:i int64_:i int32_:i );
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loc : ( LR[0] A[0] A[1] A[2] A[3] RA[0] RA[1] AX[0] AX[1] BX[0] RB[0] );
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vac : ( srIM[0] );
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}
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!! extern FILE *fopen(const char *, const char *)
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Ffopen : user_defined, called {
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fnm : "fopen" 'FILE *fopen(const char *, const char *)';
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arg : ( dmaddr_:i dmaddr_:r dmaddr_:i dmaddr_:i );
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loc : ( LR[0] A[0] A[1] A[2] );
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vac : ( srIM[0] );
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llv : 0 0 0 0 0 ;
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}
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!! extern int feof(FILE *)
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Ffeof : user_defined, called {
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fnm : "feof" 'int feof(FILE *)';
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arg : ( dmaddr_:i int32_:r dmaddr_:i );
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loc : ( LR[0] RA[0] A[0] );
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vac : ( srIM[0] );
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llv : 0 0 0 0 0 ;
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}
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!! extern int fscanf(FILE *, const char *, ...)
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Ffscanf : user_defined, called, varargs {
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fnm : "fscanf" 'int fscanf(FILE *, const char *, ...)';
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arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i );
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loc : ( LR[0] RA[0] A[0] A[1] );
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vac : ( srIM[0] );
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llv : 0 0 0 0 0 ;
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}
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!! void calculate_output(FILE *, SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)
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F_Z16calculate_outputP4FILEP16SingleSignalPathS2_PU17chess_storage_DMBVsS4_S4_ : user_defined, called {
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fnm : "calculate_output" 'void calculate_output(FILE *, SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)';
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arg : ( dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i );
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loc : ( LR[0] A[0] A[1] A[2] A[4] A[5] __spill_WDMA[0] );
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vac : ( srIM[0] );
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}
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!! extern int fprintf(FILE *, const char *, ...)
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Ffprintf : user_defined, called, varargs {
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fnm : "fprintf" 'int fprintf(FILE *, const char *, ...)';
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arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i );
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loc : ( LR[0] RA[0] A[0] A[1] );
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vac : ( srIM[0] );
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llv : 0 0 0 0 0 ;
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}
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!! extern int fclose(FILE *)
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Ffclose : user_defined, called {
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fnm : "fclose" 'int fclose(FILE *)';
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arg : ( dmaddr_:i int32_:r dmaddr_:i );
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loc : ( LR[0] RA[0] A[0] );
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vac : ( srIM[0] );
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llv : 0 0 0 0 0 ;
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}
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***/
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[
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0 : _main typ=uint20_ bnd=e stl=PM tref=__sint____
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8 : __M_SDMB typ=int16_ bnd=d stl=SDMB
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11 : __M_WDMA typ=int32_ bnd=d stl=WDMA
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14 : __M_LDMA typ=int64_ bnd=d stl=LDMA
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26 : __R_SP typ=dmaddr_ bnd=d stl=SP
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29 : __vola typ=uint20_ bnd=b stl=PM
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32 : __extDM typ=int8_ bnd=b stl=DM
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33 : __extPM typ=uint20_ bnd=b stl=PM
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34 : __sp typ=dmaddr_ bnd=b stl=SP
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35 : b0 typ=int8_ val=8t0 bnd=a sz=40 algn=8 stl=DMA tref=__A5__fdouble_DMA
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36 : b1 typ=int8_ val=48t0 bnd=a sz=40 algn=8 stl=DMA tref=__A5__fdouble_DMA
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37 : _ZL17c_sensor_signal_t typ=int8_ bnd=i sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA
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38 : __extDM_SingleSignalPath typ=int8_ bnd=b stl=DM
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39 : _ZL19acc_sensor_signal_t typ=int8_ bnd=i sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA
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40 : _ZL13__stradd574a4 typ=int8_ bnd=i sz=75 algn=1 stl=DMA tref=__A75__cchar_DMA
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41 : _ZL13__str00f02b8f typ=int8_ bnd=i sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA
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42 : _ZL13__str0fe4b1b6 typ=int8_ bnd=i sz=75 algn=1 stl=DMA tref=__A75__cchar_DMA
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43 : _ZL13__stre6369ab8 typ=int8_ bnd=i sz=63 algn=1 stl=DMA tref=__A63__cchar_DMA
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44 : _ZL13__str00f52cca typ=int8_ bnd=i sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA
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45 : _ZL13__strcf6f2fde typ=int8_ bnd=i sz=76 algn=1 stl=DMA tref=__A76__cchar_DMA
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46 : _ZL13__str41232700 typ=int8_ bnd=i sz=3 algn=1 stl=DMA tref=__A3__cchar_DMA
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47 : d0 typ=int8_ val=88t0 bnd=a sz=4 algn=4 stl=DMA tref=__sint_DMA
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48 : d1 typ=int8_ val=92t0 bnd=a sz=4 algn=4 stl=DMA tref=__sint_DMA
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49 : _ZL10input_port typ=int8_ val=8388608f bnd=i sz=8 algn=2 stl=DMB tref=__A4DMB__sshort_DMB
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50 : __extDM_int16_ typ=int8_ bnd=b stl=DM
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51 : _ZL11output_port typ=int8_ val=8388624f bnd=i sz=8 algn=2 stl=DMB tref=__A4DMB__sshort_DMB
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52 : _ZL13__str2eb09b76 typ=int8_ bnd=i sz=4 algn=1 stl=DMA tref=__A4__cchar_DMA
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53 : __extDM_void typ=int8_ bnd=b stl=DM
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54 : __extPM_void typ=uint20_ bnd=b stl=PM
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55 : __extDM_int64_ typ=int8_ bnd=b stl=DM
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56 : __extDM_int8_ typ=int8_ bnd=b stl=DM
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57 : __extPM_FILE typ=uint20_ bnd=b stl=PM
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58 : __extDM_int32_ typ=int8_ bnd=b stl=DM
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59 : __rd___sp typ=dmaddr_ bnd=m
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60 : __ptr_c_sensor_signal_t typ=dmaddr_ bnd=m
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61 : __ptr_c_sensor_signal_t typ=dmaddr_ val=0a bnd=m adro=37
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62 : __ptr_acc_sensor_signal_t typ=dmaddr_ bnd=m
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63 : __ptr_acc_sensor_signal_t typ=dmaddr_ val=0a bnd=m adro=39
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64 : __ptr___stradd574a4 typ=dmaddr_ bnd=m
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65 : __ptr___stradd574a4 typ=dmaddr_ val=0a bnd=m adro=40
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66 : __ptr___str00f02b8f typ=dmaddr_ bnd=m
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67 : __ptr___str00f02b8f typ=dmaddr_ val=0a bnd=m adro=41
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68 : __ptr___str0fe4b1b6 typ=dmaddr_ bnd=m
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69 : __ptr___str0fe4b1b6 typ=dmaddr_ val=0a bnd=m adro=42
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70 : __ptr___stre6369ab8 typ=dmaddr_ bnd=m
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71 : __ptr___stre6369ab8 typ=dmaddr_ val=0a bnd=m adro=43
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72 : __ptr___str00f52cca typ=dmaddr_ bnd=m
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73 : __ptr___str00f52cca typ=dmaddr_ val=0a bnd=m adro=44
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74 : __ptr___strcf6f2fde typ=dmaddr_ bnd=m
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75 : __ptr___strcf6f2fde typ=dmaddr_ val=0a bnd=m adro=45
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76 : __ptr___str41232700 typ=dmaddr_ bnd=m
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77 : __ptr___str41232700 typ=dmaddr_ val=0a bnd=m adro=46
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79 : __ct_8388608 typ=dmaddr_ val=8388608f bnd=m
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80 : __ptr_output_port typ=dmaddr_ bnd=m
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81 : __ct_8388624 typ=dmaddr_ val=8388624f bnd=m
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82 : __ptr___str2eb09b76 typ=dmaddr_ bnd=m
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83 : __ptr___str2eb09b76 typ=dmaddr_ val=0a bnd=m adro=52
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84 : __ct_0 typ=uint1_ val=0f bnd=m
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85 : __la typ=dmaddr_ bnd=p tref=dmaddr___
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86 : __rt typ=int32_ bnd=p tref=__sint__
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90 : __ptr_b0 typ=dmaddr_ bnd=m
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94 : __ptr_b1 typ=dmaddr_ bnd=m
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98 : __ptr_d0 typ=dmaddr_ bnd=m
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102 : __ptr_d1 typ=dmaddr_ bnd=m
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106 : fp1 typ=dmaddr_ bnd=m tref=__PFILE__
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107 : fp2 typ=dmaddr_ bnd=m tref=__PFILE__
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108 : fp3 typ=dmaddr_ bnd=m tref=__PFILE__
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109 : fp typ=dmaddr_ bnd=m tref=__PFILE__
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114 : __ct_4607182418800017408 typ=int64_ val=4607182418800017408f bnd=m
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116 : __ct_0 typ=int32_ val=0f bnd=m
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119 : __ct_0 typ=uint40_ val=0f bnd=m
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126 : __ct_16 typ=int32_ val=16f bnd=m
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164 : __ct_2 typ=int32_ val=2f bnd=m
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165 : __ct typ=int32_ bnd=m
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167 : __ct typ=int32_ bnd=m
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169 : __ct typ=int64_ bnd=m
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171 : __ct typ=int64_ bnd=m
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172 : __ct_4576918229304087675 typ=int64_ val=4576918229304087675f bnd=m
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173 : __ct typ=int64_ bnd=m
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175 : __ct typ=int32_ bnd=m
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176 : _Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi typ=dmaddr_ val=0r bnd=m
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178 : __link typ=dmaddr_ bnd=m
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179 : fopen typ=dmaddr_ val=0r bnd=m
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181 : __link typ=dmaddr_ bnd=m
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182 : __tmp typ=dmaddr_ bnd=m
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185 : __link typ=dmaddr_ bnd=m
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186 : __tmp typ=dmaddr_ bnd=m
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189 : __link typ=dmaddr_ bnd=m
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190 : __tmp typ=dmaddr_ bnd=m
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193 : __link typ=dmaddr_ bnd=m
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194 : __tmp typ=dmaddr_ bnd=m
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195 : feof typ=dmaddr_ val=0r bnd=m
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197 : __link typ=dmaddr_ bnd=m
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198 : __tmp typ=int32_ bnd=m
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206 : __link typ=dmaddr_ bnd=m
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207 : __tmp typ=int32_ bnd=m
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210 : __tmp typ=bool bnd=m
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211 : __tmp typ=bool bnd=m
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218 : fscanf typ=dmaddr_ val=0r bnd=m
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220 : __link typ=dmaddr_ bnd=m
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221 : __tmp typ=int32_ bnd=m
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224 : __link typ=dmaddr_ bnd=m
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225 : __tmp typ=int32_ bnd=m
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226 : __fch_d0 typ=int32_ bnd=m
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227 : __tmp typ=int16_ bnd=m
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232 : __fch_d1 typ=int32_ bnd=m
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233 : __tmp typ=int16_ bnd=m
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249 : __tmp typ=dmaddr_ bnd=m
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252 : __tmp typ=dmaddr_ bnd=m
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253 : _Z16calculate_outputP4FILEP16SingleSignalPathS2_PU17chess_storage_DMBVsS4_S4_ typ=dmaddr_ val=0r bnd=m
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255 : __link typ=dmaddr_ bnd=m
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265 : __fch__ZL11output_port typ=int16_ bnd=m
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266 : __fch__ZL11output_port typ=int32_ bnd=m
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267 : fprintf typ=dmaddr_ val=0r bnd=m
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269 : __link typ=dmaddr_ bnd=m
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270 : __tmp typ=int32_ bnd=m
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279 : __link typ=dmaddr_ bnd=m
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280 : __tmp typ=int32_ bnd=m
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288 : __link typ=dmaddr_ bnd=m
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289 : __tmp typ=int32_ bnd=m
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292 : __tmp typ=bool bnd=m
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293 : __tmp typ=bool bnd=m
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295 : fclose typ=dmaddr_ val=0r bnd=m
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297 : __link typ=dmaddr_ bnd=m
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298 : __tmp typ=int32_ bnd=m
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301 : __link typ=dmaddr_ bnd=m
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302 : __tmp typ=int32_ bnd=m
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305 : __link typ=dmaddr_ bnd=m
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306 : __tmp typ=int32_ bnd=m
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341 : __shv___ptr_input_port typ=dmaddr_ bnd=m
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365 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
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390 : __tmp typ=bool bnd=m
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406 : __ct_m88S0 typ=int18_ val=-96S0 bnd=m
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407 : __ct_88s0 typ=int18_ val=96s0 bnd=m
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408 : __ct_0t0 typ=int18_ val=8t0 bnd=m
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409 : __ct_40t0 typ=int18_ val=48t0 bnd=m
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412 : __ct_80t0 typ=int18_ val=88t0 bnd=m
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415 : __ct_84t0 typ=int18_ val=92t0 bnd=m
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418 : __ct_2 typ=int18_ val=2f bnd=m
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420 : __ct_8t0 typ=int18_ val=16t0 bnd=m
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423 : __ct_16t0 typ=int18_ val=24t0 bnd=m
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426 : __ct_24t0 typ=int18_ val=32t0 bnd=m
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429 : __ct_32t0 typ=int18_ val=40t0 bnd=m
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432 : __ct_48t0 typ=int18_ val=56t0 bnd=m
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435 : __ct_56t0 typ=int18_ val=64t0 bnd=m
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438 : __ct_64t0 typ=int18_ val=72t0 bnd=m
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441 : __ct_72t0 typ=int18_ val=80t0 bnd=m
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447 : __tmp typ=uint3_ bnd=m
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458 : __true typ=bool val=1f bnd=m
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459 : __false typ=bool val=0f bnd=m
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460 : __either typ=bool bnd=m
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461 : __trgt typ=int10_ val=0j bnd=m
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462 : __trgt typ=int10_ val=0j bnd=m
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463 : __trgt typ=int10_ val=0j bnd=m
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464 : __trgt typ=int10_ val=0j bnd=m
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465 : __trgt typ=int10_ val=0j bnd=m
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]
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F_main {
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#370 off=0
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(__M_SDMB.6 var=8) st_def () <12>;
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(__M_WDMA.9 var=11) st_def () <18>;
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(__R_SP.24 var=26) st_def () <48>;
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(__vola.27 var=29) source () <51>;
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(__extDM.30 var=32) source () <54>;
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(__extPM.31 var=33) source () <55>;
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(__sp.32 var=34) source () <56>;
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(b0.33 var=35) source () <57>;
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(b1.34 var=36) source () <58>;
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(_ZL17c_sensor_signal_t.35 var=37) source () <59>;
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(__extDM_SingleSignalPath.36 var=38) source () <60>;
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(_ZL19acc_sensor_signal_t.37 var=39) source () <61>;
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(d0.45 var=47) source () <69>;
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(d1.46 var=48) source () <70>;
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(_ZL10input_port.47 var=49) source () <71>;
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(__extDM_int16_.48 var=50) source () <72>;
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(_ZL11output_port.49 var=51) source () <73>;
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(__extDM_void.51 var=53) source () <75>;
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(__extPM_void.52 var=54) source () <76>;
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(__extDM_int64_.53 var=55) source () <77>;
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(__extDM_int8_.54 var=56) source () <78>;
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(__extPM_FILE.55 var=57) source () <79>;
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(__extDM_int32_.56 var=58) source () <80>;
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(__ptr_c_sensor_signal_t.58 var=61) const () <82>;
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(__ptr_acc_sensor_signal_t.60 var=63) const () <84>;
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(__ct_0.84 var=84) const () <108>;
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(__la.86 var=85 stl=LR off=0) inp () <110>;
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(__la.87 var=85) deassign (__la.86) <111>;
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(__rd___sp.90 var=59) rd_res_reg (__R_SP.24 __sp.32) <114>;
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(__R_SP.94 var=26 __sp.95 var=34) wr_res_reg (__rt.1769 __sp.32) <118>;
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(__rd___sp.96 var=59) rd_res_reg (__R_SP.24 __sp.95) <120>;
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(__ct_4607182418800017408.124 var=114) const () <148>;
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(__M_LDMA.129 var=14 b0.130 var=35) store (__ct_4607182418800017408.124 __rt.1791 b0.33) <153>;
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(__ct_0.131 var=119) const () <154>;
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(__M_LDMA.136 var=14 b0.137 var=35) store (__ct_0.131 __rt.1955 b0.130) <159>;
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(__ct_16.140 var=126) const () <162>;
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(__M_LDMA.143 var=14 b0.144 var=35) store (__ct_0.131 __rt.1977 b0.137) <165>;
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(__M_LDMA.150 var=14 b0.151 var=35) store (__ct_0.131 __rt.1999 b0.144) <171>;
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(__M_LDMA.157 var=14 b0.158 var=35) store (__ct_0.131 __rt.2021 b0.151) <177>;
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(__M_LDMA.164 var=14 b1.165 var=36) store (__ct_4607182418800017408.124 __rt.1813 b1.34) <183>;
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(__M_LDMA.171 var=14 b1.172 var=36) store (__ct_0.131 __rt.2043 b1.165) <189>;
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(__M_LDMA.178 var=14 b1.179 var=36) store (__ct_0.131 __rt.2065 b1.172) <195>;
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(__M_LDMA.185 var=14 b1.186 var=36) store (__ct_0.131 __rt.2087 b1.179) <201>;
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(__M_LDMA.192 var=14 b1.193 var=36) store (__ct_0.131 __rt.2109 b1.186) <207>;
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(__ct_2.198 var=164) const () <212>;
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(__ct_4576918229304087675.210 var=172) const () <224>;
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(_Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi.216 var=176) const () <230>;
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(__link.218 var=178) dmaddr__call_dmaddr_ (_Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi.216) <232>;
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(__rt.1769 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.90 __ct_m88S0.2122) <1489>;
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(__rt.1791 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_0t0.2124) <1517>;
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(__rt.1813 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_40t0.2125) <1545>;
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(__rt.1955 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_8t0.2136) <1729>;
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(__rt.1977 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_16t0.2139) <1757>;
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(__rt.1999 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_24t0.2142) <1785>;
|
|
(__rt.2021 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_32t0.2145) <1813>;
|
|
(__rt.2043 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_48t0.2148) <1841>;
|
|
(__rt.2065 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_56t0.2151) <1869>;
|
|
(__rt.2087 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_64t0.2154) <1897>;
|
|
(__rt.2109 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_72t0.2157) <1925>;
|
|
(__ct_m88S0.2122 var=406) const () <1985>;
|
|
(__ct_0t0.2124 var=408) const () <1989>;
|
|
(__ct_40t0.2125 var=409) const () <1991>;
|
|
(__ct_8t0.2136 var=420) const () <2013>;
|
|
(__ct_16t0.2139 var=423) const () <2019>;
|
|
(__ct_24t0.2142 var=426) const () <2025>;
|
|
(__ct_32t0.2145 var=429) const () <2031>;
|
|
(__ct_48t0.2148 var=432) const () <2037>;
|
|
(__ct_56t0.2151 var=435) const () <2043>;
|
|
(__ct_64t0.2154 var=438) const () <2049>;
|
|
(__ct_72t0.2157 var=441) const () <2055>;
|
|
call {
|
|
(__ptr_c_sensor_signal_t.194 var=60 stl=A off=0) assign (__ptr_c_sensor_signal_t.58) <208>;
|
|
(__ptr_acc_sensor_signal_t.195 var=62 stl=A off=1) assign (__ptr_acc_sensor_signal_t.60) <209>;
|
|
(__ptr_b0.196 var=90 stl=A off=2) assign (__rt.1791) <210>;
|
|
(__ptr_b1.197 var=94 stl=A off=3) assign (__rt.1813) <211>;
|
|
(__ct.200 var=165 stl=RA off=0) assign (__ct_2.198) <214>;
|
|
(__ct.203 var=167 stl=RA off=1) assign (__ct_2.198) <217>;
|
|
(__ct.206 var=169 stl=AX off=0) assign (__ct_4607182418800017408.124) <220>;
|
|
(__ct.209 var=171 stl=AX off=1) assign (__ct_4607182418800017408.124) <223>;
|
|
(__ct.212 var=173 stl=BX off=0) assign (__ct_4576918229304087675.210) <226>;
|
|
(__ct.215 var=175 stl=RB off=0) assign (__ct_16.140) <229>;
|
|
(__link.219 var=178 stl=LR off=0) assign (__link.218) <233>;
|
|
(_ZL10input_port.220 var=49 _ZL11output_port.221 var=51 _ZL17c_sensor_signal_t.222 var=37 _ZL19acc_sensor_signal_t.223 var=39 __extDM.224 var=32 __extDM_SingleSignalPath.225 var=38 __extDM_int16_.226 var=50 __extDM_int32_.227 var=58 __extDM_int64_.228 var=55 __extDM_int8_.229 var=56 __extDM_void.230 var=53 __extPM.231 var=33 __extPM_FILE.232 var=57 __extPM_void.233 var=54 b0.234 var=35 b1.235 var=36 __vola.236 var=29) F_Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi (__link.219 __ptr_c_sensor_signal_t.194 __ptr_acc_sensor_signal_t.195 __ptr_b0.196 __ptr_b1.197 __ct.200 __ct.203 __ct.206 __ct.209 __ct.212 __ct.215 _ZL10input_port.47 _ZL11output_port.49 _ZL17c_sensor_signal_t.35 _ZL19acc_sensor_signal_t.37 __extDM.30 __extDM_SingleSignalPath.36 __extDM_int16_.48 __extDM_int32_.56 __extDM_int64_.53 __extDM_int8_.54 __extDM_void.51 __extPM.31 __extPM_FILE.55 __extPM_void.52 b0.158 b1.193 __vola.27) <234>;
|
|
} #4 off=1
|
|
#5 off=2
|
|
(__ptr___stradd574a4.62 var=65) const () <86>;
|
|
(__ptr___str00f02b8f.64 var=67) const () <88>;
|
|
(fopen.240 var=179) const () <238>;
|
|
(__link.242 var=181) dmaddr__call_dmaddr_ (fopen.240) <240>;
|
|
call {
|
|
(__ptr___stradd574a4.238 var=64 stl=A off=1) assign (__ptr___stradd574a4.62) <236>;
|
|
(__ptr___str00f02b8f.239 var=66 stl=A off=2) assign (__ptr___str00f02b8f.64) <237>;
|
|
(__link.243 var=181 stl=LR off=0) assign (__link.242) <241>;
|
|
(__tmp.244 var=182 stl=A off=0 _ZL10input_port.247 var=49 _ZL11output_port.248 var=51 _ZL17c_sensor_signal_t.249 var=37 _ZL19acc_sensor_signal_t.250 var=39 __extDM.251 var=32 __extDM_SingleSignalPath.252 var=38 __extDM_int16_.253 var=50 __extDM_int32_.254 var=58 __extDM_int64_.255 var=55 __extDM_int8_.256 var=56 __extDM_void.257 var=53 __extPM.258 var=33 __extPM_FILE.259 var=57 __extPM_void.260 var=54 b0.261 var=35 b1.262 var=36 __vola.263 var=29) Ffopen (__link.243 __ptr___stradd574a4.238 __ptr___str00f02b8f.239 _ZL10input_port.220 _ZL11output_port.221 _ZL17c_sensor_signal_t.222 _ZL19acc_sensor_signal_t.223 __extDM.224 __extDM_SingleSignalPath.225 __extDM_int16_.226 __extDM_int32_.227 __extDM_int64_.228 __extDM_int8_.229 __extDM_void.230 __extPM.231 __extPM_FILE.232 __extPM_void.233 b0.234 b1.235 __vola.236) <242>;
|
|
(__tmp.245 var=182) deassign (__tmp.244) <243>;
|
|
} #6 off=3
|
|
#7 off=4
|
|
(__ptr___str0fe4b1b6.66 var=69) const () <90>;
|
|
(__link.269 var=185) dmaddr__call_dmaddr_ (fopen.240) <250>;
|
|
call {
|
|
(__ptr___str0fe4b1b6.265 var=68 stl=A off=1) assign (__ptr___str0fe4b1b6.66) <246>;
|
|
(__ptr___str00f02b8f.266 var=66 stl=A off=2) assign (__ptr___str00f02b8f.64) <247>;
|
|
(__link.270 var=185 stl=LR off=0) assign (__link.269) <251>;
|
|
(__tmp.271 var=186 stl=A off=0 _ZL10input_port.274 var=49 _ZL11output_port.275 var=51 _ZL17c_sensor_signal_t.276 var=37 _ZL19acc_sensor_signal_t.277 var=39 __extDM.278 var=32 __extDM_SingleSignalPath.279 var=38 __extDM_int16_.280 var=50 __extDM_int32_.281 var=58 __extDM_int64_.282 var=55 __extDM_int8_.283 var=56 __extDM_void.284 var=53 __extPM.285 var=33 __extPM_FILE.286 var=57 __extPM_void.287 var=54 b0.288 var=35 b1.289 var=36 __vola.290 var=29) Ffopen (__link.270 __ptr___str0fe4b1b6.265 __ptr___str00f02b8f.266 _ZL10input_port.247 _ZL11output_port.248 _ZL17c_sensor_signal_t.249 _ZL19acc_sensor_signal_t.250 __extDM.251 __extDM_SingleSignalPath.252 __extDM_int16_.253 __extDM_int32_.254 __extDM_int64_.255 __extDM_int8_.256 __extDM_void.257 __extPM.258 __extPM_FILE.259 __extPM_void.260 b0.261 b1.262 __vola.263) <252>;
|
|
(__tmp.272 var=186) deassign (__tmp.271) <253>;
|
|
} #8 off=5
|
|
#9 off=6
|
|
(__ptr___stre6369ab8.68 var=71) const () <92>;
|
|
(__ptr___str00f52cca.70 var=73) const () <94>;
|
|
(__link.296 var=189) dmaddr__call_dmaddr_ (fopen.240) <260>;
|
|
call {
|
|
(__ptr___stre6369ab8.292 var=70 stl=A off=1) assign (__ptr___stre6369ab8.68) <256>;
|
|
(__ptr___str00f52cca.293 var=72 stl=A off=2) assign (__ptr___str00f52cca.70) <257>;
|
|
(__link.297 var=189 stl=LR off=0) assign (__link.296) <261>;
|
|
(__tmp.298 var=190 stl=A off=0 _ZL10input_port.301 var=49 _ZL11output_port.302 var=51 _ZL17c_sensor_signal_t.303 var=37 _ZL19acc_sensor_signal_t.304 var=39 __extDM.305 var=32 __extDM_SingleSignalPath.306 var=38 __extDM_int16_.307 var=50 __extDM_int32_.308 var=58 __extDM_int64_.309 var=55 __extDM_int8_.310 var=56 __extDM_void.311 var=53 __extPM.312 var=33 __extPM_FILE.313 var=57 __extPM_void.314 var=54 b0.315 var=35 b1.316 var=36 __vola.317 var=29) Ffopen (__link.297 __ptr___stre6369ab8.292 __ptr___str00f52cca.293 _ZL10input_port.274 _ZL11output_port.275 _ZL17c_sensor_signal_t.276 _ZL19acc_sensor_signal_t.277 __extDM.278 __extDM_SingleSignalPath.279 __extDM_int16_.280 __extDM_int32_.281 __extDM_int64_.282 __extDM_int8_.283 __extDM_void.284 __extPM.285 __extPM_FILE.286 __extPM_void.287 b0.288 b1.289 __vola.290) <262>;
|
|
(__tmp.299 var=190) deassign (__tmp.298) <263>;
|
|
} #10 off=7
|
|
#11 off=8
|
|
(__ptr___strcf6f2fde.72 var=75) const () <96>;
|
|
(__link.323 var=193) dmaddr__call_dmaddr_ (fopen.240) <270>;
|
|
call {
|
|
(__ptr___strcf6f2fde.319 var=74 stl=A off=1) assign (__ptr___strcf6f2fde.72) <266>;
|
|
(__ptr___str00f52cca.320 var=72 stl=A off=2) assign (__ptr___str00f52cca.70) <267>;
|
|
(__link.324 var=193 stl=LR off=0) assign (__link.323) <271>;
|
|
(__tmp.325 var=194 stl=A off=0 _ZL10input_port.328 var=49 _ZL11output_port.329 var=51 _ZL17c_sensor_signal_t.330 var=37 _ZL19acc_sensor_signal_t.331 var=39 __extDM.332 var=32 __extDM_SingleSignalPath.333 var=38 __extDM_int16_.334 var=50 __extDM_int32_.335 var=58 __extDM_int64_.336 var=55 __extDM_int8_.337 var=56 __extDM_void.338 var=53 __extPM.339 var=33 __extPM_FILE.340 var=57 __extPM_void.341 var=54 b0.342 var=35 b1.343 var=36 __vola.344 var=29) Ffopen (__link.324 __ptr___strcf6f2fde.319 __ptr___str00f52cca.320 _ZL10input_port.301 _ZL11output_port.302 _ZL17c_sensor_signal_t.303 _ZL19acc_sensor_signal_t.304 __extDM.305 __extDM_SingleSignalPath.306 __extDM_int16_.307 __extDM_int32_.308 __extDM_int64_.309 __extDM_int8_.310 __extDM_void.311 __extPM.312 __extPM_FILE.313 __extPM_void.314 b0.315 b1.316 __vola.317) <272>;
|
|
(__tmp.326 var=194) deassign (__tmp.325) <273>;
|
|
} #12 off=9
|
|
#13 off=10
|
|
(feof.346 var=195) const () <276>;
|
|
(__link.348 var=197) dmaddr__call_dmaddr_ (feof.346) <278>;
|
|
call {
|
|
(fp1.345 var=106 stl=A off=0) assign (__tmp.245) <275>;
|
|
(__link.349 var=197 stl=LR off=0) assign (__link.348) <279>;
|
|
(__tmp.350 var=198 stl=RA off=0 _ZL10input_port.353 var=49 _ZL11output_port.354 var=51 _ZL17c_sensor_signal_t.355 var=37 _ZL19acc_sensor_signal_t.356 var=39 __extDM.357 var=32 __extDM_SingleSignalPath.358 var=38 __extDM_int16_.359 var=50 __extDM_int32_.360 var=58 __extDM_int64_.361 var=55 __extDM_int8_.362 var=56 __extDM_void.363 var=53 __extPM.364 var=33 __extPM_FILE.365 var=57 __extPM_void.366 var=54 b0.367 var=35 b1.368 var=36 __vola.369 var=29) Ffeof (__link.349 fp1.345 _ZL10input_port.328 _ZL11output_port.329 _ZL17c_sensor_signal_t.330 _ZL19acc_sensor_signal_t.331 __extDM.332 __extDM_SingleSignalPath.333 __extDM_int16_.334 __extDM_int32_.335 __extDM_int64_.336 __extDM_int8_.337 __extDM_void.338 __extPM.339 __extPM_FILE.340 __extPM_void.341 b0.342 b1.343 __vola.344) <280>;
|
|
(__tmp.351 var=198) deassign (__tmp.350) <281>;
|
|
} #14 off=11
|
|
#719 off=12
|
|
(__ct_0.126 var=116) const () <150>;
|
|
(__tmp.2172 var=447) uint3__cmp_int72__int72_ (__tmp.351 __ct_0.126) <2080>;
|
|
(__tmp.2182 var=390) bool_nequal_uint3_ (__tmp.2172) <2138>;
|
|
(__trgt.2191 var=461) const () <2233>;
|
|
() void_jump_bool_int10_ (__tmp.2182 __trgt.2191) <2234>;
|
|
(__either.2192 var=460) undefined () <2235>;
|
|
if {
|
|
{
|
|
() if_expr (__either.2192) <342>;
|
|
} #17
|
|
{
|
|
(__true.2198 var=458) const () <2243>;
|
|
} #18
|
|
{
|
|
#20 off=13
|
|
(__link.434 var=206) dmaddr__call_dmaddr_ (feof.346) <348>;
|
|
call {
|
|
(fp2.431 var=107 stl=A off=0) assign (__tmp.272) <345>;
|
|
(__link.435 var=206 stl=LR off=0) assign (__link.434) <349>;
|
|
(__tmp.436 var=207 stl=RA off=0 _ZL10input_port.439 var=49 _ZL11output_port.440 var=51 _ZL17c_sensor_signal_t.441 var=37 _ZL19acc_sensor_signal_t.442 var=39 __extDM.443 var=32 __extDM_SingleSignalPath.444 var=38 __extDM_int16_.445 var=50 __extDM_int32_.446 var=58 __extDM_int64_.447 var=55 __extDM_int8_.448 var=56 __extDM_void.449 var=53 __extPM.450 var=33 __extPM_FILE.451 var=57 __extPM_void.452 var=54 b0.453 var=35 b1.454 var=36 __vola.455 var=29) Ffeof (__link.435 fp2.431 _ZL10input_port.353 _ZL11output_port.354 _ZL17c_sensor_signal_t.355 _ZL19acc_sensor_signal_t.356 __extDM.357 __extDM_SingleSignalPath.358 __extDM_int16_.359 __extDM_int32_.360 __extDM_int64_.361 __extDM_int8_.362 __extDM_void.363 __extPM.364 __extPM_FILE.365 __extPM_void.366 b0.367 b1.368 __vola.369) <350>;
|
|
(__tmp.437 var=207) deassign (__tmp.436) <351>;
|
|
} #21 off=14
|
|
#713 off=15
|
|
(__tmp.2162 var=447) uint3__cmp_int72__int72_ (__tmp.437 __ct_0.126) <2064>;
|
|
(__tmp.2187 var=210) bool_nequal_uint3_ (__tmp.2162) <2186>;
|
|
(__trgt.2199 var=464) const () <2244>;
|
|
() void_jump_bool_int10_ (__tmp.2187 __trgt.2199) <2245>;
|
|
(__either.2200 var=460) undefined () <2246>;
|
|
} #19
|
|
{
|
|
(__vola.460 var=29) merge (__vola.369 __vola.455) <357>;
|
|
(__extDM.461 var=32) merge (__extDM.357 __extDM.443) <358>;
|
|
(__extPM.462 var=33) merge (__extPM.364 __extPM.450) <359>;
|
|
(b0.463 var=35) merge (b0.367 b0.453) <360>;
|
|
(b1.464 var=36) merge (b1.368 b1.454) <361>;
|
|
(_ZL17c_sensor_signal_t.465 var=37) merge (_ZL17c_sensor_signal_t.355 _ZL17c_sensor_signal_t.441) <362>;
|
|
(__extDM_SingleSignalPath.466 var=38) merge (__extDM_SingleSignalPath.358 __extDM_SingleSignalPath.444) <363>;
|
|
(_ZL19acc_sensor_signal_t.467 var=39) merge (_ZL19acc_sensor_signal_t.356 _ZL19acc_sensor_signal_t.442) <364>;
|
|
(_ZL10input_port.468 var=49) merge (_ZL10input_port.353 _ZL10input_port.439) <365>;
|
|
(__extDM_int16_.469 var=50) merge (__extDM_int16_.359 __extDM_int16_.445) <366>;
|
|
(_ZL11output_port.470 var=51) merge (_ZL11output_port.354 _ZL11output_port.440) <367>;
|
|
(__extDM_void.471 var=53) merge (__extDM_void.363 __extDM_void.449) <368>;
|
|
(__extPM_void.472 var=54) merge (__extPM_void.366 __extPM_void.452) <369>;
|
|
(__extDM_int64_.473 var=55) merge (__extDM_int64_.361 __extDM_int64_.447) <370>;
|
|
(__extDM_int8_.474 var=56) merge (__extDM_int8_.362 __extDM_int8_.448) <371>;
|
|
(__extPM_FILE.475 var=57) merge (__extPM_FILE.365 __extPM_FILE.451) <372>;
|
|
(__extDM_int32_.476 var=58) merge (__extDM_int32_.360 __extDM_int32_.446) <373>;
|
|
(__tmp.2188 var=211) merge (__true.2198 __either.2200) <2187>;
|
|
} #23
|
|
} #16
|
|
if {
|
|
{
|
|
() if_expr (__tmp.2188) <431>;
|
|
() chess_frequent_else () <432>;
|
|
() chess_rear_then () <2247>;
|
|
} #26
|
|
{
|
|
(__trgt.2201 var=465) const () <2248>;
|
|
() void_jump_int10_ (__trgt.2201) <2249>;
|
|
} #74 off=32
|
|
{
|
|
#762 off=16
|
|
(__ptr___str41232700.74 var=77) const () <98>;
|
|
(__ct_8388608.76 var=79) const () <100>;
|
|
(__ct_8388624.79 var=81) const () <103>;
|
|
(__ptr___str2eb09b76.82 var=83) const () <106>;
|
|
(fscanf.711 var=218) const () <612>;
|
|
(_Z16calculate_outputP4FILEP16SingleSignalPathS2_PU17chess_storage_DMBVsS4_S4_.937 var=253) const () <742>;
|
|
(fprintf.1089 var=267) const () <876>;
|
|
(__rt.1835 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_80t0.2128) <1573>;
|
|
(__rt.1857 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_84t0.2131) <1601>;
|
|
(__ct_80t0.2128 var=412) const () <1997>;
|
|
(__ct_84t0.2131 var=415) const () <2003>;
|
|
(__ct_2.2134 var=418) const () <2009>;
|
|
(__trgt.2193 var=462) const () <2236>;
|
|
(__trgt.2196 var=463) const () <2240>;
|
|
do {
|
|
{
|
|
(__vola.534 var=29) entry (__vola.1393 __vola.460) <433>;
|
|
(__extDM.537 var=32) entry (__extDM.1399 __extDM.461) <436>;
|
|
(__extPM.538 var=33) entry (__extPM.1401 __extPM.462) <437>;
|
|
(b0.540 var=35) entry (b0.1405 b0.463) <439>;
|
|
(b1.541 var=36) entry (b1.1407 b1.464) <440>;
|
|
(_ZL17c_sensor_signal_t.542 var=37) entry (_ZL17c_sensor_signal_t.1409 _ZL17c_sensor_signal_t.465) <441>;
|
|
(__extDM_SingleSignalPath.543 var=38) entry (__extDM_SingleSignalPath.1411 __extDM_SingleSignalPath.466) <442>;
|
|
(_ZL19acc_sensor_signal_t.544 var=39) entry (_ZL19acc_sensor_signal_t.1413 _ZL19acc_sensor_signal_t.467) <443>;
|
|
(d0.552 var=47) entry (d0.1429 d0.45) <451>;
|
|
(d1.553 var=48) entry (d1.1431 d1.46) <452>;
|
|
(_ZL10input_port.554 var=49) entry (_ZL10input_port.1433 _ZL10input_port.468) <453>;
|
|
(__extDM_int16_.555 var=50) entry (__extDM_int16_.1435 __extDM_int16_.469) <454>;
|
|
(_ZL11output_port.556 var=51) entry (_ZL11output_port.1437 _ZL11output_port.470) <455>;
|
|
(__extDM_void.558 var=53) entry (__extDM_void.1441 __extDM_void.471) <457>;
|
|
(__extPM_void.559 var=54) entry (__extPM_void.1443 __extPM_void.472) <458>;
|
|
(__extDM_int64_.560 var=55) entry (__extDM_int64_.1445 __extDM_int64_.473) <459>;
|
|
(__extDM_int8_.561 var=56) entry (__extDM_int8_.1447 __extDM_int8_.474) <460>;
|
|
(__extPM_FILE.562 var=57) entry (__extPM_FILE.1449 __extPM_FILE.475) <461>;
|
|
(__extDM_int32_.563 var=58) entry (__extDM_int32_.1451 __extDM_int32_.476) <462>;
|
|
(__shv___ptr_input_port.1723 var=341) entry (__shv___ptr_input_port.1721 __ct_8388608.76) <1388>;
|
|
} #29
|
|
{
|
|
#38 off=17
|
|
(__link.713 var=220) dmaddr__call_dmaddr_ (fscanf.711) <614>;
|
|
call {
|
|
(fp1.708 var=106 stl=A off=0) assign (__tmp.245) <609>;
|
|
(__ptr___str41232700.709 var=76 stl=A off=1) assign (__ptr___str41232700.74) <610>;
|
|
(__ptr_d0.710 var=98 stl=__spill_WDMA off=0) assign (__rt.1835) <611>;
|
|
(__link.714 var=220 stl=LR off=0) assign (__link.713) <615>;
|
|
(__tmp.715 var=221 stl=RA off=0 _ZL10input_port.718 var=49 _ZL11output_port.719 var=51 _ZL17c_sensor_signal_t.720 var=37 _ZL19acc_sensor_signal_t.721 var=39 __extDM.722 var=32 __extDM_SingleSignalPath.723 var=38 __extDM_int16_.724 var=50 __extDM_int32_.725 var=58 __extDM_int64_.726 var=55 __extDM_int8_.727 var=56 __extDM_void.728 var=53 __extPM.729 var=33 __extPM_FILE.730 var=57 __extPM_void.731 var=54 b0.732 var=35 b1.733 var=36 d0.734 var=47 __vola.735 var=29) VA0Ffscanf (__link.714 fp1.708 __ptr___str41232700.709 __ptr_d0.710 _ZL10input_port.554 _ZL11output_port.556 _ZL17c_sensor_signal_t.542 _ZL19acc_sensor_signal_t.544 __extDM.537 __extDM_SingleSignalPath.543 __extDM_int16_.555 __extDM_int32_.563 __extDM_int64_.560 __extDM_int8_.561 __extDM_void.558 __extPM.538 __extPM_FILE.562 __extPM_void.559 b0.540 b1.541 d0.552 __vola.534) <616>;
|
|
} #39 off=18
|
|
#40 off=19
|
|
(__link.741 var=224) dmaddr__call_dmaddr_ (fscanf.711) <624>;
|
|
call {
|
|
(fp2.736 var=107 stl=A off=0) assign (__tmp.272) <619>;
|
|
(__ptr___str41232700.737 var=76 stl=A off=1) assign (__ptr___str41232700.74) <620>;
|
|
(__ptr_d1.738 var=102 stl=__spill_WDMA off=0) assign (__rt.1857) <621>;
|
|
(__link.742 var=224 stl=LR off=0) assign (__link.741) <625>;
|
|
(__tmp.743 var=225 stl=RA off=0 _ZL10input_port.746 var=49 _ZL11output_port.747 var=51 _ZL17c_sensor_signal_t.748 var=37 _ZL19acc_sensor_signal_t.749 var=39 __extDM.750 var=32 __extDM_SingleSignalPath.751 var=38 __extDM_int16_.752 var=50 __extDM_int32_.753 var=58 __extDM_int64_.754 var=55 __extDM_int8_.755 var=56 __extDM_void.756 var=53 __extPM.757 var=33 __extPM_FILE.758 var=57 __extPM_void.759 var=54 b0.760 var=35 b1.761 var=36 d0.762 var=47 d1.763 var=48 __vola.764 var=29) VA1Ffscanf (__link.742 fp2.736 __ptr___str41232700.737 __ptr_d1.738 _ZL10input_port.718 _ZL11output_port.719 _ZL17c_sensor_signal_t.720 _ZL19acc_sensor_signal_t.721 __extDM.722 __extDM_SingleSignalPath.723 __extDM_int16_.724 __extDM_int32_.725 __extDM_int64_.726 __extDM_int8_.727 __extDM_void.728 __extPM.729 __extPM_FILE.730 __extPM_void.731 b0.732 b1.733 d0.734 d1.553 __vola.735) <626>;
|
|
} #41 off=20
|
|
#492 off=21
|
|
(__fch_d0.765 var=226) load (__M_WDMA.9 __rt.1835 d0.762) <629>;
|
|
(__tmp.766 var=227) __sshort___sshort___sint (__fch_d0.765) <630>;
|
|
(__M_SDMB.771 var=8 _ZL10input_port.772 var=49 __vola.773 var=29) store (__tmp.766 __shv___ptr_input_port.1723 _ZL10input_port.746 __vola.764) <635>;
|
|
(__fch_d1.774 var=232) load (__M_WDMA.9 __rt.1857 d1.763) <636>;
|
|
(__tmp.775 var=233) __sshort___sshort___sint (__fch_d1.774) <637>;
|
|
(__M_SDMB.783 var=8 _ZL10input_port.784 var=49 __vola.785 var=29) store (__tmp.775 __rt.1911 _ZL10input_port.772 __vola.773) <645>;
|
|
(__link.939 var=255) dmaddr__call_dmaddr_ (_Z16calculate_outputP4FILEP16SingleSignalPathS2_PU17chess_storage_DMBVsS4_S4_.937) <744>;
|
|
(__rt.1911 var=365) __Pvoid__pl___Pvoid_int18_ (__shv___ptr_input_port.1723 __ct_2.2134) <1673>;
|
|
(__rt.1933 var=365) __Pvoid__mi___Pvoid_int18_ (__rt.1911 __ct_2.2134) <1701>;
|
|
call {
|
|
(fp.925 var=109 stl=A off=0) assign (__tmp.326) <730>;
|
|
(__ptr_c_sensor_signal_t.926 var=60 stl=A off=1) assign (__ptr_c_sensor_signal_t.58) <731>;
|
|
(__ptr_acc_sensor_signal_t.927 var=62 stl=A off=2) assign (__ptr_acc_sensor_signal_t.60) <732>;
|
|
(__tmp.931 var=249 stl=A off=4) assign (__shv___ptr_input_port.1723) <736>;
|
|
(__tmp.935 var=252 stl=A off=5) assign (__rt.1911) <740>;
|
|
(__ptr_output_port.936 var=80 stl=__spill_WDMA off=0) assign (__ct_8388624.79) <741>;
|
|
(__link.940 var=255 stl=LR off=0) assign (__link.939) <745>;
|
|
(_ZL10input_port.941 var=49 _ZL11output_port.942 var=51 _ZL17c_sensor_signal_t.943 var=37 _ZL19acc_sensor_signal_t.944 var=39 __extDM.945 var=32 __extDM_SingleSignalPath.946 var=38 __extDM_int16_.947 var=50 __extDM_int32_.948 var=58 __extDM_int64_.949 var=55 __extDM_int8_.950 var=56 __extDM_void.951 var=53 __extPM.952 var=33 __extPM_FILE.953 var=57 __extPM_void.954 var=54 b0.955 var=35 b1.956 var=36 d0.957 var=47 d1.958 var=48 __vola.959 var=29) F_Z16calculate_outputP4FILEP16SingleSignalPathS2_PU17chess_storage_DMBVsS4_S4_ (__link.940 fp.925 __ptr_c_sensor_signal_t.926 __ptr_acc_sensor_signal_t.927 __tmp.931 __tmp.935 __ptr_output_port.936 _ZL10input_port.784 _ZL11output_port.747 _ZL17c_sensor_signal_t.748 _ZL19acc_sensor_signal_t.749 __extDM.750 __extDM_SingleSignalPath.751 __extDM_int16_.752 __extDM_int32_.753 __extDM_int64_.754 __extDM_int8_.755 __extDM_void.756 __extPM.757 __extPM_FILE.758 __extPM_void.759 b0.760 b1.761 d0.762 d1.763 __vola.785) <746>;
|
|
} #47 off=22
|
|
#55 off=23
|
|
(__fch__ZL11output_port.1084 var=265 _ZL11output_port.1085 var=51 __vola.1086 var=29) load (__M_SDMB.6 __ct_8388624.79 _ZL11output_port.942 __vola.959) <873>;
|
|
(__link.1091 var=269) dmaddr__call_dmaddr_ (fprintf.1089) <878>;
|
|
call {
|
|
(fp3.1078 var=108 stl=A off=0) assign (__tmp.299) <867>;
|
|
(__ptr___str2eb09b76.1079 var=82 stl=A off=1) assign (__ptr___str2eb09b76.82) <868>;
|
|
(__fch__ZL11output_port.1088 var=266 stl=__spill_WDMA off=0) assign (__fch__ZL11output_port.1084) <875>;
|
|
(__link.1092 var=269 stl=LR off=0) assign (__link.1091) <879>;
|
|
(__tmp.1093 var=270 stl=RA off=0 _ZL10input_port.1096 var=49 _ZL11output_port.1097 var=51 _ZL17c_sensor_signal_t.1098 var=37 _ZL19acc_sensor_signal_t.1099 var=39 __extDM.1100 var=32 __extDM_SingleSignalPath.1101 var=38 __extDM_int16_.1102 var=50 __extDM_int32_.1103 var=58 __extDM_int64_.1104 var=55 __extDM_int8_.1105 var=56 __extDM_void.1106 var=53 __extPM.1107 var=33 __extPM_FILE.1108 var=57 __extPM_void.1109 var=54 b0.1110 var=35 b1.1111 var=36 d0.1112 var=47 d1.1113 var=48 __vola.1114 var=29) VA2Ffprintf (__link.1092 fp3.1078 __ptr___str2eb09b76.1079 __fch__ZL11output_port.1088 _ZL10input_port.941 _ZL11output_port.1085 _ZL17c_sensor_signal_t.943 _ZL19acc_sensor_signal_t.944 __extDM.945 __extDM_SingleSignalPath.946 __extDM_int16_.947 __extDM_int32_.948 __extDM_int64_.949 __extDM_int8_.950 __extDM_void.951 __extPM.952 __extPM_FILE.953 __extPM_void.954 b0.955 b1.956 d0.957 d1.958 __vola.1086) <880>;
|
|
} #56 off=24
|
|
#61 off=25
|
|
(__link.1257 var=279) dmaddr__call_dmaddr_ (feof.346) <970>;
|
|
call {
|
|
(fp1.1254 var=106 stl=A off=0) assign (__tmp.245) <967>;
|
|
(__link.1258 var=279 stl=LR off=0) assign (__link.1257) <971>;
|
|
(__tmp.1259 var=280 stl=RA off=0 _ZL10input_port.1262 var=49 _ZL11output_port.1263 var=51 _ZL17c_sensor_signal_t.1264 var=37 _ZL19acc_sensor_signal_t.1265 var=39 __extDM.1266 var=32 __extDM_SingleSignalPath.1267 var=38 __extDM_int16_.1268 var=50 __extDM_int32_.1269 var=58 __extDM_int64_.1270 var=55 __extDM_int8_.1271 var=56 __extDM_void.1272 var=53 __extPM.1273 var=33 __extPM_FILE.1274 var=57 __extPM_void.1275 var=54 b0.1276 var=35 b1.1277 var=36 d0.1278 var=47 d1.1279 var=48 __vola.1280 var=29) Ffeof (__link.1258 fp1.1254 _ZL10input_port.1096 _ZL11output_port.1097 _ZL17c_sensor_signal_t.1098 _ZL19acc_sensor_signal_t.1099 __extDM.1100 __extDM_SingleSignalPath.1101 __extDM_int16_.1102 __extDM_int32_.1103 __extDM_int64_.1104 __extDM_int8_.1105 __extDM_void.1106 __extPM.1107 __extPM_FILE.1108 __extPM_void.1109 b0.1110 b1.1111 d0.1112 d1.1113 __vola.1114) <972>;
|
|
(__tmp.1260 var=280) deassign (__tmp.1259) <973>;
|
|
} #62 off=26
|
|
#724 off=27
|
|
(__tmp.2177 var=447) uint3__cmp_int72__int72_ (__tmp.1260 __ct_0.126) <2088>;
|
|
(__tmp.2183 var=390) bool_nequal_uint3_ (__tmp.2177) <2139>;
|
|
() void_jump_bool_int10_ (__tmp.2183 __trgt.2193) <2237>;
|
|
(__either.2194 var=460) undefined () <2238>;
|
|
if {
|
|
{
|
|
() if_expr (__either.2194) <1034>;
|
|
} #65
|
|
{
|
|
(__false.2195 var=459) const () <2239>;
|
|
} #66
|
|
{
|
|
#68 off=28
|
|
(__link.1345 var=288) dmaddr__call_dmaddr_ (feof.346) <1040>;
|
|
call {
|
|
(fp2.1342 var=107 stl=A off=0) assign (__tmp.272) <1037>;
|
|
(__link.1346 var=288 stl=LR off=0) assign (__link.1345) <1041>;
|
|
(__tmp.1347 var=289 stl=RA off=0 _ZL10input_port.1350 var=49 _ZL11output_port.1351 var=51 _ZL17c_sensor_signal_t.1352 var=37 _ZL19acc_sensor_signal_t.1353 var=39 __extDM.1354 var=32 __extDM_SingleSignalPath.1355 var=38 __extDM_int16_.1356 var=50 __extDM_int32_.1357 var=58 __extDM_int64_.1358 var=55 __extDM_int8_.1359 var=56 __extDM_void.1360 var=53 __extPM.1361 var=33 __extPM_FILE.1362 var=57 __extPM_void.1363 var=54 b0.1364 var=35 b1.1365 var=36 d0.1366 var=47 d1.1367 var=48 __vola.1368 var=29) Ffeof (__link.1346 fp2.1342 _ZL10input_port.1262 _ZL11output_port.1263 _ZL17c_sensor_signal_t.1264 _ZL19acc_sensor_signal_t.1265 __extDM.1266 __extDM_SingleSignalPath.1267 __extDM_int16_.1268 __extDM_int32_.1269 __extDM_int64_.1270 __extDM_int8_.1271 __extDM_void.1272 __extPM.1273 __extPM_FILE.1274 __extPM_void.1275 b0.1276 b1.1277 d0.1278 d1.1279 __vola.1280) <1042>;
|
|
(__tmp.1348 var=289) deassign (__tmp.1347) <1043>;
|
|
} #69 off=29
|
|
#716 off=30
|
|
(__tmp.2167 var=447) uint3__cmp_int72__int72_ (__tmp.1348 __ct_0.126) <2072>;
|
|
(__tmp.2168 var=292) bool_equal_uint3_ (__tmp.2167) <2073>;
|
|
() void_jump_bool_int10_ (__tmp.2168 __trgt.2196) <2241>;
|
|
(__either.2197 var=460) undefined () <2242>;
|
|
} #67
|
|
{
|
|
(__vola.1373 var=29) merge (__vola.1280 __vola.1368) <1049>;
|
|
(__extDM.1374 var=32) merge (__extDM.1266 __extDM.1354) <1050>;
|
|
(__extPM.1375 var=33) merge (__extPM.1273 __extPM.1361) <1051>;
|
|
(b0.1376 var=35) merge (b0.1276 b0.1364) <1052>;
|
|
(b1.1377 var=36) merge (b1.1277 b1.1365) <1053>;
|
|
(_ZL17c_sensor_signal_t.1378 var=37) merge (_ZL17c_sensor_signal_t.1264 _ZL17c_sensor_signal_t.1352) <1054>;
|
|
(__extDM_SingleSignalPath.1379 var=38) merge (__extDM_SingleSignalPath.1267 __extDM_SingleSignalPath.1355) <1055>;
|
|
(_ZL19acc_sensor_signal_t.1380 var=39) merge (_ZL19acc_sensor_signal_t.1265 _ZL19acc_sensor_signal_t.1353) <1056>;
|
|
(d0.1381 var=47) merge (d0.1278 d0.1366) <1057>;
|
|
(d1.1382 var=48) merge (d1.1279 d1.1367) <1058>;
|
|
(_ZL10input_port.1383 var=49) merge (_ZL10input_port.1262 _ZL10input_port.1350) <1059>;
|
|
(__extDM_int16_.1384 var=50) merge (__extDM_int16_.1268 __extDM_int16_.1356) <1060>;
|
|
(_ZL11output_port.1385 var=51) merge (_ZL11output_port.1263 _ZL11output_port.1351) <1061>;
|
|
(__extDM_void.1386 var=53) merge (__extDM_void.1272 __extDM_void.1360) <1062>;
|
|
(__extPM_void.1387 var=54) merge (__extPM_void.1275 __extPM_void.1363) <1063>;
|
|
(__extDM_int64_.1388 var=55) merge (__extDM_int64_.1270 __extDM_int64_.1358) <1064>;
|
|
(__extDM_int8_.1389 var=56) merge (__extDM_int8_.1271 __extDM_int8_.1359) <1065>;
|
|
(__extPM_FILE.1390 var=57) merge (__extPM_FILE.1274 __extPM_FILE.1362) <1066>;
|
|
(__extDM_int32_.1391 var=58) merge (__extDM_int32_.1269 __extDM_int32_.1357) <1067>;
|
|
(__tmp.1681 var=293) merge (__false.2195 __either.2197) <1349>;
|
|
} #71
|
|
} #64
|
|
} #30
|
|
{
|
|
() while_expr (__tmp.1681) <1069>;
|
|
(__vola.1393 var=29 __vola.1394 var=29) exit (__vola.1373) <1070>;
|
|
(__extDM.1399 var=32 __extDM.1400 var=32) exit (__extDM.1374) <1073>;
|
|
(__extPM.1401 var=33 __extPM.1402 var=33) exit (__extPM.1375) <1074>;
|
|
(b0.1405 var=35 b0.1406 var=35) exit (b0.1376) <1076>;
|
|
(b1.1407 var=36 b1.1408 var=36) exit (b1.1377) <1077>;
|
|
(_ZL17c_sensor_signal_t.1409 var=37 _ZL17c_sensor_signal_t.1410 var=37) exit (_ZL17c_sensor_signal_t.1378) <1078>;
|
|
(__extDM_SingleSignalPath.1411 var=38 __extDM_SingleSignalPath.1412 var=38) exit (__extDM_SingleSignalPath.1379) <1079>;
|
|
(_ZL19acc_sensor_signal_t.1413 var=39 _ZL19acc_sensor_signal_t.1414 var=39) exit (_ZL19acc_sensor_signal_t.1380) <1080>;
|
|
(d0.1429 var=47 d0.1430 var=47) exit (d0.1381) <1088>;
|
|
(d1.1431 var=48 d1.1432 var=48) exit (d1.1382) <1089>;
|
|
(_ZL10input_port.1433 var=49 _ZL10input_port.1434 var=49) exit (_ZL10input_port.1383) <1090>;
|
|
(__extDM_int16_.1435 var=50 __extDM_int16_.1436 var=50) exit (__extDM_int16_.1384) <1091>;
|
|
(_ZL11output_port.1437 var=51 _ZL11output_port.1438 var=51) exit (_ZL11output_port.1385) <1092>;
|
|
(__extDM_void.1441 var=53 __extDM_void.1442 var=53) exit (__extDM_void.1386) <1094>;
|
|
(__extPM_void.1443 var=54 __extPM_void.1444 var=54) exit (__extPM_void.1387) <1095>;
|
|
(__extDM_int64_.1445 var=55 __extDM_int64_.1446 var=55) exit (__extDM_int64_.1388) <1096>;
|
|
(__extDM_int8_.1447 var=56 __extDM_int8_.1448 var=56) exit (__extDM_int8_.1389) <1097>;
|
|
(__extPM_FILE.1449 var=57 __extPM_FILE.1450 var=57) exit (__extPM_FILE.1390) <1098>;
|
|
(__extDM_int32_.1451 var=58 __extDM_int32_.1452 var=58) exit (__extDM_int32_.1391) <1099>;
|
|
(__shv___ptr_input_port.1721 var=341 __shv___ptr_input_port.1722 var=341) exit (__rt.1933) <1387>;
|
|
} #73
|
|
} #28 rng=[1,65535]
|
|
} #27
|
|
{
|
|
(__vola.1505 var=29) merge (__vola.460 __vola.1394) <1126>;
|
|
(__extDM.1506 var=32) merge (__extDM.461 __extDM.1400) <1127>;
|
|
(__extPM.1507 var=33) merge (__extPM.462 __extPM.1402) <1128>;
|
|
(b0.1508 var=35) merge (b0.463 b0.1406) <1129>;
|
|
(b1.1509 var=36) merge (b1.464 b1.1408) <1130>;
|
|
(_ZL17c_sensor_signal_t.1510 var=37) merge (_ZL17c_sensor_signal_t.465 _ZL17c_sensor_signal_t.1410) <1131>;
|
|
(__extDM_SingleSignalPath.1511 var=38) merge (__extDM_SingleSignalPath.466 __extDM_SingleSignalPath.1412) <1132>;
|
|
(_ZL19acc_sensor_signal_t.1512 var=39) merge (_ZL19acc_sensor_signal_t.467 _ZL19acc_sensor_signal_t.1414) <1133>;
|
|
(d0.1513 var=47) merge (d0.45 d0.1430) <1134>;
|
|
(d1.1514 var=48) merge (d1.46 d1.1432) <1135>;
|
|
(_ZL10input_port.1515 var=49) merge (_ZL10input_port.468 _ZL10input_port.1434) <1136>;
|
|
(__extDM_int16_.1516 var=50) merge (__extDM_int16_.469 __extDM_int16_.1436) <1137>;
|
|
(_ZL11output_port.1517 var=51) merge (_ZL11output_port.470 _ZL11output_port.1438) <1138>;
|
|
(__extDM_void.1518 var=53) merge (__extDM_void.471 __extDM_void.1442) <1139>;
|
|
(__extPM_void.1519 var=54) merge (__extPM_void.472 __extPM_void.1444) <1140>;
|
|
(__extDM_int64_.1520 var=55) merge (__extDM_int64_.473 __extDM_int64_.1446) <1141>;
|
|
(__extDM_int8_.1521 var=56) merge (__extDM_int8_.474 __extDM_int8_.1448) <1142>;
|
|
(__extPM_FILE.1522 var=57) merge (__extPM_FILE.475 __extPM_FILE.1450) <1143>;
|
|
(__extDM_int32_.1523 var=58) merge (__extDM_int32_.476 __extDM_int32_.1452) <1144>;
|
|
} #75
|
|
} #25
|
|
#76 off=33
|
|
(fclose.1529 var=295) const () <1150>;
|
|
(__link.1531 var=297) dmaddr__call_dmaddr_ (fclose.1529) <1152>;
|
|
call {
|
|
(fp1.1528 var=106 stl=A off=0) assign (__tmp.245) <1149>;
|
|
(__link.1532 var=297 stl=LR off=0) assign (__link.1531) <1153>;
|
|
(__tmp.1533 var=298 stl=RA off=0 _ZL10input_port.1536 var=49 _ZL11output_port.1537 var=51 _ZL17c_sensor_signal_t.1538 var=37 _ZL19acc_sensor_signal_t.1539 var=39 __extDM.1540 var=32 __extDM_SingleSignalPath.1541 var=38 __extDM_int16_.1542 var=50 __extDM_int32_.1543 var=58 __extDM_int64_.1544 var=55 __extDM_int8_.1545 var=56 __extDM_void.1546 var=53 __extPM.1547 var=33 __extPM_FILE.1548 var=57 __extPM_void.1549 var=54 b0.1550 var=35 b1.1551 var=36 d0.1552 var=47 d1.1553 var=48 __vola.1554 var=29) Ffclose (__link.1532 fp1.1528 _ZL10input_port.1515 _ZL11output_port.1517 _ZL17c_sensor_signal_t.1510 _ZL19acc_sensor_signal_t.1512 __extDM.1506 __extDM_SingleSignalPath.1511 __extDM_int16_.1516 __extDM_int32_.1523 __extDM_int64_.1520 __extDM_int8_.1521 __extDM_void.1518 __extPM.1507 __extPM_FILE.1522 __extPM_void.1519 b0.1508 b1.1509 d0.1513 d1.1514 __vola.1505) <1154>;
|
|
} #77 off=34
|
|
#78 off=35
|
|
(__link.1558 var=301) dmaddr__call_dmaddr_ (fclose.1529) <1160>;
|
|
call {
|
|
(fp2.1555 var=107 stl=A off=0) assign (__tmp.272) <1157>;
|
|
(__link.1559 var=301 stl=LR off=0) assign (__link.1558) <1161>;
|
|
(__tmp.1560 var=302 stl=RA off=0 _ZL10input_port.1563 var=49 _ZL11output_port.1564 var=51 _ZL17c_sensor_signal_t.1565 var=37 _ZL19acc_sensor_signal_t.1566 var=39 __extDM.1567 var=32 __extDM_SingleSignalPath.1568 var=38 __extDM_int16_.1569 var=50 __extDM_int32_.1570 var=58 __extDM_int64_.1571 var=55 __extDM_int8_.1572 var=56 __extDM_void.1573 var=53 __extPM.1574 var=33 __extPM_FILE.1575 var=57 __extPM_void.1576 var=54 b0.1577 var=35 b1.1578 var=36 d0.1579 var=47 d1.1580 var=48 __vola.1581 var=29) Ffclose (__link.1559 fp2.1555 _ZL10input_port.1536 _ZL11output_port.1537 _ZL17c_sensor_signal_t.1538 _ZL19acc_sensor_signal_t.1539 __extDM.1540 __extDM_SingleSignalPath.1541 __extDM_int16_.1542 __extDM_int32_.1543 __extDM_int64_.1544 __extDM_int8_.1545 __extDM_void.1546 __extPM.1547 __extPM_FILE.1548 __extPM_void.1549 b0.1550 b1.1551 d0.1552 d1.1553 __vola.1554) <1162>;
|
|
} #79 off=36
|
|
#80 off=37
|
|
(__link.1585 var=305) dmaddr__call_dmaddr_ (fclose.1529) <1168>;
|
|
call {
|
|
(fp3.1582 var=108 stl=A off=0) assign (__tmp.299) <1165>;
|
|
(__link.1586 var=305 stl=LR off=0) assign (__link.1585) <1169>;
|
|
(__tmp.1587 var=306 stl=RA off=0 _ZL10input_port.1590 var=49 _ZL11output_port.1591 var=51 _ZL17c_sensor_signal_t.1592 var=37 _ZL19acc_sensor_signal_t.1593 var=39 __extDM.1594 var=32 __extDM_SingleSignalPath.1595 var=38 __extDM_int16_.1596 var=50 __extDM_int32_.1597 var=58 __extDM_int64_.1598 var=55 __extDM_int8_.1599 var=56 __extDM_void.1600 var=53 __extPM.1601 var=33 __extPM_FILE.1602 var=57 __extPM_void.1603 var=54 b0.1604 var=35 b1.1605 var=36 d0.1606 var=47 d1.1607 var=48 __vola.1608 var=29) Ffclose (__link.1586 fp3.1582 _ZL10input_port.1563 _ZL11output_port.1564 _ZL17c_sensor_signal_t.1565 _ZL19acc_sensor_signal_t.1566 __extDM.1567 __extDM_SingleSignalPath.1568 __extDM_int16_.1569 __extDM_int32_.1570 __extDM_int64_.1571 __extDM_int8_.1572 __extDM_void.1573 __extPM.1574 __extPM_FILE.1575 __extPM_void.1576 b0.1577 b1.1578 d0.1579 d1.1580 __vola.1581) <1170>;
|
|
} #81 off=38
|
|
#84 off=39 nxt=-2
|
|
(__R_SP.1615 var=26 __sp.1616 var=34) wr_res_reg (__rt.1889 __sp.95) <1179>;
|
|
() void_ret_dmaddr_ (__la.87) <1180>;
|
|
(__rt.1617 var=86 stl=RA off=0) assign (__ct_0.126) <1181>;
|
|
() out (__rt.1617) <1182>;
|
|
() sink (__vola.1608) <1183>;
|
|
() sink (__extDM.1594) <1186>;
|
|
() sink (__extPM.1601) <1187>;
|
|
() sink (__sp.1616) <1188>;
|
|
() sink (_ZL17c_sensor_signal_t.1592) <1189>;
|
|
() sink (__extDM_SingleSignalPath.1595) <1190>;
|
|
() sink (_ZL19acc_sensor_signal_t.1593) <1191>;
|
|
() sink (_ZL10input_port.1590) <1199>;
|
|
() sink (__extDM_int16_.1596) <1200>;
|
|
() sink (_ZL11output_port.1591) <1201>;
|
|
() sink (__extDM_void.1600) <1203>;
|
|
() sink (__extPM_void.1603) <1204>;
|
|
() sink (__extDM_int64_.1598) <1205>;
|
|
() sink (__extDM_int8_.1599) <1206>;
|
|
() sink (__extPM_FILE.1602) <1207>;
|
|
() sink (__extDM_int32_.1597) <1208>;
|
|
() sink (__ct_0.84) <1209>;
|
|
(__rt.1889 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_88s0.2123) <1645>;
|
|
(__ct_88s0.2123 var=407) const () <1987>;
|
|
} #0
|
|
0 : 'main.c';
|
|
----------
|
|
0 : (0,28:0,0);
|
|
4 : (0,37:4,14);
|
|
5 : (0,49:100,15);
|
|
6 : (0,49:16,15);
|
|
7 : (0,50:100,16);
|
|
8 : (0,50:16,16);
|
|
9 : (0,51:88,17);
|
|
10 : (0,51:16,17);
|
|
11 : (0,52:100,18);
|
|
12 : (0,52:15,18);
|
|
13 : (0,61:4,20);
|
|
14 : (0,61:4,20);
|
|
16 : (0,61:4,20);
|
|
18 : (0,61:4,21);
|
|
19 : (0,61:4,22);
|
|
20 : (0,61:4,22);
|
|
21 : (0,61:4,22);
|
|
25 : (0,61:4,24);
|
|
27 : (0,61:4,25);
|
|
28 : (0,61:4,25);
|
|
30 : (0,61:37,25);
|
|
38 : (0,63:22,27);
|
|
39 : (0,63:12,27);
|
|
40 : (0,64:22,28);
|
|
41 : (0,64:12,28);
|
|
47 : (0,68:8,40);
|
|
55 : (0,71:23,43);
|
|
56 : (0,71:12,43);
|
|
61 : (0,61:18,54);
|
|
62 : (0,61:13,54);
|
|
64 : (0,61:23,54);
|
|
66 : (0,61:23,55);
|
|
67 : (0,61:23,56);
|
|
68 : (0,61:31,56);
|
|
69 : (0,61:26,56);
|
|
74 : (0,61:4,60);
|
|
76 : (0,74:11,63);
|
|
77 : (0,74:4,63);
|
|
78 : (0,75:11,64);
|
|
79 : (0,75:4,64);
|
|
80 : (0,76:11,65);
|
|
81 : (0,76:4,65);
|
|
84 : (0,77:0,66);
|
|
370 : (0,37:4,14);
|
|
492 : (0,68:8,40);
|
|
713 : (0,61:4,22);
|
|
716 : (0,61:23,56);
|
|
719 : (0,61:4,20);
|
|
724 : (0,61:23,54);
|
|
----------
|
|
86 : (0,49:22,0);
|
|
88 : (0,49:100,0);
|
|
90 : (0,50:22,0);
|
|
92 : (0,51:22,0);
|
|
94 : (0,51:88,0);
|
|
96 : (0,52:21,0);
|
|
114 : (0,28:4,0);
|
|
118 : (0,28:4,0);
|
|
120 : (0,31:11,0);
|
|
148 : (0,31:18,0);
|
|
150 : (0,31:18,0);
|
|
153 : (0,31:18,1);
|
|
154 : (0,31:22,0);
|
|
159 : (0,31:22,2);
|
|
162 : (0,31:26,0);
|
|
165 : (0,31:26,3);
|
|
171 : (0,31:30,4);
|
|
177 : (0,31:34,5);
|
|
183 : (0,32:18,7);
|
|
189 : (0,32:22,8);
|
|
195 : (0,32:26,9);
|
|
201 : (0,32:30,10);
|
|
207 : (0,32:34,11);
|
|
208 : (0,38:8,0);
|
|
209 : (0,38:28,0);
|
|
210 : (0,39:8,0);
|
|
211 : (0,40:8,0);
|
|
212 : (0,41:8,0);
|
|
214 : (0,41:8,0);
|
|
217 : (0,42:8,0);
|
|
220 : (0,38:8,0);
|
|
223 : (0,38:8,0);
|
|
224 : (0,45:8,0);
|
|
226 : (0,45:8,0);
|
|
229 : (0,46:8,0);
|
|
232 : (0,37:4,14);
|
|
233 : (0,37:4,0);
|
|
234 : (0,37:4,14);
|
|
236 : (0,49:22,0);
|
|
237 : (0,49:100,0);
|
|
240 : (0,49:16,15);
|
|
241 : (0,49:16,0);
|
|
242 : (0,49:16,15);
|
|
246 : (0,50:22,0);
|
|
247 : (0,50:100,0);
|
|
250 : (0,50:16,16);
|
|
251 : (0,50:16,0);
|
|
252 : (0,50:16,16);
|
|
256 : (0,51:22,0);
|
|
257 : (0,51:88,0);
|
|
260 : (0,51:16,17);
|
|
261 : (0,51:16,0);
|
|
262 : (0,51:16,17);
|
|
266 : (0,52:21,0);
|
|
267 : (0,52:100,0);
|
|
270 : (0,52:15,18);
|
|
271 : (0,52:15,0);
|
|
272 : (0,52:15,18);
|
|
275 : (0,61:4,0);
|
|
278 : (0,61:4,20);
|
|
279 : (0,61:4,0);
|
|
280 : (0,61:4,20);
|
|
342 : (0,61:4,20);
|
|
345 : (0,61:4,0);
|
|
348 : (0,61:4,22);
|
|
349 : (0,61:4,0);
|
|
350 : (0,61:4,22);
|
|
357 : (0,61:4,23);
|
|
358 : (0,61:4,23);
|
|
359 : (0,61:4,23);
|
|
360 : (0,61:4,23);
|
|
361 : (0,61:4,23);
|
|
362 : (0,61:4,23);
|
|
363 : (0,61:4,23);
|
|
364 : (0,61:4,23);
|
|
365 : (0,61:4,23);
|
|
366 : (0,61:4,23);
|
|
367 : (0,61:4,23);
|
|
368 : (0,61:4,23);
|
|
369 : (0,61:4,23);
|
|
370 : (0,61:4,23);
|
|
371 : (0,61:4,23);
|
|
372 : (0,61:4,23);
|
|
373 : (0,61:4,23);
|
|
431 : (0,61:4,24);
|
|
433 : (0,61:4,25);
|
|
436 : (0,61:4,25);
|
|
437 : (0,61:4,25);
|
|
439 : (0,61:4,25);
|
|
440 : (0,61:4,25);
|
|
441 : (0,61:4,25);
|
|
442 : (0,61:4,25);
|
|
443 : (0,61:4,25);
|
|
451 : (0,61:4,25);
|
|
452 : (0,61:4,25);
|
|
453 : (0,61:4,25);
|
|
454 : (0,61:4,25);
|
|
455 : (0,61:4,25);
|
|
457 : (0,61:4,25);
|
|
458 : (0,61:4,25);
|
|
459 : (0,61:4,25);
|
|
460 : (0,61:4,25);
|
|
461 : (0,61:4,25);
|
|
462 : (0,61:4,25);
|
|
609 : (0,63:19,0);
|
|
610 : (0,63:24,0);
|
|
611 : (0,63:22,0);
|
|
614 : (0,63:12,27);
|
|
615 : (0,63:12,0);
|
|
616 : (0,63:12,27);
|
|
619 : (0,64:19,0);
|
|
620 : (0,64:24,0);
|
|
621 : (0,64:22,0);
|
|
624 : (0,64:12,28);
|
|
625 : (0,64:12,0);
|
|
626 : (0,64:12,28);
|
|
629 : (0,65:38,29);
|
|
630 : (0,65:28,29);
|
|
635 : (0,65:22,29);
|
|
636 : (0,66:40,30);
|
|
637 : (0,66:30,30);
|
|
645 : (0,66:22,30);
|
|
730 : (0,69:12,0);
|
|
731 : (0,69:16,0);
|
|
732 : (0,69:36,0);
|
|
736 : (0,69:69,0);
|
|
740 : (0,69:85,0);
|
|
741 : (0,69:90,0);
|
|
744 : (0,68:8,40);
|
|
745 : (0,68:8,0);
|
|
746 : (0,68:8,40);
|
|
867 : (0,71:20,0);
|
|
868 : (0,71:25,0);
|
|
873 : (0,71:44,43);
|
|
875 : (0,71:23,0);
|
|
878 : (0,71:12,43);
|
|
879 : (0,71:12,0);
|
|
880 : (0,71:12,43);
|
|
967 : (0,61:18,0);
|
|
970 : (0,61:13,54);
|
|
971 : (0,61:13,0);
|
|
972 : (0,61:13,54);
|
|
1034 : (0,61:23,54);
|
|
1037 : (0,61:31,0);
|
|
1040 : (0,61:26,56);
|
|
1041 : (0,61:26,0);
|
|
1042 : (0,61:26,56);
|
|
1049 : (0,61:23,57);
|
|
1050 : (0,61:23,57);
|
|
1051 : (0,61:23,57);
|
|
1052 : (0,61:23,57);
|
|
1053 : (0,61:23,57);
|
|
1054 : (0,61:23,57);
|
|
1055 : (0,61:23,57);
|
|
1056 : (0,61:23,57);
|
|
1057 : (0,61:23,57);
|
|
1058 : (0,61:23,57);
|
|
1059 : (0,61:23,57);
|
|
1060 : (0,61:23,57);
|
|
1061 : (0,61:23,57);
|
|
1062 : (0,61:23,57);
|
|
1063 : (0,61:23,57);
|
|
1064 : (0,61:23,57);
|
|
1065 : (0,61:23,57);
|
|
1066 : (0,61:23,57);
|
|
1067 : (0,61:23,57);
|
|
1069 : (0,61:4,58);
|
|
1070 : (0,61:4,58);
|
|
1073 : (0,61:4,58);
|
|
1074 : (0,61:4,58);
|
|
1076 : (0,61:4,58);
|
|
1077 : (0,61:4,58);
|
|
1078 : (0,61:4,58);
|
|
1079 : (0,61:4,58);
|
|
1080 : (0,61:4,58);
|
|
1088 : (0,61:4,58);
|
|
1089 : (0,61:4,58);
|
|
1090 : (0,61:4,58);
|
|
1091 : (0,61:4,58);
|
|
1092 : (0,61:4,58);
|
|
1094 : (0,61:4,58);
|
|
1095 : (0,61:4,58);
|
|
1096 : (0,61:4,58);
|
|
1097 : (0,61:4,58);
|
|
1098 : (0,61:4,58);
|
|
1099 : (0,61:4,58);
|
|
1126 : (0,61:4,62);
|
|
1127 : (0,61:4,62);
|
|
1128 : (0,61:4,62);
|
|
1129 : (0,61:4,62);
|
|
1130 : (0,61:4,62);
|
|
1131 : (0,61:4,62);
|
|
1132 : (0,61:4,62);
|
|
1133 : (0,61:4,62);
|
|
1134 : (0,61:4,62);
|
|
1135 : (0,61:4,62);
|
|
1136 : (0,61:4,62);
|
|
1137 : (0,61:4,62);
|
|
1138 : (0,61:4,62);
|
|
1139 : (0,61:4,62);
|
|
1140 : (0,61:4,62);
|
|
1141 : (0,61:4,62);
|
|
1142 : (0,61:4,62);
|
|
1143 : (0,61:4,62);
|
|
1144 : (0,61:4,62);
|
|
1149 : (0,74:11,0);
|
|
1152 : (0,74:4,63);
|
|
1153 : (0,74:4,0);
|
|
1154 : (0,74:4,63);
|
|
1157 : (0,75:11,0);
|
|
1160 : (0,75:4,64);
|
|
1161 : (0,75:4,0);
|
|
1162 : (0,75:4,64);
|
|
1165 : (0,76:11,0);
|
|
1168 : (0,76:4,65);
|
|
1169 : (0,76:4,0);
|
|
1170 : (0,76:4,65);
|
|
1179 : (0,77:0,66);
|
|
1180 : (0,77:0,66);
|
|
1181 : (0,77:0,0);
|
|
1349 : (0,61:23,57);
|
|
1489 : (0,28:4,0);
|
|
1517 : (0,31:11,0);
|
|
1545 : (0,32:11,0);
|
|
1573 : (0,59:8,0);
|
|
1601 : (0,59:12,0);
|
|
1645 : (0,77:0,0);
|
|
1673 : (0,69:85,0);
|
|
1729 : (0,31:22,0);
|
|
1757 : (0,31:26,0);
|
|
1785 : (0,31:30,0);
|
|
1813 : (0,31:34,0);
|
|
1841 : (0,32:22,0);
|
|
1869 : (0,32:26,0);
|
|
1897 : (0,32:30,0);
|
|
1925 : (0,32:34,0);
|
|
1985 : (0,28:4,0);
|
|
1987 : (0,28:4,0);
|
|
1989 : (0,31:11,0);
|
|
1991 : (0,32:11,0);
|
|
1997 : (0,59:8,0);
|
|
2003 : (0,59:12,0);
|
|
2009 : (0,69:85,0);
|
|
2013 : (0,31:22,0);
|
|
2019 : (0,31:26,0);
|
|
2025 : (0,31:30,0);
|
|
2031 : (0,31:34,0);
|
|
2037 : (0,32:22,0);
|
|
2043 : (0,32:26,0);
|
|
2049 : (0,32:30,0);
|
|
2055 : (0,32:34,0);
|
|
2064 : (0,61:4,22);
|
|
2072 : (0,61:23,56);
|
|
2073 : (0,61:23,56);
|
|
2080 : (0,61:4,20);
|
|
2088 : (0,61:23,54);
|
|
2138 : (0,61:4,20);
|
|
2139 : (0,61:23,54);
|
|
2186 : (0,61:4,22);
|
|
2187 : (0,61:4,23);
|
|
2234 : (0,61:4,20);
|
|
2237 : (0,61:23,54);
|
|
2241 : (0,61:4,58);
|
|
2245 : (0,61:4,24);
|
|
|