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DSP_Simulation/testcode/Release/testcode.srv
2026-01-27 11:17:03 +01:00

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// File generated by darts version X-2025.06#84ea4f0b1c#250602, Thu Jan 22 11:13:24 2026
// Copyright 2014-2025 Synopsys, Inc. All rights reserved.
// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\darts.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -d -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -D__tct_patch__=0 +Mhex +Ihex -g +u Release/testcode lpdsp32
// Release: ipp X-2025.06
.label _ivt
.function _ivt _ivt
.src_ref 0 "lpdsp32_init.s" 15 first
.function_start
0 "01100100000000000000" // jp 0x20 /* MW 2 */ /* control_operation: words=2 jump unconditional cycles_taken=2 direct absolute target_address=32 */
1 "00000000001000000111" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 16 first
2 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
3 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 17 first
4 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
5 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 18 first
6 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
7 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 19 first
8 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
9 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 20 first
10 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
11 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 21 first
12 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
13 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 22 first
14 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
15 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 23 first
16 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
17 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 24 first
18 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
19 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 25 first
20 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
21 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 26 first
22 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
23 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 27 first
24 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
25 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 28 first
26 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
27 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 29 first
28 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
29 "00111000000000000000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 30 first
30 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
31 "00111000000000000000" // /* MW 1 */
.label _main_init
.function _main_init _main_init
.src_ref 0 "lpdsp32_init.s" 5 first
.function_start
32 "10111010000100010010" // r = 0x1 /* control_operation: words=1 cycles_taken=1 */
.src_ref 0 "lpdsp32_init.s" 6 first
33 "10111010000100010011" // s = 0x1 /* control_operation: words=1 cycles_taken=1 */
.src_ref 0 "lpdsp32_init.s" 7 first
34 "01101000000000000011" // sp = 0xfff8 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
35 "11111111111000111000" // /* MW 1 */
.src_ref 0 "lpdsp32_init.s" 8 first
36 "01000110000010001000" // ie = 0x1; nop /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
37 "00111000000000000000" // /* MW 1 */
.label _main
.function main _main
.src_ref 1 "main.c" 44 first
.src_ref 1 "main.c" 47 14
.function_start
38 "01101000001000000000" // a0 = -0x800000 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
39 "00000000000000100000" // /* MW 1 */
.src_ref 1 "main.c" 44 4
40 "10101011111111110000" // sp+= -0x8 /* control_operation: words=1 cycles_taken=1 */
.src_ref 1 "main.c" 47 14
41 "01011100000110010010" // ra1 = 100; sp[0x0] = lr /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
42 "10001000000001110110" // /* MW 1 */
.src_ref 1 "main.c" 47 14 first
.src_ref 1 "main.c" 48 14
.src_ref 1 "main.c" 52 15
43 "01011100100000001000" // c0 = 2; a0[0x0] = ra1.s /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
44 "00010100000001110101" // /* MW 1 */
.src_ref 1 "main.c" 48 14
.src_ref 1 "main.c" 48 14
45 "01011100000110010110" // ra1 = 101; a1 = a0 + 0x2 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
46 "10100000000000010001" // /* MW 1 */
.src_ref 1 "main.c" 48 14 first
.src_ref 1 "main.c" 49 14
47 "01011100000110011010" // ra0 = 102; [a1+c0] = ra1.s /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
48 "00010100100001010101" // /* MW 1 */
.src_ref 1 "main.c" 45 4
.src_ref 1 "main.c" 51 15
49 "01101000001000000000" // a0 = -0x7ffff0 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
50 "00000000010000100000" // /* MW 1 */
.src_ref 1 "main.c" 49 14 first
.src_ref 1 "main.c" 50 14
51 "01011100000110011110" // ra1 = 103; a1[0x0] = ra0.s /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
52 "10010100100001110100" // /* MW 1 */
.src_ref 1 "main.c" 45 4 first
53 "01101100000000000000" // [0x4] = a0 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
54 "00000000001001100000" // /* MW 1 */
.src_ref 1 "main.c" 50 14 first
55 "10010100100011110101" // a1[0x2] = ra1.s /* control_operation: words=1 cycles_taken=1 */
.src_ref 1 "main.c" 51 15
56 "10110000011001000101" // ra1 = 0xc8 /* control_operation: words=1 cycles_taken=1 */
.src_ref 1 "main.c" 56 4 first
57 "01101100000000000000" // ra0 = [0x8] /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
58 "00000000010000001000" // /* MW 1 */
.src_ref 1 "main.c" 51 15 first
59 "10010100000001110101" // a0[0x0] = ra1.s /* control_operation: words=1 cycles_taken=1 */
.src_ref 1 "main.c" 52 15
60 "10100000000000010000" // a0 = a0 + 0x2 /* control_operation: words=1 cycles_taken=1 */
.src_ref 1 "main.c" 52 15
61 "10110000011001001101" // ra1 = 0xc9 /* control_operation: words=1 cycles_taken=1 */
.src_ref 1 "main.c" 52 15 first
62 "10010100000001010101" // [a0+c0] = ra1.s /* control_operation: words=1 cycles_taken=1 */
.src_ref 1 "main.c" 53 15
63 "10110000011001010101" // ra1 = 0xca /* control_operation: words=1 cycles_taken=1 */
.src_ref 1 "main.c" 53 15 first
64 "10010100000001110101" // a0[0x0] = ra1.s /* control_operation: words=1 cycles_taken=1 */
.src_ref 1 "main.c" 54 15
.src_ref 1 "main.c" 56 4 first
65 "01011001000101010000" // cmp(ra0,0xa); ra1 = 0xcb /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
66 "00110000011001011101" // /* MW 1 */
.src_ref 1 "main.c" 54 15 first
.src_ref 1 "main.c" 56 4
67 "01000010000010101101" // if (ns) jpsdb 0x15; a0[0x2] = ra1.s /* MW 2 */ /* control_operation: words=2 jump conditional cycles_taken=1 cycles_not_taken=0 direct relative pc_offset=1 pc_offset_in_words=2 target_address=21 delay_slots=1 */
68 "10010100000011110101" // /* MW 1 */
.delay_slot
.swstall delay_slot
69 "00000000000000000000" // nop /* control_operation: words=1 cycles_taken=1 */
.src_ref 1 "main.c" 57 27 first
.loop_nesting 1
70 "01101100000000000000" // rb0 = [0x18] /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
71 "00000000110000001010" // /* MW 1 */
.src_ref 1 "main.c" 57 22
72 "01101100000000000000" // ra1 = [0x14] /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
73 "00000000101000001001" // /* MW 1 */
.src_ref 1 "main.c" 57 18
74 "01010111010011010110" // ra0 = max(ra1,rb0); nop /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
75 "00111000000000000000" // /* MW 1 */
.src_ref 1 "main.c" 57 7
76 "01101100000000000000" // [0xc] = ra0 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
77 "00000000011001001000" // /* MW 1 */
.src_ref 1 "main.c" 58 19 first
.no_stack_arguments
78 "01100110000000000000" // call 0x5e /* MW 2 */ /* control_operation: words=2 call unconditional cycles_taken=2 direct absolute target_address=94 */
79 "00000000010111100000" // /* MW 1 */
.src_ref 1 "main.c" 59 10 first
.return_address
80 "01101100000000000000" // ra1 = [0x8] /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
81 "00000000010000001001" // /* MW 1 */
.src_ref 1 "main.c" 59 11
82 "00101010000001101101" // ra1 = ra1 + 0x1 /* control_operation: words=1 cycles_taken=1 */
.src_ref 1 "main.c" 56 12 first
83 "00110010001010101000" // cmp(ra1,0xa) /* control_operation: words=1 cycles_taken=1 */
.src_ref 1 "main.c" 58 8 first
84 "01101100000000000000" // [0x10] = ra0 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
85 "00000000100001001000" // /* MW 1 */
.src_ref 1 "main.c" 59 8 first
86 "01101100000000000000" // [0x8] = ra1 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
87 "00000000010001001001" // /* MW 1 */
.src_ref 1 "main.c" 56 4 first
.src_ref 1 "main.c" 56 12 first
88 "01000000000000000000" // nop; if (s) jps -0x14 /* MW 2 */ /* control_operation: words=2 jump conditional cycles_taken=2 cycles_not_taken=1 direct relative pc_offset=1 pc_offset_in_words=2 target_address=-20 */
89 "00111111111011000010" // /* MW 1 */
.src_ref 1 "main.c" 66
.loop_nesting 0
90 "01011100000000000010" // ra0 = 0; lr = sp[0x0] /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
91 "00001000000000110110" // /* MW 1 */
.src_ref 1 "main.c" 66 first
.src_ref 1 "main.c" 66 first
.end_of_main
92 "01000110000010100000" // ret; sp+= 0x8 /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
93 "00101000000000010000" // /* MW 1 */
.label _Z7max_manii
.function max_man _Z7max_manii
.src_ref 1 "main.c" 42 4
.src_ref 1 "main.c" 42 4 first
.src_ref 1 "main.c" 42 19 first
.function_start
94 "01010111010011010110" // ra0 = max(ra1,rb0); ret /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
95 "00111010000101000000" // /* MW 1 */
.dir 0 "%PROCDIR%"
.dir 1 "C:/Users/phangl/00_Repos/06_DSP_Simulation/testcode"