// BLOCK LEN 1 und MAX_FIR_COEFFS 64 werden vom Compiler mitgegeben #include #include // Register und Bitmasken für Interrupts zwischen ARM und LPDSP Prozessor #define CSS_CMD 0xC00004 #define CSS_CMD_0 (1<<0) #define CSS_CMD_1 (1<<1) // Shared Memory von ARM und DSP definieren #define INPUT_PORT0_ADD 0x800000 // Feste Adressen für Eingangsdaten im Shared Memory #define OUTPUT_PORT_ADD (INPUT_PORT0_ADD + 16) // Feste Adressen für Ausgangsdatensdaten im Shared Memory, 16 Byte von Eingangsadresse Weg //Chess Compiler spezifisch: Interrupt-Register festlegen um ARM zu kontaktieren nach fertiger Berechnung volatile static unsigned char chess_storage(DMIO:CSS_CMD) css_cmd_flag; static volatile int16_t chess_storage(DMB:INPUT_PORT0_ADD) input_port[4]; static volatile int16_t chess_storage(DMB:OUTPUT_PORT_ADD) output_port[4]; static volatile int16_t chess_storage(DMB) *pointer; //static int input_port[4]; //static int output_port[4]; //static int *pointer; int i = 0; int int1 = 5; int int2 = 10; int result_1; int result_2; int* cyclic_add_man(int *pointer, int increment, int *pointer_start, int buffer_length){ int *new_pointer=pointer; for (int i=0; i < abs(increment); i+=1){ new_pointer ++; if (new_pointer >= pointer_start + buffer_length){ new_pointer=pointer_start; } } return new_pointer; } int max_man(int a, int b){ return (a > b) ? a : b; } int main(void){ pointer = &output_port[0]; input_port[0] = 100; input_port[1] = 101; input_port[2] = 102; input_port[3] = 103; output_port[0] = 200; output_port[1] = 201; output_port[2] = 202; output_port[3] = 203; while(i < 10){ result_1 = max(int1,int2); result_2 = max_man(int1,int2); i=i+1; } } // while(i < 10){ // pointer = cyclic_add(pointer, 1, output_port, 4); // *pointer = i; // i=i+1; // }