// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Thu Jan 15 13:02:45 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32 /*** !! void calc(SingleSignalPath *, SingleSignalPath *, OutputMode, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *) F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ : user_defined, called { fnm : "calc" 'void calc(SingleSignalPath *, SingleSignalPath *, OutputMode, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)'; arg : ( dmaddr_:i dmaddr_:i dmaddr_:i int32_:i dmaddr_:i dmaddr_:i dmaddr_:i ); loc : ( LR[0] A[0] A[1] RA[0] A[4] A[5] __spill_WDMA[0] ); vac : ( srIM[0] ); frm : ( ); } **** !! void sig_cirular_buffer_ptr_put_sample_DMB(BufferPtrDMB chess_storage(DMB) *, int) F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi : user_defined, called { fnm : "sig_cirular_buffer_ptr_put_sample_DMB" 'void sig_cirular_buffer_ptr_put_sample_DMB(BufferPtrDMB chess_storage(DMB) *, int)'; arg : ( dmaddr_:i dmaddr_:i int32_:i ); loc : ( LR[0] A[4] RA[0] ); vac : ( srIM[0] ); llv : 0 0 0 0 0 ; } ***/ [ 0 : _Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ typ=uint20_ bnd=e stl=PM tref=void_____PSingleSignalPath___PSingleSignalPath_OutputMode___PDMB__sshort___PDMB__sshort___PDMB__sshort__ 8 : __M_SDMB typ=int16_ bnd=d stl=SDMB 11 : __M_WDMA typ=int32_ bnd=d stl=WDMA 12 : __M_WDMB typ=int32_ bnd=d stl=WDMB 14 : __M_LDMA typ=int64_ bnd=d stl=LDMA 26 : __R_SP typ=dmaddr_ bnd=d stl=SP 29 : __vola typ=uint20_ bnd=b stl=PM 32 : __extDM typ=int8_ bnd=b stl=DM 33 : __extPM typ=uint20_ bnd=b stl=PM 34 : __sp typ=dmaddr_ bnd=b stl=SP 35 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA 36 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA 37 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA 38 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA 39 : ptr_fir_lms_delay_line typ=int8_ bnd=e sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB 40 : __extDM_BufferPtrDMB typ=int8_ bnd=b stl=DM 41 : ptr_fir_lms_coeffs typ=int8_ bnd=e sz=12 algn=4 stl=DMA tref=BufferPtr_DMA 42 : __extDM_BufferPtr typ=int8_ bnd=b stl=DM 43 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB 44 : _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB 45 : _ZL2mu typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__sint_DMA 46 : __extDM_int32_ typ=int8_ bnd=b stl=DM 47 : __extDM_int16_ typ=int8_ bnd=b stl=DM 48 : __extDM_void typ=int8_ bnd=b stl=DM 49 : __extPM_void typ=uint20_ bnd=b stl=PM 50 : ptr_fir_lms_delay_line_ptr_current typ=int8_ bnd=b stl=DM 51 : __extDM___PDMint32_ typ=int8_ bnd=b stl=DM 52 : ptr_fir_lms_delay_line_ptr_start typ=int8_ bnd=b stl=DM 53 : ptr_fir_lms_coeffs_ptr_current typ=int8_ bnd=b stl=DM 54 : ptr_fir_lms_delay_line_buffer_len typ=int8_ bnd=b stl=DM 55 : ptr_fir_lms_coeffs_buffer_len typ=int8_ bnd=b stl=DM 56 : ptr_fir_lms_coeffs_ptr_start typ=int8_ bnd=b stl=DM 57 : __extDM_int64_ typ=int8_ bnd=b stl=DM 58 : __rd___sp typ=dmaddr_ bnd=m 60 : __ptr_cSensor_32 typ=dmaddr_ val=0a bnd=m adro=35 62 : __ptr_accSensor_32 typ=dmaddr_ val=0a bnd=m adro=36 64 : __ptr_c_block_pre typ=dmaddr_ val=0a bnd=m adro=37 66 : __ptr_acc_block_pre typ=dmaddr_ val=0a bnd=m adro=38 67 : __ptr_ptr_fir_lms_delay_line typ=dmaddr_ bnd=m 68 : __ptr_ptr_fir_lms_delay_line typ=dmaddr_ val=0a bnd=m adro=39 70 : __ptr_ptr_fir_lms_coeffs typ=dmaddr_ val=0a bnd=m adro=41 72 : __ptr_acc_block_filt typ=dmaddr_ val=0a bnd=m adro=43 74 : __ptr_out_32 typ=dmaddr_ val=0a bnd=m adro=44 76 : __ptr_mu typ=dmaddr_ val=0a bnd=m adro=45 77 : __ct_0 typ=uint1_ val=0f bnd=m 78 : __la typ=dmaddr_ bnd=p tref=dmaddr___ 79 : cSensorSignal typ=dmaddr_ bnd=p tref=__PSingleSignalPath__ 80 : accSensorSignal typ=dmaddr_ bnd=p tref=__PSingleSignalPath__ 81 : output_mode typ=int32_ bnd=p tref=OutputMode__ 82 : cSensor typ=dmaddr_ bnd=p tref=__PDMB__sshort__ 83 : accSensor typ=dmaddr_ bnd=p tref=__PDMB__sshort__ 84 : out_16 typ=dmaddr_ bnd=p tref=__PDMB__sshort__ 92 : __tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ typ=int32_ bnd=m tref=__sint__ 97 : __inl_p_x0 typ=dmaddr_ bnd=m tref=__PDMB__sint__ 99 : __inl_p_h typ=dmaddr_ bnd=m tref=__P__sint__ 102 : __inl_acc1_A typ=int72_ bnd=m tref=accum_t__ 103 : __inl_acc1_B typ=int72_ bnd=m tref=accum_t__ 111 : __inl_acc1_C typ=int72_ bnd=m tref=accum_t__ 118 : __inl_p_h0 typ=dmaddr_ bnd=m tref=__P__sint__ 119 : __inl_p_x0 typ=dmaddr_ bnd=m tref=__PDMB__sint__ 120 : __inl_p_x1 typ=dmaddr_ bnd=m tref=__PDMB__sint__ 124 : __inl_acc_C typ=int72_ bnd=m tref=accum_t__ 125 : __inl_prod typ=int32_ bnd=m tref=__sint__ 127 : __inl_h0 typ=int32_ bnd=m tref=__sint__ 128 : __inl_h1 typ=int32_ bnd=m tref=__sint__ 129 : __inl_acc_A typ=int72_ bnd=m tref=accum_t__ 130 : __inl_acc_B typ=int72_ bnd=m tref=accum_t__ 137 : __ct_2 typ=int32_ val=2f bnd=m 141 : __fch___extDM_int16_ typ=int16_ bnd=m 143 : __ct_16 typ=int32_ val=16f bnd=m 145 : __tmp typ=int32_ bnd=m 156 : __fch___extDM_int16_ typ=int16_ bnd=m 160 : __tmp typ=int32_ bnd=m 202 : __ct_0 typ=int32_ val=0f bnd=m 205 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre typ=int32_ bnd=m 206 : _Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi typ=dmaddr_ val=0r bnd=m 208 : __link typ=dmaddr_ bnd=m 212 : __fch_ptr_fir_lms_delay_line_ptr_current typ=dmaddr_ bnd=m 216 : __fch_ptr_fir_lms_delay_line_ptr_start typ=dmaddr_ bnd=m 220 : __fch_ptr_fir_lms_coeffs_ptr_current typ=dmaddr_ bnd=m 224 : __fch_ptr_fir_lms_delay_line_buffer_len typ=int32_ bnd=m 228 : __fch_ptr_fir_lms_coeffs_buffer_len typ=int32_ bnd=m 237 : __fchtmp typ=int32_ bnd=m 238 : __fchtmp typ=int32_ bnd=m 248 : __fchtmp typ=int32_ bnd=m 249 : __fchtmp typ=int32_ bnd=m 259 : __tmp typ=int72_ bnd=m 261 : __tmp typ=int72_ bnd=m 263 : __tmp typ=int32_ bnd=m 265 : __tmp typ=int32_ bnd=m 279 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre typ=int32_ bnd=m 284 : __tmp typ=int32_ bnd=m 295 : __fch_ptr_fir_lms_coeffs_ptr_start typ=dmaddr_ bnd=m 332 : __fch__ZL2mu typ=int32_ bnd=m 337 : __fchtmp typ=int64_ bnd=m 343 : __fchtmp typ=int32_ bnd=m 344 : __tmp typ=int72_ bnd=m 346 : __fchtmp typ=int32_ bnd=m 347 : __tmp typ=int72_ bnd=m 361 : __tmp typ=int32_ bnd=m 362 : __tmp typ=int32_ bnd=m 363 : __tmp typ=int64_ bnd=m 382 : __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32 typ=int32_ bnd=m 386 : __tmp typ=int72_ bnd=m 387 : __tmp typ=int32_ bnd=m 388 : __tmp typ=int16_ bnd=m 428 : __ct_m4 typ=int18_ val=-4f bnd=m 429 : __ct_m8 typ=int18_ val=-8f bnd=m 453 : __vcnt typ=int32_ bnd=m 454 : __ct_m1 typ=int32_ val=-1f bnd=m 455 : __ct_1 typ=int32_ val=1f bnd=m 456 : __cv typ=uint16_ bnd=m 482 : __ptr_ptr_fir_lms_coeffs__a8 typ=dmaddr_ val=8a bnd=m adro=41 485 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__ 513 : __ct_0S0 typ=int18_ val=0S0 bnd=m 514 : __ct_0s0 typ=int18_ val=0s0 bnd=m 515 : __ct_4 typ=int18_ val=4f bnd=m 516 : __ct_8 typ=int18_ val=8f bnd=m 520 : __ct_2 typ=uint2_ val=2f bnd=m 527 : __ct_1 typ=uint2_ val=1f bnd=m 532 : __tmp typ=int72_ bnd=m 537 : __tmp typ=int18_ bnd=m 540 : __inl_acc1_A typ=int32_ bnd=m 541 : __inl_acc1_B typ=int32_ bnd=m 547 : __trgt typ=uint16_ val=0j bnd=m 548 : __vcnt typ=uint16_ bnd=m 549 : __trgt typ=uint16_ val=0j bnd=m 550 : __vcnt typ=uint16_ bnd=m ] F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_ { #602 off=0 (__M_SDMB.6 var=8) st_def () <12>; (__M_WDMA.9 var=11) st_def () <18>; (__M_WDMB.10 var=12) st_def () <20>; (__M_LDMA.12 var=14) st_def () <24>; (__R_SP.24 var=26) st_def () <48>; (__vola.27 var=29) source () <51>; (__extDM.30 var=32) source () <54>; (__extPM.31 var=33) source () <55>; (__sp.32 var=34) source () <56>; (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.33 var=35) source () <57>; (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.34 var=36) source () <58>; (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.35 var=37) source () <59>; (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.36 var=38) source () <60>; (ptr_fir_lms_delay_line.37 var=39) source () <61>; (__extDM_BufferPtrDMB.38 var=40) source () <62>; (ptr_fir_lms_coeffs.39 var=41) source () <63>; (__extDM_BufferPtr.40 var=42) source () <64>; (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.41 var=43) source () <65>; (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.42 var=44) source () <66>; (_ZL2mu.43 var=45) source () <67>; (__extDM_int32_.44 var=46) source () <68>; (__extDM_int16_.45 var=47) source () <69>; (__extDM_void.46 var=48) source () <70>; (__extPM_void.47 var=49) source () <71>; (ptr_fir_lms_delay_line_ptr_current.48 var=50) source () <72>; (__extDM___PDMint32_.49 var=51) source () <73>; (ptr_fir_lms_delay_line_ptr_start.50 var=52) source () <74>; (ptr_fir_lms_coeffs_ptr_current.51 var=53) source () <75>; (ptr_fir_lms_delay_line_buffer_len.52 var=54) source () <76>; (ptr_fir_lms_coeffs_buffer_len.53 var=55) source () <77>; (ptr_fir_lms_coeffs_ptr_start.54 var=56) source () <78>; (__extDM_int64_.55 var=57) source () <79>; (__ptr_cSensor_32.57 var=60) const () <81>; (__ptr_accSensor_32.59 var=62) const () <83>; (__ptr_c_block_pre.61 var=64) const () <85>; (__ptr_acc_block_pre.63 var=66) const () <87>; (__ptr_ptr_fir_lms_delay_line.65 var=68) const () <89>; (__ct_0.75 var=77) const () <99>; (__la.77 var=78 stl=LR off=0) inp () <101>; (__la.78 var=78) deassign (__la.77) <102>; (cSensorSignal.80 var=79 stl=A off=0) inp () <104>; (accSensorSignal.83 var=80 stl=A off=1) inp () <107>; (output_mode.86 var=81 stl=RA off=0) inp () <110>; (cSensor.89 var=82 stl=A off=4) inp () <113>; (cSensor.90 var=82) deassign (cSensor.89) <114>; (accSensor.92 var=83 stl=A off=5) inp () <116>; (accSensor.93 var=83) deassign (accSensor.92) <117>; (out_16.95 var=84 stl=__spill_WDMA off=0) inp () <119>; (out_16.96 var=84) deassign (out_16.95) <120>; (__rd___sp.98 var=58) rd_res_reg (__R_SP.24 __sp.32) <122>; (__R_SP.102 var=26 __sp.103 var=34) wr_res_reg (__rt.2223 __sp.32) <126>; (__fch___extDM_int16_.246 var=141 __extDM_int16_.247 var=47 __vola.248 var=29) load (__M_SDMB.6 cSensor.90 __extDM_int16_.45 __vola.27) <270>; (__ct_16.250 var=143) const () <272>; (__M_WDMA.258 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.259 var=35) store (__tmp.2419 __ptr_cSensor_32.57 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.33) <280>; (__fch___extDM_int16_.265 var=156 __extDM_int16_.266 var=47 __vola.267 var=29) load (__M_SDMB.6 accSensor.93 __extDM_int16_.247 __vola.248) <286>; (__M_WDMA.277 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.278 var=36) store (__tmp.2424 __ptr_accSensor_32.59 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.34) <296>; (__M_WDMA.563 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.564 var=37) store (__tmp.2419 __ptr_c_block_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.35) <494>; (__M_WDMA.576 var=11 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.577 var=38) store (__tmp.2424 __ptr_acc_block_pre.63 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.36) <506>; (_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi.766 var=206) const () <608>; (__link.768 var=208) dmaddr__call_dmaddr_ (_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi.766) <610>; (__rt.2223 var=485) __Pvoid__pl___Pvoid_int18_ (__rd___sp.98 __ct_0S0.2412) <1909>; (__ct_0S0.2412 var=513) const () <2176>; (__ct_2.2418 var=520) const () <2187>; (__tmp.2419 var=145) int72__shift_int72__int72__uint2_ (__fch___extDM_int16_.246 __ct_16.250 __ct_2.2418) <2188>; (__tmp.2424 var=160) int72__shift_int72__int72__uint2_ (__fch___extDM_int16_.265 __ct_16.250 __ct_2.2418) <2196>; call { (__ptr_ptr_fir_lms_delay_line.760 var=67 stl=A off=4) assign (__ptr_ptr_fir_lms_delay_line.65) <602>; (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.765 var=205 stl=RA off=0) assign (__tmp.2424) <607>; (__link.769 var=208 stl=LR off=0) assign (__link.768) <611>; (_ZL2mu.770 var=45 __extDM.771 var=32 __extDM_BufferPtr.772 var=42 __extDM_BufferPtrDMB.773 var=40 __extDM___PDMint32_.774 var=51 __extDM_int16_.775 var=47 __extDM_int32_.776 var=46 __extDM_int64_.777 var=57 __extDM_void.778 var=48 __extPM.779 var=33 __extPM_void.780 var=49 ptr_fir_lms_coeffs.781 var=41 ptr_fir_lms_coeffs_buffer_len.782 var=55 ptr_fir_lms_coeffs_ptr_current.783 var=53 ptr_fir_lms_coeffs_ptr_start.784 var=56 ptr_fir_lms_delay_line.785 var=39 ptr_fir_lms_delay_line_buffer_len.786 var=54 ptr_fir_lms_delay_line_ptr_current.787 var=50 ptr_fir_lms_delay_line_ptr_start.788 var=52 __vola.789 var=29) F_Z37sig_cirular_buffer_ptr_put_sample_DMBPU17chess_storage_DMB12BufferPtrDMBi (__link.769 __ptr_ptr_fir_lms_delay_line.760 __fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.765 _ZL2mu.43 __extDM.30 __extDM_BufferPtr.40 __extDM_BufferPtrDMB.38 __extDM___PDMint32_.49 __extDM_int16_.266 __extDM_int32_.44 __extDM_int64_.55 __extDM_void.46 __extPM.31 __extPM_void.47 ptr_fir_lms_coeffs.39 ptr_fir_lms_coeffs_buffer_len.53 ptr_fir_lms_coeffs_ptr_current.51 ptr_fir_lms_coeffs_ptr_start.54 ptr_fir_lms_delay_line.37 ptr_fir_lms_delay_line_buffer_len.52 ptr_fir_lms_delay_line_ptr_current.48 ptr_fir_lms_delay_line_ptr_start.50 __vola.267) <612>; } #14 off=1 #624 off=2 (__ptr_ptr_fir_lms_coeffs.67 var=70) const () <91>; (__ct_2.242 var=137) const () <266>; (__ct_0.761 var=202) const () <603>; (__fch_ptr_fir_lms_delay_line_ptr_current.799 var=212) load (__M_WDMB.10 __rt.2333 ptr_fir_lms_delay_line_ptr_current.787) <622>; (__fch_ptr_fir_lms_delay_line_ptr_start.804 var=216) load (__M_WDMB.10 __rt.2355 ptr_fir_lms_delay_line_ptr_start.788) <627>; (__fch_ptr_fir_lms_coeffs_ptr_current.809 var=220) load (__M_WDMA.9 __ptr_ptr_fir_lms_coeffs__a8.2209 ptr_fir_lms_coeffs_ptr_current.783) <632>; (__fch_ptr_fir_lms_delay_line_buffer_len.814 var=224) load (__M_WDMB.10 __rt.2377 ptr_fir_lms_delay_line_buffer_len.786) <637>; (__fch_ptr_fir_lms_coeffs_buffer_len.819 var=228) load (__M_WDMA.9 __ptr_ptr_fir_lms_coeffs.67 ptr_fir_lms_coeffs_buffer_len.782) <642>; (__ct_m4.2080 var=428) const () <1742>; (__ct_m1.2141 var=454) const () <1794>; (__vcnt.2142 var=453) __sint__pl___sint___sint (__fch_ptr_fir_lms_coeffs_buffer_len.819 __ct_m1.2141) <1796>; (__ct_1.2144 var=455) const () <1798>; (__vcnt.2145 var=453) __sint__pl___sint___sint (__vcnt.2440 __ct_1.2144) <1800>; (__cv.2146 var=456) uint16__uint16____sint (__vcnt.2145) <1801>; (__ptr_ptr_fir_lms_coeffs__a8.2209 var=482) const () <1865>; (__rt.2333 var=485) __Pvoid__pl___Pvoid_int18_ (__ptr_ptr_fir_lms_delay_line.65 __ct_8.2415) <2049>; (__rt.2355 var=485) __Pvoid__mi___Pvoid_int18_ (__rt.2333 __ct_4.2414) <2077>; (__rt.2377 var=485) __Pvoid__mi___Pvoid_int18_ (__rt.2355 __ct_4.2414) <2105>; (__rt.2399 var=485) __Pvoid__pl___Pvoid_int18_ (__ptr_ptr_fir_lms_coeffs.67 __ct_4.2414) <2133>; (__ct_4.2414 var=515) const () <2180>; (__ct_8.2415 var=516) const () <2182>; (__tmp.2429 var=537) int72__shift_int72__int72__uint2_ (__fch_ptr_fir_lms_delay_line_buffer_len.814 __ct_2.242 __ct_2.2418) <2204>; (__ct_1.2433 var=527) const () <2211>; (__tmp.2439 var=532) int72__shift_int72__int72__uint2_ (__vcnt.2142 __ct_1.2144 __ct_1.2433) <2220>; (__vcnt.2440 var=453) int32__extract_high_int72_ (__tmp.2439) <2221>; (__trgt.2448 var=547) const () <2312>; () void_doloop_uint16__uint16_ (__cv.2146 __trgt.2448) <2313>; (__vcnt.2449 var=548) undefined () <2314>; for { { (__inl_p_x0.883 var=97) entry (__inl_p_x0.1052 __fch_ptr_fir_lms_delay_line_ptr_current.799) <706>; (__inl_p_h.885 var=99) entry (__inl_p_h.1056 __fch_ptr_fir_lms_coeffs_ptr_current.809) <708>; (__inl_acc1_A.888 var=540) entry (__inl_acc1_A.1062 __ct_0.761) <711>; (__inl_acc1_B.889 var=541) entry (__inl_acc1_B.1064 __ct_0.761) <712>; } #17 { (__fchtmp.924 var=237) load (__M_WDMB.10 __inl_p_x0.883 _ZL2mu.770 __extDM_int32_.776 ptr_fir_lms_coeffs_buffer_len.782 ptr_fir_lms_delay_line_buffer_len.786) <747>; (__fchtmp.925 var=238) load (__M_WDMA.9 __inl_p_h.885 _ZL2mu.770 __extDM_int32_.776 ptr_fir_lms_coeffs_buffer_len.782 ptr_fir_lms_delay_line_buffer_len.786) <748>; (__fchtmp.935 var=248) load (__M_WDMB.10 __inl_p_x0.2019 _ZL2mu.770 __extDM_int32_.776 ptr_fir_lms_coeffs_buffer_len.782 ptr_fir_lms_delay_line_buffer_len.786) <758>; (__fchtmp.936 var=249) load (__M_WDMA.9 __rt.2267 _ZL2mu.770 __extDM_int32_.776 ptr_fir_lms_coeffs_buffer_len.782 ptr_fir_lms_delay_line_buffer_len.786) <759>; (__inl_acc1_A.947 var=102) accum_t__pl_accum_t_accum_t (__inl_acc1_A.888 __tmp.2032) <770>; (__inl_acc1_B.949 var=103) accum_t__pl_accum_t_accum_t (__inl_acc1_B.889 __tmp.2037) <772>; (__tmp.950 var=263) __sint_rnd_saturate_accum_t (__inl_acc1_A.947) <773>; (__tmp.952 var=265) __sint_rnd_saturate_accum_t (__inl_acc1_B.949) <775>; (__inl_p_x0.2019 var=97) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x0.883 __ct_m4.2080 __fch_ptr_fir_lms_delay_line_ptr_start.804 __tmp.2429) <1628>; (__inl_p_x0.2027 var=97) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x0.2019 __ct_m4.2080 __fch_ptr_fir_lms_delay_line_ptr_start.804 __tmp.2429) <1639>; (__tmp.2032 var=259) int72__multss_int32__int32__uint1_ (__fchtmp.924 __fchtmp.925 __ct_0.75) <1647>; (__tmp.2037 var=261) int72__multss_int32__int32__uint1_ (__fchtmp.935 __fchtmp.936 __ct_0.75) <1655>; (__rt.2267 var=485) __Pvoid__pl___Pvoid_int18_ (__inl_p_h.885 __ct_4.2414) <1965>; (__rt.2289 var=485) __Pvoid__pl___Pvoid_int18_ (__rt.2267 __ct_4.2414) <1993>; } #412 off=3 { () for_count (__vcnt.2449) <781>; (__inl_p_x0.1052 var=97 __inl_p_x0.1053 var=97) exit (__inl_p_x0.2027) <829>; (__inl_p_h.1056 var=99 __inl_p_h.1057 var=99) exit (__rt.2289) <831>; (__inl_acc1_A.1062 var=540 __inl_acc1_A.1063 var=540) exit (__tmp.950) <834>; (__inl_acc1_B.1064 var=541 __inl_acc1_B.1065 var=541) exit (__tmp.952) <835>; } #19 } #16 rng=[1,65535] #103 off=4 (__ptr_acc_block_filt.69 var=72) const () <93>; (__ptr_out_32.71 var=74) const () <95>; (__ptr_mu.73 var=76) const () <97>; (__inl_acc1_C.1134 var=111) accum_t__pl_accum_t_accum_t (__inl_acc1_A.1063 __inl_acc1_B.1065) <870>; (__tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1135 var=92) __sint_rnd_saturate_accum_t (__inl_acc1_C.1134) <871>; (__M_WDMB.1139 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.1140 var=43) store (__tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1135 __ptr_acc_block_filt.69 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.41) <875>; (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.1144 var=279) load (__M_WDMA.9 __ptr_c_block_pre.61 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.564) <879>; (__tmp.1149 var=284) __sint__mi___sint___sint (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.1144 __tmpb0_F_Z4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_.1135) <884>; (__M_WDMB.1153 var=12 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1154 var=44) store (__tmp.1149 __ptr_out_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.42) <888>; (__fch_ptr_fir_lms_coeffs_ptr_start.1170 var=295) load (__M_WDMA.9 __rt.2399 ptr_fir_lms_coeffs_ptr_start.784) <904>; (__fch__ZL2mu.1218 var=332) load (__M_WDMA.9 __ptr_mu.73 _ZL2mu.770) <952>; (__inl_prod.1220 var=125) __sint_rnd_saturate_accum_t (__inl_acc_C.2050) <954>; (__inl_p_x1.2045 var=120) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch_ptr_fir_lms_delay_line_ptr_current.799 __ct_m4.2080 __fch_ptr_fir_lms_delay_line_ptr_start.804 __tmp.2429) <1666>; (__inl_acc_C.2050 var=124) int72__multss_int32__int32__uint1_ (__fch__ZL2mu.1218 __tmp.1149 __ct_0.75) <1674>; (__ct_m8.2081 var=429) const () <1744>; (__trgt.2450 var=549) const () <2315>; () void_doloop_uint16__uint16_ (__cv.2146 __trgt.2450) <2316>; (__vcnt.2451 var=550) undefined () <2317>; for { { (_ZL2mu.1240 var=45) entry (_ZL2mu.1385 _ZL2mu.770) <974>; (__extDM_int32_.1241 var=46) entry (__extDM_int32_.1387 __extDM_int32_.776) <975>; (ptr_fir_lms_delay_line_buffer_len.1249 var=54) entry (ptr_fir_lms_delay_line_buffer_len.1403 ptr_fir_lms_delay_line_buffer_len.786) <983>; (ptr_fir_lms_coeffs_buffer_len.1250 var=55) entry (ptr_fir_lms_coeffs_buffer_len.1405 ptr_fir_lms_coeffs_buffer_len.782) <984>; (__extDM_int64_.1252 var=57) entry (__extDM_int64_.1409 __extDM_int64_.777) <986>; (__inl_p_h0.1294 var=118) entry (__inl_p_h0.1493 __fch_ptr_fir_lms_coeffs_ptr_start.1170) <1028>; (__inl_p_x0.1295 var=119) entry (__inl_p_x0.1495 __fch_ptr_fir_lms_delay_line_ptr_current.799) <1029>; (__inl_p_x1.1296 var=120) entry (__inl_p_x1.1497 __inl_p_x1.2045) <1030>; } #22 { (__fchtmp.1312 var=337) load (__M_LDMA.12 __inl_p_h0.1294 _ZL2mu.1240 __extDM_int32_.1241 __extDM_int64_.1252 ptr_fir_lms_coeffs_buffer_len.1250 ptr_fir_lms_delay_line_buffer_len.1249) <1046>; (__inl_h0.1314 var=127 __inl_h1.1315 var=128) void_lldecompose___ulonglong___sint___sint (__fchtmp.1312) <1048>; (__fchtmp.1318 var=343) load (__M_WDMB.10 __inl_p_x0.1295 _ZL2mu.1240 __extDM_int32_.1241 ptr_fir_lms_coeffs_buffer_len.1250 ptr_fir_lms_delay_line_buffer_len.1249) <1051>; (__inl_acc_A.1320 var=129) accum_t__pl_accum_t_accum_t (__inl_h0.1314 __tmp.2055) <1053>; (__fchtmp.1321 var=346) load (__M_WDMB.10 __inl_p_x1.1296 _ZL2mu.1240 __extDM_int32_.1241 ptr_fir_lms_coeffs_buffer_len.1250 ptr_fir_lms_delay_line_buffer_len.1249) <1054>; (__inl_acc_B.1323 var=130) accum_t__pl_accum_t_accum_t (__inl_h1.1315 __tmp.2060) <1056>; (__tmp.1336 var=361) __sint_rnd_saturate_accum_t (__inl_acc_A.1320) <1069>; (__tmp.1337 var=362) __sint_rnd_saturate_accum_t (__inl_acc_B.1323) <1070>; (__tmp.1338 var=363) __ulonglong_llcompose___sint___sint (__tmp.1336 __tmp.1337) <1071>; (__M_LDMA.1340 var=14 _ZL2mu.1341 var=45 __extDM_int32_.1342 var=46 __extDM_int64_.1343 var=57 ptr_fir_lms_coeffs_buffer_len.1344 var=55 ptr_fir_lms_delay_line_buffer_len.1345 var=54) store (__tmp.1338 __inl_p_h0.1294 _ZL2mu.1240 __extDM_int32_.1241 __extDM_int64_.1252 ptr_fir_lms_coeffs_buffer_len.1250 ptr_fir_lms_delay_line_buffer_len.1249) <1073>; (__tmp.2055 var=344) int72__multss_int32__int32__uint1_ (__inl_prod.1220 __fchtmp.1318 __ct_0.75) <1682>; (__tmp.2060 var=347) int72__multss_int32__int32__uint1_ (__inl_prod.1220 __fchtmp.1321 __ct_0.75) <1690>; (__inl_p_x0.2068 var=119) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x0.1295 __ct_m8.2081 __fch_ptr_fir_lms_delay_line_ptr_start.804 __tmp.2429) <1701>; (__inl_p_x1.2076 var=120) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x1.1296 __ct_m8.2081 __fch_ptr_fir_lms_delay_line_ptr_start.804 __tmp.2429) <1712>; (__rt.2311 var=485) __Pvoid__pl___Pvoid_int18_ (__inl_p_h0.1294 __ct_8.2415) <2021>; } #482 off=5 { () for_count (__vcnt.2451) <1081>; (_ZL2mu.1385 var=45 _ZL2mu.1386 var=45) exit (_ZL2mu.1341) <1098>; (__extDM_int32_.1387 var=46 __extDM_int32_.1388 var=46) exit (__extDM_int32_.1342) <1099>; (ptr_fir_lms_delay_line_buffer_len.1403 var=54 ptr_fir_lms_delay_line_buffer_len.1404 var=54) exit (ptr_fir_lms_delay_line_buffer_len.1345) <1107>; (ptr_fir_lms_coeffs_buffer_len.1405 var=55 ptr_fir_lms_coeffs_buffer_len.1406 var=55) exit (ptr_fir_lms_coeffs_buffer_len.1344) <1108>; (__extDM_int64_.1409 var=57 __extDM_int64_.1410 var=57) exit (__extDM_int64_.1343) <1110>; (__inl_p_h0.1493 var=118 __inl_p_h0.1494 var=118) exit (__rt.2311) <1152>; (__inl_p_x0.1495 var=119 __inl_p_x0.1496 var=119) exit (__inl_p_x0.2068) <1153>; (__inl_p_x1.1497 var=120 __inl_p_x1.1498 var=120) exit (__inl_p_x1.2076) <1154>; } #24 } #21 rng=[1,65535] #36 off=6 nxt=-2 (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1716 var=382) load (__M_WDMB.10 __ptr_out_32.71 _ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1154) <1359>; (__tmp.1721 var=387) __sint_rnd_saturate_accum_t (__tmp.2434) <1364>; (__tmp.1722 var=388) __sshort___sshort___sint (__tmp.1721) <1365>; (__M_SDMB.1728 var=8 __extDM_int16_.1729 var=47 __vola.1730 var=29) store (__tmp.1722 out_16.96 __extDM_int16_.775 __vola.789) <1371>; (__rd___sp.1917 var=58) rd_res_reg (__R_SP.24 __sp.103) <1471>; (__R_SP.1921 var=26 __sp.1922 var=34) wr_res_reg (__rt.2245 __sp.103) <1475>; () void_ret_dmaddr_ (__la.78) <1476>; () sink (__vola.1730) <1477>; () sink (__extDM.771) <1480>; () sink (__extPM.779) <1481>; () sink (__sp.1922) <1482>; () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E10cSensor_32.259) <1483>; () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E12accSensor_32.278) <1484>; () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E11c_block_pre.564) <1485>; () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E13acc_block_pre.577) <1486>; () sink (ptr_fir_lms_delay_line.785) <1487>; () sink (__extDM_BufferPtrDMB.773) <1488>; () sink (ptr_fir_lms_coeffs.781) <1489>; () sink (__extDM_BufferPtr.772) <1490>; () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E14acc_block_filt.1140) <1491>; () sink (_ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1154) <1492>; () sink (_ZL2mu.1386) <1493>; () sink (__extDM_int32_.1388) <1494>; () sink (__extDM_int16_.1729) <1495>; () sink (__extDM_void.778) <1496>; () sink (__extPM_void.780) <1497>; () sink (ptr_fir_lms_delay_line_ptr_current.787) <1498>; () sink (__extDM___PDMint32_.774) <1499>; () sink (ptr_fir_lms_delay_line_ptr_start.788) <1500>; () sink (ptr_fir_lms_coeffs_ptr_current.783) <1501>; () sink (ptr_fir_lms_delay_line_buffer_len.1404) <1502>; () sink (ptr_fir_lms_coeffs_buffer_len.1406) <1503>; () sink (ptr_fir_lms_coeffs_ptr_start.784) <1504>; () sink (__extDM_int64_.1410) <1505>; () sink (__ct_0.75) <1506>; (__rt.2245 var=485) __Pvoid__pl___Pvoid_int18_ (__rd___sp.1917 __ct_0s0.2413) <1937>; (__ct_0s0.2413 var=514) const () <2178>; (__tmp.2434 var=386) int72__shift_int72__int72__uint2_ (__fch__ZZ4calcP16SingleSignalPathS0_10OutputModePU17chess_storage_DMBVsS3_S3_E6out_32.1716 __ct_16.250 __ct_1.2433) <2212>; } #0 0 : 'signal_processing\\signal_path.c'; ---------- 0 : (0,348:0,0); 14 : (0,383:4,26); 16 : (0,385:23,43); 21 : (0,389:4,87); 36 : (0,397:0,115); 103 : (0,389:4,85); 412 : (0,385:23,61); 482 : (0,389:4,0); 602 : (0,383:4,26); 624 : (0,385:23,43); ---------- 85 : (0,387:16,0); 87 : (0,383:67,0); 89 : (0,385:23,0); 91 : (0,385:23,0); 93 : (0,385:4,0); 95 : (0,387:4,0); 122 : (0,348:5,0); 126 : (0,348:5,0); 266 : (0,371:39,0); 270 : (0,371:39,11); 272 : (0,371:47,0); 280 : (0,371:18,11); 286 : (0,372:42,12); 296 : (0,372:20,12); 494 : (0,377:20,19); 506 : (0,378:22,20); 602 : (0,383:42,0); 603 : (0,383:81,0); 607 : (0,383:80,0); 610 : (0,383:4,26); 611 : (0,383:4,0); 612 : (0,383:4,26); 622 : (0,385:23,33); 627 : (0,385:23,34); 632 : (0,385:23,35); 637 : (0,385:23,36); 642 : (0,385:23,37); 706 : (0,385:23,43); 708 : (0,385:23,43); 711 : (0,385:23,43); 712 : (0,385:23,43); 747 : (0,385:23,43); 748 : (0,385:23,44); 758 : (0,385:23,49); 759 : (0,385:23,50); 770 : (0,385:23,55); 772 : (0,385:23,56); 773 : (0,385:23,57); 775 : (0,385:23,58); 781 : (0,385:23,61); 829 : (0,385:23,61); 831 : (0,385:23,61); 834 : (0,385:23,61); 835 : (0,385:23,61); 870 : (0,385:23,62); 871 : (0,385:23,63); 875 : (0,385:18,66); 879 : (0,387:27,67); 884 : (0,387:31,67); 888 : (0,387:10,67); 904 : (0,389:4,75); 952 : (0,389:4,84); 954 : (0,389:4,85); 974 : (0,389:4,87); 975 : (0,389:4,87); 983 : (0,389:4,87); 984 : (0,389:4,87); 986 : (0,389:4,87); 1028 : (0,389:4,87); 1029 : (0,389:4,87); 1030 : (0,389:4,87); 1046 : (0,389:4,87); 1048 : (0,389:4,87); 1051 : (0,389:4,90); 1053 : (0,389:4,90); 1054 : (0,389:4,91); 1056 : (0,389:4,91); 1069 : (0,389:4,94); 1070 : (0,389:4,94); 1071 : (0,389:4,94); 1073 : (0,389:4,94); 1081 : (0,389:4,98); 1098 : (0,389:4,98); 1099 : (0,389:4,98); 1107 : (0,389:4,98); 1108 : (0,389:4,98); 1110 : (0,389:4,98); 1152 : (0,389:4,98); 1153 : (0,389:4,98); 1154 : (0,389:4,98); 1359 : (0,394:48,105); 1364 : (0,394:20,105); 1365 : (0,394:18,105); 1371 : (0,394:14,105); 1471 : (0,397:0,0); 1475 : (0,397:0,115); 1476 : (0,397:0,115); 1628 : (0,385:23,48); 1639 : (0,385:23,54); 1647 : (0,385:23,55); 1655 : (0,385:23,56); 1666 : (0,389:4,78); 1674 : (0,389:4,84); 1682 : (0,389:4,90); 1690 : (0,389:4,91); 1701 : (0,389:4,92); 1712 : (0,389:4,93); 1742 : (0,385:23,0); 1744 : (0,389:4,0); 1865 : (0,385:23,0); 1909 : (0,348:5,0); 1937 : (0,397:0,0); 1965 : (0,385:23,0); 1993 : (0,385:23,0); 2021 : (0,389:4,0); 2049 : (0,385:23,0); 2077 : (0,385:23,0); 2105 : (0,385:23,0); 2133 : (0,389:4,0); 2176 : (0,348:5,0); 2178 : (0,397:0,0); 2180 : (0,385:23,0); 2182 : (0,389:4,0); 2187 : (0,371:44,0); 2188 : (0,371:44,11); 2196 : (0,372:47,12); 2204 : (0,385:23,48); 2211 : (0,394:53,0); 2212 : (0,394:53,105); 2313 : (0,385:23,61); 2316 : (0,389:4,98);