// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Thu Jan 15 11:30:40 2026 // Copyright 2014-2025 Synopsys, Inc. All rights reserved. // C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32 /*** !! int main() F_main : user_defined, called { fnm : "main" 'int main()'; arg : ( dmaddr_:i int32_:r ); loc : ( LR[0] RA[0] ); vac : ( srIM[0] ); frm : ( ); } **** ***/ [ 0 : _main typ=uint20_ bnd=e stl=PM tref=__sint____ 8 : __M_SDMB typ=int16_ bnd=d stl=SDMB 11 : __M_WDMA typ=int32_ bnd=d stl=WDMA 26 : __R_SP typ=dmaddr_ bnd=d stl=SP 29 : __vola typ=uint20_ bnd=b stl=PM 34 : __sp typ=dmaddr_ bnd=b stl=SP 35 : _ZL6sample typ=int8_ bnd=i sz=2 algn=2 stl=DMB tref=int16_t_DMB 37 : _ZL10input_port typ=int8_ val=8388608f bnd=i sz=8 algn=2 stl=DMB tref=__A4DMB__sshort_DMB 38 : _ZL7pointer typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__PDMB__sshort_DMA 40 : _ZL11output_port typ=int8_ val=8388624f bnd=i sz=8 algn=2 stl=DMB tref=__A4DMB__sshort_DMB 41 : __rd___sp typ=dmaddr_ bnd=m 43 : __ptr_sample typ=dmaddr_ val=0a bnd=m adro=35 45 : __ct_8388608 typ=dmaddr_ val=8388608f bnd=m 47 : __ptr_pointer typ=dmaddr_ val=0a bnd=m adro=38 49 : __ct_8388624 typ=dmaddr_ val=8388624f bnd=m 50 : __ct_0 typ=uint1_ val=0f bnd=m 51 : __la typ=dmaddr_ bnd=p tref=dmaddr___ 52 : __rt typ=int32_ bnd=p tref=__sint__ 56 : __ct_123 typ=int8_ val=123f bnd=m 58 : __ct_100 typ=int8_ val=100f bnd=m 60 : __ct_0 typ=int32_ val=0f bnd=m 63 : __ct_101 typ=int8_ val=101f bnd=m 68 : __ct_102 typ=int8_ val=102f bnd=m 73 : __ct_103 typ=int8_ val=103f bnd=m 81 : __ct_200 typ=uint8_ val=200f bnd=m 86 : __ct_201 typ=uint8_ val=201f bnd=m 91 : __ct_202 typ=uint8_ val=202f bnd=m 96 : __ct_203 typ=uint8_ val=203f bnd=m 118 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__ 146 : __ct_0S0 typ=int18_ val=0S0 bnd=m 147 : __ct_0s0 typ=int18_ val=0s0 bnd=m 148 : __ct_2 typ=int18_ val=2f bnd=m 150 : __ct_6 typ=int18_ val=6f bnd=m ] F_main { (__R_SP.24 var=26) st_def () <48>; (__vola.27 var=29) source () <51>; (__sp.32 var=34) source () <56>; (_ZL6sample.33 var=35) source () <57>; (_ZL10input_port.35 var=37) source () <59>; (_ZL7pointer.36 var=38) source () <60>; (_ZL11output_port.38 var=40) source () <62>; (__ptr_sample.40 var=43) const () <64>; (__ct_8388608.42 var=45) const () <66>; (__ptr_pointer.45 var=47) const () <69>; (__ct_8388624.47 var=49) const () <71>; (__ct_0.50 var=50) const () <74>; (__la.52 var=51 stl=LR off=0) inp () <76>; (__la.53 var=51) deassign (__la.52) <77>; (__rd___sp.56 var=41) rd_res_reg (__R_SP.24 __sp.32) <80>; (__R_SP.60 var=26 __sp.61 var=34) wr_res_reg (__rt.189 __sp.32) <84>; (__ct_123.62 var=56) const () <86>; (__M_SDMB.64 var=8 _ZL6sample.65 var=35 __vola.66 var=29) store (__ct_123.62 __ptr_sample.40 _ZL6sample.33 __vola.27) <88>; (__ct_100.67 var=58) const () <89>; (__ct_0.69 var=60) const () <91>; (__M_SDMB.72 var=8 _ZL10input_port.73 var=37 __vola.74 var=29) store (__ct_100.67 __ct_8388608.42 _ZL10input_port.35 __vola.66) <94>; (__ct_101.75 var=63) const () <95>; (__M_SDMB.80 var=8 _ZL10input_port.81 var=37 __vola.82 var=29) store (__ct_101.75 __rt.233 _ZL10input_port.73 __vola.74) <100>; (__ct_102.83 var=68) const () <101>; (__M_SDMB.88 var=8 _ZL10input_port.89 var=37 __vola.90 var=29) store (__ct_102.83 __rt.255 _ZL10input_port.81 __vola.82) <106>; (__ct_103.91 var=73) const () <107>; (__M_SDMB.96 var=8 _ZL10input_port.97 var=37 __vola.98 var=29) store (__ct_103.91 __rt.277 _ZL10input_port.89 __vola.90) <112>; (__M_WDMA.102 var=11 _ZL7pointer.103 var=38) store (__rt.299 __ptr_pointer.45 _ZL7pointer.36) <116>; (__ct_200.104 var=81) const () <117>; (__M_SDMB.109 var=8 _ZL11output_port.110 var=40 __vola.111 var=29) store (__ct_200.104 __ct_8388624.47 _ZL11output_port.38 __vola.98) <122>; (__ct_201.112 var=86) const () <123>; (__M_SDMB.117 var=8 _ZL11output_port.118 var=40 __vola.119 var=29) store (__ct_201.112 __rt.321 _ZL11output_port.110 __vola.111) <128>; (__ct_202.120 var=91) const () <129>; (__M_SDMB.125 var=8 _ZL11output_port.126 var=40 __vola.127 var=29) store (__ct_202.120 __rt.343 _ZL11output_port.118 __vola.119) <134>; (__ct_203.128 var=96) const () <135>; (__M_SDMB.133 var=8 _ZL11output_port.134 var=40 __vola.135 var=29) store (__ct_203.128 __rt.365 _ZL11output_port.126 __vola.127) <140>; (__rd___sp.138 var=41) rd_res_reg (__R_SP.24 __sp.61) <143>; (__R_SP.142 var=26 __sp.143 var=34) wr_res_reg (__rt.211 __sp.61) <147>; () void_ret_dmaddr_ (__la.53) <148>; (__rt.144 var=52 stl=RA off=0) assign (__ct_0.69) <149>; () out (__rt.144) <150>; () sink (__vola.135) <151>; () sink (__sp.143) <156>; () sink (_ZL6sample.65) <157>; () sink (_ZL10input_port.97) <159>; () sink (_ZL7pointer.103) <160>; () sink (_ZL11output_port.134) <162>; () sink (__ct_0.50) <163>; (__rt.189 var=118) __Pvoid__pl___Pvoid_int18_ (__rd___sp.56 __ct_0S0.378) <277>; (__rt.211 var=118) __Pvoid__pl___Pvoid_int18_ (__rd___sp.138 __ct_0s0.379) <305>; (__rt.233 var=118) __Pvoid__pl___Pvoid_int18_ (__ct_8388608.42 __ct_2.380) <333>; (__rt.255 var=118) __Pvoid__pl___Pvoid_int18_ (__rt.233 __ct_2.380) <361>; (__rt.277 var=118) __Pvoid__pl___Pvoid_int18_ (__rt.255 __ct_2.380) <389>; (__rt.299 var=118) __Pvoid__mi___Pvoid_int18_ (__rt.277 __ct_6.382) <417>; (__rt.321 var=118) __Pvoid__pl___Pvoid_int18_ (__ct_8388624.47 __ct_2.380) <445>; (__rt.343 var=118) __Pvoid__pl___Pvoid_int18_ (__rt.321 __ct_2.380) <473>; (__rt.365 var=118) __Pvoid__pl___Pvoid_int18_ (__rt.343 __ct_2.380) <501>; (__ct_0S0.378 var=146) const () <539>; (__ct_0s0.379 var=147) const () <541>; (__ct_2.380 var=148) const () <543>; (__ct_6.382 var=150) const () <547>; } #5 off=0 nxt=-2 0 : 'main.c'; ---------- 5 : (0,42:0,11); ---------- 66 : (0,31:4,0); 71 : (0,36:4,0); 80 : (0,27:4,0); 84 : (0,27:4,0); 86 : (0,29:11,0); 88 : (0,29:4,1); 89 : (0,31:18,0); 91 : (0,31:15,0); 94 : (0,31:14,2); 95 : (0,32:18,0); 100 : (0,32:14,3); 101 : (0,33:18,0); 106 : (0,33:14,4); 107 : (0,34:18,0); 112 : (0,34:14,5); 116 : (0,35:4,6); 117 : (0,36:19,0); 122 : (0,36:15,7); 123 : (0,37:19,0); 128 : (0,37:15,8); 129 : (0,38:19,0); 134 : (0,38:15,9); 135 : (0,39:19,0); 140 : (0,39:15,10); 143 : (0,42:0,0); 147 : (0,42:0,11); 148 : (0,42:0,11); 149 : (0,42:0,0); 277 : (0,27:4,0); 305 : (0,42:0,0); 333 : (0,32:14,0); 361 : (0,33:14,0); 389 : (0,34:14,0); 445 : (0,37:15,0); 473 : (0,38:15,0); 501 : (0,39:15,0); 539 : (0,27:4,0); 541 : (0,42:0,0); 543 : (0,32:14,0);