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This commit is contained in:
Patrick Hangl
2026-03-19 16:29:46 +01:00
parent f6fa0ed021
commit 91e62d48e8
76 changed files with 14848 additions and 2074659 deletions
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34
simulation/Release/chesswork/signal_path.gvt
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@@ -1,24 +1,28 @@
// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Mon Feb 2 16:08:05 2026
// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Thu Mar 19 15:18:07 2026
// Copyright 2014-2025 Synopsys, Inc. All rights reserved.
// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=16 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32
[
1 : _imsk_var_ typ=uint15_ bnd=e sz=1 algn=1 stl=IMSK tref=uint15__IMSK
2 : _irq_stat_var_ typ=uint15_ bnd=e sz=1 algn=1 stl=irq_stat tref=uint15__irq_stat
6 : _ZL7counter typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__sint_DMA
7 : _ZL2mu typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__sint_DMA
8 : _ZL4leak typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__sint_DMA
9 : sample_line typ=int8_ bnd=g sz=256 algn=4 stl=DMB tref=__A64DMB__sint_DMB
10 : coefficient_line typ=int8_ bnd=g sz=256 algn=8 stl=DMA tref=__A64__sint_DMA
11 : pointer_sample_line typ=int8_ bnd=g sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB
12 : pointer_coefficient_line typ=int8_ bnd=g sz=12 algn=4 stl=DMA tref=BufferPtr_DMA
13 : _ZZ16calculate_outputP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
14 : _ZZ16calculate_outputP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
15 : _ZZ16calculate_outputP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
16 : _ZZ16calculate_outputP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
17 : _ZZ16calculate_outputP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator typ=int8_ bnd=f sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
18 : _ZZ16calculate_outputP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
4 : stdin typ=int8_ bnd=e sz=4 algn=4 stl=DMA tref=__PFILE_DMA
5 : stdout typ=int8_ bnd=e sz=4 algn=4 stl=DMA tref=__PFILE_DMA
10 : _ZL7counter typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__sint_DMA
11 : _ZL2mu typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__sint_DMA
12 : _ZL4leak typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__sint_DMA
13 : sample_line typ=int8_ bnd=g sz=64 algn=4 stl=DMB tref=__A16DMB__sint_DMB
14 : coefficient_line typ=int8_ bnd=g sz=64 algn=8 stl=DMA tref=__A16__sint_DMA
15 : pointer_sample_line typ=int8_ bnd=g sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB
16 : pointer_coefficient_line typ=int8_ bnd=g sz=12 algn=4 stl=DMA tref=BufferPtr_DMA
17 : _ZL13__str8f83c4d9 typ=int8_ bnd=F sz=9 algn=1 stl=DMA tref=__A9__cchar_DMA
18 : _ZL13__str008811f7 typ=int8_ bnd=F sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA
19 : _ZZ16calculate_outputP4FILEP16SingleSignalPathS2_PU17chess_storage_DMBVsS4_S4_E11c_sensor_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
20 : _ZZ16calculate_outputP4FILEP16SingleSignalPathS2_PU17chess_storage_DMBVsS4_S4_E13acc_sensor_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
21 : _ZZ16calculate_outputP4FILEP16SingleSignalPathS2_PU17chess_storage_DMBVsS4_S4_E12c_sensor_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
22 : _ZZ16calculate_outputP4FILEP16SingleSignalPathS2_PU17chess_storage_DMBVsS4_S4_E14acc_sensor_pre typ=int8_ bnd=f sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
23 : _ZZ16calculate_outputP4FILEP16SingleSignalPathS2_PU17chess_storage_DMBVsS4_S4_E18filter_accumulator typ=int8_ bnd=f sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
24 : _ZZ16calculate_outputP4FILEP16SingleSignalPathS2_PU17chess_storage_DMBVsS4_S4_E9output_32 typ=int8_ bnd=f sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
]
__signal_path_sttc {
} #0