C/DSP_Simulation
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Patrick Hangl
2026-03-26 15:06:49 +01:00
parent 165ed73a9a
commit 7a0437c376
44 changed files with 1006 additions and 1006 deletions
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simulation/Release/chesswork/main-9f2435.sfg
+5 -5
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@@ -1,7 +1,7 @@
// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Wed Mar 25 16:19:33 2026
// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Thu Mar 26 14:37:53 2026
// Copyright 2014-2025 Synopsys, Inc. All rights reserved.
// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=48 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32
// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=45 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32
/***
@@ -149,7 +149,7 @@ Ffclose : user_defined, called {
171 : __ct typ=int64_ bnd=m
172 : __ct_4576918229304087675 typ=int64_ val=4576918229304087675f bnd=m
173 : __ct typ=int64_ bnd=m
174 : __ct_48 typ=int32_ val=48f bnd=m
174 : __ct_45 typ=int32_ val=45f bnd=m
175 : __ct typ=int32_ bnd=m
176 : _Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi typ=dmaddr_ val=0r bnd=m
178 : __link typ=dmaddr_ bnd=m
@@ -275,7 +275,7 @@ F_main {
(__M_LDMA.192 var=14 b1.193 var=36) store (__ct_0.131 __rt.2109 b1.186) <207>;
(__ct_2.198 var=164) const () <212>;
(__ct_4576918229304087675.210 var=172) const () <224>;
(__ct_48.213 var=174) const () <227>;
(__ct_45.213 var=174) const () <227>;
(_Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi.216 var=176) const () <230>;
(__link.218 var=178) dmaddr__call_dmaddr_ (_Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi.216) <232>;
(__rt.1769 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.90 __ct_m88S0.2122) <1491>;
@@ -310,7 +310,7 @@ F_main {
(__ct.206 var=169 stl=AX off=0) assign (__ct_4607182418800017408.124) <220>;
(__ct.209 var=171 stl=AX off=1) assign (__ct_4607182418800017408.124) <223>;
(__ct.212 var=173 stl=BX off=0) assign (__ct_4576918229304087675.210) <226>;
(__ct.215 var=175 stl=RB off=0) assign (__ct_48.213) <229>;
(__ct.215 var=175 stl=RB off=0) assign (__ct_45.213) <229>;
(__link.219 var=178 stl=LR off=0) assign (__link.218) <233>;
(_ZL10input_port.220 var=49 _ZL11output_port.221 var=51 _ZL17c_sensor_signal_t.222 var=37 _ZL19acc_sensor_signal_t.223 var=39 __extDM.224 var=32 __extDM_SingleSignalPath.225 var=38 __extDM_int16_.226 var=50 __extDM_int32_.227 var=58 __extDM_int64_.228 var=55 __extDM_int8_.229 var=56 __extDM_void.230 var=53 __extPM.231 var=33 __extPM_FILE.232 var=57 __extPM_void.233 var=54 b0.234 var=35 b1.235 var=36 __vola.236 var=29) F_Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi (__link.219 __ptr_c_sensor_signal_t.194 __ptr_acc_sensor_signal_t.195 __ptr_b0.196 __ptr_b1.197 __ct.200 __ct.203 __ct.206 __ct.209 __ct.212 __ct.215 _ZL10input_port.47 _ZL11output_port.49 _ZL17c_sensor_signal_t.35 _ZL19acc_sensor_signal_t.37 __extDM.30 __extDM_SingleSignalPath.36 __extDM_int16_.48 __extDM_int32_.56 __extDM_int64_.53 __extDM_int8_.54 __extDM_void.51 __extPM.31 __extPM_FILE.55 __extPM_void.52 b0.158 b1.193 __vola.27) <234>;
} #4 off=1