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Patrick Hangl
138
testcode/Release/testcode.srv
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138
testcode/Release/testcode.srv
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// File generated by darts version X-2025.06#84ea4f0b1c#250602, Thu Jan 15 11:30:45 2026
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// Copyright 2014-2025 Synopsys, Inc. All rights reserved.
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// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\darts.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -d -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -D__tct_patch__=0 +Mhex +Ihex -g +u Release/testcode lpdsp32
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// Release: ipp X-2025.06
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.label _ivt
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.function _ivt _ivt
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.src_ref 0 "lpdsp32_init.s" 15 first
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.function_start
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0 "01100100000000000000" // jp 0x20 /* MW 2 */ /* control_operation: words=2 jump unconditional cycles_taken=2 direct absolute target_address=32 */
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1 "00000000001000000111" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 16 first
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2 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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3 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 17 first
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4 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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5 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 18 first
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6 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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7 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 19 first
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8 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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9 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 20 first
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10 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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11 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 21 first
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12 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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13 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 22 first
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14 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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15 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 23 first
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16 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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17 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 24 first
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18 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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19 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 25 first
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20 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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21 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 26 first
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22 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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23 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 27 first
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24 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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25 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 28 first
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26 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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27 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 29 first
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28 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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29 "00111000000000000000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 30 first
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30 "01000110000010110000" // reti; nop /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=3 */
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31 "00111000000000000000" // /* MW 1 */
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.label _main_init
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.function _main_init _main_init
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.src_ref 0 "lpdsp32_init.s" 5 first
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.function_start
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32 "10111010000100010010" // r = 0x1 /* control_operation: words=1 cycles_taken=1 */
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.src_ref 0 "lpdsp32_init.s" 6 first
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33 "10111010000100010011" // s = 0x1 /* control_operation: words=1 cycles_taken=1 */
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.src_ref 0 "lpdsp32_init.s" 7 first
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34 "01101000000000000011" // sp = 0xfff8 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
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35 "11111111111000111000" // /* MW 1 */
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.src_ref 0 "lpdsp32_init.s" 8 first
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36 "01000110000010001000" // ie = 0x1; nop /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
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37 "00111000000000000000" // /* MW 1 */
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.label _main
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.function main _main
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.src_ref 1 "main.c" 29 4
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.src_ref 1 "main.c" 42 first
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.function_start
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38 "00111000001111011110" // rb0 = 123 /* control_operation: words=1 cycles_taken=1 */
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.src_ref 1 "main.c" 29 4 first
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39 "01101110010000000000" // [0x800008] = rb0.s /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
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40 "00000000010001110110" // /* MW 1 */
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.src_ref 1 "main.c" 31 14
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41 "01101000001000000000" // a0 = -0x800000 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
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42 "00000000000000100000" // /* MW 1 */
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.src_ref 1 "main.c" 31 14
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.src_ref 1 "main.c" 36 15
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43 "01011100000110010010" // ra0 = 100; rb0 = 0xc8 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
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44 "00110000011001000110" // /* MW 1 */
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.src_ref 1 "main.c" 31 14 first
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.src_ref 1 "main.c" 32 14
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.src_ref 1 "main.c" 33 14
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.src_ref 1 "main.c" 37 15
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45 "01011100100000001000" // c0 = 2; a0[0x0] = ra0.s /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
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46 "00010100000001110100" // /* MW 1 */
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.src_ref 1 "main.c" 32 14
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.src_ref 1 "main.c" 32 14
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47 "01011100000110010110" // ra0 = 101; a0 = a0 + 0x2 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
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48 "00100000000000010000" // /* MW 1 */
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.src_ref 1 "main.c" 32 14 first
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.src_ref 1 "main.c" 33 14
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49 "01011100000110011010" // ra0 = 102; [a0+c0] = ra0.s /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
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50 "00010100000001010100" // /* MW 1 */
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.src_ref 1 "main.c" 33 14 first
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.src_ref 1 "main.c" 34 14
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51 "01011100000110011110" // ra0 = 103; [a0+c0] = ra0.s /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
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52 "00010100000001010100" // /* MW 1 */
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.src_ref 1 "main.c" 34 14 first
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53 "10010100000001110100" // a0[0x0] = ra0.s /* control_operation: words=1 cycles_taken=1 */
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.src_ref 1 "main.c" 36 15
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54 "01101000001000000000" // a1 = -0x7ffff0 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
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55 "00000000010000100001" // /* MW 1 */
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56 "10100000010000110000" // a0 = a0 - 0x6 /* control_operation: words=1 cycles_taken=1 */
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.src_ref 1 "main.c" 36 15 first
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57 "10010100100001110110" // a1[0x0] = rb0.s /* control_operation: words=1 cycles_taken=1 */
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.src_ref 1 "main.c" 37 15
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58 "10100000100000010001" // a1 = a1 + 0x2 /* control_operation: words=1 cycles_taken=1 */
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.src_ref 1 "main.c" 37 15
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59 "10110000011001001110" // rb0 = 0xc9 /* control_operation: words=1 cycles_taken=1 */
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.src_ref 1 "main.c" 37 15 first
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60 "10010100100001010110" // [a1+c0] = rb0.s /* control_operation: words=1 cycles_taken=1 */
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.src_ref 1 "main.c" 38 15
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61 "10110000011001010110" // rb0 = 0xca /* control_operation: words=1 cycles_taken=1 */
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.src_ref 1 "main.c" 38 15 first
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62 "10010100100001110110" // a1[0x0] = rb0.s /* control_operation: words=1 cycles_taken=1 */
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.src_ref 1 "main.c" 35 4 first
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63 "01101100000000000000" // [0x4] = a0 /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
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64 "00000000001001100000" // /* MW 1 */
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.src_ref 1 "main.c" 39 15
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.src_ref 1 "main.c" 42 first
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.end_of_main
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65 "01000110000010100100" // retdb; rb0 = 0xcb /* MW 2 */ /* control_operation: words=2 rts unconditional cycles_taken=1 delay_slots=2 */
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66 "00110000011001011110" // /* MW 1 */
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.src_ref 1 "main.c" 39 15 first
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.delay_slot
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67 "10010100100011110110" // a1[0x2] = rb0.s /* control_operation: words=1 cycles_taken=1 */
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.delay_slot
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68 "01000000000000000000" // nop; ra0 = zero /* MW 2 */ /* control_operation: words=2 cycles_taken=1 */
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69 "00011000111010001000" // /* MW 1 */
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.dir 0 "%PROCDIR%"
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.dir 1 "C:/Users/phangl/00_Repos/06_DSP_Simulation/testcode"
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