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Patrick Hangl
2026-03-25 16:30:37 +01:00
parent 91e62d48e8
commit 165ed73a9a
71 changed files with 11028 additions and 11431 deletions
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simulation/Release/chesswork/main-9f2435.sfg
+167 -167
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@@ -1,7 +1,7 @@
// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Thu Mar 19 16:03:51 2026
// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Wed Mar 25 16:19:33 2026
// Copyright 2014-2025 Synopsys, Inc. All rights reserved.
// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=16 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32
// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=48 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork main.c lpdsp32
/***
@@ -85,12 +85,12 @@ Ffclose : user_defined, called {
37 : _ZL17c_sensor_signal_t typ=int8_ bnd=i sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA
38 : __extDM_SingleSignalPath typ=int8_ bnd=b stl=DM
39 : _ZL19acc_sensor_signal_t typ=int8_ bnd=i sz=144 algn=4 stl=DMA tref=SingleSignalPath_DMA
40 : _ZL13__stradd574a4 typ=int8_ bnd=i sz=75 algn=1 stl=DMA tref=__A75__cchar_DMA
40 : _ZL13__str75097c0a typ=int8_ bnd=i sz=76 algn=1 stl=DMA tref=__A76__cchar_DMA
41 : _ZL13__str00f02b8f typ=int8_ bnd=i sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA
42 : _ZL13__str0fe4b1b6 typ=int8_ bnd=i sz=75 algn=1 stl=DMA tref=__A75__cchar_DMA
43 : _ZL13__stre6369ab8 typ=int8_ bnd=i sz=63 algn=1 stl=DMA tref=__A63__cchar_DMA
42 : _ZL13__strd718b91c typ=int8_ bnd=i sz=76 algn=1 stl=DMA tref=__A76__cchar_DMA
43 : _ZL13__str36a0c6ea typ=int8_ bnd=i sz=64 algn=1 stl=DMA tref=__A64__cchar_DMA
44 : _ZL13__str00f52cca typ=int8_ bnd=i sz=2 algn=1 stl=DMA tref=__A2__cchar_DMA
45 : _ZL13__strcf6f2fde typ=int8_ bnd=i sz=76 algn=1 stl=DMA tref=__A76__cchar_DMA
45 : _ZL13__str7a9ae62c typ=int8_ bnd=i sz=77 algn=1 stl=DMA tref=__A77__cchar_DMA
46 : _ZL13__str41232700 typ=int8_ bnd=i sz=3 algn=1 stl=DMA tref=__A3__cchar_DMA
47 : d0 typ=int8_ val=88t0 bnd=a sz=4 algn=4 stl=DMA tref=__sint_DMA
48 : d1 typ=int8_ val=92t0 bnd=a sz=4 algn=4 stl=DMA tref=__sint_DMA
@@ -109,18 +109,18 @@ Ffclose : user_defined, called {
61 : __ptr_c_sensor_signal_t typ=dmaddr_ val=0a bnd=m adro=37
62 : __ptr_acc_sensor_signal_t typ=dmaddr_ bnd=m
63 : __ptr_acc_sensor_signal_t typ=dmaddr_ val=0a bnd=m adro=39
64 : __ptr___stradd574a4 typ=dmaddr_ bnd=m
65 : __ptr___stradd574a4 typ=dmaddr_ val=0a bnd=m adro=40
64 : __ptr___str75097c0a typ=dmaddr_ bnd=m
65 : __ptr___str75097c0a typ=dmaddr_ val=0a bnd=m adro=40
66 : __ptr___str00f02b8f typ=dmaddr_ bnd=m
67 : __ptr___str00f02b8f typ=dmaddr_ val=0a bnd=m adro=41
68 : __ptr___str0fe4b1b6 typ=dmaddr_ bnd=m
69 : __ptr___str0fe4b1b6 typ=dmaddr_ val=0a bnd=m adro=42
70 : __ptr___stre6369ab8 typ=dmaddr_ bnd=m
71 : __ptr___stre6369ab8 typ=dmaddr_ val=0a bnd=m adro=43
68 : __ptr___strd718b91c typ=dmaddr_ bnd=m
69 : __ptr___strd718b91c typ=dmaddr_ val=0a bnd=m adro=42
70 : __ptr___str36a0c6ea typ=dmaddr_ bnd=m
71 : __ptr___str36a0c6ea typ=dmaddr_ val=0a bnd=m adro=43
72 : __ptr___str00f52cca typ=dmaddr_ bnd=m
73 : __ptr___str00f52cca typ=dmaddr_ val=0a bnd=m adro=44
74 : __ptr___strcf6f2fde typ=dmaddr_ bnd=m
75 : __ptr___strcf6f2fde typ=dmaddr_ val=0a bnd=m adro=45
74 : __ptr___str7a9ae62c typ=dmaddr_ bnd=m
75 : __ptr___str7a9ae62c typ=dmaddr_ val=0a bnd=m adro=45
76 : __ptr___str41232700 typ=dmaddr_ bnd=m
77 : __ptr___str41232700 typ=dmaddr_ val=0a bnd=m adro=46
79 : __ct_8388608 typ=dmaddr_ val=8388608f bnd=m
@@ -142,7 +142,6 @@ Ffclose : user_defined, called {
114 : __ct_4607182418800017408 typ=int64_ val=4607182418800017408f bnd=m
116 : __ct_0 typ=int32_ val=0f bnd=m
119 : __ct_0 typ=uint40_ val=0f bnd=m
126 : __ct_16 typ=int32_ val=16f bnd=m
164 : __ct_2 typ=int32_ val=2f bnd=m
165 : __ct typ=int32_ bnd=m
167 : __ct typ=int32_ bnd=m
@@ -150,6 +149,7 @@ Ffclose : user_defined, called {
171 : __ct typ=int64_ bnd=m
172 : __ct_4576918229304087675 typ=int64_ val=4576918229304087675f bnd=m
173 : __ct typ=int64_ bnd=m
174 : __ct_48 typ=int32_ val=48f bnd=m
175 : __ct typ=int32_ bnd=m
176 : _Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi typ=dmaddr_ val=0r bnd=m
178 : __link typ=dmaddr_ bnd=m
@@ -265,7 +265,6 @@ F_main {
(__M_LDMA.129 var=14 b0.130 var=35) store (__ct_4607182418800017408.124 __rt.1791 b0.33) <153>;
(__ct_0.131 var=119) const () <154>;
(__M_LDMA.136 var=14 b0.137 var=35) store (__ct_0.131 __rt.1955 b0.130) <159>;
(__ct_16.140 var=126) const () <162>;
(__M_LDMA.143 var=14 b0.144 var=35) store (__ct_0.131 __rt.1977 b0.137) <165>;
(__M_LDMA.150 var=14 b0.151 var=35) store (__ct_0.131 __rt.1999 b0.144) <171>;
(__M_LDMA.157 var=14 b0.158 var=35) store (__ct_0.131 __rt.2021 b0.151) <177>;
@@ -276,30 +275,31 @@ F_main {
(__M_LDMA.192 var=14 b1.193 var=36) store (__ct_0.131 __rt.2109 b1.186) <207>;
(__ct_2.198 var=164) const () <212>;
(__ct_4576918229304087675.210 var=172) const () <224>;
(__ct_48.213 var=174) const () <227>;
(_Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi.216 var=176) const () <230>;
(__link.218 var=178) dmaddr__call_dmaddr_ (_Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi.216) <232>;
(__rt.1769 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.90 __ct_m88S0.2122) <1489>;
(__rt.1791 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_0t0.2124) <1517>;
(__rt.1813 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_40t0.2125) <1545>;
(__rt.1955 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_8t0.2136) <1729>;
(__rt.1977 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_16t0.2139) <1757>;
(__rt.1999 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_24t0.2142) <1785>;
(__rt.2021 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_32t0.2145) <1813>;
(__rt.2043 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_48t0.2148) <1841>;
(__rt.2065 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_56t0.2151) <1869>;
(__rt.2087 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_64t0.2154) <1897>;
(__rt.2109 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_72t0.2157) <1925>;
(__ct_m88S0.2122 var=406) const () <1985>;
(__ct_0t0.2124 var=408) const () <1989>;
(__ct_40t0.2125 var=409) const () <1991>;
(__ct_8t0.2136 var=420) const () <2013>;
(__ct_16t0.2139 var=423) const () <2019>;
(__ct_24t0.2142 var=426) const () <2025>;
(__ct_32t0.2145 var=429) const () <2031>;
(__ct_48t0.2148 var=432) const () <2037>;
(__ct_56t0.2151 var=435) const () <2043>;
(__ct_64t0.2154 var=438) const () <2049>;
(__ct_72t0.2157 var=441) const () <2055>;
(__rt.1769 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.90 __ct_m88S0.2122) <1491>;
(__rt.1791 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_0t0.2124) <1519>;
(__rt.1813 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_40t0.2125) <1547>;
(__rt.1955 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_8t0.2136) <1731>;
(__rt.1977 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_16t0.2139) <1759>;
(__rt.1999 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_24t0.2142) <1787>;
(__rt.2021 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_32t0.2145) <1815>;
(__rt.2043 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_48t0.2148) <1843>;
(__rt.2065 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_56t0.2151) <1871>;
(__rt.2087 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_64t0.2154) <1899>;
(__rt.2109 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_72t0.2157) <1927>;
(__ct_m88S0.2122 var=406) const () <1987>;
(__ct_0t0.2124 var=408) const () <1991>;
(__ct_40t0.2125 var=409) const () <1993>;
(__ct_8t0.2136 var=420) const () <2015>;
(__ct_16t0.2139 var=423) const () <2021>;
(__ct_24t0.2142 var=426) const () <2027>;
(__ct_32t0.2145 var=429) const () <2033>;
(__ct_48t0.2148 var=432) const () <2039>;
(__ct_56t0.2151 var=435) const () <2045>;
(__ct_64t0.2154 var=438) const () <2051>;
(__ct_72t0.2157 var=441) const () <2057>;
call {
(__ptr_c_sensor_signal_t.194 var=60 stl=A off=0) assign (__ptr_c_sensor_signal_t.58) <208>;
(__ptr_acc_sensor_signal_t.195 var=62 stl=A off=1) assign (__ptr_acc_sensor_signal_t.60) <209>;
@@ -310,51 +310,51 @@ F_main {
(__ct.206 var=169 stl=AX off=0) assign (__ct_4607182418800017408.124) <220>;
(__ct.209 var=171 stl=AX off=1) assign (__ct_4607182418800017408.124) <223>;
(__ct.212 var=173 stl=BX off=0) assign (__ct_4576918229304087675.210) <226>;
(__ct.215 var=175 stl=RB off=0) assign (__ct_16.140) <229>;
(__ct.215 var=175 stl=RB off=0) assign (__ct_48.213) <229>;
(__link.219 var=178 stl=LR off=0) assign (__link.218) <233>;
(_ZL10input_port.220 var=49 _ZL11output_port.221 var=51 _ZL17c_sensor_signal_t.222 var=37 _ZL19acc_sensor_signal_t.223 var=39 __extDM.224 var=32 __extDM_SingleSignalPath.225 var=38 __extDM_int16_.226 var=50 __extDM_int32_.227 var=58 __extDM_int64_.228 var=55 __extDM_int8_.229 var=56 __extDM_void.230 var=53 __extPM.231 var=33 __extPM_FILE.232 var=57 __extPM_void.233 var=54 b0.234 var=35 b1.235 var=36 __vola.236 var=29) F_Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi (__link.219 __ptr_c_sensor_signal_t.194 __ptr_acc_sensor_signal_t.195 __ptr_b0.196 __ptr_b1.197 __ct.200 __ct.203 __ct.206 __ct.209 __ct.212 __ct.215 _ZL10input_port.47 _ZL11output_port.49 _ZL17c_sensor_signal_t.35 _ZL19acc_sensor_signal_t.37 __extDM.30 __extDM_SingleSignalPath.36 __extDM_int16_.48 __extDM_int32_.56 __extDM_int64_.53 __extDM_int8_.54 __extDM_void.51 __extPM.31 __extPM_FILE.55 __extPM_void.52 b0.158 b1.193 __vola.27) <234>;
} #4 off=1
#5 off=2
(__ptr___stradd574a4.62 var=65) const () <86>;
(__ptr___str75097c0a.62 var=65) const () <86>;
(__ptr___str00f02b8f.64 var=67) const () <88>;
(fopen.240 var=179) const () <238>;
(__link.242 var=181) dmaddr__call_dmaddr_ (fopen.240) <240>;
call {
(__ptr___stradd574a4.238 var=64 stl=A off=1) assign (__ptr___stradd574a4.62) <236>;
(__ptr___str75097c0a.238 var=64 stl=A off=1) assign (__ptr___str75097c0a.62) <236>;
(__ptr___str00f02b8f.239 var=66 stl=A off=2) assign (__ptr___str00f02b8f.64) <237>;
(__link.243 var=181 stl=LR off=0) assign (__link.242) <241>;
(__tmp.244 var=182 stl=A off=0 _ZL10input_port.247 var=49 _ZL11output_port.248 var=51 _ZL17c_sensor_signal_t.249 var=37 _ZL19acc_sensor_signal_t.250 var=39 __extDM.251 var=32 __extDM_SingleSignalPath.252 var=38 __extDM_int16_.253 var=50 __extDM_int32_.254 var=58 __extDM_int64_.255 var=55 __extDM_int8_.256 var=56 __extDM_void.257 var=53 __extPM.258 var=33 __extPM_FILE.259 var=57 __extPM_void.260 var=54 b0.261 var=35 b1.262 var=36 __vola.263 var=29) Ffopen (__link.243 __ptr___stradd574a4.238 __ptr___str00f02b8f.239 _ZL10input_port.220 _ZL11output_port.221 _ZL17c_sensor_signal_t.222 _ZL19acc_sensor_signal_t.223 __extDM.224 __extDM_SingleSignalPath.225 __extDM_int16_.226 __extDM_int32_.227 __extDM_int64_.228 __extDM_int8_.229 __extDM_void.230 __extPM.231 __extPM_FILE.232 __extPM_void.233 b0.234 b1.235 __vola.236) <242>;
(__tmp.244 var=182 stl=A off=0 _ZL10input_port.247 var=49 _ZL11output_port.248 var=51 _ZL17c_sensor_signal_t.249 var=37 _ZL19acc_sensor_signal_t.250 var=39 __extDM.251 var=32 __extDM_SingleSignalPath.252 var=38 __extDM_int16_.253 var=50 __extDM_int32_.254 var=58 __extDM_int64_.255 var=55 __extDM_int8_.256 var=56 __extDM_void.257 var=53 __extPM.258 var=33 __extPM_FILE.259 var=57 __extPM_void.260 var=54 b0.261 var=35 b1.262 var=36 __vola.263 var=29) Ffopen (__link.243 __ptr___str75097c0a.238 __ptr___str00f02b8f.239 _ZL10input_port.220 _ZL11output_port.221 _ZL17c_sensor_signal_t.222 _ZL19acc_sensor_signal_t.223 __extDM.224 __extDM_SingleSignalPath.225 __extDM_int16_.226 __extDM_int32_.227 __extDM_int64_.228 __extDM_int8_.229 __extDM_void.230 __extPM.231 __extPM_FILE.232 __extPM_void.233 b0.234 b1.235 __vola.236) <242>;
(__tmp.245 var=182) deassign (__tmp.244) <243>;
} #6 off=3
#7 off=4
(__ptr___str0fe4b1b6.66 var=69) const () <90>;
(__ptr___strd718b91c.66 var=69) const () <90>;
(__link.269 var=185) dmaddr__call_dmaddr_ (fopen.240) <250>;
call {
(__ptr___str0fe4b1b6.265 var=68 stl=A off=1) assign (__ptr___str0fe4b1b6.66) <246>;
(__ptr___strd718b91c.265 var=68 stl=A off=1) assign (__ptr___strd718b91c.66) <246>;
(__ptr___str00f02b8f.266 var=66 stl=A off=2) assign (__ptr___str00f02b8f.64) <247>;
(__link.270 var=185 stl=LR off=0) assign (__link.269) <251>;
(__tmp.271 var=186 stl=A off=0 _ZL10input_port.274 var=49 _ZL11output_port.275 var=51 _ZL17c_sensor_signal_t.276 var=37 _ZL19acc_sensor_signal_t.277 var=39 __extDM.278 var=32 __extDM_SingleSignalPath.279 var=38 __extDM_int16_.280 var=50 __extDM_int32_.281 var=58 __extDM_int64_.282 var=55 __extDM_int8_.283 var=56 __extDM_void.284 var=53 __extPM.285 var=33 __extPM_FILE.286 var=57 __extPM_void.287 var=54 b0.288 var=35 b1.289 var=36 __vola.290 var=29) Ffopen (__link.270 __ptr___str0fe4b1b6.265 __ptr___str00f02b8f.266 _ZL10input_port.247 _ZL11output_port.248 _ZL17c_sensor_signal_t.249 _ZL19acc_sensor_signal_t.250 __extDM.251 __extDM_SingleSignalPath.252 __extDM_int16_.253 __extDM_int32_.254 __extDM_int64_.255 __extDM_int8_.256 __extDM_void.257 __extPM.258 __extPM_FILE.259 __extPM_void.260 b0.261 b1.262 __vola.263) <252>;
(__tmp.271 var=186 stl=A off=0 _ZL10input_port.274 var=49 _ZL11output_port.275 var=51 _ZL17c_sensor_signal_t.276 var=37 _ZL19acc_sensor_signal_t.277 var=39 __extDM.278 var=32 __extDM_SingleSignalPath.279 var=38 __extDM_int16_.280 var=50 __extDM_int32_.281 var=58 __extDM_int64_.282 var=55 __extDM_int8_.283 var=56 __extDM_void.284 var=53 __extPM.285 var=33 __extPM_FILE.286 var=57 __extPM_void.287 var=54 b0.288 var=35 b1.289 var=36 __vola.290 var=29) Ffopen (__link.270 __ptr___strd718b91c.265 __ptr___str00f02b8f.266 _ZL10input_port.247 _ZL11output_port.248 _ZL17c_sensor_signal_t.249 _ZL19acc_sensor_signal_t.250 __extDM.251 __extDM_SingleSignalPath.252 __extDM_int16_.253 __extDM_int32_.254 __extDM_int64_.255 __extDM_int8_.256 __extDM_void.257 __extPM.258 __extPM_FILE.259 __extPM_void.260 b0.261 b1.262 __vola.263) <252>;
(__tmp.272 var=186) deassign (__tmp.271) <253>;
} #8 off=5
#9 off=6
(__ptr___stre6369ab8.68 var=71) const () <92>;
(__ptr___str36a0c6ea.68 var=71) const () <92>;
(__ptr___str00f52cca.70 var=73) const () <94>;
(__link.296 var=189) dmaddr__call_dmaddr_ (fopen.240) <260>;
call {
(__ptr___stre6369ab8.292 var=70 stl=A off=1) assign (__ptr___stre6369ab8.68) <256>;
(__ptr___str36a0c6ea.292 var=70 stl=A off=1) assign (__ptr___str36a0c6ea.68) <256>;
(__ptr___str00f52cca.293 var=72 stl=A off=2) assign (__ptr___str00f52cca.70) <257>;
(__link.297 var=189 stl=LR off=0) assign (__link.296) <261>;
(__tmp.298 var=190 stl=A off=0 _ZL10input_port.301 var=49 _ZL11output_port.302 var=51 _ZL17c_sensor_signal_t.303 var=37 _ZL19acc_sensor_signal_t.304 var=39 __extDM.305 var=32 __extDM_SingleSignalPath.306 var=38 __extDM_int16_.307 var=50 __extDM_int32_.308 var=58 __extDM_int64_.309 var=55 __extDM_int8_.310 var=56 __extDM_void.311 var=53 __extPM.312 var=33 __extPM_FILE.313 var=57 __extPM_void.314 var=54 b0.315 var=35 b1.316 var=36 __vola.317 var=29) Ffopen (__link.297 __ptr___stre6369ab8.292 __ptr___str00f52cca.293 _ZL10input_port.274 _ZL11output_port.275 _ZL17c_sensor_signal_t.276 _ZL19acc_sensor_signal_t.277 __extDM.278 __extDM_SingleSignalPath.279 __extDM_int16_.280 __extDM_int32_.281 __extDM_int64_.282 __extDM_int8_.283 __extDM_void.284 __extPM.285 __extPM_FILE.286 __extPM_void.287 b0.288 b1.289 __vola.290) <262>;
(__tmp.298 var=190 stl=A off=0 _ZL10input_port.301 var=49 _ZL11output_port.302 var=51 _ZL17c_sensor_signal_t.303 var=37 _ZL19acc_sensor_signal_t.304 var=39 __extDM.305 var=32 __extDM_SingleSignalPath.306 var=38 __extDM_int16_.307 var=50 __extDM_int32_.308 var=58 __extDM_int64_.309 var=55 __extDM_int8_.310 var=56 __extDM_void.311 var=53 __extPM.312 var=33 __extPM_FILE.313 var=57 __extPM_void.314 var=54 b0.315 var=35 b1.316 var=36 __vola.317 var=29) Ffopen (__link.297 __ptr___str36a0c6ea.292 __ptr___str00f52cca.293 _ZL10input_port.274 _ZL11output_port.275 _ZL17c_sensor_signal_t.276 _ZL19acc_sensor_signal_t.277 __extDM.278 __extDM_SingleSignalPath.279 __extDM_int16_.280 __extDM_int32_.281 __extDM_int64_.282 __extDM_int8_.283 __extDM_void.284 __extPM.285 __extPM_FILE.286 __extPM_void.287 b0.288 b1.289 __vola.290) <262>;
(__tmp.299 var=190) deassign (__tmp.298) <263>;
} #10 off=7
#11 off=8
(__ptr___strcf6f2fde.72 var=75) const () <96>;
(__ptr___str7a9ae62c.72 var=75) const () <96>;
(__link.323 var=193) dmaddr__call_dmaddr_ (fopen.240) <270>;
call {
(__ptr___strcf6f2fde.319 var=74 stl=A off=1) assign (__ptr___strcf6f2fde.72) <266>;
(__ptr___str7a9ae62c.319 var=74 stl=A off=1) assign (__ptr___str7a9ae62c.72) <266>;
(__ptr___str00f52cca.320 var=72 stl=A off=2) assign (__ptr___str00f52cca.70) <267>;
(__link.324 var=193 stl=LR off=0) assign (__link.323) <271>;
(__tmp.325 var=194 stl=A off=0 _ZL10input_port.328 var=49 _ZL11output_port.329 var=51 _ZL17c_sensor_signal_t.330 var=37 _ZL19acc_sensor_signal_t.331 var=39 __extDM.332 var=32 __extDM_SingleSignalPath.333 var=38 __extDM_int16_.334 var=50 __extDM_int32_.335 var=58 __extDM_int64_.336 var=55 __extDM_int8_.337 var=56 __extDM_void.338 var=53 __extPM.339 var=33 __extPM_FILE.340 var=57 __extPM_void.341 var=54 b0.342 var=35 b1.343 var=36 __vola.344 var=29) Ffopen (__link.324 __ptr___strcf6f2fde.319 __ptr___str00f52cca.320 _ZL10input_port.301 _ZL11output_port.302 _ZL17c_sensor_signal_t.303 _ZL19acc_sensor_signal_t.304 __extDM.305 __extDM_SingleSignalPath.306 __extDM_int16_.307 __extDM_int32_.308 __extDM_int64_.309 __extDM_int8_.310 __extDM_void.311 __extPM.312 __extPM_FILE.313 __extPM_void.314 b0.315 b1.316 __vola.317) <272>;
(__tmp.325 var=194 stl=A off=0 _ZL10input_port.328 var=49 _ZL11output_port.329 var=51 _ZL17c_sensor_signal_t.330 var=37 _ZL19acc_sensor_signal_t.331 var=39 __extDM.332 var=32 __extDM_SingleSignalPath.333 var=38 __extDM_int16_.334 var=50 __extDM_int32_.335 var=58 __extDM_int64_.336 var=55 __extDM_int8_.337 var=56 __extDM_void.338 var=53 __extPM.339 var=33 __extPM_FILE.340 var=57 __extPM_void.341 var=54 b0.342 var=35 b1.343 var=36 __vola.344 var=29) Ffopen (__link.324 __ptr___str7a9ae62c.319 __ptr___str00f52cca.320 _ZL10input_port.301 _ZL11output_port.302 _ZL17c_sensor_signal_t.303 _ZL19acc_sensor_signal_t.304 __extDM.305 __extDM_SingleSignalPath.306 __extDM_int16_.307 __extDM_int32_.308 __extDM_int64_.309 __extDM_int8_.310 __extDM_void.311 __extPM.312 __extPM_FILE.313 __extPM_void.314 b0.315 b1.316 __vola.317) <272>;
(__tmp.326 var=194) deassign (__tmp.325) <273>;
} #12 off=9
#13 off=10
@@ -368,17 +368,17 @@ F_main {
} #14 off=11
#719 off=12
(__ct_0.126 var=116) const () <150>;
(__tmp.2172 var=447) uint3__cmp_int72__int72_ (__tmp.351 __ct_0.126) <2080>;
(__tmp.2182 var=390) bool_nequal_uint3_ (__tmp.2172) <2138>;
(__trgt.2191 var=461) const () <2233>;
() void_jump_bool_int10_ (__tmp.2182 __trgt.2191) <2234>;
(__either.2192 var=460) undefined () <2235>;
(__tmp.2172 var=447) uint3__cmp_int72__int72_ (__tmp.351 __ct_0.126) <2082>;
(__tmp.2182 var=390) bool_nequal_uint3_ (__tmp.2172) <2140>;
(__trgt.2191 var=461) const () <2235>;
() void_jump_bool_int10_ (__tmp.2182 __trgt.2191) <2236>;
(__either.2192 var=460) undefined () <2237>;
if {
{
() if_expr (__either.2192) <342>;
} #17
{
(__true.2198 var=458) const () <2243>;
(__true.2198 var=458) const () <2245>;
} #18
{
#20 off=13
@@ -390,11 +390,11 @@ F_main {
(__tmp.437 var=207) deassign (__tmp.436) <351>;
} #21 off=14
#713 off=15
(__tmp.2162 var=447) uint3__cmp_int72__int72_ (__tmp.437 __ct_0.126) <2064>;
(__tmp.2187 var=210) bool_nequal_uint3_ (__tmp.2162) <2186>;
(__trgt.2199 var=464) const () <2244>;
() void_jump_bool_int10_ (__tmp.2187 __trgt.2199) <2245>;
(__either.2200 var=460) undefined () <2246>;
(__tmp.2162 var=447) uint3__cmp_int72__int72_ (__tmp.437 __ct_0.126) <2066>;
(__tmp.2187 var=210) bool_nequal_uint3_ (__tmp.2162) <2188>;
(__trgt.2199 var=464) const () <2246>;
() void_jump_bool_int10_ (__tmp.2187 __trgt.2199) <2247>;
(__either.2200 var=460) undefined () <2248>;
} #19
{
(__vola.460 var=29) merge (__vola.369 __vola.455) <357>;
@@ -414,18 +414,18 @@ F_main {
(__extDM_int8_.474 var=56) merge (__extDM_int8_.362 __extDM_int8_.448) <371>;
(__extPM_FILE.475 var=57) merge (__extPM_FILE.365 __extPM_FILE.451) <372>;
(__extDM_int32_.476 var=58) merge (__extDM_int32_.360 __extDM_int32_.446) <373>;
(__tmp.2188 var=211) merge (__true.2198 __either.2200) <2187>;
(__tmp.2188 var=211) merge (__true.2198 __either.2200) <2189>;
} #23
} #16
if {
{
() if_expr (__tmp.2188) <431>;
() chess_frequent_else () <432>;
() chess_rear_then () <2247>;
() chess_rear_then () <2249>;
} #26
{
(__trgt.2201 var=465) const () <2248>;
() void_jump_int10_ (__trgt.2201) <2249>;
(__trgt.2201 var=465) const () <2250>;
() void_jump_int10_ (__trgt.2201) <2251>;
} #74 off=32
{
#762 off=16
@@ -436,13 +436,13 @@ F_main {
(fscanf.711 var=218) const () <612>;
(_Z16calculate_outputP4FILEP16SingleSignalPathS2_PU17chess_storage_DMBVsS4_S4_.937 var=253) const () <742>;
(fprintf.1089 var=267) const () <876>;
(__rt.1835 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_80t0.2128) <1573>;
(__rt.1857 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_84t0.2131) <1601>;
(__ct_80t0.2128 var=412) const () <1997>;
(__ct_84t0.2131 var=415) const () <2003>;
(__ct_2.2134 var=418) const () <2009>;
(__trgt.2193 var=462) const () <2236>;
(__trgt.2196 var=463) const () <2240>;
(__rt.1835 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_80t0.2128) <1575>;
(__rt.1857 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_84t0.2131) <1603>;
(__ct_80t0.2128 var=412) const () <1999>;
(__ct_84t0.2131 var=415) const () <2005>;
(__ct_2.2134 var=418) const () <2011>;
(__trgt.2193 var=462) const () <2238>;
(__trgt.2196 var=463) const () <2242>;
do {
{
(__vola.534 var=29) entry (__vola.1393 __vola.460) <433>;
@@ -464,7 +464,7 @@ F_main {
(__extDM_int8_.561 var=56) entry (__extDM_int8_.1447 __extDM_int8_.474) <460>;
(__extPM_FILE.562 var=57) entry (__extPM_FILE.1449 __extPM_FILE.475) <461>;
(__extDM_int32_.563 var=58) entry (__extDM_int32_.1451 __extDM_int32_.476) <462>;
(__shv___ptr_input_port.1723 var=341) entry (__shv___ptr_input_port.1721 __ct_8388608.76) <1388>;
(__shv___ptr_input_port.1723 var=341) entry (__shv___ptr_input_port.1721 __ct_8388608.76) <1390>;
} #29
{
#38 off=17
@@ -493,8 +493,8 @@ F_main {
(__tmp.775 var=233) __sshort___sshort___sint (__fch_d1.774) <637>;
(__M_SDMB.783 var=8 _ZL10input_port.784 var=49 __vola.785 var=29) store (__tmp.775 __rt.1911 _ZL10input_port.772 __vola.773) <645>;
(__link.939 var=255) dmaddr__call_dmaddr_ (_Z16calculate_outputP4FILEP16SingleSignalPathS2_PU17chess_storage_DMBVsS4_S4_.937) <744>;
(__rt.1911 var=365) __Pvoid__pl___Pvoid_int18_ (__shv___ptr_input_port.1723 __ct_2.2134) <1673>;
(__rt.1933 var=365) __Pvoid__mi___Pvoid_int18_ (__rt.1911 __ct_2.2134) <1701>;
(__rt.1911 var=365) __Pvoid__pl___Pvoid_int18_ (__shv___ptr_input_port.1723 __ct_2.2134) <1675>;
(__rt.1933 var=365) __Pvoid__mi___Pvoid_int18_ (__rt.1911 __ct_2.2134) <1703>;
call {
(fp.925 var=109 stl=A off=0) assign (__tmp.326) <730>;
(__ptr_c_sensor_signal_t.926 var=60 stl=A off=1) assign (__ptr_c_sensor_signal_t.58) <731>;
@@ -524,16 +524,16 @@ F_main {
(__tmp.1260 var=280) deassign (__tmp.1259) <973>;
} #62 off=26
#724 off=27
(__tmp.2177 var=447) uint3__cmp_int72__int72_ (__tmp.1260 __ct_0.126) <2088>;
(__tmp.2183 var=390) bool_nequal_uint3_ (__tmp.2177) <2139>;
() void_jump_bool_int10_ (__tmp.2183 __trgt.2193) <2237>;
(__either.2194 var=460) undefined () <2238>;
(__tmp.2177 var=447) uint3__cmp_int72__int72_ (__tmp.1260 __ct_0.126) <2090>;
(__tmp.2183 var=390) bool_nequal_uint3_ (__tmp.2177) <2141>;
() void_jump_bool_int10_ (__tmp.2183 __trgt.2193) <2239>;
(__either.2194 var=460) undefined () <2240>;
if {
{
() if_expr (__either.2194) <1034>;
} #65
{
(__false.2195 var=459) const () <2239>;
(__false.2195 var=459) const () <2241>;
} #66
{
#68 off=28
@@ -545,10 +545,10 @@ F_main {
(__tmp.1348 var=289) deassign (__tmp.1347) <1043>;
} #69 off=29
#716 off=30
(__tmp.2167 var=447) uint3__cmp_int72__int72_ (__tmp.1348 __ct_0.126) <2072>;
(__tmp.2168 var=292) bool_equal_uint3_ (__tmp.2167) <2073>;
() void_jump_bool_int10_ (__tmp.2168 __trgt.2196) <2241>;
(__either.2197 var=460) undefined () <2242>;
(__tmp.2167 var=447) uint3__cmp_int72__int72_ (__tmp.1348 __ct_0.126) <2074>;
(__tmp.2168 var=292) bool_equal_uint3_ (__tmp.2167) <2075>;
() void_jump_bool_int10_ (__tmp.2168 __trgt.2196) <2243>;
(__either.2197 var=460) undefined () <2244>;
} #67
{
(__vola.1373 var=29) merge (__vola.1280 __vola.1368) <1049>;
@@ -570,7 +570,7 @@ F_main {
(__extDM_int8_.1389 var=56) merge (__extDM_int8_.1271 __extDM_int8_.1359) <1065>;
(__extPM_FILE.1390 var=57) merge (__extPM_FILE.1274 __extPM_FILE.1362) <1066>;
(__extDM_int32_.1391 var=58) merge (__extDM_int32_.1269 __extDM_int32_.1357) <1067>;
(__tmp.1681 var=293) merge (__false.2195 __either.2197) <1349>;
(__tmp.1681 var=293) merge (__false.2195 __either.2197) <1351>;
} #71
} #64
} #30
@@ -595,7 +595,7 @@ F_main {
(__extDM_int8_.1447 var=56 __extDM_int8_.1448 var=56) exit (__extDM_int8_.1389) <1097>;
(__extPM_FILE.1449 var=57 __extPM_FILE.1450 var=57) exit (__extPM_FILE.1390) <1098>;
(__extDM_int32_.1451 var=58 __extDM_int32_.1452 var=58) exit (__extDM_int32_.1391) <1099>;
(__shv___ptr_input_port.1721 var=341 __shv___ptr_input_port.1722 var=341) exit (__rt.1933) <1387>;
(__shv___ptr_input_port.1721 var=341 __shv___ptr_input_port.1722 var=341) exit (__rt.1933) <1389>;
} #73
} #28 rng=[1,65535]
} #27
@@ -665,21 +665,21 @@ F_main {
() sink (__extPM_FILE.1602) <1207>;
() sink (__extDM_int32_.1597) <1208>;
() sink (__ct_0.84) <1209>;
(__rt.1889 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_88s0.2123) <1645>;
(__ct_88s0.2123 var=407) const () <1987>;
(__rt.1889 var=365) __Pvoid__pl___Pvoid_int18_ (__rd___sp.96 __ct_88s0.2123) <1647>;
(__ct_88s0.2123 var=407) const () <1989>;
} #0
0 : 'main.c';
----------
0 : (0,28:0,0);
4 : (0,37:4,14);
5 : (0,49:100,15);
6 : (0,49:16,15);
7 : (0,50:100,16);
8 : (0,50:16,16);
9 : (0,51:88,17);
10 : (0,51:16,17);
11 : (0,52:100,18);
12 : (0,52:15,18);
5 : (0,54:101,15);
6 : (0,54:16,15);
7 : (0,55:101,16);
8 : (0,55:16,16);
9 : (0,56:89,17);
10 : (0,56:16,17);
11 : (0,57:101,18);
12 : (0,57:15,18);
13 : (0,61:4,20);
14 : (0,61:4,20);
16 : (0,61:4,20);
@@ -720,12 +720,12 @@ F_main {
719 : (0,61:4,20);
724 : (0,61:23,54);
----------
86 : (0,49:22,0);
88 : (0,49:100,0);
90 : (0,50:22,0);
92 : (0,51:22,0);
94 : (0,51:88,0);
96 : (0,52:21,0);
86 : (0,54:22,0);
88 : (0,54:101,0);
90 : (0,55:22,0);
92 : (0,56:22,0);
94 : (0,56:89,0);
96 : (0,57:21,0);
114 : (0,28:4,0);
118 : (0,28:4,0);
120 : (0,31:11,0);
@@ -734,7 +734,6 @@ F_main {
153 : (0,31:18,1);
154 : (0,31:22,0);
159 : (0,31:22,2);
162 : (0,31:26,0);
165 : (0,31:26,3);
171 : (0,31:30,4);
177 : (0,31:34,5);
@@ -754,30 +753,31 @@ F_main {
223 : (0,38:8,0);
224 : (0,45:8,0);
226 : (0,45:8,0);
227 : (0,46:8,0);
229 : (0,46:8,0);
232 : (0,37:4,14);
233 : (0,37:4,0);
234 : (0,37:4,14);
236 : (0,49:22,0);
237 : (0,49:100,0);
240 : (0,49:16,15);
241 : (0,49:16,0);
242 : (0,49:16,15);
246 : (0,50:22,0);
247 : (0,50:100,0);
250 : (0,50:16,16);
251 : (0,50:16,0);
252 : (0,50:16,16);
256 : (0,51:22,0);
257 : (0,51:88,0);
260 : (0,51:16,17);
261 : (0,51:16,0);
262 : (0,51:16,17);
266 : (0,52:21,0);
267 : (0,52:100,0);
270 : (0,52:15,18);
271 : (0,52:15,0);
272 : (0,52:15,18);
236 : (0,54:22,0);
237 : (0,54:101,0);
240 : (0,54:16,15);
241 : (0,54:16,0);
242 : (0,54:16,15);
246 : (0,55:22,0);
247 : (0,55:101,0);
250 : (0,55:16,16);
251 : (0,55:16,0);
252 : (0,55:16,16);
256 : (0,56:22,0);
257 : (0,56:89,0);
260 : (0,56:16,17);
261 : (0,56:16,0);
262 : (0,56:16,17);
266 : (0,57:21,0);
267 : (0,57:101,0);
270 : (0,57:15,18);
271 : (0,57:15,0);
272 : (0,57:15,18);
275 : (0,61:4,0);
278 : (0,61:4,20);
279 : (0,61:4,0);
@@ -940,48 +940,48 @@ F_main {
1179 : (0,77:0,66);
1180 : (0,77:0,66);
1181 : (0,77:0,0);
1349 : (0,61:23,57);
1489 : (0,28:4,0);
1517 : (0,31:11,0);
1545 : (0,32:11,0);
1573 : (0,59:8,0);
1601 : (0,59:12,0);
1645 : (0,77:0,0);
1673 : (0,69:85,0);
1729 : (0,31:22,0);
1757 : (0,31:26,0);
1785 : (0,31:30,0);
1813 : (0,31:34,0);
1841 : (0,32:22,0);
1869 : (0,32:26,0);
1897 : (0,32:30,0);
1925 : (0,32:34,0);
1985 : (0,28:4,0);
1351 : (0,61:23,57);
1491 : (0,28:4,0);
1519 : (0,31:11,0);
1547 : (0,32:11,0);
1575 : (0,59:8,0);
1603 : (0,59:12,0);
1647 : (0,77:0,0);
1675 : (0,69:85,0);
1731 : (0,31:22,0);
1759 : (0,31:26,0);
1787 : (0,31:30,0);
1815 : (0,31:34,0);
1843 : (0,32:22,0);
1871 : (0,32:26,0);
1899 : (0,32:30,0);
1927 : (0,32:34,0);
1987 : (0,28:4,0);
1989 : (0,31:11,0);
1991 : (0,32:11,0);
1997 : (0,59:8,0);
2003 : (0,59:12,0);
2009 : (0,69:85,0);
2013 : (0,31:22,0);
2019 : (0,31:26,0);
2025 : (0,31:30,0);
2031 : (0,31:34,0);
2037 : (0,32:22,0);
2043 : (0,32:26,0);
2049 : (0,32:30,0);
2055 : (0,32:34,0);
2064 : (0,61:4,22);
2072 : (0,61:23,56);
2073 : (0,61:23,56);
2080 : (0,61:4,20);
2088 : (0,61:23,54);
2138 : (0,61:4,20);
2139 : (0,61:23,54);
2186 : (0,61:4,22);
2187 : (0,61:4,23);
2234 : (0,61:4,20);
2237 : (0,61:23,54);
2241 : (0,61:4,58);
2245 : (0,61:4,24);
1989 : (0,28:4,0);
1991 : (0,31:11,0);
1993 : (0,32:11,0);
1999 : (0,59:8,0);
2005 : (0,59:12,0);
2011 : (0,69:85,0);
2015 : (0,31:22,0);
2021 : (0,31:26,0);
2027 : (0,31:30,0);
2033 : (0,31:34,0);
2039 : (0,32:22,0);
2045 : (0,32:26,0);
2051 : (0,32:30,0);
2057 : (0,32:34,0);
2066 : (0,61:4,22);
2074 : (0,61:23,56);
2075 : (0,61:23,56);
2082 : (0,61:4,20);
2090 : (0,61:23,54);
2140 : (0,61:4,20);
2141 : (0,61:23,54);
2188 : (0,61:4,22);
2189 : (0,61:4,23);
2236 : (0,61:4,20);
2239 : (0,61:23,54);
2243 : (0,61:4,58);
2247 : (0,61:4,24);