
// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Thu Mar 26 14:37:53 2026
// Copyright 2014-2025 Synopsys, Inc. All rights reserved.
// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=45 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32


/***
!!  void initialize_signal(SingleSignalPath *, SingleSignalPath *, double *, double *, int, int, double, double, double, int)
F_Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi : user_defined, called {
    fnm : "initialize_signal" 'void initialize_signal(SingleSignalPath *, SingleSignalPath *, double *, double *, int, int, double, double, double, int)';
    arg : ( dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i int32_:i int32_:i int64_:i int64_:i int64_:i int32_:i );
    loc : ( LR[0] A[0] A[1] A[2] A[3] RA[0] RA[1] AX[0] AX[1] BX[0] RB[0] );
    vac : ( srIM[0] );
    frm : ( b=8 );
}
****
!!  void scale_preemph_filter(SingleSignalPath *, double, double, double, double, double, int)
F_Z20scale_preemph_filterP16SingleSignalPathdddddi : user_defined, called {
    fnm : "scale_preemph_filter" 'void scale_preemph_filter(SingleSignalPath *, double, double, double, double, double, int)';
    arg : ( dmaddr_:i dmaddr_:i int64_:i int64_:i int64_:i int64_:i int64_:i int32_:i );
    loc : ( LR[0] A[0] AX[0] AX[1] BX[0] BX[1] __spill_LDMA[0] RA[0] );
    vac : ( srIM[0] );
    llv : 0 1 0 0 0 ;
}
!!  int set_delay(SingleSignalPath *, int)
F_Z9set_delayP16SingleSignalPathi : user_defined, called {
    fnm : "set_delay" 'int set_delay(SingleSignalPath *, int)';
    arg : ( dmaddr_:i int32_:r dmaddr_:i int32_:i );
    loc : ( LR[0] RA[0] A[0] RA[1] );
    vac : ( srIM[0] );
    llv : 0 1 0 0 0 ;
}
!!  void set_weight(SingleSignalPath *, double, int)
F_Z10set_weightP16SingleSignalPathdi : user_defined, called {
    fnm : "set_weight" 'void set_weight(SingleSignalPath *, double, int)';
    arg : ( dmaddr_:i dmaddr_:i int64_:i int32_:i );
    loc : ( LR[0] A[0] AX[0] RA[0] );
    vac : ( srIM[0] );
    llv : 0 1 0 0 0 ;
}
!!  int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)
F_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii : user_defined, called {
    fnm : "initialize_buffer_dmb" 'int initialize_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int chess_storage(DMB) *, int, int)';
    arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i );
    loc : ( LR[0] RA[0] A[4] A[5] RA[1] RB[0] );
    vac : ( srIM[0] );
    llv : 0 1 0 0 0 ;
}
!!  int initialize_buffer(BufferPtr *, int *, int, int)
F_Z17initialize_bufferP9BufferPtrPiii : user_defined, called {
    fnm : "initialize_buffer" 'int initialize_buffer(BufferPtr *, int *, int, int)';
    arg : ( dmaddr_:i int32_:r dmaddr_:i dmaddr_:i int32_:i int32_:i );
    loc : ( LR[0] RA[0] A[0] A[1] RA[1] RB[0] );
    vac : ( srIM[0] );
    llv : 0 1 0 0 0 ;
}
!!  float64 float64_mul(float64, float64)
F_Z11float64_mulyy : user_defined, called {
    fnm : "float64_mul" 'float64 float64_mul(float64, float64)';
    arg : ( dmaddr_:i int64_:r int64_:i int64_:i );
    loc : ( LR[0] AX[0] AX[1] BX[0] );
    vac : ( srIM[0] );
    llv : 0 0 0 0 0 ;
}
!!  int float64_to_int32_round_to_zero(float64)
F_Z30float64_to_int32_round_to_zeroy : user_defined, called {
    fnm : "float64_to_int32_round_to_zero" 'int float64_to_int32_round_to_zero(float64)';
    arg : ( dmaddr_:i int32_:r int64_:i );
    loc : ( LR[0] RA[0] AX[0] );
    vac : ( srIM[0] );
    llv : 0 0 0 0 0 ;
}
***/

[
    0 : _Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi typ=uint20_ bnd=e stl=PM tref=void_____PSingleSignalPath___PSingleSignalPath___P__fdouble___P__fdouble___sint___sint___fdouble___fdouble___fdouble___sint__
   11 : __M_WDMA typ=int32_ bnd=d stl=WDMA
   12 : __M_WDMB typ=int32_ bnd=d stl=WDMB
   14 : __M_LDMA typ=int64_ bnd=d stl=LDMA
   26 : __R_SP typ=dmaddr_ bnd=d stl=SP
   29 : __vola typ=uint20_ bnd=b stl=PM
   32 : __extDM typ=int8_ bnd=b stl=DM
   33 : __extPM typ=uint20_ bnd=b stl=PM
   34 : __sp typ=dmaddr_ bnd=b stl=SP
   35 : _ZL2mu typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__sint_DMA
   36 : __extDM_int32_ typ=int8_ bnd=b stl=DM
   37 : pointer_sample_line typ=int8_ bnd=e sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB
   38 : __extDM_BufferPtrDMB typ=int8_ bnd=b stl=DM
   39 : sample_line typ=int8_ bnd=e sz=180 algn=4 stl=DMB tref=__A45DMB__sint_DMB
   40 : pointer_coefficient_line typ=int8_ bnd=e sz=12 algn=4 stl=DMA tref=BufferPtr_DMA
   41 : __extDM_BufferPtr typ=int8_ bnd=b stl=DM
   42 : coefficient_line typ=int8_ bnd=e sz=180 algn=8 stl=DMA tref=__A45__sint_DMA
   43 : __extDM_SingleSignalPath typ=int8_ bnd=b stl=DM
   44 : __extDM_int64_ typ=int8_ bnd=b stl=DM
   45 : __extDM_void typ=int8_ bnd=b stl=DM
   46 : __extPM_void typ=uint20_ bnd=b stl=PM
   47 : pointer_sample_line_ptr_start typ=int8_ bnd=b stl=DM
   48 : __extDM___PDMint32_ typ=int8_ bnd=b stl=DM
   49 : pointer_coefficient_line_ptr_start typ=int8_ bnd=b stl=DM
   50 : __rd___sp typ=dmaddr_ bnd=m
   52 : __ptr_mu typ=dmaddr_ val=0a bnd=m adro=35
   53 : __ptr_pointer_sample_line typ=dmaddr_ bnd=m
   54 : __ptr_pointer_sample_line typ=dmaddr_ val=0a bnd=m adro=37
   55 : __ptr_sample_line typ=dmaddr_ bnd=m
   56 : __ptr_sample_line typ=dmaddr_ val=0a bnd=m adro=39
   57 : __ptr_pointer_coefficient_line typ=dmaddr_ bnd=m
   58 : __ptr_pointer_coefficient_line typ=dmaddr_ val=0a bnd=m adro=40
   59 : __ptr_coefficient_line typ=dmaddr_ bnd=m
   60 : __ptr_coefficient_line typ=dmaddr_ val=0a bnd=m adro=42
   61 : __ct_0 typ=uint1_ val=0f bnd=m
   62 : __la typ=dmaddr_ bnd=p tref=dmaddr___
   63 : c_sensor_signal_t typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
   64 : acc_sensor_signal_t typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
   65 : b_c typ=dmaddr_ bnd=p tref=__P__fdouble__
   66 : b_acc typ=dmaddr_ bnd=p tref=__P__fdouble__
   67 : delay_c typ=int32_ bnd=p tref=__sint__
   68 : delay_acc typ=int32_ bnd=p tref=__sint__
   69 : weight_c typ=int64_ bnd=p tref=__fdouble__
   70 : weight_acc typ=int64_ bnd=p tref=__fdouble__
   71 : lms_mu typ=int64_ bnd=p tref=__fdouble__
   72 : number_coefficients typ=int32_ bnd=p tref=__sint__
   78 : __ct_0 typ=int32_ val=0f bnd=m
   81 : __fch___extDM_int64_ typ=int64_ bnd=m
   85 : __fch___extDM_int64_ typ=int64_ bnd=m
   89 : __fch___extDM_int64_ typ=int64_ bnd=m
   93 : __fch___extDM_int64_ typ=int64_ bnd=m
   97 : __fch___extDM_int64_ typ=int64_ bnd=m
   98 : __ct_31 typ=int32_ val=31f bnd=m
   99 : __ct typ=int32_ bnd=m
  100 : _Z20scale_preemph_filterP16SingleSignalPathdddddi typ=dmaddr_ val=0r bnd=m
  102 : __link typ=dmaddr_ bnd=m
  103 : _Z9set_delayP16SingleSignalPathi typ=dmaddr_ val=0r bnd=m
  105 : __link typ=dmaddr_ bnd=m
  106 : __tmp typ=int32_ bnd=m
  108 : __ct typ=int32_ bnd=m
  109 : _Z10set_weightP16SingleSignalPathdi typ=dmaddr_ val=0r bnd=m
  111 : __link typ=dmaddr_ bnd=m
  115 : __fch___extDM_int64_ typ=int64_ bnd=m
  119 : __fch___extDM_int64_ typ=int64_ bnd=m
  123 : __fch___extDM_int64_ typ=int64_ bnd=m
  127 : __fch___extDM_int64_ typ=int64_ bnd=m
  131 : __fch___extDM_int64_ typ=int64_ bnd=m
  133 : __ct typ=int32_ bnd=m
  136 : __link typ=dmaddr_ bnd=m
  139 : __link typ=dmaddr_ bnd=m
  140 : __tmp typ=int32_ bnd=m
  142 : __ct typ=int32_ bnd=m
  145 : __link typ=dmaddr_ bnd=m
  146 : __ct_4746794007244308480 typ=int64_ val=4746794007244308480f bnd=m
  148 : __tmp typ=int64_ bnd=m
  149 : __tmp typ=int32_ bnd=m
  150 : __ct_45 typ=int32_ val=45f bnd=m
  151 : __ct typ=int32_ bnd=m
  152 : _Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii typ=dmaddr_ val=0r bnd=m
  154 : __link typ=dmaddr_ bnd=m
  155 : __tmp typ=int32_ bnd=m
  157 : __ct typ=int32_ bnd=m
  158 : _Z17initialize_bufferP9BufferPtrPiii typ=dmaddr_ val=0r bnd=m
  160 : __link typ=dmaddr_ bnd=m
  161 : __tmp typ=int32_ bnd=m
  164 : __tmp typ=bool bnd=m
  170 : __fch_pointer_sample_line_ptr_start typ=dmaddr_ bnd=m
  180 : __fch_pointer_coefficient_line_ptr_start typ=dmaddr_ bnd=m
  201 : __iv1_i typ=dmaddr_ bnd=m
  202 : __iv2_i typ=dmaddr_ bnd=m
  205 : __cv typ=uint16_ bnd=m
  213 : __ptr_pointer_sample_line__a4 typ=dmaddr_ val=4a bnd=m adro=37
  214 : __ptr_pointer_coefficient_line__a4 typ=dmaddr_ val=4a bnd=m adro=40
  217 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
  248 : __ct_0S0 typ=int18_ val=-8S0 bnd=m
  249 : __ct_0s0 typ=int18_ val=8s0 bnd=m
  250 : __ct_4 typ=int18_ val=4f bnd=m
  251 : __ct_8 typ=int18_ val=8f bnd=m
  262 : __tmp typ=uint3_ bnd=m
  267 : __a1 typ=int64_ bnd=m tref=__atp1___10
  268 : _Z11float64_mulyy typ=dmaddr_ val=0r bnd=m
  269 : __link typ=dmaddr_ bnd=m
  271 : __tmp typ=int64_ bnd=m
  273 : _Z30float64_to_int32_round_to_zeroy typ=dmaddr_ val=0r bnd=m
  274 : __link typ=dmaddr_ bnd=m
  285 : __either typ=bool bnd=m
  286 : __trgt typ=int10_ val=0j bnd=m
  287 : __trgt typ=int10_ val=0j bnd=m
  288 : __trgt typ=uint16_ val=0j bnd=m
  289 : __vcnt typ=uint16_ bnd=m
]
F_Z17initialize_signalP16SingleSignalPathS0_PdS1_iidddi {
    #276 off=0
    (__M_WDMA.9 var=11) st_def ()  <18>;
    (__M_WDMB.10 var=12) st_def ()  <20>;
    (__M_LDMA.12 var=14) st_def ()  <24>;
    (__R_SP.24 var=26) st_def ()  <48>;
    (__vola.27 var=29) source ()  <51>;
    (__extDM.30 var=32) source ()  <54>;
    (__extPM.31 var=33) source ()  <55>;
    (__sp.32 var=34) source ()  <56>;
    (_ZL2mu.33 var=35) source ()  <57>;
    (__extDM_int32_.34 var=36) source ()  <58>;
    (pointer_sample_line.35 var=37) source ()  <59>;
    (__extDM_BufferPtrDMB.36 var=38) source ()  <60>;
    (sample_line.37 var=39) source ()  <61>;
    (pointer_coefficient_line.38 var=40) source ()  <62>;
    (__extDM_BufferPtr.39 var=41) source ()  <63>;
    (coefficient_line.40 var=42) source ()  <64>;
    (__extDM_SingleSignalPath.41 var=43) source ()  <65>;
    (__extDM_int64_.42 var=44) source ()  <66>;
    (__extDM_void.43 var=45) source ()  <67>;
    (__extPM_void.44 var=46) source ()  <68>;
    (pointer_sample_line_ptr_start.45 var=47) source ()  <69>;
    (__extDM___PDMint32_.46 var=48) source ()  <70>;
    (pointer_coefficient_line_ptr_start.47 var=49) source ()  <71>;
    (__ct_0.59 var=61) const ()  <83>;
    (__la.61 var=62 stl=LR off=0) inp ()  <85>;
    (__la.62 var=62) deassign (__la.61)  <86>;
    (c_sensor_signal_t.64 var=63 stl=A off=0) inp ()  <88>;
    (c_sensor_signal_t.65 var=63) deassign (c_sensor_signal_t.64)  <89>;
    (acc_sensor_signal_t.67 var=64 stl=A off=1) inp ()  <91>;
    (acc_sensor_signal_t.68 var=64) deassign (acc_sensor_signal_t.67)  <92>;
    (b_c.70 var=65 stl=A off=2) inp ()  <94>;
    (b_c.71 var=65) deassign (b_c.70)  <95>;
    (b_acc.73 var=66 stl=A off=3) inp ()  <97>;
    (b_acc.74 var=66) deassign (b_acc.73)  <98>;
    (delay_c.76 var=67 stl=RA off=0) inp ()  <100>;
    (delay_c.77 var=67) deassign (delay_c.76)  <101>;
    (delay_acc.79 var=68 stl=RA off=1) inp ()  <103>;
    (delay_acc.80 var=68) deassign (delay_acc.79)  <104>;
    (weight_c.82 var=69 stl=AX off=0) inp ()  <106>;
    (weight_c.83 var=69) deassign (weight_c.82)  <107>;
    (weight_acc.85 var=70 stl=AX off=1) inp ()  <109>;
    (weight_acc.86 var=70) deassign (weight_acc.85)  <110>;
    (lms_mu.88 var=71 stl=BX off=0) inp ()  <112>;
    (lms_mu.89 var=71) deassign (lms_mu.88)  <113>;
    (number_coefficients.91 var=72 stl=RB off=0) inp ()  <115>;
    (number_coefficients.92 var=72) deassign (number_coefficients.91)  <116>;
    (__rd___sp.94 var=50) rd_res_reg (__R_SP.24 __sp.32)  <118>;
    (__R_SP.98 var=26 __sp.99 var=34) wr_res_reg (__rt.679 __sp.32)  <122>;
    (__fch___extDM_int64_.106 var=81) load (__M_LDMA.12 b_c.71 __extDM_int64_.42)  <130>;
    (__fch___extDM_int64_.111 var=85) load (__M_LDMA.12 __rt.767 __extDM_int64_.42)  <135>;
    (__fch___extDM_int64_.116 var=89) load (__M_LDMA.12 __rt.789 __extDM_int64_.42)  <140>;
    (__fch___extDM_int64_.121 var=93) load (__M_LDMA.12 __rt.811 __extDM_int64_.42)  <145>;
    (__fch___extDM_int64_.126 var=97) load (__M_LDMA.12 __rt.833 __extDM_int64_.42)  <150>;
    (__ct_31.128 var=98) const ()  <152>;
    (_Z20scale_preemph_filterP16SingleSignalPathdddddi.131 var=100) const ()  <155>;
    (__link.133 var=102) dmaddr__call_dmaddr_ (_Z20scale_preemph_filterP16SingleSignalPathdddddi.131)  <157>;
    (__rt.679 var=217) __Pvoid__pl___Pvoid_int18_ (__rd___sp.94 __ct_0S0.934)  <617>;
    (__rt.767 var=217) __Pvoid__pl___Pvoid_int18_ (b_c.71 __ct_8.937)  <729>;
    (__rt.789 var=217) __Pvoid__pl___Pvoid_int18_ (__rt.767 __ct_8.937)  <757>;
    (__rt.811 var=217) __Pvoid__pl___Pvoid_int18_ (__rt.789 __ct_8.937)  <785>;
    (__rt.833 var=217) __Pvoid__pl___Pvoid_int18_ (__rt.811 __ct_8.937)  <813>;
    (__ct_0S0.934 var=248) const ()  <965>;
    (__ct_8.937 var=251) const ()  <971>;
    call {
        (c_sensor_signal_t.102 var=63 stl=A off=0) assign (c_sensor_signal_t.65)  <126>;
        (__fch___extDM_int64_.107 var=81 stl=AX off=0) assign (__fch___extDM_int64_.106)  <131>;
        (__fch___extDM_int64_.112 var=85 stl=AX off=1) assign (__fch___extDM_int64_.111)  <136>;
        (__fch___extDM_int64_.117 var=89 stl=BX off=0) assign (__fch___extDM_int64_.116)  <141>;
        (__fch___extDM_int64_.122 var=93 stl=BX off=1) assign (__fch___extDM_int64_.121)  <146>;
        (__fch___extDM_int64_.127 var=97 stl=__spill_LDMA off=0) assign (__fch___extDM_int64_.126)  <151>;
        (__ct.130 var=99 stl=RA off=0) assign (__ct_31.128)  <154>;
        (__link.134 var=102 stl=LR off=0) assign (__link.133)  <158>;
        (_ZL2mu.135 var=35 __extDM.136 var=32 __extDM_BufferPtr.137 var=41 __extDM_BufferPtrDMB.138 var=38 __extDM_SingleSignalPath.139 var=43 __extDM___PDMint32_.140 var=48 __extDM_int32_.141 var=36 __extDM_int64_.142 var=44 __extDM_void.143 var=45 __extPM.144 var=33 __extPM_void.145 var=46 coefficient_line.146 var=42 pointer_coefficient_line.147 var=40 pointer_coefficient_line_ptr_start.148 var=49 pointer_sample_line.149 var=37 pointer_sample_line_ptr_start.150 var=47 sample_line.151 var=39 __vola.152 var=29) F_Z20scale_preemph_filterP16SingleSignalPathdddddi (__link.134 c_sensor_signal_t.102 __fch___extDM_int64_.107 __fch___extDM_int64_.112 __fch___extDM_int64_.117 __fch___extDM_int64_.122 __fch___extDM_int64_.127 __ct.130 _ZL2mu.33 __extDM.30 __extDM_BufferPtr.39 __extDM_BufferPtrDMB.36 __extDM_SingleSignalPath.41 __extDM___PDMint32_.46 __extDM_int32_.34 __extDM_int64_.42 __extDM_void.43 __extPM.31 __extPM_void.44 coefficient_line.40 pointer_coefficient_line.38 pointer_coefficient_line_ptr_start.47 pointer_sample_line.35 pointer_sample_line_ptr_start.45 sample_line.37 __vola.27)  <159>;
    } #4 off=1
    #5 off=2
    (_Z9set_delayP16SingleSignalPathi.155 var=103) const ()  <162>;
    (__link.157 var=105) dmaddr__call_dmaddr_ (_Z9set_delayP16SingleSignalPathi.155)  <164>;
    call {
        (c_sensor_signal_t.153 var=63 stl=A off=0) assign (c_sensor_signal_t.65)  <160>;
        (delay_c.154 var=67 stl=RA off=1) assign (delay_c.77)  <161>;
        (__link.158 var=105 stl=LR off=0) assign (__link.157)  <165>;
        (__tmp.159 var=106 stl=RA off=0 _ZL2mu.162 var=35 __extDM.163 var=32 __extDM_BufferPtr.164 var=41 __extDM_BufferPtrDMB.165 var=38 __extDM_SingleSignalPath.166 var=43 __extDM___PDMint32_.167 var=48 __extDM_int32_.168 var=36 __extDM_int64_.169 var=44 __extDM_void.170 var=45 __extPM.171 var=33 __extPM_void.172 var=46 coefficient_line.173 var=42 pointer_coefficient_line.174 var=40 pointer_coefficient_line_ptr_start.175 var=49 pointer_sample_line.176 var=37 pointer_sample_line_ptr_start.177 var=47 sample_line.178 var=39 __vola.179 var=29) F_Z9set_delayP16SingleSignalPathi (__link.158 c_sensor_signal_t.153 delay_c.154 _ZL2mu.135 __extDM.136 __extDM_BufferPtr.137 __extDM_BufferPtrDMB.138 __extDM_SingleSignalPath.139 __extDM___PDMint32_.140 __extDM_int32_.141 __extDM_int64_.142 __extDM_void.143 __extPM.144 __extPM_void.145 coefficient_line.146 pointer_coefficient_line.147 pointer_coefficient_line_ptr_start.148 pointer_sample_line.149 pointer_sample_line_ptr_start.150 sample_line.151 __vola.152)  <166>;
    } #6 off=3
    #7 off=4
    (_Z10set_weightP16SingleSignalPathdi.185 var=109) const ()  <174>;
    (__link.187 var=111) dmaddr__call_dmaddr_ (_Z10set_weightP16SingleSignalPathdi.185)  <176>;
    call {
        (c_sensor_signal_t.180 var=63 stl=A off=0) assign (c_sensor_signal_t.65)  <169>;
        (weight_c.181 var=69 stl=AX off=0) assign (weight_c.83)  <170>;
        (__ct.184 var=108 stl=RA off=0) assign (__ct_31.128)  <173>;
        (__link.188 var=111 stl=LR off=0) assign (__link.187)  <177>;
        (_ZL2mu.189 var=35 __extDM.190 var=32 __extDM_BufferPtr.191 var=41 __extDM_BufferPtrDMB.192 var=38 __extDM_SingleSignalPath.193 var=43 __extDM___PDMint32_.194 var=48 __extDM_int32_.195 var=36 __extDM_int64_.196 var=44 __extDM_void.197 var=45 __extPM.198 var=33 __extPM_void.199 var=46 coefficient_line.200 var=42 pointer_coefficient_line.201 var=40 pointer_coefficient_line_ptr_start.202 var=49 pointer_sample_line.203 var=37 pointer_sample_line_ptr_start.204 var=47 sample_line.205 var=39 __vola.206 var=29) F_Z10set_weightP16SingleSignalPathdi (__link.188 c_sensor_signal_t.180 weight_c.181 __ct.184 _ZL2mu.162 __extDM.163 __extDM_BufferPtr.164 __extDM_BufferPtrDMB.165 __extDM_SingleSignalPath.166 __extDM___PDMint32_.167 __extDM_int32_.168 __extDM_int64_.169 __extDM_void.170 __extPM.171 __extPM_void.172 coefficient_line.173 pointer_coefficient_line.174 pointer_coefficient_line_ptr_start.175 pointer_sample_line.176 pointer_sample_line_ptr_start.177 sample_line.178 __vola.179)  <178>;
    } #8 off=5
    #370 off=6
    (__fch___extDM_int64_.211 var=115) load (__M_LDMA.12 b_acc.74 __extDM_int64_.196)  <183>;
    (__fch___extDM_int64_.216 var=119) load (__M_LDMA.12 __rt.855 __extDM_int64_.196)  <188>;
    (__fch___extDM_int64_.221 var=123) load (__M_LDMA.12 __rt.877 __extDM_int64_.196)  <193>;
    (__fch___extDM_int64_.226 var=127) load (__M_LDMA.12 __rt.899 __extDM_int64_.196)  <198>;
    (__fch___extDM_int64_.231 var=131) load (__M_LDMA.12 __rt.921 __extDM_int64_.196)  <203>;
    (__link.238 var=136) dmaddr__call_dmaddr_ (_Z20scale_preemph_filterP16SingleSignalPathdddddi.131)  <210>;
    (__rt.855 var=217) __Pvoid__pl___Pvoid_int18_ (b_acc.74 __ct_8.937)  <841>;
    (__rt.877 var=217) __Pvoid__pl___Pvoid_int18_ (__rt.855 __ct_8.937)  <869>;
    (__rt.899 var=217) __Pvoid__pl___Pvoid_int18_ (__rt.877 __ct_8.937)  <897>;
    (__rt.921 var=217) __Pvoid__pl___Pvoid_int18_ (__rt.899 __ct_8.937)  <925>;
    call {
        (acc_sensor_signal_t.207 var=64 stl=A off=0) assign (acc_sensor_signal_t.68)  <179>;
        (__fch___extDM_int64_.212 var=115 stl=AX off=0) assign (__fch___extDM_int64_.211)  <184>;
        (__fch___extDM_int64_.217 var=119 stl=AX off=1) assign (__fch___extDM_int64_.216)  <189>;
        (__fch___extDM_int64_.222 var=123 stl=BX off=0) assign (__fch___extDM_int64_.221)  <194>;
        (__fch___extDM_int64_.227 var=127 stl=BX off=1) assign (__fch___extDM_int64_.226)  <199>;
        (__fch___extDM_int64_.232 var=131 stl=__spill_LDMA off=0) assign (__fch___extDM_int64_.231)  <204>;
        (__ct.235 var=133 stl=RA off=0) assign (__ct_31.128)  <207>;
        (__link.239 var=136 stl=LR off=0) assign (__link.238)  <211>;
        (_ZL2mu.240 var=35 __extDM.241 var=32 __extDM_BufferPtr.242 var=41 __extDM_BufferPtrDMB.243 var=38 __extDM_SingleSignalPath.244 var=43 __extDM___PDMint32_.245 var=48 __extDM_int32_.246 var=36 __extDM_int64_.247 var=44 __extDM_void.248 var=45 __extPM.249 var=33 __extPM_void.250 var=46 coefficient_line.251 var=42 pointer_coefficient_line.252 var=40 pointer_coefficient_line_ptr_start.253 var=49 pointer_sample_line.254 var=37 pointer_sample_line_ptr_start.255 var=47 sample_line.256 var=39 __vola.257 var=29) F_Z20scale_preemph_filterP16SingleSignalPathdddddi (__link.239 acc_sensor_signal_t.207 __fch___extDM_int64_.212 __fch___extDM_int64_.217 __fch___extDM_int64_.222 __fch___extDM_int64_.227 __fch___extDM_int64_.232 __ct.235 _ZL2mu.189 __extDM.190 __extDM_BufferPtr.191 __extDM_BufferPtrDMB.192 __extDM_SingleSignalPath.193 __extDM___PDMint32_.194 __extDM_int32_.195 __extDM_int64_.196 __extDM_void.197 __extPM.198 __extPM_void.199 coefficient_line.200 pointer_coefficient_line.201 pointer_coefficient_line_ptr_start.202 pointer_sample_line.203 pointer_sample_line_ptr_start.204 sample_line.205 __vola.206)  <212>;
    } #10 off=7
    #11 off=8
    (__link.262 var=139) dmaddr__call_dmaddr_ (_Z9set_delayP16SingleSignalPathi.155)  <217>;
    call {
        (acc_sensor_signal_t.258 var=64 stl=A off=0) assign (acc_sensor_signal_t.68)  <213>;
        (delay_acc.259 var=68 stl=RA off=1) assign (delay_acc.80)  <214>;
        (__link.263 var=139 stl=LR off=0) assign (__link.262)  <218>;
        (__tmp.264 var=140 stl=RA off=0 _ZL2mu.267 var=35 __extDM.268 var=32 __extDM_BufferPtr.269 var=41 __extDM_BufferPtrDMB.270 var=38 __extDM_SingleSignalPath.271 var=43 __extDM___PDMint32_.272 var=48 __extDM_int32_.273 var=36 __extDM_int64_.274 var=44 __extDM_void.275 var=45 __extPM.276 var=33 __extPM_void.277 var=46 coefficient_line.278 var=42 pointer_coefficient_line.279 var=40 pointer_coefficient_line_ptr_start.280 var=49 pointer_sample_line.281 var=37 pointer_sample_line_ptr_start.282 var=47 sample_line.283 var=39 __vola.284 var=29) F_Z9set_delayP16SingleSignalPathi (__link.263 acc_sensor_signal_t.258 delay_acc.259 _ZL2mu.240 __extDM.241 __extDM_BufferPtr.242 __extDM_BufferPtrDMB.243 __extDM_SingleSignalPath.244 __extDM___PDMint32_.245 __extDM_int32_.246 __extDM_int64_.247 __extDM_void.248 __extPM.249 __extPM_void.250 coefficient_line.251 pointer_coefficient_line.252 pointer_coefficient_line_ptr_start.253 pointer_sample_line.254 pointer_sample_line_ptr_start.255 sample_line.256 __vola.257)  <219>;
    } #12 off=9
    #13 off=10
    (__link.292 var=145) dmaddr__call_dmaddr_ (_Z10set_weightP16SingleSignalPathdi.185)  <229>;
    call {
        (acc_sensor_signal_t.285 var=64 stl=A off=0) assign (acc_sensor_signal_t.68)  <222>;
        (weight_acc.286 var=70 stl=AX off=0) assign (weight_acc.86)  <223>;
        (__ct.289 var=142 stl=RA off=0) assign (__ct_31.128)  <226>;
        (__link.293 var=145 stl=LR off=0) assign (__link.292)  <230>;
        (_ZL2mu.294 var=35 __extDM.295 var=32 __extDM_BufferPtr.296 var=41 __extDM_BufferPtrDMB.297 var=38 __extDM_SingleSignalPath.298 var=43 __extDM___PDMint32_.299 var=48 __extDM_int32_.300 var=36 __extDM_int64_.301 var=44 __extDM_void.302 var=45 __extPM.303 var=33 __extPM_void.304 var=46 coefficient_line.305 var=42 pointer_coefficient_line.306 var=40 pointer_coefficient_line_ptr_start.307 var=49 pointer_sample_line.308 var=37 pointer_sample_line_ptr_start.309 var=47 sample_line.310 var=39 __vola.311 var=29) F_Z10set_weightP16SingleSignalPathdi (__link.293 acc_sensor_signal_t.285 weight_acc.286 __ct.289 _ZL2mu.267 __extDM.268 __extDM_BufferPtr.269 __extDM_BufferPtrDMB.270 __extDM_SingleSignalPath.271 __extDM___PDMint32_.272 __extDM_int32_.273 __extDM_int64_.274 __extDM_void.275 __extPM.276 __extPM_void.277 coefficient_line.278 pointer_coefficient_line.279 pointer_coefficient_line_ptr_start.280 pointer_sample_line.281 pointer_sample_line_ptr_start.282 sample_line.283 __vola.284)  <231>;
    } #14 off=11
    #474 off=12
    (__ct_4746794007244308480.312 var=146) const ()  <232>;
    (_Z11float64_mulyy.954 var=268) const ()  <1022>;
    (__link.955 var=269) dmaddr__call_dmaddr_ (_Z11float64_mulyy.954)  <1023>;
    call {
        (lms_mu.956 var=71 stl=AX off=1) assign (lms_mu.89)  <1024>;
        (__a1.957 var=267 stl=BX off=0) assign (__ct_4746794007244308480.312)  <1025>;
        (__link.958 var=269 stl=LR off=0) assign (__link.955)  <1026>;
        (__tmp.959 var=271 stl=AX off=0) F_Z11float64_mulyy (__link.958 lms_mu.956 __a1.957)  <1027>;
        (__tmp.960 var=148) deassign (__tmp.959)  <1028>;
    } #475 off=13
    #480 off=14
    (_Z30float64_to_int32_round_to_zeroy.963 var=273) const ()  <1034>;
    (__link.964 var=274) dmaddr__call_dmaddr_ (_Z30float64_to_int32_round_to_zeroy.963)  <1035>;
    call {
        (__tmp.965 var=148 stl=AX off=0) assign (__tmp.960)  <1036>;
        (__link.966 var=274 stl=LR off=0) assign (__link.964)  <1037>;
        (__tmp.967 var=149 stl=RA off=0) F_Z30float64_to_int32_round_to_zeroy (__link.966 __tmp.965)  <1038>;
        (__tmp.968 var=149) deassign (__tmp.967)  <1039>;
    } #481 off=15
    #471 off=16
    (__ptr_mu.49 var=52) const ()  <73>;
    (__ptr_pointer_sample_line.51 var=54) const ()  <75>;
    (__ptr_sample_line.53 var=56) const ()  <77>;
    (__M_WDMA.316 var=11 _ZL2mu.317 var=35) store (__tmp.968 __ptr_mu.49 _ZL2mu.294)  <236>;
    (__ct_45.321 var=150) const ()  <240>;
    (_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii.324 var=152) const ()  <243>;
    (__link.326 var=154) dmaddr__call_dmaddr_ (_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii.324)  <245>;
    call {
        (__ptr_pointer_sample_line.318 var=53 stl=A off=4) assign (__ptr_pointer_sample_line.51)  <237>;
        (__ptr_sample_line.319 var=55 stl=A off=5) assign (__ptr_sample_line.53)  <238>;
        (number_coefficients.320 var=72 stl=RA off=1) assign (number_coefficients.92)  <239>;
        (__ct.323 var=151 stl=RB off=0) assign (__ct_45.321)  <242>;
        (__link.327 var=154 stl=LR off=0) assign (__link.326)  <246>;
        (__tmp.328 var=155 stl=RA off=0 _ZL2mu.331 var=35 __extDM.332 var=32 __extDM_BufferPtr.333 var=41 __extDM_BufferPtrDMB.334 var=38 __extDM_SingleSignalPath.335 var=43 __extDM___PDMint32_.336 var=48 __extDM_int32_.337 var=36 __extDM_int64_.338 var=44 __extDM_void.339 var=45 __extPM.340 var=33 __extPM_void.341 var=46 coefficient_line.342 var=42 pointer_coefficient_line.343 var=40 pointer_coefficient_line_ptr_start.344 var=49 pointer_sample_line.345 var=37 pointer_sample_line_ptr_start.346 var=47 sample_line.347 var=39 __vola.348 var=29) F_Z21initialize_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBPU17chess_storage_DMBiii (__link.327 __ptr_pointer_sample_line.318 __ptr_sample_line.319 number_coefficients.320 __ct.323 _ZL2mu.317 __extDM.295 __extDM_BufferPtr.296 __extDM_BufferPtrDMB.297 __extDM_SingleSignalPath.298 __extDM___PDMint32_.299 __extDM_int32_.300 __extDM_int64_.301 __extDM_void.302 __extPM.303 __extPM_void.304 coefficient_line.305 pointer_coefficient_line.306 pointer_coefficient_line_ptr_start.307 pointer_sample_line.308 pointer_sample_line_ptr_start.309 sample_line.310 __vola.311)  <247>;
    } #16 off=17
    #17 off=18
    (__ptr_pointer_coefficient_line.55 var=58) const ()  <79>;
    (__ptr_coefficient_line.57 var=60) const ()  <81>;
    (_Z17initialize_bufferP9BufferPtrPiii.355 var=158) const ()  <256>;
    (__link.357 var=160) dmaddr__call_dmaddr_ (_Z17initialize_bufferP9BufferPtrPiii.355)  <258>;
    call {
        (__ptr_pointer_coefficient_line.349 var=57 stl=A off=0) assign (__ptr_pointer_coefficient_line.55)  <250>;
        (__ptr_coefficient_line.350 var=59 stl=A off=1) assign (__ptr_coefficient_line.57)  <251>;
        (number_coefficients.351 var=72 stl=RA off=1) assign (number_coefficients.92)  <252>;
        (__ct.354 var=157 stl=RB off=0) assign (__ct_45.321)  <255>;
        (__link.358 var=160 stl=LR off=0) assign (__link.357)  <259>;
        (__tmp.359 var=161 stl=RA off=0 _ZL2mu.362 var=35 __extDM.363 var=32 __extDM_BufferPtr.364 var=41 __extDM_BufferPtrDMB.365 var=38 __extDM_SingleSignalPath.366 var=43 __extDM___PDMint32_.367 var=48 __extDM_int32_.368 var=36 __extDM_int64_.369 var=44 __extDM_void.370 var=45 __extPM.371 var=33 __extPM_void.372 var=46 coefficient_line.373 var=42 pointer_coefficient_line.374 var=40 pointer_coefficient_line_ptr_start.375 var=49 pointer_sample_line.376 var=37 pointer_sample_line_ptr_start.377 var=47 sample_line.378 var=39 __vola.379 var=29) F_Z17initialize_bufferP9BufferPtrPiii (__link.358 __ptr_pointer_coefficient_line.349 __ptr_coefficient_line.350 number_coefficients.351 __ct.354 _ZL2mu.331 __extDM.332 __extDM_BufferPtr.333 __extDM_BufferPtrDMB.334 __extDM_SingleSignalPath.335 __extDM___PDMint32_.336 __extDM_int32_.337 __extDM_int64_.338 __extDM_void.339 __extPM.340 __extPM_void.341 coefficient_line.342 pointer_coefficient_line.343 pointer_coefficient_line_ptr_start.344 pointer_sample_line.345 pointer_sample_line_ptr_start.346 sample_line.347 __vola.348)  <260>;
    } #18 off=19
    #466 off=20
    (__ct_0.103 var=78) const ()  <127>;
    (__tmp.947 var=262) uint3__cmp_int72__int72_ (number_coefficients.92 __ct_0.103)  <989>;
    (__tmp.975 var=164) bool_nplus_uint3_ (__tmp.947)  <1098>;
    (__trgt.978 var=286) const ()  <1126>;
    () void_jump_bool_int10_ (__tmp.975 __trgt.978)  <1127>;
    (__either.979 var=285) undefined ()  <1128>;
    if {
        {
            () if_expr (__either.979)  <306>;
            () chess_frequent_else ()  <307>;
            () chess_rear_then ()  <1129>;
        } #21
        {
            (__trgt.980 var=287) const ()  <1130>;
            () void_jump_int10_ (__trgt.980)  <1131>;
        } #27 off=24
        {
            #34 off=21
            (__fch_pointer_sample_line_ptr_start.467 var=170) load (__M_WDMB.10 __ptr_pointer_sample_line__a4.664 pointer_sample_line_ptr_start.377)  <352>;
            (__fch_pointer_coefficient_line_ptr_start.482 var=180) load (__M_WDMA.9 __ptr_pointer_coefficient_line__a4.665 pointer_coefficient_line_ptr_start.375)  <363>;
            (__cv.649 var=205) uint16__uint16____sint (number_coefficients.92)  <558>;
            (__ptr_pointer_sample_line__a4.664 var=213) const ()  <574>;
            (__ptr_pointer_coefficient_line__a4.665 var=214) const ()  <576>;
            (__ct_4.936 var=250) const ()  <969>;
            (__trgt.981 var=288) const ()  <1132>;
            () void_doloop_uint16__uint16_ (__cv.649 __trgt.981)  <1133>;
            (__vcnt.982 var=289) undefined ()  <1134>;
            for {
                {
                    (_ZL2mu.429 var=35) entry (_ZL2mu.508 _ZL2mu.362)  <314>;
                    (__extDM_int32_.430 var=36) entry (__extDM_int32_.510 __extDM_int32_.368)  <315>;
                    (sample_line.433 var=39) entry (sample_line.516 sample_line.378)  <318>;
                    (coefficient_line.436 var=42) entry (coefficient_line.522 coefficient_line.373)  <321>;
                    (__iv1_i.635 var=201) entry (__iv1_i.636 __fch_pointer_sample_line_ptr_start.467)  <545>;
                    (__iv2_i.640 var=202) entry (__iv2_i.641 __fch_pointer_coefficient_line_ptr_start.482)  <549>;
                } #24
                {
                    (__M_WDMB.472 var=12 _ZL2mu.473 var=35 __extDM_int32_.474 var=36 coefficient_line.475 var=42 sample_line.476 var=39) store (__ct_0.103 __iv1_i.635 _ZL2mu.429 __extDM_int32_.430 coefficient_line.436 sample_line.433)  <357>;
                    (__M_WDMA.487 var=11 _ZL2mu.488 var=35 __extDM_int32_.489 var=36 coefficient_line.490 var=42 sample_line.491 var=39) store (__ct_0.103 __iv2_i.640 _ZL2mu.473 __extDM_int32_.474 coefficient_line.475 sample_line.476)  <368>;
                    (__rt.723 var=217) __Pvoid__pl___Pvoid_int18_ (__iv1_i.635 __ct_4.936)  <673>;
                    (__rt.745 var=217) __Pvoid__pl___Pvoid_int18_ (__iv2_i.640 __ct_4.936)  <701>;
                } #256 off=22
                {
                    () for_count (__vcnt.982)  <373>;
                    (_ZL2mu.508 var=35 _ZL2mu.509 var=35) exit (_ZL2mu.488)  <380>;
                    (__extDM_int32_.510 var=36 __extDM_int32_.511 var=36) exit (__extDM_int32_.489)  <381>;
                    (sample_line.516 var=39 sample_line.517 var=39) exit (sample_line.491)  <384>;
                    (coefficient_line.522 var=42 coefficient_line.523 var=42) exit (coefficient_line.490)  <387>;
                    (__iv1_i.636 var=201 __iv1_i.637 var=201) exit (__rt.723)  <546>;
                    (__iv2_i.641 var=202 __iv2_i.642 var=202) exit (__rt.745)  <550>;
                } #26
            } #23 rng=[1,65535]
        } #22
        {
            (_ZL2mu.574 var=35) merge (_ZL2mu.362 _ZL2mu.509)  <413>;
            (__extDM_int32_.575 var=36) merge (__extDM_int32_.368 __extDM_int32_.511)  <414>;
            (sample_line.576 var=39) merge (sample_line.378 sample_line.517)  <415>;
            (coefficient_line.577 var=42) merge (coefficient_line.373 coefficient_line.523)  <416>;
        } #28
    } #20
    #30 off=25 nxt=-2
    (__rd___sp.580 var=50) rd_res_reg (__R_SP.24 __sp.99)  <419>;
    (__R_SP.584 var=26 __sp.585 var=34) wr_res_reg (__rt.701 __sp.99)  <423>;
    () void_ret_dmaddr_ (__la.62)  <424>;
    () sink (__vola.379)  <425>;
    () sink (__extDM.363)  <428>;
    () sink (__extPM.371)  <429>;
    () sink (__sp.585)  <430>;
    () sink (_ZL2mu.574)  <431>;
    () sink (__extDM_int32_.575)  <432>;
    () sink (pointer_sample_line.376)  <433>;
    () sink (__extDM_BufferPtrDMB.365)  <434>;
    () sink (sample_line.576)  <435>;
    () sink (pointer_coefficient_line.374)  <436>;
    () sink (__extDM_BufferPtr.364)  <437>;
    () sink (coefficient_line.577)  <438>;
    () sink (__extDM_SingleSignalPath.366)  <439>;
    () sink (__extDM_int64_.369)  <440>;
    () sink (__extDM_void.370)  <441>;
    () sink (__extPM_void.372)  <442>;
    () sink (pointer_sample_line_ptr_start.377)  <443>;
    () sink (__extDM___PDMint32_.367)  <444>;
    () sink (pointer_coefficient_line_ptr_start.375)  <445>;
    () sink (__ct_0.59)  <446>;
    (__rt.701 var=217) __Pvoid__pl___Pvoid_int18_ (__rd___sp.580 __ct_0s0.935)  <645>;
    (__ct_0s0.935 var=249) const ()  <967>;
} #0
0 : 'signal_processing\\signal_path.c';
----------
0 : (0,296:0,0);
4 : (0,311:4,2);
5 : (0,312:33,3);
6 : (0,312:4,3);
7 : (0,313:44,4);
8 : (0,313:4,4);
10 : (0,316:4,5);
11 : (0,317:35,6);
12 : (0,317:4,6);
13 : (0,318:48,7);
14 : (0,318:4,7);
16 : (0,324:4,10);
17 : (0,325:88,11);
18 : (0,325:4,11);
20 : (0,328:4,13);
22 : (0,328:4,14);
23 : (0,328:4,14);
27 : (0,328:4,22);
30 : (0,332:0,25);
256 : (0,328:50,14);
276 : (0,311:4,2);
370 : (0,316:4,5);
466 : (0,328:4,13);
471 : (0,324:4,10);
474 : (0,322:16,9);
475 : (0,322:16,9);
480 : (0,322:7,9);
481 : (0,322:7,9);
----------
77 : (0,324:48,0);
81 : (0,325:49,0);
118 : (0,296:5,0);
122 : (0,296:5,0);
126 : (0,311:25,0);
127 : (0,311:48,0);
130 : (0,311:47,2);
131 : (0,311:47,0);
135 : (0,311:55,2);
136 : (0,311:55,0);
140 : (0,311:63,2);
141 : (0,311:63,0);
145 : (0,311:71,2);
146 : (0,311:71,0);
150 : (0,311:79,2);
151 : (0,311:79,0);
152 : (0,311:84,0);
154 : (0,311:84,0);
157 : (0,311:4,2);
158 : (0,311:4,0);
159 : (0,311:4,2);
160 : (0,312:14,0);
161 : (0,312:33,0);
164 : (0,312:4,3);
165 : (0,312:4,0);
166 : (0,312:4,3);
169 : (0,313:15,0);
170 : (0,313:34,0);
173 : (0,313:44,0);
176 : (0,313:4,4);
177 : (0,313:4,0);
178 : (0,313:4,4);
179 : (0,316:25,0);
183 : (0,316:51,5);
184 : (0,316:51,0);
188 : (0,316:61,5);
189 : (0,316:61,0);
193 : (0,316:71,5);
194 : (0,316:71,0);
198 : (0,316:81,5);
199 : (0,316:81,0);
203 : (0,316:91,5);
204 : (0,316:91,0);
207 : (0,316:96,0);
210 : (0,316:4,5);
211 : (0,316:4,0);
212 : (0,316:4,5);
213 : (0,317:14,0);
214 : (0,317:35,0);
217 : (0,317:4,6);
218 : (0,317:4,0);
219 : (0,317:4,6);
222 : (0,318:15,0);
223 : (0,318:36,0);
226 : (0,318:48,0);
229 : (0,318:4,7);
230 : (0,318:4,0);
231 : (0,318:4,7);
232 : (0,322:16,0);
236 : (0,322:4,9);
237 : (0,324:26,0);
238 : (0,324:48,0);
239 : (0,324:61,0);
240 : (0,324:82,0);
242 : (0,324:82,0);
245 : (0,324:4,10);
246 : (0,324:4,0);
247 : (0,324:4,10);
250 : (0,325:22,0);
251 : (0,325:49,0);
252 : (0,325:67,0);
255 : (0,325:88,0);
258 : (0,325:4,11);
259 : (0,325:4,0);
260 : (0,325:4,11);
306 : (0,328:4,13);
314 : (0,328:4,14);
315 : (0,328:4,14);
318 : (0,328:4,14);
321 : (0,328:4,14);
352 : (0,329:27,14);
357 : (0,329:37,14);
363 : (0,330:32,15);
368 : (0,330:42,15);
373 : (0,328:4,20);
380 : (0,328:4,20);
381 : (0,328:4,20);
384 : (0,328:4,20);
387 : (0,328:4,20);
413 : (0,328:4,24);
414 : (0,328:4,24);
415 : (0,328:4,24);
416 : (0,328:4,24);
419 : (0,332:0,0);
423 : (0,332:0,25);
424 : (0,332:0,25);
574 : (0,329:27,0);
576 : (0,330:32,0);
617 : (0,296:5,0);
645 : (0,332:0,0);
729 : (0,311:55,0);
757 : (0,311:63,0);
785 : (0,311:71,0);
813 : (0,311:79,0);
841 : (0,316:61,0);
869 : (0,316:71,0);
897 : (0,316:81,0);
925 : (0,316:91,0);
965 : (0,296:5,0);
967 : (0,332:0,0);
971 : (0,311:55,0);
989 : (0,328:4,13);
1022 : (0,322:16,0);
1023 : (0,322:16,9);
1024 : (0,322:16,9);
1025 : (0,322:16,9);
1026 : (0,322:16,9);
1027 : (0,322:16,9);
1028 : (0,322:16,9);
1034 : (0,322:7,0);
1035 : (0,322:7,9);
1036 : (0,322:7,9);
1037 : (0,322:7,9);
1038 : (0,322:7,9);
1039 : (0,322:7,9);
1098 : (0,328:4,13);
1127 : (0,328:4,13);
1133 : (0,328:4,20);

