
// File generated by noodle version X-2025.06#84ea4f0b1c#250602, Wed Jan 28 15:29:46 2026
// Copyright 2014-2025 Synopsys, Inc. All rights reserved.
// C:\Synopsys\ASIP Programmer\X-2025.06\win64\bin\WINbin\noodle.exe -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/isg -IC:/Users/phangl/OneDrive - MED-EL/Desktop/LPDSP32_Modell/lib/runtime/include -DBLOCK_LEN=1 -DMAX_FIR_COEFFS=64 -D__tct_patch__=0 -ilpdsp32_chess.h +Stof +wRelease/chesswork signal_processing/signal_path.c lpdsp32


/***
!!  void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)
F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ : user_defined, called {
    fnm : "calc" 'void calc(SingleSignalPath *, SingleSignalPath *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *, volatile int16_t chess_storage(DMB) *)';
    arg : ( dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i dmaddr_:i );
    loc : ( LR[0] A[0] A[1] A[4] A[5] __spill_WDMA[0] );
    vac : ( srIM[0] );
    frm : ( );
}
****
!!  void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int)
F_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi : user_defined, called {
    fnm : "write_buffer_dmb" 'void write_buffer_dmb(BufferPtrDMB chess_storage(DMB) *, int)';
    arg : ( dmaddr_:i dmaddr_:i int32_:i );
    loc : ( LR[0] A[4] RA[0] );
    vac : ( srIM[0] );
    llv : 0 0 0 0 0 ;
}
***/

[
    0 : _Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ typ=uint20_ bnd=e stl=PM tref=void_____PSingleSignalPath___PSingleSignalPath___PDMB__sshort___PDMB__sshort___PDMB__sshort__
    8 : __M_SDMB typ=int16_ bnd=d stl=SDMB
   11 : __M_WDMA typ=int32_ bnd=d stl=WDMA
   12 : __M_WDMB typ=int32_ bnd=d stl=WDMB
   14 : __M_LDMA typ=int64_ bnd=d stl=LDMA
   26 : __R_SP typ=dmaddr_ bnd=d stl=SP
   29 : __vola typ=uint20_ bnd=b stl=PM
   32 : __extDM typ=int8_ bnd=b stl=DM
   33 : __extPM typ=uint20_ bnd=b stl=PM
   34 : __sp typ=dmaddr_ bnd=b stl=SP
   35 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
   36 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
   37 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
   38 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__A1__sint_DMA
   39 : pointer_delay_line typ=int8_ bnd=e sz=12 algn=4 stl=DMB tref=BufferPtrDMB_DMB
   40 : __extDM_BufferPtrDMB typ=int8_ bnd=b stl=DM
   41 : pointer_filter_coefficients typ=int8_ bnd=e sz=12 algn=4 stl=DMA tref=BufferPtr_DMA
   42 : __extDM_BufferPtr typ=int8_ bnd=b stl=DM
   43 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
   44 : _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32 typ=int8_ bnd=i sz=4 algn=4 stl=DMB tref=__A1DMB__sint_DMB
   45 : _ZL2mu typ=int8_ bnd=i sz=4 algn=4 stl=DMA tref=__sint_DMA
   46 : __extDM_int32_ typ=int8_ bnd=b stl=DM
   47 : __extDM_int16_ typ=int8_ bnd=b stl=DM
   48 : __extDM_void typ=int8_ bnd=b stl=DM
   49 : __extPM_void typ=uint20_ bnd=b stl=PM
   50 : pointer_delay_line_ptr_current typ=int8_ bnd=b stl=DM
   51 : __extDM___PDMint32_ typ=int8_ bnd=b stl=DM
   52 : pointer_delay_line_ptr_start typ=int8_ bnd=b stl=DM
   53 : pointer_filter_coefficients_ptr_current typ=int8_ bnd=b stl=DM
   54 : pointer_delay_line_buffer_len typ=int8_ bnd=b stl=DM
   55 : pointer_filter_coefficients_buffer_len typ=int8_ bnd=b stl=DM
   56 : pointer_filter_coefficients_ptr_start typ=int8_ bnd=b stl=DM
   57 : __extDM_int64_ typ=int8_ bnd=b stl=DM
   58 : __rd___sp typ=dmaddr_ bnd=m
   60 : __ptr_c_sensor_32 typ=dmaddr_ val=0a bnd=m adro=35
   62 : __ptr_acc_sensor_32 typ=dmaddr_ val=0a bnd=m adro=36
   64 : __ptr_c_sensor_pre typ=dmaddr_ val=0a bnd=m adro=37
   66 : __ptr_acc_sensor_pre typ=dmaddr_ val=0a bnd=m adro=38
   67 : __ptr_pointer_delay_line typ=dmaddr_ bnd=m
   68 : __ptr_pointer_delay_line typ=dmaddr_ val=0a bnd=m adro=39
   70 : __ptr_pointer_filter_coefficients typ=dmaddr_ val=0a bnd=m adro=41
   72 : __ptr_filter_accumulator typ=dmaddr_ val=0a bnd=m adro=43
   74 : __ptr_output_32 typ=dmaddr_ val=0a bnd=m adro=44
   76 : __ptr_mu typ=dmaddr_ val=0a bnd=m adro=45
   77 : __ct_0 typ=uint1_ val=0f bnd=m
   78 : __la typ=dmaddr_ bnd=p tref=dmaddr___
   79 : c_sensor_signal_t typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
   80 : acc_sensor_signal_t typ=dmaddr_ bnd=p tref=__PSingleSignalPath__
   81 : c_sensor_input typ=dmaddr_ bnd=p tref=__PDMB__sshort__
   82 : acc_sensor_input typ=dmaddr_ bnd=p tref=__PDMB__sshort__
   83 : output_port typ=dmaddr_ bnd=p tref=__PDMB__sshort__
   91 : __tmpb0_F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ typ=int32_ bnd=m tref=__sint__
   96 : __inl_p_x0 typ=dmaddr_ bnd=m tref=__PDMB__sint__
   98 : __inl_p_w typ=dmaddr_ bnd=m tref=__P__sint__
  101 : __inl_acc_fir_1 typ=int72_ bnd=m tref=accum_t__
  102 : __inl_acc_fir_2 typ=int72_ bnd=m tref=accum_t__
  110 : __inl_acc_fir typ=int72_ bnd=m tref=accum_t__
  117 : __inl_p_w0 typ=dmaddr_ bnd=m tref=__P__sint__
  118 : __inl_p_x0 typ=dmaddr_ bnd=m tref=__PDMB__sint__
  119 : __inl_p_x1 typ=dmaddr_ bnd=m tref=__PDMB__sint__
  123 : __inl_product typ=int72_ bnd=m tref=accum_t__
  124 : __inl_correction typ=int32_ bnd=m tref=__sint__
  126 : __inl_w0 typ=int32_ bnd=m tref=__sint__
  127 : __inl_w1 typ=int32_ bnd=m tref=__sint__
  128 : __inl_acc_w0 typ=int72_ bnd=m tref=accum_t__
  129 : __inl_acc_w1 typ=int72_ bnd=m tref=accum_t__
  136 : __ct_2 typ=int32_ val=2f bnd=m
  140 : __fch___extDM_int16_ typ=int16_ bnd=m
  142 : __ct_16 typ=int32_ val=16f bnd=m
  144 : __tmp typ=int32_ bnd=m
  155 : __fch___extDM_int16_ typ=int16_ bnd=m
  159 : __tmp typ=int32_ bnd=m
  201 : __ct_0 typ=int32_ val=0f bnd=m
  204 : __fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre typ=int32_ bnd=m
  205 : _Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi typ=dmaddr_ val=0r bnd=m
  207 : __link typ=dmaddr_ bnd=m
  211 : __fch_pointer_delay_line_ptr_current typ=dmaddr_ bnd=m
  215 : __fch_pointer_delay_line_ptr_start typ=dmaddr_ bnd=m
  219 : __fch_pointer_filter_coefficients_ptr_current typ=dmaddr_ bnd=m
  223 : __fch_pointer_delay_line_buffer_len typ=int32_ bnd=m
  227 : __fch_pointer_filter_coefficients_buffer_len typ=int32_ bnd=m
  236 : __fchtmp typ=int32_ bnd=m
  237 : __fchtmp typ=int32_ bnd=m
  247 : __fchtmp typ=int32_ bnd=m
  248 : __fchtmp typ=int32_ bnd=m
  258 : __tmp typ=int72_ bnd=m
  260 : __tmp typ=int72_ bnd=m
  274 : __fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre typ=int32_ bnd=m
  279 : __tmp typ=int32_ bnd=m
  290 : __fch_pointer_filter_coefficients_ptr_start typ=dmaddr_ bnd=m
  327 : __fch__ZL2mu typ=int32_ bnd=m
  332 : __fchtmp typ=int64_ bnd=m
  338 : __fchtmp typ=int32_ bnd=m
  339 : __tmp typ=int72_ bnd=m
  341 : __fchtmp typ=int32_ bnd=m
  342 : __tmp typ=int72_ bnd=m
  356 : __tmp typ=int32_ bnd=m
  357 : __tmp typ=int32_ bnd=m
  358 : __tmp typ=int64_ bnd=m
  377 : __fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32 typ=int32_ bnd=m
  381 : __tmp typ=int72_ bnd=m
  382 : __tmp typ=int32_ bnd=m
  383 : __tmp typ=int16_ bnd=m
  423 : __ct_m4 typ=int18_ val=-4f bnd=m
  424 : __ct_m8 typ=int18_ val=-8f bnd=m
  448 : __vcnt typ=int32_ bnd=m
  449 : __ct_m1 typ=int32_ val=-1f bnd=m
  450 : __ct_1 typ=int32_ val=1f bnd=m
  451 : __cv typ=uint16_ bnd=m
  477 : __ptr_pointer_filter_coefficients__a8 typ=dmaddr_ val=8a bnd=m adro=41
  480 : __rt typ=dmaddr_ bnd=m tref=__Pvoid__
  508 : __ct_0S0 typ=int18_ val=0S0 bnd=m
  509 : __ct_0s0 typ=int18_ val=0s0 bnd=m
  510 : __ct_4 typ=int18_ val=4f bnd=m
  511 : __ct_8 typ=int18_ val=8f bnd=m
  515 : __ct_2 typ=uint2_ val=2f bnd=m
  522 : __ct_1 typ=uint2_ val=1f bnd=m
  527 : __tmp typ=int72_ bnd=m
  532 : __tmp typ=int18_ bnd=m
  540 : __trgt typ=uint16_ val=0j bnd=m
  541 : __vcnt typ=uint16_ bnd=m
  542 : __trgt typ=uint16_ val=0j bnd=m
  543 : __vcnt typ=uint16_ bnd=m
]
F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_ {
    #593 off=0
    (__M_SDMB.6 var=8) st_def ()  <12>;
    (__M_WDMA.9 var=11) st_def ()  <18>;
    (__M_WDMB.10 var=12) st_def ()  <20>;
    (__M_LDMA.12 var=14) st_def ()  <24>;
    (__R_SP.24 var=26) st_def ()  <48>;
    (__vola.27 var=29) source ()  <51>;
    (__extDM.30 var=32) source ()  <54>;
    (__extPM.31 var=33) source ()  <55>;
    (__sp.32 var=34) source ()  <56>;
    (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32.33 var=35) source ()  <57>;
    (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32.34 var=36) source ()  <58>;
    (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.35 var=37) source ()  <59>;
    (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.36 var=38) source ()  <60>;
    (pointer_delay_line.37 var=39) source ()  <61>;
    (__extDM_BufferPtrDMB.38 var=40) source ()  <62>;
    (pointer_filter_coefficients.39 var=41) source ()  <63>;
    (__extDM_BufferPtr.40 var=42) source ()  <64>;
    (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator.41 var=43) source ()  <65>;
    (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.42 var=44) source ()  <66>;
    (_ZL2mu.43 var=45) source ()  <67>;
    (__extDM_int32_.44 var=46) source ()  <68>;
    (__extDM_int16_.45 var=47) source ()  <69>;
    (__extDM_void.46 var=48) source ()  <70>;
    (__extPM_void.47 var=49) source ()  <71>;
    (pointer_delay_line_ptr_current.48 var=50) source ()  <72>;
    (__extDM___PDMint32_.49 var=51) source ()  <73>;
    (pointer_delay_line_ptr_start.50 var=52) source ()  <74>;
    (pointer_filter_coefficients_ptr_current.51 var=53) source ()  <75>;
    (pointer_delay_line_buffer_len.52 var=54) source ()  <76>;
    (pointer_filter_coefficients_buffer_len.53 var=55) source ()  <77>;
    (pointer_filter_coefficients_ptr_start.54 var=56) source ()  <78>;
    (__extDM_int64_.55 var=57) source ()  <79>;
    (__ptr_c_sensor_32.57 var=60) const ()  <81>;
    (__ptr_acc_sensor_32.59 var=62) const ()  <83>;
    (__ptr_c_sensor_pre.61 var=64) const ()  <85>;
    (__ptr_acc_sensor_pre.63 var=66) const ()  <87>;
    (__ptr_pointer_delay_line.65 var=68) const ()  <89>;
    (__ct_0.75 var=77) const ()  <99>;
    (__la.77 var=78 stl=LR off=0) inp ()  <101>;
    (__la.78 var=78) deassign (__la.77)  <102>;
    (c_sensor_signal_t.80 var=79 stl=A off=0) inp ()  <104>;
    (acc_sensor_signal_t.83 var=80 stl=A off=1) inp ()  <107>;
    (c_sensor_input.86 var=81 stl=A off=4) inp ()  <110>;
    (c_sensor_input.87 var=81) deassign (c_sensor_input.86)  <111>;
    (acc_sensor_input.89 var=82 stl=A off=5) inp ()  <113>;
    (acc_sensor_input.90 var=82) deassign (acc_sensor_input.89)  <114>;
    (output_port.92 var=83 stl=__spill_WDMA off=0) inp ()  <116>;
    (output_port.93 var=83) deassign (output_port.92)  <117>;
    (__rd___sp.95 var=58) rd_res_reg (__R_SP.24 __sp.32)  <119>;
    (__R_SP.99 var=26 __sp.100 var=34) wr_res_reg (__rt.2216 __sp.32)  <123>;
    (__fch___extDM_int16_.243 var=140 __extDM_int16_.244 var=47 __vola.245 var=29) load (__M_SDMB.6 c_sensor_input.87 __extDM_int16_.45 __vola.27)  <267>;
    (__ct_16.247 var=142) const ()  <269>;
    (__M_WDMA.255 var=11 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32.256 var=35) store (__tmp.2412 __ptr_c_sensor_32.57 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32.33)  <277>;
    (__fch___extDM_int16_.262 var=155 __extDM_int16_.263 var=47 __vola.264 var=29) load (__M_SDMB.6 acc_sensor_input.90 __extDM_int16_.244 __vola.245)  <283>;
    (__M_WDMA.274 var=11 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32.275 var=36) store (__tmp.2417 __ptr_acc_sensor_32.59 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32.34)  <293>;
    (__M_WDMA.560 var=11 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.561 var=37) store (__tmp.2412 __ptr_c_sensor_pre.61 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.35)  <491>;
    (__M_WDMA.573 var=11 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.574 var=38) store (__tmp.2417 __ptr_acc_sensor_pre.63 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.36)  <503>;
    (_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi.763 var=205) const ()  <605>;
    (__link.765 var=207) dmaddr__call_dmaddr_ (_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi.763)  <607>;
    (__rt.2216 var=480) __Pvoid__pl___Pvoid_int18_ (__rd___sp.95 __ct_0S0.2405)  <1902>;
    (__ct_0S0.2405 var=508) const ()  <2169>;
    (__ct_2.2411 var=515) const ()  <2180>;
    (__tmp.2412 var=144) int72__shift_int72__int72__uint2_ (__fch___extDM_int16_.243 __ct_16.247 __ct_2.2411)  <2181>;
    (__tmp.2417 var=159) int72__shift_int72__int72__uint2_ (__fch___extDM_int16_.262 __ct_16.247 __ct_2.2411)  <2189>;
    call {
        (__ptr_pointer_delay_line.757 var=67 stl=A off=4) assign (__ptr_pointer_delay_line.65)  <599>;
        (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.762 var=204 stl=RA off=0) assign (__tmp.2417)  <604>;
        (__link.766 var=207 stl=LR off=0) assign (__link.765)  <608>;
        (_ZL2mu.767 var=45 __extDM.768 var=32 __extDM_BufferPtr.769 var=42 __extDM_BufferPtrDMB.770 var=40 __extDM___PDMint32_.771 var=51 __extDM_int16_.772 var=47 __extDM_int32_.773 var=46 __extDM_int64_.774 var=57 __extDM_void.775 var=48 __extPM.776 var=33 __extPM_void.777 var=49 pointer_delay_line.778 var=39 pointer_delay_line_buffer_len.779 var=54 pointer_delay_line_ptr_current.780 var=50 pointer_delay_line_ptr_start.781 var=52 pointer_filter_coefficients.782 var=41 pointer_filter_coefficients_buffer_len.783 var=55 pointer_filter_coefficients_ptr_current.784 var=53 pointer_filter_coefficients_ptr_start.785 var=56 __vola.786 var=29) F_Z16write_buffer_dmbPU17chess_storage_DMB12BufferPtrDMBi (__link.766 __ptr_pointer_delay_line.757 __fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.762 _ZL2mu.43 __extDM.30 __extDM_BufferPtr.40 __extDM_BufferPtrDMB.38 __extDM___PDMint32_.49 __extDM_int16_.263 __extDM_int32_.44 __extDM_int64_.55 __extDM_void.46 __extPM.31 __extPM_void.47 pointer_delay_line.37 pointer_delay_line_buffer_len.52 pointer_delay_line_ptr_current.48 pointer_delay_line_ptr_start.50 pointer_filter_coefficients.39 pointer_filter_coefficients_buffer_len.53 pointer_filter_coefficients_ptr_current.51 pointer_filter_coefficients_ptr_start.54 __vola.264)  <609>;
    } #14 off=1
    #615 off=2
    (__ptr_pointer_filter_coefficients.67 var=70) const ()  <91>;
    (__ct_2.239 var=136) const ()  <263>;
    (__ct_0.758 var=201) const ()  <600>;
    (__fch_pointer_delay_line_ptr_current.796 var=211) load (__M_WDMB.10 __rt.2326 pointer_delay_line_ptr_current.780)  <619>;
    (__fch_pointer_delay_line_ptr_start.801 var=215) load (__M_WDMB.10 __rt.2348 pointer_delay_line_ptr_start.781)  <624>;
    (__fch_pointer_filter_coefficients_ptr_current.806 var=219) load (__M_WDMA.9 __ptr_pointer_filter_coefficients__a8.2202 pointer_filter_coefficients_ptr_current.784)  <629>;
    (__fch_pointer_delay_line_buffer_len.811 var=223) load (__M_WDMB.10 __rt.2370 pointer_delay_line_buffer_len.779)  <634>;
    (__fch_pointer_filter_coefficients_buffer_len.816 var=227) load (__M_WDMA.9 __ptr_pointer_filter_coefficients.67 pointer_filter_coefficients_buffer_len.783)  <639>;
    (__ct_m4.2073 var=423) const ()  <1735>;
    (__ct_m1.2134 var=449) const ()  <1787>;
    (__vcnt.2135 var=448) __sint__pl___sint___sint (__fch_pointer_filter_coefficients_buffer_len.816 __ct_m1.2134)  <1789>;
    (__ct_1.2137 var=450) const ()  <1791>;
    (__vcnt.2138 var=448) __sint__pl___sint___sint (__vcnt.2433 __ct_1.2137)  <1793>;
    (__cv.2139 var=451) uint16__uint16____sint (__vcnt.2138)  <1794>;
    (__ptr_pointer_filter_coefficients__a8.2202 var=477) const ()  <1858>;
    (__rt.2326 var=480) __Pvoid__pl___Pvoid_int18_ (__ptr_pointer_delay_line.65 __ct_8.2408)  <2042>;
    (__rt.2348 var=480) __Pvoid__mi___Pvoid_int18_ (__rt.2326 __ct_4.2407)  <2070>;
    (__rt.2370 var=480) __Pvoid__mi___Pvoid_int18_ (__rt.2348 __ct_4.2407)  <2098>;
    (__rt.2392 var=480) __Pvoid__pl___Pvoid_int18_ (__ptr_pointer_filter_coefficients.67 __ct_4.2407)  <2126>;
    (__ct_4.2407 var=510) const ()  <2173>;
    (__ct_8.2408 var=511) const ()  <2175>;
    (__tmp.2422 var=532) int72__shift_int72__int72__uint2_ (__fch_pointer_delay_line_buffer_len.811 __ct_2.239 __ct_2.2411)  <2197>;
    (__ct_1.2426 var=522) const ()  <2204>;
    (__tmp.2432 var=527) int72__shift_int72__int72__uint2_ (__vcnt.2135 __ct_1.2137 __ct_1.2426)  <2213>;
    (__vcnt.2433 var=448) int32__extract_high_int72_ (__tmp.2432)  <2214>;
    (__trgt.2441 var=540) const ()  <2305>;
    () void_doloop_uint16__uint16_ (__cv.2139 __trgt.2441)  <2306>;
    (__vcnt.2442 var=541) undefined ()  <2307>;
    for {
        {
            (__inl_p_x0.880 var=96) entry (__inl_p_x0.1045 __fch_pointer_delay_line_ptr_current.796)  <703>;
            (__inl_p_w.882 var=98) entry (__inl_p_w.1049 __fch_pointer_filter_coefficients_ptr_current.806)  <705>;
            (__inl_acc_fir_1.885 var=101) entry (__inl_acc_fir_1.1055 __ct_0.758)  <708>;
            (__inl_acc_fir_2.886 var=102) entry (__inl_acc_fir_2.1057 __ct_0.758)  <709>;
        } #17
        {
            (__fchtmp.921 var=236) load (__M_WDMB.10 __inl_p_x0.880 _ZL2mu.767 __extDM_int32_.773 pointer_delay_line_buffer_len.779 pointer_filter_coefficients_buffer_len.783)  <744>;
            (__fchtmp.922 var=237) load (__M_WDMA.9 __inl_p_w.882 _ZL2mu.767 __extDM_int32_.773 pointer_delay_line_buffer_len.779 pointer_filter_coefficients_buffer_len.783)  <745>;
            (__fchtmp.932 var=247) load (__M_WDMB.10 __inl_p_x0.2012 _ZL2mu.767 __extDM_int32_.773 pointer_delay_line_buffer_len.779 pointer_filter_coefficients_buffer_len.783)  <755>;
            (__fchtmp.933 var=248) load (__M_WDMA.9 __rt.2260 _ZL2mu.767 __extDM_int32_.773 pointer_delay_line_buffer_len.779 pointer_filter_coefficients_buffer_len.783)  <756>;
            (__inl_acc_fir_1.944 var=101) accum_t__pl_accum_t_accum_t (__inl_acc_fir_1.885 __tmp.2025)  <767>;
            (__inl_acc_fir_2.946 var=102) accum_t__pl_accum_t_accum_t (__inl_acc_fir_2.886 __tmp.2030)  <769>;
            (__inl_p_x0.2012 var=96) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x0.880 __ct_m4.2073 __fch_pointer_delay_line_ptr_start.801 __tmp.2422)  <1621>;
            (__inl_p_x0.2020 var=96) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x0.2012 __ct_m4.2073 __fch_pointer_delay_line_ptr_start.801 __tmp.2422)  <1632>;
            (__tmp.2025 var=258) int72__multss_int32__int32__uint1_ (__fchtmp.921 __fchtmp.922 __ct_0.75)  <1640>;
            (__tmp.2030 var=260) int72__multss_int32__int32__uint1_ (__fchtmp.932 __fchtmp.933 __ct_0.75)  <1648>;
            (__rt.2260 var=480) __Pvoid__pl___Pvoid_int18_ (__inl_p_w.882 __ct_4.2407)  <1958>;
            (__rt.2282 var=480) __Pvoid__pl___Pvoid_int18_ (__rt.2260 __ct_4.2407)  <1986>;
        } #403 off=3
        {
            () for_count (__vcnt.2442)  <774>;
            (__inl_p_x0.1045 var=96 __inl_p_x0.1046 var=96) exit (__inl_p_x0.2020)  <822>;
            (__inl_p_w.1049 var=98 __inl_p_w.1050 var=98) exit (__rt.2282)  <824>;
            (__inl_acc_fir_1.1055 var=101 __inl_acc_fir_1.1056 var=101) exit (__inl_acc_fir_1.944)  <827>;
            (__inl_acc_fir_2.1057 var=102 __inl_acc_fir_2.1058 var=102) exit (__inl_acc_fir_2.946)  <828>;
        } #19
    } #16 rng=[1,65535]
    #99 off=4
    (__ptr_filter_accumulator.69 var=72) const ()  <93>;
    (__ptr_output_32.71 var=74) const ()  <95>;
    (__ptr_mu.73 var=76) const ()  <97>;
    (__inl_acc_fir.1127 var=110) accum_t__pl_accum_t_accum_t (__inl_acc_fir_1.1056 __inl_acc_fir_2.1058)  <863>;
    (__tmpb0_F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_.1128 var=91) __sint_rnd_saturate_accum_t (__inl_acc_fir.1127)  <864>;
    (__M_WDMB.1132 var=12 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator.1133 var=43) store (__tmpb0_F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_.1128 __ptr_filter_accumulator.69 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator.41)  <868>;
    (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.1137 var=274) load (__M_WDMA.9 __ptr_c_sensor_pre.61 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.561)  <872>;
    (__tmp.1142 var=279) __sint__mi___sint___sint (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.1137 __tmpb0_F_Z4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_.1128)  <877>;
    (__M_WDMB.1146 var=12 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1147 var=44) store (__tmp.1142 __ptr_output_32.71 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.42)  <881>;
    (__fch_pointer_filter_coefficients_ptr_start.1163 var=290) load (__M_WDMA.9 __rt.2392 pointer_filter_coefficients_ptr_start.785)  <897>;
    (__fch__ZL2mu.1211 var=327) load (__M_WDMA.9 __ptr_mu.73 _ZL2mu.767)  <945>;
    (__inl_correction.1213 var=124) __sint_rnd_saturate_accum_t (__inl_product.2043)  <947>;
    (__inl_p_x1.2038 var=119) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__fch_pointer_delay_line_ptr_current.796 __ct_m4.2073 __fch_pointer_delay_line_ptr_start.801 __tmp.2422)  <1659>;
    (__inl_product.2043 var=123) int72__multss_int32__int32__uint1_ (__fch__ZL2mu.1211 __tmp.1142 __ct_0.75)  <1667>;
    (__ct_m8.2074 var=424) const ()  <1737>;
    (__trgt.2443 var=542) const ()  <2308>;
    () void_doloop_uint16__uint16_ (__cv.2139 __trgt.2443)  <2309>;
    (__vcnt.2444 var=543) undefined ()  <2310>;
    for {
        {
            (_ZL2mu.1233 var=45) entry (_ZL2mu.1378 _ZL2mu.767)  <967>;
            (__extDM_int32_.1234 var=46) entry (__extDM_int32_.1380 __extDM_int32_.773)  <968>;
            (pointer_delay_line_buffer_len.1242 var=54) entry (pointer_delay_line_buffer_len.1396 pointer_delay_line_buffer_len.779)  <976>;
            (pointer_filter_coefficients_buffer_len.1243 var=55) entry (pointer_filter_coefficients_buffer_len.1398 pointer_filter_coefficients_buffer_len.783)  <977>;
            (__extDM_int64_.1245 var=57) entry (__extDM_int64_.1402 __extDM_int64_.774)  <979>;
            (__inl_p_w0.1287 var=117) entry (__inl_p_w0.1486 __fch_pointer_filter_coefficients_ptr_start.1163)  <1021>;
            (__inl_p_x0.1288 var=118) entry (__inl_p_x0.1488 __fch_pointer_delay_line_ptr_current.796)  <1022>;
            (__inl_p_x1.1289 var=119) entry (__inl_p_x1.1490 __inl_p_x1.2038)  <1023>;
        } #22
        {
            (__fchtmp.1305 var=332) load (__M_LDMA.12 __inl_p_w0.1287 _ZL2mu.1233 __extDM_int32_.1234 __extDM_int64_.1245 pointer_delay_line_buffer_len.1242 pointer_filter_coefficients_buffer_len.1243)  <1039>;
            (__inl_w0.1307 var=126 __inl_w1.1308 var=127) void_lldecompose___ulonglong___sint___sint (__fchtmp.1305)  <1041>;
            (__fchtmp.1311 var=338) load (__M_WDMB.10 __inl_p_x0.1288 _ZL2mu.1233 __extDM_int32_.1234 pointer_delay_line_buffer_len.1242 pointer_filter_coefficients_buffer_len.1243)  <1044>;
            (__inl_acc_w0.1313 var=128) accum_t__pl_accum_t_accum_t (__inl_w0.1307 __tmp.2048)  <1046>;
            (__fchtmp.1314 var=341) load (__M_WDMB.10 __inl_p_x1.1289 _ZL2mu.1233 __extDM_int32_.1234 pointer_delay_line_buffer_len.1242 pointer_filter_coefficients_buffer_len.1243)  <1047>;
            (__inl_acc_w1.1316 var=129) accum_t__pl_accum_t_accum_t (__inl_w1.1308 __tmp.2053)  <1049>;
            (__tmp.1329 var=356) __sint_rnd_saturate_accum_t (__inl_acc_w0.1313)  <1062>;
            (__tmp.1330 var=357) __sint_rnd_saturate_accum_t (__inl_acc_w1.1316)  <1063>;
            (__tmp.1331 var=358) __ulonglong_llcompose___sint___sint (__tmp.1329 __tmp.1330)  <1064>;
            (__M_LDMA.1333 var=14 _ZL2mu.1334 var=45 __extDM_int32_.1335 var=46 __extDM_int64_.1336 var=57 pointer_delay_line_buffer_len.1337 var=54 pointer_filter_coefficients_buffer_len.1338 var=55) store (__tmp.1331 __inl_p_w0.1287 _ZL2mu.1233 __extDM_int32_.1234 __extDM_int64_.1245 pointer_delay_line_buffer_len.1242 pointer_filter_coefficients_buffer_len.1243)  <1066>;
            (__tmp.2048 var=339) int72__multss_int32__int32__uint1_ (__inl_correction.1213 __fchtmp.1311 __ct_0.75)  <1675>;
            (__tmp.2053 var=342) int72__multss_int32__int32__uint1_ (__inl_correction.1213 __fchtmp.1314 __ct_0.75)  <1683>;
            (__inl_p_x0.2061 var=118) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x0.1288 __ct_m8.2074 __fch_pointer_delay_line_ptr_start.801 __tmp.2422)  <1694>;
            (__inl_p_x1.2069 var=119) dmaddr__add_mod_dmaddr__int18__dmaddr__int18_ (__inl_p_x1.1289 __ct_m8.2074 __fch_pointer_delay_line_ptr_start.801 __tmp.2422)  <1705>;
            (__rt.2304 var=480) __Pvoid__pl___Pvoid_int18_ (__inl_p_w0.1287 __ct_8.2408)  <2014>;
        } #473 off=5
        {
            () for_count (__vcnt.2444)  <1074>;
            (_ZL2mu.1378 var=45 _ZL2mu.1379 var=45) exit (_ZL2mu.1334)  <1091>;
            (__extDM_int32_.1380 var=46 __extDM_int32_.1381 var=46) exit (__extDM_int32_.1335)  <1092>;
            (pointer_delay_line_buffer_len.1396 var=54 pointer_delay_line_buffer_len.1397 var=54) exit (pointer_delay_line_buffer_len.1337)  <1100>;
            (pointer_filter_coefficients_buffer_len.1398 var=55 pointer_filter_coefficients_buffer_len.1399 var=55) exit (pointer_filter_coefficients_buffer_len.1338)  <1101>;
            (__extDM_int64_.1402 var=57 __extDM_int64_.1403 var=57) exit (__extDM_int64_.1336)  <1103>;
            (__inl_p_w0.1486 var=117 __inl_p_w0.1487 var=117) exit (__rt.2304)  <1145>;
            (__inl_p_x0.1488 var=118 __inl_p_x0.1489 var=118) exit (__inl_p_x0.2061)  <1146>;
            (__inl_p_x1.1490 var=119 __inl_p_x1.1491 var=119) exit (__inl_p_x1.2069)  <1147>;
        } #24
    } #21 rng=[1,65535]
    #36 off=6 nxt=-2
    (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1709 var=377) load (__M_WDMB.10 __ptr_output_32.71 _ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1147)  <1352>;
    (__tmp.1714 var=382) __sint_rnd_saturate_accum_t (__tmp.2427)  <1357>;
    (__tmp.1715 var=383) __sshort___sshort___sint (__tmp.1714)  <1358>;
    (__M_SDMB.1721 var=8 __extDM_int16_.1722 var=47 __vola.1723 var=29) store (__tmp.1715 output_port.93 __extDM_int16_.772 __vola.786)  <1364>;
    (__rd___sp.1910 var=58) rd_res_reg (__R_SP.24 __sp.100)  <1464>;
    (__R_SP.1914 var=26 __sp.1915 var=34) wr_res_reg (__rt.2238 __sp.100)  <1468>;
    () void_ret_dmaddr_ (__la.78)  <1469>;
    () sink (__vola.1723)  <1470>;
    () sink (__extDM.768)  <1473>;
    () sink (__extPM.776)  <1474>;
    () sink (__sp.1915)  <1475>;
    () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E11c_sensor_32.256)  <1476>;
    () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E13acc_sensor_32.275)  <1477>;
    () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E12c_sensor_pre.561)  <1478>;
    () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E14acc_sensor_pre.574)  <1479>;
    () sink (pointer_delay_line.778)  <1480>;
    () sink (__extDM_BufferPtrDMB.770)  <1481>;
    () sink (pointer_filter_coefficients.782)  <1482>;
    () sink (__extDM_BufferPtr.769)  <1483>;
    () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E18filter_accumulator.1133)  <1484>;
    () sink (_ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1147)  <1485>;
    () sink (_ZL2mu.1379)  <1486>;
    () sink (__extDM_int32_.1381)  <1487>;
    () sink (__extDM_int16_.1722)  <1488>;
    () sink (__extDM_void.775)  <1489>;
    () sink (__extPM_void.777)  <1490>;
    () sink (pointer_delay_line_ptr_current.780)  <1491>;
    () sink (__extDM___PDMint32_.771)  <1492>;
    () sink (pointer_delay_line_ptr_start.781)  <1493>;
    () sink (pointer_filter_coefficients_ptr_current.784)  <1494>;
    () sink (pointer_delay_line_buffer_len.1397)  <1495>;
    () sink (pointer_filter_coefficients_buffer_len.1399)  <1496>;
    () sink (pointer_filter_coefficients_ptr_start.785)  <1497>;
    () sink (__extDM_int64_.1403)  <1498>;
    () sink (__ct_0.75)  <1499>;
    (__rt.2238 var=480) __Pvoid__pl___Pvoid_int18_ (__rd___sp.1910 __ct_0s0.2406)  <1930>;
    (__ct_0s0.2406 var=509) const ()  <2171>;
    (__tmp.2427 var=381) int72__shift_int72__int72__uint2_ (__fch__ZZ4calcP16SingleSignalPathS0_PU17chess_storage_DMBVsS2_S2_E9output_32.1709 __ct_16.247 __ct_1.2426)  <2205>;
} #0
0 : 'signal_processing\\signal_path.c';
----------
0 : (0,331:0,0);
14 : (0,367:4,23);
16 : (0,370:28,40);
21 : (0,374:4,82);
36 : (0,381:0,110);
99 : (0,374:4,80);
403 : (0,370:28,53);
473 : (0,374:4,0);
593 : (0,367:4,23);
615 : (0,370:28,40);
----------
85 : (0,372:19,0);
87 : (0,367:42,0);
89 : (0,370:28,0);
91 : (0,370:28,0);
93 : (0,370:4,0);
95 : (0,372:4,0);
119 : (0,331:5,0);
123 : (0,331:5,0);
263 : (0,355:47,0);
267 : (0,355:47,8);
269 : (0,355:55,0);
277 : (0,355:19,8);
283 : (0,356:50,9);
293 : (0,356:21,9);
491 : (0,360:21,16);
503 : (0,361:23,17);
599 : (0,367:21,0);
600 : (0,367:57,0);
604 : (0,367:56,0);
607 : (0,367:4,23);
608 : (0,367:4,0);
609 : (0,367:4,23);
619 : (0,370:28,30);
624 : (0,370:28,31);
629 : (0,370:28,32);
634 : (0,370:28,33);
639 : (0,370:28,34);
703 : (0,370:28,40);
705 : (0,370:28,40);
708 : (0,370:28,40);
709 : (0,370:28,40);
744 : (0,370:28,40);
745 : (0,370:28,41);
755 : (0,370:28,46);
756 : (0,370:28,47);
767 : (0,370:28,52);
769 : (0,370:28,53);
774 : (0,370:28,56);
822 : (0,370:28,56);
824 : (0,370:28,56);
827 : (0,370:28,56);
828 : (0,370:28,56);
863 : (0,370:28,57);
864 : (0,370:28,58);
868 : (0,370:22,61);
872 : (0,372:31,62);
877 : (0,372:35,62);
881 : (0,372:13,62);
897 : (0,374:4,70);
945 : (0,374:4,79);
947 : (0,374:4,80);
967 : (0,374:4,82);
968 : (0,374:4,82);
976 : (0,374:4,82);
977 : (0,374:4,82);
979 : (0,374:4,82);
1021 : (0,374:4,82);
1022 : (0,374:4,82);
1023 : (0,374:4,82);
1039 : (0,374:4,82);
1041 : (0,374:4,82);
1044 : (0,374:4,85);
1046 : (0,374:4,85);
1047 : (0,374:4,86);
1049 : (0,374:4,86);
1062 : (0,374:4,89);
1063 : (0,374:4,89);
1064 : (0,374:4,89);
1066 : (0,374:4,89);
1074 : (0,374:4,93);
1091 : (0,374:4,93);
1092 : (0,374:4,93);
1100 : (0,374:4,93);
1101 : (0,374:4,93);
1103 : (0,374:4,93);
1145 : (0,374:4,93);
1146 : (0,374:4,93);
1147 : (0,374:4,93);
1352 : (0,378:56,100);
1357 : (0,378:25,100);
1358 : (0,378:23,100);
1364 : (0,378:19,100);
1464 : (0,381:0,0);
1468 : (0,381:0,110);
1469 : (0,381:0,110);
1621 : (0,370:28,45);
1632 : (0,370:28,51);
1640 : (0,370:28,52);
1648 : (0,370:28,53);
1659 : (0,374:4,78);
1667 : (0,374:4,79);
1675 : (0,374:4,85);
1683 : (0,374:4,86);
1694 : (0,374:4,87);
1705 : (0,374:4,88);
1735 : (0,370:28,0);
1737 : (0,374:4,0);
1858 : (0,370:28,0);
1902 : (0,331:5,0);
1930 : (0,381:0,0);
1958 : (0,370:28,0);
1986 : (0,370:28,0);
2014 : (0,374:4,0);
2042 : (0,370:28,0);
2070 : (0,370:28,0);
2098 : (0,370:28,0);
2126 : (0,374:4,0);
2169 : (0,331:5,0);
2171 : (0,381:0,0);
2173 : (0,370:28,0);
2175 : (0,374:4,0);
2180 : (0,355:52,0);
2181 : (0,355:52,8);
2189 : (0,356:55,9);
2197 : (0,370:28,45);
2204 : (0,378:61,0);
2205 : (0,378:61,100);
2306 : (0,370:28,56);
2309 : (0,374:4,93);

